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From: Jani Nikula <jani.nikula@intel.com>
To: Dave Airlie <airlied@gmail.com>, Simona Vetter <simona.vetter@ffwll.ch>
Cc: "Jani Nikula" <jani.nikula@linux.intel.com>,
	"Joonas Lahtinen" <joonas.lahtinen@linux.intel.com>,
	"Tvrtko Ursulin" <tursulin@ursulin.net>,
	"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
	"Thomas Zimmermann" <tzimmermann@suse.de>,
	"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
	"Maxime Ripard" <mripard@kernel.org>,
	"Matthew Brost" <matthew.brost@intel.com>,
	"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
	"Oded Gabbay" <ogabbay@kernel.org>,
	dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
	intel-xe@lists.freedesktop.org, dim-tools@lists.freedesktop.org
Subject: [PULL] drm-intel-next
Date: Thu, 02 Jul 2026 20:24:07 +0300	[thread overview]
Message-ID: <934cacdbf2a37856eb5cd6337d8774b449405bd8@intel.com> (raw)


Hi Dave & Sima -

The first i915 feature pull towards v7.3.

I'll be out for a bit, and Rodrigo will cover for me. I should be back
in time for the final feature pull request for v7.3, though.

BR,
Jani.


drm-intel-next-2026-07-02:
drm/i915 feature pull for v7.3:

Features and functionality:
- Novalake (NVL, display versio 35) Common Mode Timing Generator (CMTG) enabling (Animesh)
- NVL DC3CO enabling (Dibin)

Refactoring and cleanups:
- Refactor and document DP link recovery and capability tracking (Imre)
- i915 and xe driver display probe/remove/suspend/resume/shutdown cleanup and unification (Jani)
- Clean up bandwidth/SAGV code (Ville)
- Streamline Pre/Post-CSC LUT loops (Jani)
- Remove unused TGL DC3DO support (Dibin)
- Make read-only array rates static const (Colin Ian King)
- CDCLK sanitization improvements and cleanups (Ville)
- Break i915 and xe panic dependency on struct intel_framebuffer (Jani)
- GPIO pin renames and cleanups (Ville)
- Unify generic irq handler error messages (Jonathan)

Fixes:
- Various color pipeline fixes (Chaitanya)
- Fix step discontinuity in Pre/Post-CSC Gamma LUT (Sean Paul)
- Improve refresh rate changes without full modeset on VRR capable eDP (Ville)
- Display suspend/resume fixes (Imre)
- Fix LPE audio irq for PREEMPT-RT (Maarten)
- Fix HDMI scrambling enable (Jerome Tollet)
- LNL bandwidth buddy programming update (Vinod)
- Streamline display register wait timeouts (Ville)
- Fix DP MSA VTotal (Mitul)
- Fix LTPHY SSC enabling (Suraj)
- Fix LOBF requirements with optimized guardband (Ankit)
- Avoid full modeset for LRR vsync changes (Ankit)
- Fix vtotal-vsync distance when adjusting vtotal for lower refresh rate (Ankit)
- Extend VRR safe window wait for default VRR timing generator usage (Ankit)

Merges:
- Backmerge for v7.2-rc1 (Jani)

BR,
Jani.

The following changes since commit dc59e4fea9d83f03bad6bddf3fa2e52491777482:

  Linux 7.2-rc1 (2026-06-28 12:01:31 -0700)

are available in the Git repository at:

  https://gitlab.freedesktop.org/drm/i915/kernel.git tags/drm-intel-next-2026-07-02

for you to fetch changes up to 8e27f752037e72ccee9c4a7c4a6202ecf3daf603:

  drm/i915/ltphy: Fix SSC Enablement bit in PORT_CLOCK_CTL (2026-07-02 09:19:23 +0530)

----------------------------------------------------------------
drm/i915 feature pull for v7.3:

Features and functionality:
- Novalake (NVL, display versio 35) Common Mode Timing Generator (CMTG) enabling (Animesh)
- NVL DC3CO enabling (Dibin)

Refactoring and cleanups:
- Refactor and document DP link recovery and capability tracking (Imre)
- i915 and xe driver display probe/remove/suspend/resume/shutdown cleanup and unification (Jani)
- Clean up bandwidth/SAGV code (Ville)
- Streamline Pre/Post-CSC LUT loops (Jani)
- Remove unused TGL DC3DO support (Dibin)
- Make read-only array rates static const (Colin Ian King)
- CDCLK sanitization improvements and cleanups (Ville)
- Break i915 and xe panic dependency on struct intel_framebuffer (Jani)
- GPIO pin renames and cleanups (Ville)
- Unify generic irq handler error messages (Jonathan)

Fixes:
- Various color pipeline fixes (Chaitanya)
- Fix step discontinuity in Pre/Post-CSC Gamma LUT (Sean Paul)
- Improve refresh rate changes without full modeset on VRR capable eDP (Ville)
- Display suspend/resume fixes (Imre)
- Fix LPE audio irq for PREEMPT-RT (Maarten)
- Fix HDMI scrambling enable (Jerome Tollet)
- LNL bandwidth buddy programming update (Vinod)
- Streamline display register wait timeouts (Ville)
- Fix DP MSA VTotal (Mitul)
- Fix LTPHY SSC enabling (Suraj)
- Fix LOBF requirements with optimized guardband (Ankit)
- Avoid full modeset for LRR vsync changes (Ankit)
- Fix vtotal-vsync distance when adjusting vtotal for lower refresh rate (Ankit)
- Extend VRR safe window wait for default VRR timing generator usage (Ankit)

Merges:
- Backmerge for v7.2-rc1 (Jani)

----------------------------------------------------------------
Animesh Manna (21):
      drm/i915/cmtg: Add intel_cmtg_is_allowed() for CMTG
      drm/i915/cmtg: Set CMTG clock select
      drm/i915/cmtg: Add CMTG transcoder offset in struct _device_info
      drm/i915/display: Pass target transcoder to intel_set_transcoder_timings()
      drm/i915/display: Rename cpu_transcoder parameter to transcoder
      drm/i915/display: Skip DP_MIN_HBLANK_CTL programming for CMTG transcoders
      drm/i915/display: Pass transcoder to intel_set_transcoder_timings_lrr()
      drm/i915/display: Rename cpu_transcoder parameter to transcoder in LRR path
      drm/i915/cmtg: Set timings for CMTG by using transcoder timing helpers
      drm/i915/vrr: Pass transcoder to intel_vrr_set_fixed_rr_timings()
      drm/i915/display: Rename cpu_transcoder parameter to transcoder in VRR fixed-rr path
      drm/i915/cmtg: Program VRR fixed-rate timings for CMTG transcoder
      drm/i915/cmtg: Program VRR control register for CMTG transcoder
      drm/i915/cmtg: Set link M/N for CMTG transcoder
      drm/i915/cmtg: Add hook to enable CMTG with sync to port
      drm/i915/cmtg: Add a hook to make eDP transcoder secondary
      drm/i915/cmtg: Add trigger to enable/disable cmtg
      drm/i915/cmtg: Restore CMTG after DC6 exit
      drm/i915/cmtg: Add CMTG interrupt handling
      drm/i915/display: Guard CMTG disable with intel_cmtg_is_allowed()
      drm/i915/cmtg: Warn on invalid CMTG transcoder in intel_cmtg_disable()

Ankit Nautiyal (6):
      drm/i915/display: Handle VSYNC timing in LRR path
      drm/i915/panel: Preserve Vtotal-Vsync distance while adjusting vtotal
      drm/i915/alpm: Move the check for PSR and Fixed RR in compute_config_late
      drm/i915/dsb: shift delayed-vblank DSL wait start by one scanline
      drm/i915/dsb: Use safe window path when VRR TG is used
      Revert "drm/i915/psr: Allow SCL=0 on platforms with always-on VRR TG"

Chaitanya Kumar Borah (3):
      drm/i915/display: Don’t use atomic state back-pointer to derive color pipeline
      drm/i915: Avoid programming color HW blocks for NV12 Y planes
      drm/i915: Fix color blob reference handling in intel_plane_state

Colin Ian King (1):
      drm/i915/display: make read-only array rates static const

Dibin Moolakadan Subrahmanian (20):
      drm/i915/cmtg: Modify existing hook to disable CMTG
      drm/i915/cmtg: Add CMTG HWGB programming
      drm/i915/cmtg: Add CMTG scan line programming
      drm/i915/display: Remove TGL DC3CO support
      drm/i915/display: Switch DC3CO enable from standalone bit to DC level encoding
      drm/i915/display: Use FIELD_PREP() for DC state enable bits
      drm/i915/display: Add DC3CO DC_STATE enable/disable support
      drm/i915/display: Add HAS_DC3CO() macro
      drm/i915/display: Add DC3CO support check
      drm/i915/psr: Add psr2 deep sleep helper API
      drm/i915/display: Add DC3CO compute and set target state in commit tail
      drm/i915/display: Store DC3CO eligibility in PSR state
      drm/i915/display: PSR2: Set idle_frames to 0 for DC3CO
      drm/i915/display: Enable DC3CO idle protocol in ALPM
      drm/i915/display: PSR Add delayed work to exit DC3CO
      drm/i915/display: Add helper to enable DC counter
      drm/i915/display: Add DC3CO count and residency in dmc debugfs
      drm/i915/display: Guard CMTG function calls
      drm/i915/display: Enable DC3CO DC state
      drm/i915/display: Mask RO bits in gen9_write_dc_state()

Guangshuo Li (1):
      drm/i915: clear CRTC color blob pointers after dropping refs

Imre Deak (53):
      drm/i915: Keep display IRQs enabled for encoder suspend/shutdown
      drm/i915/xe: Enable HPD polling later during system resume
      drm/i915/dp_link_training: Introduce link training state struct
      drm/i915/dp_link_training: Factor out link training state reset helper
      drm/i915/dp_link_training: Flush commits in debugfs entries
      drm/i915/dp_link_training: Move link training helpers to link training code
      drm/i915/dp_link_training: Use link_training as base pointer in debugfs
      drm/i915/dp_link_training: Add helpers to access force retrain state
      drm/i915/dp_link_training: Move link recovery/debug state to link_training
      drm/i915/dp_link_training: Prevent repeated autoretrain attempts
      drm/i915/dp_link_training: Clamp sequential link training failure counter
      drm/i915/dp_link_training: Check for pending autoretrain explicitly
      drm/i915/dp_link_training: Add helper to query pending autoretrain
      drm/i915/dp_link_training: Add helper to query allowed autoretrain
      drm/i915/dp_link_training: Add helper to mark link training failure
      drm/i915/dp_link_training: Add helper to reset link recovery state
      drm/i915/dp_link_training: Track link recovery state with an enum
      drm/i915/dp_link_training: Add no-fallback link recovery state
      drm/i915/display: Factor out a helper to modeset a pipe with atomic state
      drm/i915/display: Simplify intel_modeset_commit_pipes_for_atomic_state()
      drm/i915/dp_link_training: Allocate atomic state for autoretrain modeset
      drm/i915/dp_link_training: Disallow autoretrains after failed modeset
      drm/i915/dp_link_training: Fix kernel-doc of intel_dp_init_lttpr_and_dprx_caps()
      drm/i915/dp_link_training: Document DP link recovery logic
      drm/i915/mtl+: Enable PPS before PLL
      drm/i915/dp: Rename intel_dp_link_config to intel_dp_link_config_entry
      drm/i915/dp: Add struct intel_dp_link_config
      drm/i915/dp_link_caps: Introduce DP link capability module
      drm/i915/dp_link_caps: Move common rate helpers to link caps
      drm/i915/dp_link_caps: Move forced link param helpers to link caps
      drm/i915/dp: Simplify querying of forced link parameters
      drm/i915/dp_link_caps: Move forced and max link debugfs entries to link caps
      drm/i915/dp_link_training: Use helpers to get forced link params
      drm/i915/dp_link_caps: Move forced link params to link_caps
      drm/i915/dp_link_caps: Move link config helpers to link caps
      drm/i915/dp_link_caps: Move link config tracking to link_caps
      drm/i915/dp_link_caps: Rename helper updating the link configurations
      drm/i915/dp: Factor out helper to get link rate capabilities
      drm/i915/dp_link_caps: Pass supported link rates to link caps update
      drm/i915/dp_link_caps: Add helper to print all supported link rates
      drm/i915/dp_link_caps: Add helper to get the number of supported link rates
      drm/i915/dp_link_caps: Add helper to get common rate index
      drm/i915/dp_link_caps: Move tracking of common rates to link_caps struct
      drm/i915/dp_link_caps: Track max common lane count in link_caps
      drm/i915/dp_link_caps: Use max common lane count from link_caps
      drm/i915/dp_link_caps: Add helpers to get max link limits
      drm/i915/dp_link_caps: Add helpers to set max link limits
      drm/i915/dp_link_caps: Add helper to reset max link limits
      drm/i915/dp_link_caps: Add helper to reset link_caps state
      drm/i915/dp_link_caps: Move max link limits to link_caps
      drm/i915/dp_link_caps: Pass link_caps to static functions
      drm/i915/dp_link_caps: Pass link_caps to config update/lookup helpers
      drm/i915/dp_link_caps: Pass link_caps to common rate helpers

Jani Nikula (41):
      drm/i915: add flush_workqueue(display->wq.cleanup) on shutdown
      drm/xe/display: remove intel_display_flush_cleanup_work() calls on suspend/shutdown
      drm/xe/display: drop duplicate intel_dp_mst_suspend() call
      drm/i915/display: add "pm" to intel_display_driver_{suspend, resume}() names
      drm/xe/display: rename xe_display_pm_shutdown*() to xe_display_shutdown*()
      drm/xe/display: relocate the xe_display_shutdown*() functions
      drm/xe/display: relocate the xe_display_pm_runtime_*() functions
      drm/{i915, xe}: move more calls inside intel_display_driver_pm_suspend()
      drm/{i915, xe}: move more calls inside intel_display_driver_pm_resume()
      drm/{i915, xe}: add intel_display_driver_pm_{suspend_late, resume_early}()
      drm/{i915,xe}: add intel_display_driver_shutdown_late()
      drm/i915: add intel_display_driver_shutdown()
      drm/i915/display: deduplicate suspend and shutdown a bit
      drm/xe/display: use intel_display_driver_pm_shutdown()
      drm/{i915, xe}: move more stuff to __intel_display_driver_pm_suspend()
      drm/i915/color: clean up variables in xelpd_program_plane_pre_csc_lut()
      drm/i915/color: clean up variables in xelpd_program_plane_post_csc_lut()
      drm/i915/color: reduce indent in xelpd_program_plane_pre_csc_lut()
      drm/i915/color: reduce indent in xelpd_program_plane_post_csc_lut()
      drm/i915/color: join loops in xelpd_program_plane_pre_csc_lut()
      drm/i915/color: join loops in xelpd_program_plane_post_csc_lut()
      drm/i915/color: deduplicate loops in xelpd_program_plane_pre_csc_lut()
      drm/i915/color: deduplicate loops in xelpd_program_plane_post_csc_lut()
      drm/intel: drop driver include from mchbar_regs.h
      drm/i915/panic: split out i915_gem_panic.[ch]
      drm/i915/panic: squash i915_panic.c into i915_gem_panic.c
      drm/i915/panic: remove the extra layer from panic hooks
      drm/{i915,xe}/panic: pass obj to panic setup
      drm/xe/panic: store fb bo in struct intel_panic
      drm/{i915, xe}/panic: drop dependency on struct intel_framebuffer
      drm/i915: move intel_display_device_probe() call a level higher
      drm/i915: remove superfluous checks for pdev->msi_enabled
      drm/{i915, xe}: move opregion/dram/bw init to intel_display_driver_probe_noirq()
      drm/xe/display: change order of intel_display_driver_remove_{nogem, noirq}() calls
      drm/{i915, xe}: move opregion cleanup to intel_display_driver_remove_nogem()
      drm/{i915, xe}: move intel_hpd_cancel_work() to intel_display_driver_remove_noirq()
      drm/i915/hdcp: check streams[] bounds before overflow
      drm/i915/hdcp: require monotonically increasing seq_num_v
      drm/i915/vrr: require valid min/max vfreq for VRR
      drm/i915/bios: range check LFP Data Block panel_type2
      Merge drm/drm-next into drm-intel-next

Jerome Tollet (1):
      drm/i915/hdmi: Poll for 200 msec for TMDS_Scrambler_Status

Jonathan Cavitt (1):
      drm/i915: Refactor generic_handle_irq_safe() error messages

Maarten Lankhorst (1):
      drm/i915/display: Fix intel_lpe_audio_irq_handler for PREEMPT-RT

Michał Grzelak (1):
      drm/i915/dp_link_caps: s/lc/lce/

Mitul Golani (1):
      drm/i915/display: Program TRANS_VTOTAL from mode vtotal

Nikita Zhandarovich (1):
      drm/i915/edp: Check supported link rates DPCD read

Sean Paul (2):
      drm/i915/color: Fix step discontinuity in Post-CSC Gamma LUT
      drm/i915/color: Fix step discontinuity in Pre-CSC Gamma LUT

Suraj Kandpal (3):
      drm/i915/cx0: Remove unnecessary hdmi link rate function declaration
      drm/i915/ltphy: Readout ssc_enabled for LT PHY
      drm/i915/ltphy: Fix SSC Enablement bit in PORT_CLOCK_CTL

Ville Syrjälä (29):
      drm/i915/de: Remove the 2 usec fast timeout
      drm/i915/bw: Don't memcpy() pointlessly
      drm/i915/bw: Streamline dg2_get_bw_info()
      drm/i915/bw: Initialize num_planes sensibly for the first plane group in TGL+
      drm/i915/bw: Move 'bi_next' to tighter scope
      drn/i915/bw: s/num_points/num_qgv_points/
      drm/i915/bw: Move num_{qgv,psf}_points out from the plane group
      drm/i915/bw: Move psf_bw[] out from the plane group
      drm/i915/bw: Move peakbw[] out from the plane group
      drm/i915/bw: Print derated bandwidth numbers for DG2
      drm/i915/bw: Use icl_qgv_bw()
      drm/i915/bw: Simplify the best max_data_rate search
      drm/i915/cdclk: Fix up CDCLK_FREQ_DECIMAL without a full PLL re-enable
      drm/i915/cdclk: Print the reason for the CDCLK sanitization
      drm/i915/cdclk: Clean up CDCLK_CTL defines
      drm/i915/cdclk: Document CDCLK_CTL bits
      drm/i915/cdclk: Introduce bxt_cdclk_cd2x_pipe_mask() and use it
      drm/i915/cdclk: Use the TGL+ CD2x pipe select bits also on ICL
      drm/i915/panel: Split VRR vs. fixed refresh rate fixed mode selection into separate stages
      drm/modes: Add DRM_MODE_MATCH_TIMINGS_VRR
      drm/i915: Pass the full atomic state to .compute_config()
      drm/i915/panel: Adjust intel_panel_compute_config() calling convention
      drm/i915/panel: Attempt VRR based refresh rate change for !allow_modeset
      drm/i915/gmbus: Rename GPIO pins
      drm/i915/gmbus: s/gmbus_pins_bdw/gmbus_pins_lpt/
      drm/i915/gmbus: Add gmbus_pins_lpt_lp[]
      drm/i915/gmbus: s/gmbus_pins_skl/gmbus_pins_spt/
      drm/i915/gmbus: Drop the platform suffixes from GMBUS pins
      drm/i915/hdmi: Remove CNP port F leftovers

Vinod Govindapillai (1):
      drm/i915/display: update to the BW buddy configuration

 .../gpu/intel-display/dp-link-training.rst         |    8 +
 Documentation/gpu/intel-display/index.rst          |    1 +
 drivers/gpu/drm/drm_modes.c                        |   23 +
 drivers/gpu/drm/i915/Makefile                      |    5 +-
 drivers/gpu/drm/i915/display/g4x_dp.c              |   15 +-
 drivers/gpu/drm/i915/display/g4x_hdmi.c            |    4 +-
 drivers/gpu/drm/i915/display/icl_dsi.c             |    5 +-
 drivers/gpu/drm/i915/display/intel_alpm.c          |   15 +-
 drivers/gpu/drm/i915/display/intel_bios.c          |   98 +-
 drivers/gpu/drm/i915/display/intel_bw.c            |  168 ++-
 drivers/gpu/drm/i915/display/intel_cdclk.c         |   54 +-
 drivers/gpu/drm/i915/display/intel_cmtg.c          |  280 ++++-
 drivers/gpu/drm/i915/display/intel_cmtg.h          |   19 +-
 drivers/gpu/drm/i915/display/intel_cmtg_regs.h     |   24 +-
 drivers/gpu/drm/i915/display/intel_color.c         |  115 +-
 drivers/gpu/drm/i915/display/intel_crt.c           |    9 +-
 drivers/gpu/drm/i915/display/intel_cursor.c        |    2 +-
 drivers/gpu/drm/i915/display/intel_cx0_phy.c       |   11 +
 drivers/gpu/drm/i915/display/intel_cx0_phy.h       |    1 -
 drivers/gpu/drm/i915/display/intel_ddi.c           |   29 +-
 drivers/gpu/drm/i915/display/intel_de.c            |   40 +-
 drivers/gpu/drm/i915/display/intel_display.c       |  170 +--
 drivers/gpu/drm/i915/display/intel_display.h       |    7 +
 drivers/gpu/drm/i915/display/intel_display_core.h  |   14 +-
 .../gpu/drm/i915/display/intel_display_debugfs.c   |    2 +
 .../gpu/drm/i915/display/intel_display_device.c    |   14 +
 .../gpu/drm/i915/display/intel_display_device.h    |    3 +-
 .../gpu/drm/i915/display/intel_display_driver.c    |  131 ++-
 .../gpu/drm/i915/display/intel_display_driver.h    |    9 +-
 drivers/gpu/drm/i915/display/intel_display_irq.c   |   19 +
 drivers/gpu/drm/i915/display/intel_display_irq.h   |    2 +
 .../gpu/drm/i915/display/intel_display_limits.h    |    2 +
 drivers/gpu/drm/i915/display/intel_display_power.c |  185 +++-
 drivers/gpu/drm/i915/display/intel_display_power.h |   40 +
 .../drm/i915/display/intel_display_power_well.c    |   76 +-
 .../drm/i915/display/intel_display_power_well.h    |    1 +
 drivers/gpu/drm/i915/display/intel_display_regs.h  |   46 +-
 drivers/gpu/drm/i915/display/intel_display_types.h |   57 +-
 drivers/gpu/drm/i915/display/intel_dmc.c           |   15 +-
 drivers/gpu/drm/i915/display/intel_dmc_regs.h      |    2 +
 drivers/gpu/drm/i915/display/intel_dmc_wl.c        |    2 +-
 drivers/gpu/drm/i915/display/intel_dp.c            |  496 ++-------
 drivers/gpu/drm/i915/display/intel_dp.h            |   16 +-
 drivers/gpu/drm/i915/display/intel_dp_link_caps.c  |  675 ++++++++++++
 drivers/gpu/drm/i915/display/intel_dp_link_caps.h  |   47 +
 .../gpu/drm/i915/display/intel_dp_link_training.c  | 1093 +++++++++++++++-----
 .../gpu/drm/i915/display/intel_dp_link_training.h  |   15 +
 drivers/gpu/drm/i915/display/intel_dp_mst.c        |    8 +-
 drivers/gpu/drm/i915/display/intel_dp_test.c       |    7 +-
 drivers/gpu/drm/i915/display/intel_dp_tunnel.c     |    6 +-
 drivers/gpu/drm/i915/display/intel_dsb.c           |   32 +-
 drivers/gpu/drm/i915/display/intel_dvo.c           |    5 +-
 drivers/gpu/drm/i915/display/intel_gmbus.c         |  148 +--
 drivers/gpu/drm/i915/display/intel_gmbus.h         |   22 +-
 drivers/gpu/drm/i915/display/intel_hdcp.c          |   12 +-
 drivers/gpu/drm/i915/display/intel_hdmi.c          |   71 +-
 drivers/gpu/drm/i915/display/intel_hdmi.h          |    2 +
 drivers/gpu/drm/i915/display/intel_initial_plane.c |    2 +-
 drivers/gpu/drm/i915/display/intel_lpe_audio.c     |    4 +-
 drivers/gpu/drm/i915/display/intel_lt_phy.c        |   20 +-
 drivers/gpu/drm/i915/display/intel_lvds.c          |    5 +-
 drivers/gpu/drm/i915/display/intel_panel.c         |  170 ++-
 drivers/gpu/drm/i915/display/intel_panel.h         |    6 +-
 drivers/gpu/drm/i915/display/intel_parent.c        |    6 +-
 drivers/gpu/drm/i915/display/intel_parent.h        |    4 +-
 drivers/gpu/drm/i915/display/intel_plane.c         |   52 +-
 drivers/gpu/drm/i915/display/intel_plane.h         |    5 +-
 drivers/gpu/drm/i915/display/intel_psr.c           |  267 ++---
 drivers/gpu/drm/i915/display/intel_psr.h           |    1 +
 drivers/gpu/drm/i915/display/intel_psr_regs.h      |    1 +
 drivers/gpu/drm/i915/display/intel_sdvo.c          |    7 +-
 drivers/gpu/drm/i915/display/intel_tv.c            |    5 +-
 drivers/gpu/drm/i915/display/intel_vrr.c           |   33 +-
 drivers/gpu/drm/i915/display/intel_vrr.h           |    4 +-
 drivers/gpu/drm/i915/display/vlv_dsi.c             |    5 +-
 drivers/gpu/drm/i915/gem/i915_gem_object.h         |    7 -
 drivers/gpu/drm/i915/gem/i915_gem_pages.c          |  128 ---
 drivers/gpu/drm/i915/gem/i915_gem_panic.c          |  147 +++
 drivers/gpu/drm/i915/gem/i915_gem_panic.h          |   11 +
 drivers/gpu/drm/i915/gt/intel_gsc.c                |    2 +-
 drivers/gpu/drm/i915/gvt/edid.c                    |   14 +-
 drivers/gpu/drm/i915/i915_driver.c                 |  123 +--
 drivers/gpu/drm/i915/i915_panic.c                  |   35 -
 drivers/gpu/drm/i915/i915_panic.h                  |    9 -
 drivers/gpu/drm/xe/Makefile                        |    1 +
 drivers/gpu/drm/xe/display/xe_display.c            |  244 ++---
 drivers/gpu/drm/xe/display/xe_display.h            |   10 +-
 drivers/gpu/drm/xe/display/xe_panic.c              |   26 +-
 drivers/gpu/drm/xe/xe_device.c                     |    4 +-
 include/drm/drm_modes.h                            |    1 +
 include/drm/intel/display_parent_interface.h       |    4 +-
 include/drm/intel/mchbar_regs.h                    |    2 -
 92 files changed, 3736 insertions(+), 2007 deletions(-)
 create mode 100644 Documentation/gpu/intel-display/dp-link-training.rst
 create mode 100644 drivers/gpu/drm/i915/display/intel_dp_link_caps.c
 create mode 100644 drivers/gpu/drm/i915/display/intel_dp_link_caps.h
 create mode 100644 drivers/gpu/drm/i915/gem/i915_gem_panic.c
 create mode 100644 drivers/gpu/drm/i915/gem/i915_gem_panic.h
 delete mode 100644 drivers/gpu/drm/i915/i915_panic.c
 delete mode 100644 drivers/gpu/drm/i915/i915_panic.h

-- 
Jani Nikula, Intel

             reply	other threads:[~2026-07-02 17:24 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-02 17:24 Jani Nikula [this message]
  -- strict thread matches above, loose matches on Subject: below --
2026-05-28 13:37 [PULL] drm-intel-next Rodrigo Vivi
2026-05-14 14:24 Rodrigo Vivi
2026-05-05 17:50 Rodrigo Vivi
2026-05-06 19:53 ` Rodrigo Vivi
2026-03-30  9:19 Jani Nikula
2026-03-16 10:34 Jani Nikula
2026-01-15 16:10 Rodrigo Vivi
2026-01-15 16:19 ` Vivi, Rodrigo
2026-01-15 15:52 Rodrigo Vivi
2026-01-21 14:19 ` Rodrigo Vivi
2026-01-22  5:26   ` Dave Airlie
2026-01-22 14:10     ` Vivi, Rodrigo
2025-12-19 20:37 Rodrigo Vivi
2025-11-14 14:58 Jani Nikula
2025-11-04 13:43 Jani Nikula
2025-09-18 13:53 Rodrigo Vivi
2025-09-12 13:36 Rodrigo Vivi
2025-09-18 13:46 ` Rodrigo Vivi
2025-09-05 21:58 Rodrigo Vivi
2025-07-10 22:28 Rodrigo Vivi
2025-07-11  9:27 ` Simona Vetter
2025-07-04 10:29 Jani Nikula
2025-07-08 12:30 ` Simona Vetter
2025-06-18 16:22 Jani Nikula
2025-05-08 13:31 Rodrigo Vivi
2025-04-11 13:07 Rodrigo Vivi
2025-03-10 10:08 Jani Nikula
2025-02-24 12:56 Jani Nikula
2025-01-07 19:24 Rodrigo Vivi
2024-12-11 20:38 Rodrigo Vivi
2024-12-20 14:40 ` Rodrigo Vivi
2024-11-04 13:28 Jani Nikula
2024-10-11 11:08 Jani Nikula
2024-09-03 15:25 Rodrigo Vivi
2024-08-29 14:16 Rodrigo Vivi
2024-08-13 17:24 Rodrigo Vivi
2024-06-28 14:46 Jani Nikula
2024-07-09 20:27 ` Rodrigo Vivi
2024-07-10  8:37   ` Daniel Vetter
2024-06-19 17:08 Jani Nikula
2024-04-30 20:07 Rodrigo Vivi
2024-04-24 16:32 Rodrigo Vivi
2024-04-17 13:38 Rodrigo Vivi
2024-04-17 14:05 ` Maxime Ripard
2024-02-27 16:16 Jani Nikula

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