From: Luca Coelho <luca@coelho.fi>
To: Imre Deak <imre.deak@intel.com>,
intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: stable@vger.kernel.org, Charlton Lin <charlton.lin@intel.com>,
Khaled Almahallawy <khaled.almahallawy@intel.com>
Subject: Re: [PATCH 01/19] drm/i915/lnl+/tc: Fix handling of an enabled/disconnected dp-alt sink
Date: Thu, 07 Aug 2025 13:59:21 +0300 [thread overview]
Message-ID: <95999d2602067f556dc2e5739758deef7c462e17.camel@coelho.fi> (raw)
In-Reply-To: <20250805073700.642107-2-imre.deak@intel.com>
On Tue, 2025-08-05 at 10:36 +0300, Imre Deak wrote:
> The TypeC PHY HW readout during driver loading and system resume
> determines which TypeC mode the PHY is in (legacy/DP-alt/TBT-alt) and
> whether the PHY is connected, based on the PHY's Owned and Ready flags.
> For the PHY to be in DP-alt or legacy mode and for the PHY to be in the
> connected state in these modes, both the Owned (set by the BIOS/driver)
> and the Ready (set by the HW) flags should be set.
>
> On ICL-MTL the HW kept the PHY's Ready flag set after the driver
> connected the PHY by acquiring the PHY ownership (by setting the Owned
> flag), until the driver disconnected the PHY by releasing the PHY
> ownership (by clearing the Owned flag). On LNL+ this has changed, in
> that the HW clears the Ready flag as soon as the sink gets disconnected,
> even if the PHY ownership was acquired already and hence the PHY is
> being used by the display.
>
> When inheriting the HW state from BIOS for a PHY connected in DP-alt
> mode on which the sink got disconnected - i.e. in a case where the sink
> was connected while BIOS/GOP was running and so the sink got enabled
> connecting the PHY, but the user disconnected the sink by the time the
> driver loaded - the PHY Owned but not Ready state must be accounted for
> on LNL+ according to the above. Do that by assuming on LNL+ that the PHY
> is connected in DP-alt mode whenever the PHY Owned flag is set,
> regardless of the PHY Ready flag.
>
> This fixes a problem on LNL+, where the PHY TypeC mode / connected state
> was detected incorrectly for a DP-alt sink, which got connected and then
> disconnected by the user in the above way.
>
> Cc: stable@vger.kernel.org # v6.8+
> Reported-by: Charlton Lin <charlton.lin@intel.com>
> Tested-by: Khaled Almahallawy <khaled.almahallawy@intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_tc.c | 16 ++++++++++------
> 1 file changed, 10 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> index 3bc57579fe53e..73a08bd84a70a 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -1226,14 +1226,18 @@ static void tc_phy_get_hw_state(struct intel_tc_port *tc)
> tc->phy_ops->get_hw_state(tc);
> }
>
> -static bool tc_phy_is_ready_and_owned(struct intel_tc_port *tc,
> - bool phy_is_ready, bool phy_is_owned)
> +static bool tc_phy_in_legacy_or_dp_alt_mode(struct intel_tc_port *tc,
> + bool phy_is_ready, bool phy_is_owned)
Personally I don't like the "or" in the function name. You're
returning a boolean which is true or false. The return value is akin
to answering "Yes/No" to the question "Is it black or white".
This is a nitpick, obviously, so I'll leave it up to you.
Regardless:
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
--
Cheers,
Luca.
> {
> struct intel_display *display = to_intel_display(tc->dig_port);
>
> - drm_WARN_ON(display->drm, phy_is_owned && !phy_is_ready);
> + if (DISPLAY_VER(display) < 20) {
> + drm_WARN_ON(display->drm, phy_is_owned && !phy_is_ready);
>
> - return phy_is_ready && phy_is_owned;
> + return phy_is_ready && phy_is_owned;
> + } else {
> + return phy_is_owned;
> + }
> }
>
> static bool tc_phy_is_connected(struct intel_tc_port *tc,
> @@ -1244,7 +1248,7 @@ static bool tc_phy_is_connected(struct intel_tc_port *tc,
> bool phy_is_owned = tc_phy_is_owned(tc);
> bool is_connected;
>
> - if (tc_phy_is_ready_and_owned(tc, phy_is_ready, phy_is_owned))
> + if (tc_phy_in_legacy_or_dp_alt_mode(tc, phy_is_ready, phy_is_owned))
> is_connected = port_pll_type == ICL_PORT_DPLL_MG_PHY;
> else
> is_connected = port_pll_type == ICL_PORT_DPLL_DEFAULT;
> @@ -1352,7 +1356,7 @@ tc_phy_get_current_mode(struct intel_tc_port *tc)
> phy_is_ready = tc_phy_is_ready(tc);
> phy_is_owned = tc_phy_is_owned(tc);
>
> - if (!tc_phy_is_ready_and_owned(tc, phy_is_ready, phy_is_owned)) {
> + if (!tc_phy_in_legacy_or_dp_alt_mode(tc, phy_is_ready, phy_is_owned)) {
> mode = get_tc_mode_in_phy_not_owned_state(tc, live_mode);
> } else {
> drm_WARN_ON(display->drm, live_mode == TC_PORT_TBT_ALT);
next prev parent reply other threads:[~2025-08-07 10:59 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-05 7:36 [PATCH 00/19] drm/i915/tc: Fix enabled/disconnected DP-alt sink handling Imre Deak
2025-08-05 7:36 ` [PATCH 01/19] drm/i915/lnl+/tc: Fix handling of an enabled/disconnected dp-alt sink Imre Deak
2025-08-07 7:06 ` Kahola, Mika
2025-08-07 10:59 ` Luca Coelho [this message]
2025-08-07 11:38 ` Imre Deak
2025-08-07 12:19 ` Jani Nikula
2025-08-07 12:32 ` Imre Deak
2025-08-07 12:50 ` Imre Deak
2025-08-07 13:05 ` Jani Nikula
2025-08-07 13:24 ` Imre Deak
2025-08-07 14:10 ` Luca Coelho
2025-08-05 7:36 ` [PATCH 02/19] drm/i915/icl+/tc: Cache the max lane count value Imre Deak
2025-08-05 9:33 ` [PATCH v2 " Imre Deak
2025-08-07 8:07 ` Kahola, Mika
2025-08-05 7:36 ` [PATCH 03/19] drm/i915/lnl+/tc: Fix max lane count HW readout Imre Deak
2025-08-05 9:33 ` [PATCH v2 " Imre Deak
2025-08-07 8:36 ` Kahola, Mika
2025-08-05 7:36 ` [PATCH 04/19] drm/i915/lnl+/tc: Use the cached max lane count value Imre Deak
2025-08-07 8:49 ` Kahola, Mika
2025-08-05 7:36 ` [PATCH 05/19] drm/i915/icl+/tc: Convert AUX powered WARN to a debug message Imre Deak
2025-08-07 12:29 ` Kahola, Mika
2025-08-05 7:36 ` [PATCH 06/19] drm/i915/tc: Use the cached max lane count value Imre Deak
2025-08-06 12:02 ` Kahola, Mika
2025-08-05 7:36 ` [PATCH 07/19] drm/i915/tc: Move getting the power domain before reading DFLEX registers Imre Deak
2025-08-06 12:56 ` Kahola, Mika
2025-08-05 7:36 ` [PATCH 08/19] drm/i915/tc: Move asserting the power state after reading TCSS_DDI_STATUS Imre Deak
2025-08-06 13:22 ` Kahola, Mika
2025-08-05 7:36 ` [PATCH 09/19] drm/i915/tc: Add an enum for the TypeC pin assignment Imre Deak
2025-08-07 12:39 ` Kahola, Mika
2025-08-05 7:36 ` [PATCH 10/19] drm/i915/tc: Pass pin assignment value around using the pin assignment enum Imre Deak
2025-08-07 12:56 ` Kahola, Mika
2025-08-05 7:36 ` [PATCH 11/19] drm/i915/tc: Handle pin assignment NONE on all platforms Imre Deak
2025-08-07 12:57 ` Kahola, Mika
2025-08-05 7:36 ` [PATCH 12/19] drm/i915/tc: Validate the pin assignment " Imre Deak
2025-08-07 13:08 ` Kahola, Mika
2025-08-05 7:36 ` [PATCH 13/19] drm/i915/tc: Unify the way to get " Imre Deak
2025-08-08 6:44 ` Kahola, Mika
2025-08-05 7:36 ` [PATCH 14/19] drm/i915/tc: Unify the way to get the max lane count value on MTL+ Imre Deak
2025-08-08 7:32 ` Kahola, Mika
2025-08-05 7:36 ` [PATCH 15/19] drm/i915/tc: Handle non-TC encoders when getting the pin assignment Imre Deak
2025-08-08 7:45 ` Kahola, Mika
2025-08-05 7:36 ` [PATCH 16/19] drm/i915/tc: Pass intel_tc_port to internal lane mask/count helpers Imre Deak
2025-08-08 8:25 ` Kahola, Mika
2025-08-05 7:36 ` [PATCH 17/19] dmc/i915/tc: Report pin assignment NONE in TBT-alt mode Imre Deak
2025-08-08 8:26 ` Kahola, Mika
2025-08-05 7:36 ` [PATCH 18/19] drm/i915/tc: Cache the pin assignment value Imre Deak
2025-08-08 8:27 ` Kahola, Mika
2025-08-05 7:37 ` [PATCH 19/19] drm/i915/tc: Debug print the pin assignment and max lane count Imre Deak
2025-08-08 8:28 ` Kahola, Mika
2025-08-05 7:46 ` ✗ CI.checkpatch: warning for drm/i915/tc: Fix enabled/disconnected DP-alt sink handling Patchwork
2025-08-05 7:47 ` ✓ CI.KUnit: success " Patchwork
2025-08-05 8:02 ` ✗ CI.checksparse: warning " Patchwork
2025-08-05 8:49 ` ✗ Xe.CI.BAT: failure " Patchwork
2025-08-05 10:08 ` ✓ Xe.CI.Full: success " Patchwork
2025-08-05 11:41 ` ✗ CI.checkpatch: warning for drm/i915/tc: Fix enabled/disconnected DP-alt sink handling (rev3) Patchwork
2025-08-05 11:42 ` ✓ CI.KUnit: success " Patchwork
2025-08-05 11:57 ` ✗ CI.checksparse: warning " Patchwork
2025-08-05 13:02 ` ✓ Xe.CI.BAT: success " Patchwork
2025-08-05 15:31 ` ✓ Xe.CI.Full: " Patchwork
2025-08-06 11:44 ` [PATCH 00/19] drm/i915/tc: Fix enabled/disconnected DP-alt sink handling Luca Coelho
2025-08-06 11:54 ` Imre Deak
2025-08-06 12:54 ` Luca Coelho
2025-08-06 13:12 ` Imre Deak
2025-08-06 13:16 ` Luca Coelho
[not found] ` <175439829105.213103.3969215907569188087@1538d3639d33>
2025-08-13 12:43 ` ✗ i915.CI.Full: failure for drm/i915/tc: Fix enabled/disconnected DP-alt sink handling (rev3) Imre Deak
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