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 messages from 2025-05-06 11:17:30 to 2025-05-07 12:03:47 UTC [more...]

[PATCH v2 00/12] drm/i915/dp_mst: Add support for fractional link bpps
 2025-05-07 12:03 UTC  (21+ messages)
` [PATCH v2 02/12] drm/i915/dp_mst: Simplify handling the single-bpp case during state computation
` [PATCH v2 07/12] drm/i915/dp: Limit max link bpp properly to a fractional value on SST
` [PATCH v2 08/12] drm/i915/dp_mst: Add support for fractional compressed link bpps on MST
` [PATCH v2 09/12] drm/i915/display: Factor out intel_display_{min, max}_pipe_bpp()
` [PATCH v2 10/12] drm/i915/dp: Export intel_dp_dsc_min_src_compressed_bpp()
` [PATCH v2 11/12] drm/i915: Add support for forcing the link bpp on a connector
` [PATCH v2 12/12] drm/i915/dp_mst: Enable fractional link bpps on MST if the bpp is forced

[PATCH v6 0/5] Enable SVM atomics in Xe / GPU SVM
 2025-05-07 12:01 UTC  (15+ messages)
` [PATCH v6 1/5] drm/gpusvm: Introduce devmem_only flag for allocation
` [PATCH v6 2/5] drm/xe: Strict migration policy for atomic SVM faults
` [PATCH v6 3/5] drm/gpusvm: Add timeslicing support to GPU SVM
` [PATCH v6 4/5] drm/xe: Timeslice GPU on atomic SVM fault
` [PATCH v6 5/5] drm/xe: Add atomic_svm_timeslice_ms debugfs entry
` ✓ CI.Patch_applied: success for Enable SVM atomics in Xe / GPU SVM (rev6)
` ✓ CI.checkpatch: "
` ✓ CI.KUnit: "
` ✓ CI.Build: "
` ✓ CI.Hooks: "
` ✓ CI.checksparse: "
` ✓ Xe.CI.BAT: "
` ✗ Xe.CI.Full: failure "

[PATCH v6 00/20] Prefetch Support for svm ranges
 2025-05-07 11:39 UTC  (12+ messages)
` [PATCH v6 02/20] drm/xe: Strict migration policy for atomic SVM faults
` [PATCH v6 19/20] drm/xe/svm: Implement prefetch support for SVM ranges

[PATCH v4 0/5] drm/xe/hwmon: Add mailbox power limits, PL2, read energy from PMT
 2025-05-07 11:04 UTC  (15+ messages)
` [PATCH v4 1/5] drm/xe/hwmon: Add support to manage power limits though mailbox
` [PATCH v4 2/5] drm/xe/hwmon: Move card reactive critical power under channel card
` [PATCH v4 3/5] drm/xe/hwmon: Add support to manage PL2 though mailbox
` [PATCH v4 4/5] drm/xe/hwmon: Expose powerX_cap_interval
` [PATCH v4 5/5] drm/xe/hwmon: Read energy status from PMT
` ✓ CI.Patch_applied: success for drm/xe/hwmon: Add mailbox power limits, PL2, read energy from PMT (rev2)
` ✓ CI.checkpatch: "
` ✓ CI.KUnit: "
` ✓ CI.Build: "
` ✗ CI.Hooks: failure "
` ✓ CI.checksparse: success "
` ✗ Xe.CI.BAT: failure "
` ✗ Xe.CI.Full: "

[PATCH v2] drm/xe/xe2hpg: Add Wa_22021007897
 2025-05-07 10:56 UTC  (8+ messages)
` ✓ CI.Patch_applied: success for drm/xe/xe2hpg: Add Wa_22021007897 (rev2)
` ✓ CI.checkpatch: "
` ✓ CI.KUnit: "
` ✓ CI.Build: "
` ✓ CI.Hooks: "
` ✓ CI.checksparse: "
` ✓ Xe.CI.BAT: "

[PATCH 0/4] drm/{i915, xe}: convert i915->display and xe->display into pointers
 2025-05-07  9:38 UTC  (5+ messages)
` [PATCH 1/4] drm/xe/rpm: use to_xe_device() instead of container_of
` [PATCH 2/4] drm/xe/display: do not reference xe->display inline
` [PATCH 3/4] drm/i915: do not reference i915->display inline
` [PATCH 4/4] drm/{i915, xe}: convert i915 and xe display members into pointers

[PATCH v4 00/17] Enable/Disable DC balance along with VRR DSB
 2025-05-07  8:41 UTC  (32+ messages)
` [PATCH v4 01/17] drm/i915/vrr: Fix the adjustment for the fixed rr vtotal for Display < 13
` [PATCH v4 02/17] drm/i915/vrr: Refactor vmin/vmax stuff
` [PATCH v4 03/17] drm/i915/display: Add source param for dc balance
` [PATCH v4 04/17] drm/i915/display: Add pipe dmc registers and bits for DC Balance
` [PATCH v4 05/17] drm/i915/display: Add VRR DC balance registers
` [PATCH v4 06/17] drm/i915/vrr: Add functions to read out vmin/vmax stuff
` [PATCH v4 07/17] drm/i915/vrr: Add DC Balance params to crtc_state
` [PATCH v4 08/17] drm/i915/vrr: Add state dump for DC Balance params
` [PATCH v4 09/17] drm/i915/vrr: Add compute config "
` [PATCH v4 10/17] drm/i915/vrr: Write DC balance params to hw registers
` [PATCH v4 11/17] drm/i915: Extract vrr_vblank_start()
` [PATCH v4 12/17] drm/i915/vrr: Implement vblank evasion with DC balancing
` [PATCH v4 13/17] drm/i915/dsb: Add pipedmc dc balance enable/disable
` [PATCH v4 14/17] drm/i915/vrr: Restructure VRR enablement bit
` [PATCH v4 15/17] drm/i915/vrr: Pause DC Balancing for DSB commits
` [PATCH v4 16/17] drm/i915/vrr: Add function to check if DC Balance Possible
` [PATCH v4 17/17] drm/i915/vrr: Enable DC Balance bit
` ✓ CI.Patch_applied: success for Enable/Disable DC balance along with VRR DSB (rev4)
` ✓ CI.checkpatch: "
` ✓ CI.KUnit: "
` ✓ CI.Build: "
` ✓ CI.Hooks: "
` ✗ CI.checksparse: warning "
` ✓ Xe.CI.BAT: success "
` ✓ Xe.CI.Full: "

[PATCH 0/8] drm/i915: irq_lock refactoring, move to display
 2025-05-07  8:34 UTC  (26+ messages)
` [PATCH 1/8] drm/i915/irq: move locking inside vlv_display_irq_reset()
` [PATCH 2/8] drm/i915/irq: move locking inside valleyview_{enable, disable}_display_irqs()
` [PATCH 3/8] drm/i915/irq: move locking inside vlv_display_irq_postinstall()
` [PATCH 4/8] drm/i915/irq: split out i915_display_irq_postinstall()
` [PATCH 5/8] drm/i915/irq: split out i965_display_irq_postinstall()
` [PATCH 6/8] drm/i915/irq: make i915_enable_asle_pipestat() static
` [PATCH 7/8] drm/i915/rps: refactor display rps support
` [PATCH 8/8] drm/i915/irq: move i915->irq_lock to display->irq.lock
` ✓ CI.Patch_applied: success for drm/i915: irq_lock refactoring, move to display
` ✗ CI.checkpatch: warning "
` ✓ CI.KUnit: success "
` ✓ CI.Build: "
` ✓ CI.Hooks: "
` ✓ CI.checksparse: "
` ✓ Xe.CI.BAT: "
` ✗ Xe.CI.Full: failure "

[PATCH 0/4] drm/i915/display: minor cleanups on drm_i915_private use
 2025-05-07  7:55 UTC  (6+ messages)
` ✗ CI.checksparse: warning for "
` ✓ Xe.CI.BAT: success "
` ✗ Xe.CI.Full: failure "

[PATCH] drm/xe/xe2hpg: Add Wa_22021007897
 2025-05-07  6:36 UTC 

[PATCH 1/1] drm/xe: Use copy_from_user() instead of __copy_from_user()
 2025-05-07  6:00 UTC  (9+ messages)
` ✓ CI.Patch_applied: success for series starting with [1/1] drm/xe: Use copy_from_user() instead of __copy_from_user() (rev2)
` ✓ CI.checkpatch: "
` ✓ CI.KUnit: "
` ✓ CI.Build: "
` ✓ CI.Hooks: "
` ✓ CI.checksparse: "
` ✓ Xe.CI.BAT: "
` ✗ Xe.CI.Full: failure "

[PATCH v2] drm/xe: Add helper function to inject fault into ct_dead_capture()
 2025-05-07  5:13 UTC  (3+ messages)

[PATCH] drm/xe: Release force wake first then runtime power
 2025-05-07  5:05 UTC  (10+ messages)
` ✓ CI.Patch_applied: success for "
` ✓ CI.checkpatch: "
` ✓ CI.KUnit: "
` ✓ CI.Build: "
` ✓ CI.Hooks: "
` ✓ CI.checksparse: "
` ✓ Xe.CI.BAT: "
` ✗ Xe.CI.Full: failure "

[PATCH v7 0/3] BMG PCIe link downgrade attributes and usage
 2025-05-07  4:50 UTC  (3+ messages)
` [PATCH v7 1/3] drm/xe: Move xe_device_sysfs_init() to xe_device_probe()

[PATCH v3 0/4] Support active context utilization
 2025-05-07  4:03 UTC  (13+ messages)
` [PATCH v4 1/4] drm/xe: Save CTX_TIMESTAMP mmio value instead of LRC value
` [PATCH v4 2/4] drm/xe: Save the gt pointer in lrc and drop the tile
` [PATCH v4 3/4] drm/xe: Check 64-bit CTX timestamp for TDR when available
` [PATCH v4 4/4] drm/xe: Add WA BB to capture active context utilization
` ✓ CI.Patch_applied: success for Support active context utilization (rev3)
` ✗ CI.checkpatch: warning "
` ✓ CI.KUnit: success "
` ✓ CI.Build: "
` ✓ CI.Hooks: "
` ✓ CI.checksparse: "
` ✓ Xe.CI.BAT: "
` ✗ Xe.CI.Full: failure "

[PATCH 00/10] drm/xe/ggtt: Stop relying on GGTT internals
 2025-05-07  1:52 UTC  (9+ messages)
` ✓ CI.Patch_applied: success for drm/xe/ggtt: Stop relying on GGTT internals. (rev2)
` ✗ CI.checkpatch: warning "
` ✓ CI.KUnit: success "
` ✓ CI.Build: "
` ✓ CI.Hooks: "
` ✓ CI.checksparse: "
` ✓ Xe.CI.BAT: "
` ✗ Xe.CI.Full: failure "

[PATCH v23 0/5] drm/xe/xe_vm: Implement xe_vm_get_property_ioctl
 2025-05-06 21:30 UTC  (6+ messages)
` [PATCH v23 2/5] drm/xe/xe_gt_pagefault: Move pagefault struct to header

[PATCH v3 0/4] Support active context utilization
 2025-05-06 20:23 UTC  (4+ messages)
` ✗ Xe.CI.BAT: failure for Support active context utilization (rev2)

[PATCH v2 0/3] ALPM rework and fixes
 2025-05-06 19:18 UTC  (12+ messages)
` [PATCH v2 1/3] drm/i915/alpm: Move disabling sink ALPM to intel_alpm.c
` [PATCH v2 2/3] drm/i915/alpm: Disable ALPM rework
` [PATCH v2 3/3] drm/i915/alpm: Stop writing ALPM registers when PSR is enabled
` ✓ CI.Patch_applied: success for ALPM rework and fixes (rev2)
` ✓ CI.checkpatch: "
` ✓ CI.KUnit: "
` ✓ CI.Build: "
` ✓ CI.Hooks: "
` ✗ CI.checksparse: warning "
` ✓ Xe.CI.BAT: success "
` ✗ Xe.CI.Full: failure "

[PATCH] drm/xe/mocs: Check if all domains awake
 2025-05-06 18:16 UTC  (9+ messages)
` ✓ CI.Patch_applied: success for "
` ✗ CI.checkpatch: warning "
` ✓ CI.KUnit: success "
` ✓ CI.Build: "
` ✓ CI.Hooks: "
` ✓ CI.checksparse: "
` ✓ Xe.CI.BAT: "
` ✓ Xe.CI.Full: "

[RFC 0/9] Introducing firmware late binding
 2025-05-06 18:13 UTC  (3+ messages)
` [RFC 9/9] {fwctl,drm}/xe/pcode: Introduce xe_pcode_fwctl

Regression on drm-tip
 2025-05-06 16:24 UTC  (3+ messages)
` [REGRESSION] v6.15-rc3: 1a931c4f5e68 ("igc: add lock preventing multiple simultaneous PTM transactions")
  ` [Intel-wired-lan] "

[PATCH 0/8] drm/sched: Allow drivers to skip the reset with DRM_GPU_SCHED_STAT_RUNNING
 2025-05-06 14:32 UTC  (17+ messages)
` [PATCH 1/8] drm/sched: Allow drivers to skip the reset and keep on running
` [PATCH 2/8] drm/sched: Always free the job after the timeout
` [PATCH 3/8] drm/sched: Reduce scheduler's timeout for timeout tests
` [PATCH 4/8] drm/sched: Add new test for DRM_GPU_SCHED_STAT_RUNNING

[PATCH] drm/i915/psr: Do not read PSR2_SU_STATUS on AlderLake and onwards
 2025-05-06 12:23 UTC  (2+ messages)


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