messages from 2025-10-31 18:17:29 to 2025-11-03 05:41:24 UTC [more...]
[PATCH v4 0/5] Improve VMA merging for CPU-address-mirrored mappings
2025-11-03 6:09 UTC (6+ messages)
` [PATCH v4 1/5] drm/xe: Add helper to extend CPU-mirrored VMA range for merge
` [PATCH v4 2/5] drm/xe: Merge adjacent default-attribute VMAs during garbage collection
` [PATCH v4 3/5] drm/xe/svm: Extend MAP range to reduce vma fragmentation
` [PATCH v4 4/5] drm/xe/svm: Enable UNMAP for VMA merging operations
` [PATCH v4 5/5] drm/xe/vm: Skip ufence association for CPU address mirror VMA during MAP
[RESEND, 00/22] Enable/Disable DC balance along with VRR DSB
2025-11-03 5:39 UTC (25+ messages)
` [RESEND, 01/22] drm/i915/display: Add source param for dc balance
` [RESEND, 02/22] drm/i915/dmc: Add pipe dmc registers and bits for DC Balance
` [RESEND, 03/22] drm/i915/vrr: Add VRR DC balance registers
` [RESEND, 04/22] drm/i915/vrr: Add functions to read out vmin/vmax stuff
` [RESEND, 05/22] drm/i915/vrr: Add DC Balance params to crtc_state
` [RESEND, 06/22] drm/i915/vrr: Add state dump for DC Balance params
` [RESEND, 07/22] drm/i915/vrr: Add compute config "
` [RESEND, 08/22] drm/i915/display: Add DC Balance flip counter in crtc
` [RESEND, 09/22] drm/i915/vrr: Increment DC balance flip count on every flip
` [RESEND, 10/22] drm/i915/vrr: Add function to reset DC Balance flip count
` [RESEND, 11/22] drm/i915/vrr: Add function reset DC balance accumulated params
` [RESEND, 12/22] drm/i915/vrr: Write DC balance params to hw registers
` [RESEND, 13/22] drm/i915/vrr: Configure DC balance flipline adjustment
` [RESEND, 14/22] drm/i915/vblank: Extract vrr_vblank_start()
` [RESEND, 15/22] drm/i915/vrr: Implement vblank evasion with DC balancing
` [RESEND, 16/22] drm/i915/display: Wait for VRR PUSH status update
` [RESEND, 17/22] drm/i915/dsb: Add pipedmc dc balance enable/disable
` [RESEND, 18/22] drm/i915/vrr: Pause DC Balancing for DSB commits
` [RESEND, 19/22] drm/i915/display: Add function to configure event for dc balance
` [RESEND, 20/22] drm/i915/vrr: Enable Adaptive sync counter bit
` [RESEND, 21/22] drm/i915/vrr: Enable DC Balance
` [RESEND, 22/22] drm/i915/vrr: Add function to check if DC Balance Possible
` ✗ CI.checkpatch: warning for Enable/Disable DC balance along with VRR DSB
` ✓ CI.KUnit: success "
[PATCH 00/16] drm/xe: Multi Queue feature support
2025-11-03 4:45 UTC (42+ messages)
` [PATCH 01/16] drm/xe/multi_queue: Add multi_queue_enable_mask to gt information
` [PATCH 02/16] drm/xe/multi_queue: Add user interface for multi queue support
` [PATCH 03/16] drm/xe/multi_queue: Add GuC "
` [PATCH 04/16] drm/xe/multi_queue: Add multi queue priority property
` [PATCH 05/16] drm/xe/multi_queue: Handle invalid exec queue property setting
` [PATCH 06/16] drm/xe/multi_queue: Add exec_queue set_property ioctl support
` [PATCH 07/16] drm/xe/multi_queue: Add support for multi queue dynamic priority change
` [PATCH 08/16] drm/xe/multi_queue: Add multi queue information to guc_info dump
` [PATCH 09/16] drm/xe/multi_queue: Handle tearing down of a multi queue
` [PATCH 10/16] drm/xe/multi_queue: Set QUEUE_DRAIN_MODE for Multi Queue batches
` [PATCH 11/16] drm/xe/multi_queue: Handle CGP context error
` [PATCH 12/16] drm/xe/multi_queue: Tracepoint support
` [PATCH 13/16] drm/xe/multi_queue: Support active group after primary is destroyed
` [PATCH 14/16] drm/xe/doc: Add documentation for Multi Queue Group
` [PATCH 15/16] drm/xe/doc: Add documentation for Multi Queue Group GuC interface
` [PATCH 16/16] drm/xe/multi_queue: Enable multi_queue on xe3p_xpc
` ✗ CI.checkpatch: warning for drm/xe: Multi Queue feature support
` ✓ CI.KUnit: success "
` ✗ Xe.CI.BAT: failure "
` ✗ Xe.CI.Full: "
[PATCH v6 00/25] drm/dumb-buffers: Fix and improve buffer-size calculation
2025-11-02 16:39 UTC (3+ messages)
` [PATCH v6 13/25] drm/msm: Compute dumb-buffer sizes with drm_mode_size_dumb()
[PATCH v3 0/4] drm: replace drm_print.h includes from headers with a forward declaration
2025-11-02 11:44 UTC (5+ messages)
[PATCH 00/12] Context based TLB invalidations
2025-11-01 23:44 UTC (17+ messages)
` [PATCH 01/12] drm/xe: Add normalize_invalidation_range
` [PATCH 02/12] drm/xe: Make usm.asid_to_vm allocation use GFP_NOWAIT
` [PATCH 03/12] drm/xe: Add xe_device_asid_to_vm helper
` [PATCH 04/12] drm/xe: Add vm to exec queues association
` [PATCH 05/12] drm/xe: Taint TLB invalidation seqno lock with GFP_KERNEL
` [PATCH 06/12] drm/xe: Do not forward invalid TLB invalidation seqnos to upper layers
` [PATCH 07/12] drm/xe: Rename send_tlb_inval_ppgtt to send_tlb_inval_asid_ppgtt
` [PATCH 08/12] drm/xe: Add send_tlb_inval_ppgtt helper
` [PATCH 09/12] drm/xe: Add xe_tlb_inval_idle helper
` [PATCH 10/12] drm/xe: Add exec queue active vfunc
` [PATCH 11/12] drm/xe: Add context-based invalidation to GuC TLB invalidation backend
` [PATCH 12/12] drm/xe: Enable context TLB invalidations for CI
` ✗ CI.checkpatch: warning for Context based TLB invalidations
` ✓ CI.KUnit: success "
` ✓ Xe.CI.BAT: "
` ✓ Xe.CI.Full: "
[PATCH v7 0/6] Fix serialization on burst of unbinds - v2
2025-11-01 22:55 UTC (11+ messages)
` [PATCH v7 1/6] drm/xe: Enforce correct user fence signaling order using
` [PATCH v7 2/6] drm/xe: Attach last fence to TLB invalidation job queues
` [PATCH v7 3/6] drm/xe: Decouple bind queue last fence from TLB invalidations
` [PATCH v7 4/6] drm/xe: Skip TLB invalidation waits in page fault binds
` [PATCH v7 5/6] drm/xe: Disallow input fences on zero batch execs and zero binds
` [PATCH v7 6/6] drm/xe: Remove last fence dependency check from binds and execs
` ✗ CI.checkpatch: warning for Fix serialization on burst of unbinds - v2
` ✓ CI.KUnit: success "
` ✗ Xe.CI.BAT: failure "
` ✓ Xe.CI.Full: success "
[CI] drm/xe: Inline gt_reset in the worker
2025-11-01 20:24 UTC (4+ messages)
` ✓ CI.KUnit: success for drm/xe: Inline gt_reset in the worker (rev2)
` ✓ Xe.CI.BAT: "
` ✓ Xe.CI.Full: "
[PATCH 0/2] drm/xe: Add xe_pci_rebar
2025-11-01 17:11 UTC (7+ messages)
` [PATCH 1/2] drm/xe: Move rebar to its own file
` [PATCH 2/2] drm/xe: Improve rebar log messages
` ✗ CI.checkpatch: warning for drm/xe: Add xe_pci_rebar
` ✓ CI.KUnit: success "
` ✓ Xe.CI.BAT: "
` ✗ Xe.CI.Full: failure "
[drm-xe:drm-xe-next] BUILD SUCCESS 6b514ed2d9a78fdf1369f058ed1b1963457368d7
2025-11-01 15:43 UTC
[PATCH v2] drm/xe/vf: Start re-emission from first unsignaled job during VF migration
2025-11-01 13:52 UTC (5+ messages)
` ✓ CI.KUnit: success for "
` ✓ Xe.CI.BAT: "
` ✗ Xe.CI.Full: failure "
[PATCH v6 0/6] Fix serialization on burst of unbinds - v2
2025-11-01 9:44 UTC (5+ messages)
` ✗ CI.checkpatch: warning for "
` ✓ CI.KUnit: success "
` ✗ Xe.CI.BAT: failure "
` ✗ Xe.CI.Full: "
[PATCH v2] drm/display/dp: Rename bit 4 of DPCD TEST_REQUEST to match DP2.1 spec
2025-11-01 8:40 UTC (5+ messages)
` ✗ CI.checkpatch: warning for drm/display/dp: Rename bit 4 of DPCD TEST_REQUEST to match DP2.1 spec (rev2)
` ✓ CI.KUnit: success "
` ✓ Xe.CI.BAT: "
` ✗ Xe.CI.Full: failure "
[PATCH v4 0/7] Pagefault refactor
2025-11-01 6:59 UTC (3+ messages)
` ✓ Xe.CI.BAT: success for Pagefault refactor (rev3)
` ✗ Xe.CI.Full: failure "
[PATCH v4] drm/xe/gt_throttle: Avoid TOCTOU when monitoring reasons
2025-11-01 6:38 UTC (3+ messages)
` ✓ Xe.CI.Full: success for "
[PATCH v5 00/25] Enable LT PHY
2025-11-01 3:25 UTC (26+ messages)
` [PATCH v5 01/25] drm/i915/ltphy: Add LT Phy related VDR and Pipe Registers
` [PATCH v5 02/25] drm/i915/cx0: Change register bit naming for powerdown values
` [PATCH v5 03/25] drm/i915/ltphy: Phy lane reset for LT Phy
` [PATCH v5 04/25] drm/i915/cx0: Move the HDMI FRL function to intel_hdmi
` [PATCH v5 05/25] drm/i915/ltphy: Program sequence for PORT_CLOCK_CTL for LT Phy
` [PATCH v5 06/25] drm/i915/ltphy: Add a wrapper for LT Phy powerdown change sequence
` [PATCH v5 07/25] drm/i915/ltphy: Read PHY_VDR_0_CONFIG register
` [PATCH v5 08/25] drm/i915/ltphy: Add LT Phy Programming recipe tables
` [PATCH v5 09/25] drm/i915/ltphy: Program the VDR PLL registers for LT PHY
` [PATCH v5 10/25] drm/i915/ltphy: Update the ltpll config table value for eDP
` [PATCH v5 11/25] drm/i915/ltphy: Enable SSC during port clock programming
` [PATCH v5 12/25] drm/i915/ltphy: Add function to calculate LT PHY port clock
` [PATCH v5 13/25] drm/i915/ltphy: Program the P2P Transaction flow for LT Phy
` [PATCH v5 14/25] drm/i915/ltphy: Program the rest of the PORT_CLOCK_CTL steps
` [PATCH v5 15/25] drm/i915/ltphy: Program the rest of the LT Phy Enable sequence
` [PATCH v5 16/25] drm/i915/ltphy: Program LT Phy Non-TBT PLL disable sequence
` [PATCH v5 17/25] drm/i915/ltphy: Hook up LT Phy Enable & Disable sequences
` [PATCH v5 18/25] drm/i915/ddi: Define LT Phy Swing tables
` [PATCH v5 19/25] drm/i915/ltphy: Program LT Phy Voltage Swing
` [PATCH v5 20/25] drm/i915/ltphy: Enable/Disable Tx after Non TBT Enable sequence
` [PATCH v5 21/25] drm/i915/ltphy: Define the LT Phy state compare function
` [PATCH v5 22/25] drm/i915/ltphy: Define function to readout LT Phy PLL state
` [PATCH v5 23/25] drm/i915/ltphy: Define LT PHY PLL state verify function
` [PATCH v5 24/25] drm/i915/display: Aux Enable and Display powerwell timeouts
` [PATCH v5 25/25] drm/i915/ltphy: Modify the step that need to be skipped
[PATCH v4 00/25] Enable LT PHY
2025-11-01 3:04 UTC (26+ messages)
` [PATCH v4 01/25] drm/i915/ltphy: Add LT Phy related VDR and Pipe Registers
` [PATCH v4 02/25] drm/i915/cx0: Change register bit naming for powerdown values
` [PATCH v4 03/25] drm/i915/ltphy: Phy lane reset for LT Phy
` [PATCH v4 04/25] drm/i915/cx0: Move the HDMI FRL function to intel_hdmi
` [PATCH v4 05/25] drm/i915/ltphy: Program sequence for PORT_CLOCK_CTL for LT Phy
` [PATCH v4 06/25] drm/i915/ltphy: Add a wrapper for LT Phy powerdown change sequence
` [PATCH v4 07/25] drm/i915/ltphy: Read PHY_VDR_0_CONFIG register
` [PATCH v4 08/25] drm/i915/ltphy: Add LT Phy Programming recipe tables
` [PATCH v4 09/25] drm/i915/ltphy: Program the VDR PLL registers for LT PHY
` [PATCH v4 10/25] drm/i915/ltphy: Update the ltpll config table value for eDP
` [PATCH v4 11/25] drm/i915/ltphy: Enable SSC during port clock programming
` [PATCH v4 12/25] drm/i915/ltphy: Add function to calculate LT PHY port clock
` [PATCH v4 13/25] drm/i915/ltphy: Program the P2P Transaction flow for LT Phy
` [PATCH v4 14/25] drm/i915/ltphy: Program the rest of the PORT_CLOCK_CTL steps
` [PATCH v4 15/25] drm/i915/ltphy: Program the rest of the LT Phy Enable sequence
` [PATCH v4 16/25] drm/i915/ltphy: Program LT Phy Non-TBT PLL disable sequence
` [PATCH v4 17/25] drm/i915/ltphy: Hook up LT Phy Enable & Disable sequences
` [PATCH v4 18/25] drm/i915/ddi: Define LT Phy Swing tables
` [PATCH v4 19/25] drm/i915/ltphy: Program LT Phy Voltage Swing
` [PATCH v4 20/25] drm/i915/ltphy: Enable/Disable Tx after Non TBT Enable sequence
` [PATCH v4 21/25] drm/i915/ltphy: Define the LT Phy state compare function
` [PATCH v4 22/25] drm/i915/ltphy: Define function to readout LT Phy PLL state
` [PATCH v4 23/25] drm/i915/ltphy: Define LT PHY PLL state verify function
` [PATCH v4 24/25] drm/i915/display: Aux Enable and Display powerwell timeouts
` [PATCH v4 25/25] drm/i915/ltphy: Modify the step that need to be skipped
[PATCH v2] drm/xe/uapi: Implement DRM_XE_GEM_CREATE_FLAG_NO_COMPRESSION flag
2025-11-01 2:38 UTC (2+ messages)
` ✓ Xe.CI.Full: success for drm/xe/uapi: Implement DRM_XE_GEM_CREATE_FLAG_NO_COMPRESSION flag (rev2)
[PATCH] drm/xe: Do clean shutdown also when using flr
2025-11-01 1:55 UTC (2+ messages)
` ✗ Xe.CI.Full: failure for "
[CI 00/32] [PATCH 00/32] drm/i915/display: Add MTL+ platforms to support dpll framework
2025-11-01 0:15 UTC (2+ messages)
` ✗ Xe.CI.Full: failure for drm/i915/display: Add MTL+ platforms to support dpll framework (rev2)
[PATCH v3 00/25] Enable LT PHY
2025-10-31 23:37 UTC (2+ messages)
` ✗ Xe.CI.Full: failure for Enable LT PHY (rev3)
[PATCH v2 00/32] drm/i915/display: Add initial support for Xe3p_LPD
2025-10-31 22:41 UTC (6+ messages)
` [PATCH v2 11/32] drm/i915/xe3p_lpd: Underrun debuggability and error codes/hints
[FOR CI 0/8] Testing PREEMPT_RT with disabling irqs in the most critical section
2025-10-31 22:04 UTC (2+ messages)
` ✗ Xe.CI.Full: failure for Testing PREEMPT_RT with disabling irqs in the most critical section. (rev2)
[CI] drm/xe: Inline gt_reset in the worker
2025-10-31 21:46 UTC (2+ messages)
[PULL] drm-intel-gt-next
2025-10-31 21:02 UTC (2+ messages)
[PATCH] drm/xe/vf: Skip signaled jobs during VF migration re-emission
2025-10-31 20:15 UTC (2+ messages)
[PATCH v2 0/2] VF double migration
2025-10-31 20:10 UTC (4+ messages)
` [PATCH v2 1/2] drm/xe/vf: Introduce RESFIX start marker support
[PATCH v2 0/4] PF: Add support for MERT
2025-10-31 19:25 UTC (2+ messages)
` ✓ Xe.CI.Full: success for "
[PATCH v3 00/28] vfio/xe: Add driver variant for Xe VF migration
2025-10-31 18:39 UTC (5+ messages)
` [PATCH v3 18/28] drm/xe/pf: Handle GGTT migration data as part of PF control
` [PATCH v3 19/28] drm/xe/pf: Handle MMIO "
[PATCH v2] drm/xe/pf: Allow to lockdown the PF using custom guard
2025-10-31 18:17 UTC (2+ messages)
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