messages from 2026-03-11 11:52:14 to 2026-03-12 09:02:39 UTC [more...]
[PULL] drm-intel-gt-next
2026-03-12 9:02 UTC
[PATCH] drm/i915/display: fail compilation on intel_display_wa() with invalid enums
2026-03-12 9:01 UTC (5+ messages)
` ✗ CI.checkpatch: warning for "
` ✓ CI.KUnit: success "
[PATCH 0/5] drm/{i915,xe}: move bo stuff to parent interface
2026-03-12 9:00 UTC (18+ messages)
` [PATCH 1/5] drm/i915: move i915 specific bo implementation to i915
` [PATCH 2/5] drm/xe: rename intel_bo.c to xe_display_bo.c
` [PATCH 3/5] drm/{i915, xe}/bo: move display bo calls to parent interface
` [PATCH 4/5] drm/i915/fb: make intel_fb_bo.c less dependent on display
` [PATCH 5/5] drm/{i915,xe}: move framebuffer bo to parent interface
` [PATCH 5/5] drm/{i915, xe}: "
` ✗ CI.checkpatch: warning for drm/{i915,xe}: move bo stuff "
` ✓ CI.KUnit: success "
` ✓ Xe.CI.BAT: "
` ✓ Xe.CI.FULL: "
[CI v3 00/24] Refactor LT PHY PLL handling to use DPLL framework
2026-03-12 9:00 UTC (27+ messages)
` [CI v3 01/24] drm/i915/lt_phy: Dump missing PLL state parameters
` [CI v3 02/24] drm/i915/lt_phy: Add check if PLL is enabled
` [CI v3 03/24] drm/i915/lt_phy: Add PLL information for xe3plpd
` [CI v3 04/24] drm/i915/lt_phy: Refactor LT PHY PLL handling to use explicit PLL state
` [CI v3 05/24] drm/i915/lt_phy: Add lane_count to "
` [CI v3 06/24] drm/i915/lt_phy: Add xe3plpd .compute_dplls hook
` [CI v3 07/24] drm/i915/lt_phy: Add xe3plpd .get_dplls hook
` [CI v3 08/24] drm/i915/lt_phy: Add xe3plpd .put_dplls hook
` [CI v3 09/24] drm/i915/lt_phy: Add xe3plpd .update_active_dpll hook
` [CI v3 10/24] drm/i915/lt_phy: Add xe3plpd .update_dpll_ref_clks hook
` [CI v3 11/24] drm/i915/lt_phy: Add xe3plpd .dump_hw_state hook
` [CI v3 12/24] drm/i915/lt_phy: Add xe3plpd .compare_hw_state hook
` [CI v3 13/24] drm/i915/lt_phy: Add xe3plpd .get_hw_state hook
` [CI v3 14/24] drm/i915/lt_phy: Add xe3plpd .get_freq hook
` [CI v3 15/24] drm/i915/lt_phy: Add xe3plpd .crtc_get_dpll
` [CI v3 16/24] drm/i915/lt_phy: Add .enable_clock hook on DDI
` [CI v3 17/24] drm/i915/lt_phy: Add .disable_clock "
` [CI v3 18/24] drm/i915/lt_phy: Dump lane count for HW state
` [CI v3 19/24] drm/i915/lt_phy: Readout lane count
` [CI v3 20/24] drm/i915/lt_phy: Get encoder configuration for xe3plpd platform
` [CI v3 21/24] drm/i915/lt_phy: Add xe3plpd Thunderbolt PLL hooks
` [CI v3 22/24] drm/i915/lt_phy: Remove LT PHY specific state verification
` [CI v3 23/24] drm/i915/lt_phy: Enable dpll framework for xe3plpd
` [CI v3 24/24] drm/i915/lt_phy: Replace crtc compute clock
` ✓ CI.KUnit: success for Refactor LT PHY PLL handling to use DPLL framework (rev7)
` ✓ Xe.CI.BAT: "
[PULL] drm-intel-fixes
2026-03-12 8:54 UTC
[PATCH v7 0/3] Panel Replay BW optimization
2026-03-12 8:44 UTC (14+ messages)
` [PATCH v7 1/3] drm/i915/display: Add drm helper to check pr optimization support
` [PATCH v7 2/3] drm/i915/display: Panel Replay BW optimization for DP2.0 tunneling
` [PATCH v7 3/3] drm/i915/display: Disable Panel Replay for DP-tunneling without optimization
` ✓ CI.KUnit: success for Panel Replay BW optimization
` ✓ Xe.CI.BAT: "
[PATCH 0/2] PSR parameters handling fixes
2026-03-12 8:37 UTC (3+ messages)
` [PATCH 1/2] drm/i915/psr: Disable PSR on update_m_n and update_lrr
` [PATCH 2/2] drm/i915/psr: Compute psr_entry_setup_frames into intel_crtc_state
[PATCH v5 00/16] drm/i915/display: convert a bunch of W/A checks to the new framework
2026-03-12 8:11 UTC (5+ messages)
` [PATCH v5 01/16] drm/i915/display: remove enum macro magic in intel_display_wa()
[PATCH v2 00/11] Introduce Xe Uncorrectable Error Handling
2026-03-12 8:08 UTC (11+ messages)
` [PATCH v2 09/11] drm/xe/xe_ras: Add structures for SoC Internal errors
` [PATCH v2 10/11] drm/xe/xe_ras: Handle Uncorrectable "
` [PATCH v2 11/11] drm/xe/xe_pci_error: Process errors in mmio_enabled
[PATCH 1/2] drm/i915/dp_mst: Fix forced link retrain handling in MST HPD IRQ handler
2026-03-12 8:08 UTC (7+ messages)
` [PATCH 2/2] drm/i915/dp: Simplify forcing a link retraining
` ✓ CI.KUnit: success for series starting with [1/2] drm/i915/dp_mst: Fix forced link retrain handling in MST HPD IRQ handler
` ✓ Xe.CI.BAT: "
` ✓ Xe.CI.FULL: "
[PATCH 0/3] Scan all holes when fences are disabled in SA
2026-03-12 7:58 UTC (10+ messages)
` [PATCH 1/3] drm/sa: Scan all holes when fences are disabled
` [PATCH 2/3] drm/xe/vf: Disable fences while initializing CCS read/write sub-allocs
` [PATCH 3/3] drm/tests: Add KUnit test for suballocator allocation
` ✗ CI.checkpatch: warning for Scan all holes when fences are disabled in SA
` ✓ CI.KUnit: success "
` ✓ Xe.CI.BAT: "
[PULL] drm-misc-next
2026-03-12 7:56 UTC
[PATCH] drm/syncobj: Enforce strict checking of timeline syncobj struct
2026-03-12 7:32 UTC (4+ messages)
` ✓ CI.KUnit: success for "
` ✓ Xe.CI.BAT: "
` ✓ Xe.CI.FULL: "
[PULL] drm-misc-fixes
2026-03-12 7:30 UTC
[PATCH v3 00/24] Refactor LT PHY PLL handling to use DPLL framework
2026-03-12 7:28 UTC (38+ messages)
` [PATCH v3 01/24] drm/i915/lt_phy: Dump missing PLL state parameters
` [PATCH v3 02/24] drm/i915/lt_phy: Add check if PLL is enabled
` [PATCH v3 03/24] drm/i915/lt_phy: Add PLL information for xe3plpd
` [PATCH v3 04/24] drm/i915/lt_phy: Refactor LT PHY PLL handling to use explicit PLL state
` [PATCH v3 05/24] drm/i915/lt_phy: Add lane_count to "
` [PATCH v3 06/24] drm/i915/lt_phy: Add xe3plpd .compute_dplls hook
` [PATCH v3 07/24] drm/i915/lt_phy: Add xe3plpd .get_dplls hook
` [PATCH v3 08/24] drm/i915/lt_phy: Add xe3plpd .put_dplls hook
` [PATCH v3 09/24] drm/i915/lt_phy: Add xe3plpd .update_active_dpll hook
` [PATCH v3 10/24] drm/i915/lt_phy: Add xe3plpd .update_dpll_ref_clks hook
` [PATCH v3 11/24] drm/i915/lt_phy: Add xe3plpd .dump_hw_state hook
` [PATCH v3 12/24] drm/i915/lt_phy: Add xe3plpd .compare_hw_state hook
` [PATCH v3 13/24] drm/i915/lt_phy: Add xe3plpd .get_hw_state hook
` [PATCH v3 14/24] drm/i915/lt_phy: Add xe3plpd .get_freq hook
` [PATCH v3 15/24] drm/i915/lt_phy: Add xe3plpd .crtc_get_dpll
` [PATCH v3 16/24] drm/i915/lt_phy: Add .enable_clock hook on DDI
` [PATCH v3 17/24] drm/i915/lt_phy: Add .disable_clock "
` [PATCH v3 18/24] drm/i915/lt_phy: Dump lane count for HW state
` [PATCH v3 19/24] drm/i915/lt_phy: Readout lane count
` [PATCH v3 20/24] drm/i915/lt_phy: Get encoder configuration for xe3plpd platform
` [PATCH v3 21/24] drm/i915/lt_phy: Add xe3plpd Thunderbolt PLL hooks
` [PATCH v3 22/24] drm/i915/lt_phy: Remove LT PHY specific state verification
` [PATCH v3 23/24] drm/i915/lt_phy: Enable dpll framework for xe3plpd
` [PATCH v3 24/24] drm/i915/lt_phy: Replace crtc compute clock
` ✗ CI.checkpatch: warning for Refactor LT PHY PLL handling to use DPLL framework (rev6)
` ✓ CI.KUnit: success "
` ✓ Xe.CI.BAT: "
` ✓ Xe.CI.FULL: "
[PATCH v7 0/3] drm/xe: add VM_BIND DECOMPRESS support and on‑demand decompression
2026-03-12 7:17 UTC (3+ messages)
` [PATCH v7 1/3] drm/xe: add VM_BIND DECOMPRESS uapi flag
[PATCH] drm/xe/oa: Allow reading after disabling OA stream
2026-03-12 6:52 UTC (5+ messages)
` ✓ CI.KUnit: success for "
` ✓ Xe.CI.BAT: "
[PATCH v2 0/7] Refactor drm_writeback_connector structure
2026-03-12 6:21 UTC (10+ messages)
` [PATCH v2 1/7] drm: writeback: "
[PATCH v9 0/6] drm/xe/sysctrl: Add system controller component for Xe3p dGPU platforms
2026-03-12 5:54 UTC (10+ messages)
` [PATCH v9 4/6] drm/xe/sysctrl: Add System Controller initialization
` [PATCH v9 5/6] drm/xe/sysctrl: Add mailbox communication implementation
` [PATCH v9 6/6] drm/xe/pci: Enable System Controller for CRI platform
` ✗ Xe.CI.FULL: failure for drm/xe/sysctrl: Add system controller component for Xe3p dGPU platforms (rev10)
[PATCH 0/3] Make casf updates atomic and dsb ready
2026-03-12 4:30 UTC (5+ messages)
` [PATCH 1/3] drm/i915/display: Move casf_compute_config
` [PATCH 2/3] drm/i915/display: Introduce skl_pipe_scaler_setup()
[PATCH 0/2] drm/i915/dmc: Update PIPEDMC interrupt mask
2026-03-12 3:18 UTC (6+ messages)
` [PATCH 1/2] drm/i915/dmc: Remove invalid PIPEDMC interrupt bits
` [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt
` ✗ Xe.CI.FULL: failure for drm/i915/dmc: Update PIPEDMC interrupt mask (rev2)
[PATCH 00/19] Fix Adaptive Sync SDP for PR with Link ON + Auxless ALPM
2026-03-12 3:16 UTC (8+ messages)
` [PATCH 15/19] drm/i915/dp: Set relevant Downspread Ctrl DPCD bits for PR "
` [PATCH 17/19] drm/i915/dp: Split AS SDP computation between compute_config and compute_config_late
` [PATCH 18/19] drm/i915/dp: Make provision for AS SDP version 1
` [PATCH 19/19] drm/i915/dp: Always enable AS SDP if supported by source + sink
` ✓ CI.KUnit: success for Fix Adaptive Sync SDP for PR with Link ON + Auxless ALPM (rev2)
` ✓ Xe.CI.BAT: "
` ✓ Xe.CI.FULL: "
[PATCH] drm/xe/lrc: Fix uninitialized new_ts when capturing context timestamp
2026-03-12 2:04 UTC (3+ messages)
` ✓ Xe.CI.FULL: success for "
[PATCH 0/4] Add support for clear counter and error event in DRM RAS
2026-03-12 0:58 UTC (4+ messages)
` [PATCH 1/4] drm/drm_ras: Add clear-error-counter netlink command to drm_ras
` ✗ Xe.CI.FULL: failure for Add support for clear counter and error event in DRM RAS
[PATCH] drm/xe: Include running dword offset in default_lrc dumps
2026-03-11 23:46 UTC (3+ messages)
` ✓ CI.KUnit: success for "
` ✓ Xe.CI.BAT: "
[PATCH v3 3/5] vgaarb: mark vga_get() and wrappers as __must_check
2026-03-11 23:29 UTC (4+ messages)
[PATCH v3 5/5] pci: mark pci_set_vga_state() as __must_check
2026-03-11 23:23 UTC (2+ messages)
[PATCH v21 0/9] AuxCCS handling and render compression modifiers
2026-03-11 22:24 UTC (3+ messages)
` [PATCH v21 8/9] drm/xe/display: Add support for AuxCCS
[PATCH] drm/xe/hdcp: Add NULL check for media_gt in intel_hdcp_gsc_check_status()
2026-03-11 22:09 UTC (5+ messages)
[PATCH] drm/xe: Fix missing runtime PM reference in ccs_mode_store
2026-03-11 19:28 UTC (5+ messages)
` ✓ CI.KUnit: success for "
` ✓ Xe.CI.BAT: "
[PATCH] drm/xe/pat: Extract gt_pta_entry()
2026-03-11 18:48 UTC (7+ messages)
` ✗ Xe.CI.BAT: failure for drm/xe/pat: Extract gt_pta_entry() (rev2)
` ✗ Xe.CI.FULL: "
[RFC v5 0/1] Do not create drm device for PF only admin mode
2026-03-11 18:19 UTC (3+ messages)
` [RFC v5 1/1] drm/xe/pf: Restrict device query responses in admin-only PF mode
[PATCH v4 0/3] Page Reclamation Fixes
2026-03-11 18:14 UTC (3+ messages)
` ✗ Xe.CI.FULL: failure for Page Reclamation Fixes (rev5)
[PATCH v9 0/1] PCI/IOV: Make pci_lock_rescan_remove() reentrant and protect sriov_add_vfs/sriov_del_vfs
2026-03-11 18:08 UTC (3+ messages)
` [PATCH v9 1/1] "
` ✗ LGCI.VerificationFailed: failure for "
[PATCH v8 0/1] PCI/IOV: Make pci_lock_rescan_remove() reentrant and protect sriov_add_vfs/sriov_del_vfs
2026-03-11 18:07 UTC (3+ messages)
` [PATCH v8 1/1] "
` ✗ LGCI.VerificationFailed: failure for "
[PATCH v9 0/7] Attempt to fixup reset, wedge, unload corner cases
2026-03-11 16:34 UTC (6+ messages)
` [PATCH v9 2/7] drm/xe: Forcefully tear down exec queues in GuC submit fini
` [PATCH v9 3/7] drm/xe: Trigger queue cleanup if not in wedged mode 2
` ✗ Xe.CI.FULL: failure for Attempt to fixup reset, wedge, unload corner cases
[PATCH 00/10] drm/i915/color: Enable SDR plane color pipeline
2026-03-10 14:32 UTC (3+ messages)
` [PATCH 01/10] drm/colorop: Add DRM_COLOROP_CSC_FF
[PATCH V6 0/4] drm/xe/xe3p_lpg: L2 flush optimization
2026-03-11 14:58 UTC (9+ messages)
` [PATCH V6 3/4] drm/xe/xe3p_lpg: Restrict UAPI to enable "
[PATCH v2 00/24] Refactor LT PHY PLL handling to use DPLL framework
2026-03-11 13:32 UTC (4+ messages)
` [PATCH v2 14/24] drm/i915/lt_phy: Add xe3plpd .get_freq hook
[CI] drm/i915/dmc: Fix an unlikely NULL pointer deference at probe
2026-03-11 12:25 UTC (4+ messages)
linux-next: manual merge of the drm-xe tree with the mm-hotfixes tree
2026-03-11 12:18 UTC
[PATCH 0/5] Add support for Common SDP Transmission Line
2026-03-11 12:10 UTC (7+ messages)
` [PATCH 3/5] drm/i915/dp: Add helper for AS SDP TL and fix documentation
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