From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Date: Tue, 24 Jan 2023 10:46:18 -0500 From: Rodrigo Vivi Message-ID: References: <20230112222538.2000142-1-rodrigo.vivi@intel.com> <20230112222538.2000142-38-rodrigo.vivi@intel.com> Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20230112222538.2000142-38-rodrigo.vivi@intel.com> MIME-Version: 1.0 Subject: Re: [Intel-xe] [PATCH 37/37] drm/xe: enforce GSMBASE for DG1 instead of BAR2 List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" To: intel-xe@lists.freedesktop.org, matthew.brost@intel.com, maarten.lankhorst@linux.intel.com, philippe.lecluse@intel.com, mchehab@kernel.org Cc: Matthew Auld On Thu, Jan 12, 2023 at 05:25:38PM -0500, Rodrigo Vivi wrote: > From: Philippe Lecluse Hi Phil, could you please reply with a commit message to this patch? I will add on the next interaction or while merging it. Thanks, Rodrigo. > > v2: move to logic in probed vram_size > rename flat_ccs_base to more generic usable_size > > Signed-off-by: Philippe Lecluse > Cc: Matthew Auld > Signed-off-by: Rodrigo Vivi > --- > drivers/gpu/drm/xe/xe_mmio.c | 28 ++++++++++++++-------------- > 1 file changed, 14 insertions(+), 14 deletions(-) > > diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c > index 4d679027fc98..b3c1a39ef79d 100644 > --- a/drivers/gpu/drm/xe/xe_mmio.c > +++ b/drivers/gpu/drm/xe/xe_mmio.c > @@ -153,7 +153,7 @@ static bool xe_pci_resource_valid(struct pci_dev *pdev, int bar) > return true; > } > > -int xe_mmio_total_vram_size(struct xe_device *xe, u64 *vram_size, u64 *flat_ccs_base) > +int xe_mmio_total_vram_size(struct xe_device *xe, u64 *vram_size, u64 *usable_size) > { > struct xe_gt *gt = xe_device_get_gt(xe, 0); > struct pci_dev *pdev = to_pci_dev(xe->drm.dev); > @@ -162,8 +162,12 @@ int xe_mmio_total_vram_size(struct xe_device *xe, u64 *vram_size, u64 *flat_ccs_ > > if (!xe->info.has_flat_ccs) { > *vram_size = pci_resource_len(pdev, GEN12_LMEM_BAR); > - if (flat_ccs_base) > - *flat_ccs_base = *vram_size; > + if (usable_size) { > + if (xe->info.platform == XE_DG1) > + *usable_size = xe_mmio_read64(gt, GEN12_GSMBASE.reg); > + else > + *usable_size = *vram_size; > + } > return 0; > } > > @@ -173,15 +177,13 @@ int xe_mmio_total_vram_size(struct xe_device *xe, u64 *vram_size, u64 *flat_ccs_ > > reg = xe_gt_mcr_unicast_read_any(gt, XEHP_TILE0_ADDR_RANGE); > *vram_size = (u64)REG_FIELD_GET(GENMASK(14, 8), reg) * SZ_1G; > - if (flat_ccs_base) { > + if (usable_size) { > reg = xe_gt_mcr_unicast_read_any(gt, XEHP_FLAT_CCS_BASE_ADDR); > - *flat_ccs_base = (u64)REG_FIELD_GET(GENMASK(31, 8), reg) * SZ_64K; > + *usable_size = (u64)REG_FIELD_GET(GENMASK(31, 8), reg) * SZ_64K; > + drm_info(&xe->drm, "lmem_size: 0x%llx usable_size: 0x%llx\n", > + *vram_size, *usable_size); > } > > - if (flat_ccs_base) > - drm_info(&xe->drm, "lmem_size: 0x%llx flat_ccs_base: 0x%llx\n", > - *vram_size, *flat_ccs_base); > - > return xe_force_wake_put(gt_to_fw(gt), XE_FW_GT); > } > > @@ -193,7 +195,7 @@ int xe_mmio_probe_vram(struct xe_device *xe) > u64 lmem_size; > u64 original_size; > u64 current_size; > - u64 flat_ccs_base; > + u64 usable_size; > int resize_result, err; > > if (!IS_DGFX(xe)) { > @@ -215,11 +217,9 @@ int xe_mmio_probe_vram(struct xe_device *xe) > } > > gt = xe_device_get_gt(xe, 0); > - lmem_size = xe_mmio_read64(gt, GEN12_GSMBASE.reg); > - > original_size = pci_resource_len(pdev, GEN12_LMEM_BAR); > > - err = xe_mmio_total_vram_size(xe, &lmem_size, &flat_ccs_base); > + err = xe_mmio_total_vram_size(xe, &lmem_size, &usable_size); > if (err) > return err; > > @@ -247,7 +247,7 @@ int xe_mmio_probe_vram(struct xe_device *xe) > xe->mem.vram.mapping = ioremap_wc(xe->mem.vram.io_start, xe->mem.vram.size); > #endif > > - xe->mem.vram.size = min_t(u64, xe->mem.vram.size, flat_ccs_base); > + xe->mem.vram.size = min_t(u64, xe->mem.vram.size, usable_size); > > drm_info(&xe->drm, "TOTAL VRAM: %pa, %pa\n", &xe->mem.vram.io_start, &xe->mem.vram.size); > > -- > 2.38.1 >