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d="scan'208";a="132545430" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by orviesa005.jf.intel.com with SMTP; 04 Apr 2025 08:44:58 -0700 Received: by stinkbox (sSMTP sendmail emulation); Fri, 04 Apr 2025 18:44:56 +0300 Date: Fri, 4 Apr 2025 18:44:56 +0300 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Tvrtko Ursulin Cc: intel-xe@lists.freedesktop.org, kernel-dev@igalia.com Subject: Re: [PATCH v5 05/16] drm/xe/xelp: Quiesce memory traffic before invalidating auxccs Message-ID: References: <20250403190317.6064-1-tvrtko.ursulin@igalia.com> <20250403190317.6064-6-tvrtko.ursulin@igalia.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20250403190317.6064-6-tvrtko.ursulin@igalia.com> X-Patchwork-Hint: comment X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Thu, Apr 03, 2025 at 08:03:05PM +0100, Tvrtko Ursulin wrote: > According to i915 before invalidating auxccs we must quiesce the memory > traffic by an extra flush. > > Signed-off-by: Tvrtko Ursulin > --- > drivers/gpu/drm/xe/xe_ring_ops.c | 14 ++++++++++---- > drivers/gpu/drm/xe/xe_ring_ops_types.h | 2 +- > 2 files changed, 11 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c > index 61295f93ffb7..3f075dd36c86 100644 > --- a/drivers/gpu/drm/xe/xe_ring_ops.c > +++ b/drivers/gpu/drm/xe/xe_ring_ops.c > @@ -172,7 +172,8 @@ static int emit_store_imm_ppgtt_posted(u64 addr, u64 value, > return i; > } > > -static int emit_render_cache_flush(struct xe_sched_job *job, u32 *dw, int i) > +static int emit_render_cache_flush(struct xe_sched_job *job, bool flush_l3, > + u32 *dw, int i) > { > struct xe_gt *gt = job->q->gt; > struct xe_device *xe = gt_to_xe(gt); > @@ -204,7 +205,7 @@ static int emit_render_cache_flush(struct xe_sched_job *job, u32 *dw, int i) > * deals with Protected Memory which is not needed for > * AUX CCS invalidation and lead to unwanted side effects. > */ > - if (GRAPHICS_VERx100(xe) < 1270) > + if (flush_l3 && GRAPHICS_VERx100(xe) < 1270) > flags |= PIPE_CONTROL_FLUSH_L3; > > if (lacks_render) > @@ -370,10 +371,15 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job, > struct xe_gt *gt = job->q->gt; > struct xe_device *xe = gt_to_xe(gt); > bool lacks_render = !(gt->info.engine_mask & XE_HW_ENGINE_RCS_MASK); > + const bool aux_ccs = has_aux_ccs(xe); > u32 mask_flags = 0; > > i = emit_copy_timestamp(lrc, dw, i); > > + /* hsdes: 1809175790 */ > + if (aux_ccs) > + i = emit_render_cache_flush(job, 0, dw, i); s/0/false/ > + > dw[i++] = preparser_disable(true); > if (lacks_render) > mask_flags = PIPE_CONTROL_3D_ARCH_FLAGS; > @@ -384,7 +390,7 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job, > i = emit_pipe_invalidate(mask_flags, job->ring_ops_flush_tlb, dw, i); > > /* hsdes: 1809175790 */ > - if (has_aux_ccs(xe)) > + if (aux_ccs) > i = emit_aux_table_inv(gt, CCS_AUX_INV, dw, i); > > dw[i++] = preparser_disable(false); > @@ -394,7 +400,7 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job, > > i = emit_bb_start(batch_addr, ppgtt_flag, dw, i); > > - i = emit_render_cache_flush(job, dw, i); > + i = emit_render_cache_flush(job, true, dw, i); > > if (job->user_fence.used) > i = emit_store_imm_ppgtt_posted(job->user_fence.addr, > diff --git a/drivers/gpu/drm/xe/xe_ring_ops_types.h b/drivers/gpu/drm/xe/xe_ring_ops_types.h > index d7e3e150a9a5..477dc7defd72 100644 > --- a/drivers/gpu/drm/xe/xe_ring_ops_types.h > +++ b/drivers/gpu/drm/xe/xe_ring_ops_types.h > @@ -8,7 +8,7 @@ > > struct xe_sched_job; > > -#define MAX_JOB_SIZE_DW 58 > +#define MAX_JOB_SIZE_DW 70 > #define MAX_JOB_SIZE_BYTES (MAX_JOB_SIZE_DW * 4) > > /** > -- > 2.48.0 -- Ville Syrjälä Intel