From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: "Levi, Ilia" <ilia.levi@intel.com>
Cc: "Piotr Piórkowski" <piotr.piorkowski@intel.com>,
matthew.auld@intel.com, intel-xe@lists.freedesktop.org,
niranjana.vishwanathapura@intel.com, koby.elbaz@intel.com,
yaron.avizrat@intel.com
Subject: Re: [PATCH v5 1/5] drm/xe: Make irq enabled flag atomic
Date: Thu, 5 Dec 2024 12:24:52 -0500 [thread overview]
Message-ID: <Z1Hh5A2vcMj_Y1RK@intel.com> (raw)
In-Reply-To: <465360c2-8505-43a3-bd99-cceb2afe8ef5@intel.com>
On Tue, Dec 03, 2024 at 01:47:42PM +0200, Levi, Ilia wrote:
> On 02/12/2024 20:32, Piotr Piórkowski wrote:
> > Ilia Levi <ilia.levi@intel.com> wrote on czw [2024-lis-28 14:53:41 +0200]:
> >> The irq.enabled flag was protected by a spin lock (irq.lock).
> >> By making it atomic we no longer need to wait for the spin lock in
> >> irq handlers. This will become especially useful for MSI-X irq
> >> handlers to prevent lock contention between different interrupts.
> > I am not convinced that you can simply replace this spin_lock with an atomic.
> > Note that this spin lock is also used for whole blocks in the irq handler
> > (for example gt_irq_handler), and not only to access this flag.
>
> Yes, I saw that. However, irq.enabled is not accessed within those blocks, so imho there is no need in mutual exclusion between checking the flag and those blocks.
> If I understand correctly, the role of irq.enabled flag is to prevent new irq handlers from running once the interrupts have been turned off (e. g. as a result of suspension), while synchronize_irq waits for the already running irq handlers to finish. Making the flag atomic should achieve the same goal. I have left the spin lock to protect access to interrupt registers (and there's also some protection in xe_execlist_port_destroy), though I'm not sure when it is useful.
>
> Adding Rodrigo and Matthew in case I'm missing something.
I believe Ilia is right here and I was over-protective trying to use
the spinlock to also protect the enabled and not just the irq data
itself as its intended doc says.
I was concerned about display code, but then looking again to the code,
on i915 the enabled is not protected as well and not even an atomic,
so an atomic is a bonus here.
But we do need to test this patch here with display enabled.
Please ensure you also convert the irq.enabled at
drivers/gpu/drm/xe/display/ext/i915_irq.c
and kill that XXX comment section that I had written there,
because after this patch that argument makes even less sense.
Thanks,
Rodrigo.
> Thanks,
> Ilia
>
> >
> > Thanks,
> > Piotr
> >
> >
> >> Signed-off-by: Ilia Levi <ilia.levi@intel.com>
> >> ---
> >> drivers/gpu/drm/xe/display/ext/i915_irq.c | 2 +-
> >> drivers/gpu/drm/xe/xe_device_types.h | 2 +-
> >> drivers/gpu/drm/xe/xe_irq.c | 29 ++++++-----------------
> >> 3 files changed, 9 insertions(+), 24 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/xe/display/ext/i915_irq.c b/drivers/gpu/drm/xe/display/ext/i915_irq.c
> >> index a7dbc6554d69..0c0f4533c34f 100644
> >> --- a/drivers/gpu/drm/xe/display/ext/i915_irq.c
> >> +++ b/drivers/gpu/drm/xe/display/ext/i915_irq.c
> >> @@ -64,7 +64,7 @@ bool intel_irqs_enabled(struct xe_device *xe)
> >> * But at this point the xe irq is better protected against races,
> >> * although the full solution would be protecting the i915 side.
> >> */
> >> - return xe->irq.enabled;
> >> + return atomic_read(&xe->irq.enabled);
> >> }
> >>
> >> void intel_synchronize_irq(struct xe_device *xe)
> >> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> >> index 6a04f975ec16..7ee114c17552 100644
> >> --- a/drivers/gpu/drm/xe/xe_device_types.h
> >> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> >> @@ -347,7 +347,7 @@ struct xe_device {
> >> spinlock_t lock;
> >>
> >> /** @irq.enabled: interrupts enabled on this device */
> >> - bool enabled;
> >> + atomic_t enabled;
> >> } irq;
> >>
> >> /** @ttm: ttm device */
> >> diff --git a/drivers/gpu/drm/xe/xe_irq.c b/drivers/gpu/drm/xe/xe_irq.c
> >> index 7bf7201529ac..1c509e66694d 100644
> >> --- a/drivers/gpu/drm/xe/xe_irq.c
> >> +++ b/drivers/gpu/drm/xe/xe_irq.c
> >> @@ -348,12 +348,8 @@ static irqreturn_t xelp_irq_handler(int irq, void *arg)
> >> unsigned long intr_dw[2];
> >> u32 identity[32];
> >>
> >> - spin_lock(&xe->irq.lock);
> >> - if (!xe->irq.enabled) {
> >> - spin_unlock(&xe->irq.lock);
> >> + if (!atomic_read(&xe->irq.enabled))
> >> return IRQ_NONE;
> >> - }
> >> - spin_unlock(&xe->irq.lock);
> >>
> >> master_ctl = xelp_intr_disable(xe);
> >> if (!master_ctl) {
> >> @@ -417,12 +413,8 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
> >>
> >> /* TODO: This really shouldn't be copied+pasted */
> >>
> >> - spin_lock(&xe->irq.lock);
> >> - if (!xe->irq.enabled) {
> >> - spin_unlock(&xe->irq.lock);
> >> + if (!atomic_read(&xe->irq.enabled))
> >> return IRQ_NONE;
> >> - }
> >> - spin_unlock(&xe->irq.lock);
> >>
> >> master_tile_ctl = dg1_intr_disable(xe);
> >> if (!master_tile_ctl) {
> >> @@ -644,12 +636,8 @@ static irqreturn_t vf_mem_irq_handler(int irq, void *arg)
> >> struct xe_tile *tile;
> >> unsigned int id;
> >>
> >> - spin_lock(&xe->irq.lock);
> >> - if (!xe->irq.enabled) {
> >> - spin_unlock(&xe->irq.lock);
> >> + if (!atomic_read(&xe->irq.enabled))
> >> return IRQ_NONE;
> >> - }
> >> - spin_unlock(&xe->irq.lock);
> >>
> >> for_each_tile(tile, xe, id)
> >> xe_memirq_handler(&tile->memirq);
> >> @@ -674,10 +662,9 @@ static void irq_uninstall(void *arg)
> >> struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
> >> int irq;
> >>
> >> - if (!xe->irq.enabled)
> >> + if (!atomic_xchg(&xe->irq.enabled, 0))
> >> return;
> >>
> >> - xe->irq.enabled = false;
> >> xe_irq_reset(xe);
> >>
> >> irq = pci_irq_vector(pdev, 0);
> >> @@ -724,7 +711,7 @@ int xe_irq_install(struct xe_device *xe)
> >> return err;
> >> }
> >>
> >> - xe->irq.enabled = true;
> >> + atomic_set(&xe->irq.enabled, 1);
> >>
> >> xe_irq_postinstall(xe);
> >>
> >> @@ -744,9 +731,7 @@ void xe_irq_suspend(struct xe_device *xe)
> >> {
> >> int irq = to_pci_dev(xe->drm.dev)->irq;
> >>
> >> - spin_lock_irq(&xe->irq.lock);
> >> - xe->irq.enabled = false; /* no new irqs */
> >> - spin_unlock_irq(&xe->irq.lock);
> >> + atomic_set(&xe->irq.enabled, 0); /* no new irqs */
> >>
> >> synchronize_irq(irq); /* flush irqs */
> >> xe_irq_reset(xe); /* turn irqs off */
> >> @@ -762,7 +747,7 @@ void xe_irq_resume(struct xe_device *xe)
> >> * 1. no irq will arrive before the postinstall
> >> * 2. display is not yet resumed
> >> */
> >> - xe->irq.enabled = true;
> >> + atomic_set(&xe->irq.enabled, 1);
> >> xe_irq_reset(xe);
> >> xe_irq_postinstall(xe); /* turn irqs on */
> >>
> >> --
> >> 2.43.2
> >>
>
next prev parent reply other threads:[~2024-12-05 17:25 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-28 12:53 [PATCH v5 0/5] MSI-X support Ilia Levi
2024-11-28 12:53 ` [PATCH v5 1/5] drm/xe: Make irq enabled flag atomic Ilia Levi
2024-12-02 18:32 ` Piotr Piórkowski
2024-12-03 11:47 ` Levi, Ilia
2024-12-05 17:24 ` Rodrigo Vivi [this message]
2024-11-28 12:53 ` [PATCH v5 2/5] drm/xe/irq: Separate MSI and MSI-X flows Ilia Levi
2024-12-02 18:59 ` Piotr Piórkowski
2024-12-03 9:04 ` Levi, Ilia
2024-12-05 8:35 ` Piotr Piórkowski
2024-11-28 12:53 ` [PATCH v5 3/5] drm/xe: Initial MSI-X support for HW engines Ilia Levi
2024-12-02 19:15 ` Piotr Piórkowski
2024-11-28 12:53 ` [PATCH v5 4/5] drm/xe/irq: Manage MSI-X interrupts allocation Ilia Levi
2024-12-05 9:07 ` Piotr Piórkowski
2024-11-28 12:53 ` [PATCH v5 5/5] drm/xe/uapi: Support requesting unique MSI-X for exec queue Ilia Levi
2024-12-05 9:00 ` Piotr Piórkowski
2024-11-28 13:01 ` ✓ CI.Patch_applied: success for MSI-X support Patchwork
2024-11-28 13:01 ` ✓ CI.checkpatch: " Patchwork
2024-11-28 13:03 ` ✓ CI.KUnit: " Patchwork
2024-11-28 13:20 ` ✓ CI.Build: " Patchwork
2024-11-28 13:23 ` ✓ CI.Hooks: " Patchwork
2024-11-28 13:24 ` ✓ CI.checksparse: " Patchwork
2024-11-28 13:42 ` ✓ Xe.CI.BAT: " Patchwork
2024-11-28 15:39 ` ✗ Xe.CI.Full: failure " Patchwork
2024-12-13 7:25 ` [PATCH v6 0/4] " Ilia Levi
2024-12-13 7:25 ` [PATCH v6 1/4] drm/xe/irq: Separate MSI and MSI-X flows Ilia Levi
2024-12-13 7:25 ` [PATCH v6 2/4] drm/xe: Initial MSI-X support for HW engines Ilia Levi
2024-12-13 7:25 ` [PATCH v6 3/4] drm/xe/irq: Manage MSI-X interrupts allocation Ilia Levi
2024-12-13 7:25 ` [PATCH v6 4/4] drm/xe/uapi: Support requesting unique MSI-X for exec queue Ilia Levi
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