Re: [PATCH] drm/xe: Make irq enabled flag atomic

[Rodrigo Vivi <rodrigo.vivi@intel.com>]

On Tue, Dec 10, 2024 at 07:35:06PM +0200, Ilia Levi wrote:
> The irq.enabled flag was protected by a spin lock (irq.lock).
> By making it atomic we no longer need to wait for the spin lock in
> irq handlers. This will become especially useful for MSI-X irq
> handlers to prevent lock contention between different interrupts.
> 
> Signed-off-by: Ilia Levi <ilia.levi@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

pushing soon to drm-xe-next. Thanks for the patch

> ---
>  drivers/gpu/drm/xe/display/ext/i915_irq.c | 13 +---------
>  drivers/gpu/drm/xe/xe_device_types.h      |  2 +-
>  drivers/gpu/drm/xe/xe_irq.c               | 29 ++++++-----------------
>  3 files changed, 9 insertions(+), 35 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/display/ext/i915_irq.c b/drivers/gpu/drm/xe/display/ext/i915_irq.c
> index a7dbc6554d69..ac4cda2d81c7 100644
> --- a/drivers/gpu/drm/xe/display/ext/i915_irq.c
> +++ b/drivers/gpu/drm/xe/display/ext/i915_irq.c
> @@ -53,18 +53,7 @@ void gen2_irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
>  
>  bool intel_irqs_enabled(struct xe_device *xe)
>  {
> -	/*
> -	 * XXX: i915 has a racy handling of the irq.enabled, since it doesn't
> -	 * lock its transitions. Because of that, the irq.enabled sometimes
> -	 * is not read with the irq.lock in place.
> -	 * However, the most critical cases like vblank and page flips are
> -	 * properly using the locks.
> -	 * We cannot take the lock in here or run any kind of assert because
> -	 * of i915 inconsistency.
> -	 * But at this point the xe irq is better protected against races,
> -	 * although the full solution would be protecting the i915 side.
> -	 */
> -	return xe->irq.enabled;
> +	return atomic_read(&xe->irq.enabled);
>  }
>  
>  void intel_synchronize_irq(struct xe_device *xe)
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index 1373a222f5a5..ace22e35e769 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -347,7 +347,7 @@ struct xe_device {
>  		spinlock_t lock;
>  
>  		/** @irq.enabled: interrupts enabled on this device */
> -		bool enabled;
> +		atomic_t enabled;
>  	} irq;
>  
>  	/** @ttm: ttm device */
> diff --git a/drivers/gpu/drm/xe/xe_irq.c b/drivers/gpu/drm/xe/xe_irq.c
> index 7bf7201529ac..1c509e66694d 100644
> --- a/drivers/gpu/drm/xe/xe_irq.c
> +++ b/drivers/gpu/drm/xe/xe_irq.c
> @@ -348,12 +348,8 @@ static irqreturn_t xelp_irq_handler(int irq, void *arg)
>  	unsigned long intr_dw[2];
>  	u32 identity[32];
>  
> -	spin_lock(&xe->irq.lock);
> -	if (!xe->irq.enabled) {
> -		spin_unlock(&xe->irq.lock);
> +	if (!atomic_read(&xe->irq.enabled))
>  		return IRQ_NONE;
> -	}
> -	spin_unlock(&xe->irq.lock);
>  
>  	master_ctl = xelp_intr_disable(xe);
>  	if (!master_ctl) {
> @@ -417,12 +413,8 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
>  
>  	/* TODO: This really shouldn't be copied+pasted */
>  
> -	spin_lock(&xe->irq.lock);
> -	if (!xe->irq.enabled) {
> -		spin_unlock(&xe->irq.lock);
> +	if (!atomic_read(&xe->irq.enabled))
>  		return IRQ_NONE;
> -	}
> -	spin_unlock(&xe->irq.lock);
>  
>  	master_tile_ctl = dg1_intr_disable(xe);
>  	if (!master_tile_ctl) {
> @@ -644,12 +636,8 @@ static irqreturn_t vf_mem_irq_handler(int irq, void *arg)
>  	struct xe_tile *tile;
>  	unsigned int id;
>  
> -	spin_lock(&xe->irq.lock);
> -	if (!xe->irq.enabled) {
> -		spin_unlock(&xe->irq.lock);
> +	if (!atomic_read(&xe->irq.enabled))
>  		return IRQ_NONE;
> -	}
> -	spin_unlock(&xe->irq.lock);
>  
>  	for_each_tile(tile, xe, id)
>  		xe_memirq_handler(&tile->memirq);
> @@ -674,10 +662,9 @@ static void irq_uninstall(void *arg)
>  	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
>  	int irq;
>  
> -	if (!xe->irq.enabled)
> +	if (!atomic_xchg(&xe->irq.enabled, 0))
>  		return;
>  
> -	xe->irq.enabled = false;
>  	xe_irq_reset(xe);
>  
>  	irq = pci_irq_vector(pdev, 0);
> @@ -724,7 +711,7 @@ int xe_irq_install(struct xe_device *xe)
>  		return err;
>  	}
>  
> -	xe->irq.enabled = true;
> +	atomic_set(&xe->irq.enabled, 1);
>  
>  	xe_irq_postinstall(xe);
>  
> @@ -744,9 +731,7 @@ void xe_irq_suspend(struct xe_device *xe)
>  {
>  	int irq = to_pci_dev(xe->drm.dev)->irq;
>  
> -	spin_lock_irq(&xe->irq.lock);
> -	xe->irq.enabled = false; /* no new irqs */
> -	spin_unlock_irq(&xe->irq.lock);
> +	atomic_set(&xe->irq.enabled, 0); /* no new irqs */
>  
>  	synchronize_irq(irq); /* flush irqs */
>  	xe_irq_reset(xe); /* turn irqs off */
> @@ -762,7 +747,7 @@ void xe_irq_resume(struct xe_device *xe)
>  	 * 1. no irq will arrive before the postinstall
>  	 * 2. display is not yet resumed
>  	 */
> -	xe->irq.enabled = true;
> +	atomic_set(&xe->irq.enabled, 1);
>  	xe_irq_reset(xe);
>  	xe_irq_postinstall(xe); /* turn irqs on */
>  
> -- 
> 2.43.2
>