From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8129CC02181 for ; Thu, 23 Jan 2025 02:52:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1B8BC10E0DC; Thu, 23 Jan 2025 02:52:04 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="QYK1l6tl"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) by gabe.freedesktop.org (Postfix) with ESMTPS id D0A8D10E0DC for ; Thu, 23 Jan 2025 02:52:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1737600723; x=1769136723; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=DVlpopePaKOxDZ5CK8DLDwOTaGnO+/pxVhzi0yIcadc=; b=QYK1l6tlMFfwiG7hVRPM+uAapVbIDla/uxbcdaDG1aYF8xmxumcoXBta By/F56tcjOcZcTTJGfS/Unt34sGLaDxC1bE+//siNjBfctuxWSR+HXFvk 739RGmd7v8HoVLoC9DZ5fTMaFEY37d4CM/MBIAx2FMxNr2C4/Fl+VfPuX cxLRs0d2XxOHlDAWEfmC7lwNAkp+KHEZECR5h870448Q8pZgJSwyHMMQH XMF1f/QtDVX0oDxZ43pmuyHFJjx9v+EzEoAScimWASbNcBTrsWYylc8WR p00UZEdqz4/D89yO8sAjP6M/WHkbviJrRhgZZObeV37E6GzdktY5Vm4E4 A==; X-CSE-ConnectionGUID: fZBBTnCeSH+g9C7yJtmG/Q== X-CSE-MsgGUID: 6vJ4Bt/mRVy4FZHxXyub1g== X-IronPort-AV: E=McAfee;i="6700,10204,11323"; a="37972945" X-IronPort-AV: E=Sophos;i="6.13,227,1732608000"; d="scan'208";a="37972945" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jan 2025 18:52:03 -0800 X-CSE-ConnectionGUID: 2g1rbeZjTe2OGF90Pxryyw== X-CSE-MsgGUID: OXmzZ2GyR6WqFVInKYDAaQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,227,1732608000"; d="scan'208";a="112351937" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa004.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jan 2025 18:52:00 -0800 Date: Thu, 23 Jan 2025 04:51:57 +0200 From: Raag Jadav To: Riana Tauro Cc: lucas.demarchi@intel.com, rodrigo.vivi@intel.com, matthew.d.roper@intel.com, andi.shyti@linux.intel.com, Karthik Poosa , intel-xe@lists.freedesktop.org, anshuman.gupta@intel.com Subject: Re: [PATCH v1] drm/xe/hwmon: expose package and vram temperature Message-ID: References: <20250108092415.289551-1-raag.jadav@intel.com> <94e0bc3e-897c-48e2-950d-777d40519ab7@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <94e0bc3e-897c-48e2-950d-777d40519ab7@intel.com> X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Tue, Jan 21, 2025 at 01:56:05PM +0530, Riana Tauro wrote: > Hi Raag > > On 1/8/2025 2:54 PM, Raag Jadav wrote: > > Add hwmon support for temp1_input and temp2_input attributes, which will > > expose package and vram temperature in millidegree Celsius. With this in > > place we can monitor temperature using lm-sensors tool. > > > > Signed-off-by: Raag Jadav > > --- > > .../ABI/testing/sysfs-driver-intel-xe-hwmon | 16 +++++ > > drivers/gpu/drm/xe/regs/xe_mchbar_regs.h | 3 + > > drivers/gpu/drm/xe/regs/xe_pcode_regs.h | 2 + > > drivers/gpu/drm/xe/xe_hwmon.c | 63 +++++++++++++++++++ > > 4 files changed, 84 insertions(+) > > > > diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon > > index d792a56f59ac..998cfb0ee1a6 100644 > > --- a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon > > +++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon > > @@ -108,3 +108,19 @@ Contact: intel-xe@lists.freedesktop.org > > Description: RO. Package current voltage in millivolt. > > Only supported for particular Intel Xe graphics platforms. > > + > > +What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon/temp1_input > > +Date: April 2025 > > +KernelVersion: 6.15 > > +Contact: intel-xe@lists.freedesktop.org > > +Description: RO. Package temperature in millidegree Celsius. > > + > > + Only supported for particular Intel Xe graphics platforms. > > + > > +What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon/temp2_input > > +Date: April 2025 > > +KernelVersion: 6.15 > > +Contact: intel-xe@lists.freedesktop.org > > +Description: RO. VRAM temperature in millidegree Celsius. > > + > > + Only supported for particular Intel Xe graphics platforms. > > diff --git a/drivers/gpu/drm/xe/regs/xe_mchbar_regs.h b/drivers/gpu/drm/xe/regs/xe_mchbar_regs.h > > index 519dd1067a19..f5e5234857c1 100644 > > --- a/drivers/gpu/drm/xe/regs/xe_mchbar_regs.h > > +++ b/drivers/gpu/drm/xe/regs/xe_mchbar_regs.h > > @@ -34,6 +34,9 @@ > > #define PCU_CR_PACKAGE_ENERGY_STATUS XE_REG(MCHBAR_MIRROR_BASE_SNB + 0x593c) > > +#define PCU_CR_PACKAGE_TEMPERATURE XE_REG(MCHBAR_MIRROR_BASE_SNB + 0x5978) > > +#define TEMP_MASK REG_GENMASK(7, 0) > > + > > #define PCU_CR_PACKAGE_RAPL_LIMIT XE_REG(MCHBAR_MIRROR_BASE_SNB + 0x59a0) > > #define PKG_PWR_LIM_1 REG_GENMASK(14, 0) > > #define PKG_PWR_LIM_1_EN REG_BIT(15) > > diff --git a/drivers/gpu/drm/xe/regs/xe_pcode_regs.h b/drivers/gpu/drm/xe/regs/xe_pcode_regs.h > > index 0b0b49d850ae..8846eb9ce2a4 100644 > > --- a/drivers/gpu/drm/xe/regs/xe_pcode_regs.h > > +++ b/drivers/gpu/drm/xe/regs/xe_pcode_regs.h > > @@ -21,6 +21,8 @@ > > #define BMG_PACKAGE_POWER_SKU XE_REG(0x138098) > > #define BMG_PACKAGE_POWER_SKU_UNIT XE_REG(0x1380dc) > > #define BMG_PACKAGE_ENERGY_STATUS XE_REG(0x138120) > > +#define BMG_VRAM_TEMPERATURE XE_REG(0x1382c0) > > +#define BMG_PACKAGE_TEMPERATURE XE_REG(0x138434) > indentation. It's a git quirk, you won't see it in file. > Also you are using the same for DG2. Should have a common name Just following the conventions. > > #define BMG_PACKAGE_RAPL_LIMIT XE_REG(0x138440) > > #define BMG_PLATFORM_ENERGY_STATUS XE_REG(0x138458) > > #define BMG_PLATFORM_POWER_LIMIT XE_REG(0x138460) > > diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c > > index fde56dad3ab7..5b5c844adf4a 100644 > > --- a/drivers/gpu/drm/xe/xe_hwmon.c > > +++ b/drivers/gpu/drm/xe/xe_hwmon.c > > @@ -6,6 +6,7 @@ > > #include > > #include > > #include > > +#include > > #include > > #include "regs/xe_gt_regs.h" > > @@ -20,6 +21,7 @@ > > #include "xe_pm.h" > > enum xe_hwmon_reg { > > + REG_TEMP, > add to the end > > REG_PKG_RAPL_LIMIT, > > REG_PKG_POWER_SKU, > > REG_PKG_POWER_SKU_UNIT, > > @@ -39,6 +41,11 @@ enum xe_hwmon_channel { > > CHANNEL_MAX, > > }; > > +enum xe_hwmon_temp { > > + TEMP_PKG, > > + TEMP_VRAM, > > +}; > Can't the existing channel enum be used here? Nope, that'd break the indexes. > > + > > /* > > * SF_* - scale factors for particular quantities according to hwmon spec. > > */ > > @@ -84,6 +91,19 @@ static struct xe_reg xe_hwmon_get_reg(struct xe_hwmon *hwmon, enum xe_hwmon_reg > > struct xe_device *xe = hwmon->xe; > > switch (hwmon_reg) { > > + case REG_TEMP: > > + if (xe->info.platform == XE_BATTLEMAGE) { > > + if (channel == TEMP_PKG) > > + return BMG_PACKAGE_TEMPERATURE; > > + else if (channel == TEMP_VRAM) > > + return BMG_VRAM_TEMPERATURE; > > + } else if (xe->info.platform == XE_DG2) { > > + if (channel == TEMP_PKG) > > + return PCU_CR_PACKAGE_TEMPERATURE; > > + else if (channel == TEMP_VRAM) > > + return BMG_VRAM_TEMPERATURE; > > + } > Common code for bmg and dg2. Can be moved out Again, the conventions + easier to add new platforms this way. Raag