Re: [PATCH 10/20] drm/i915/dp_mst: Use VRR Timing generator for DP MST

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Mon, Feb 24, 2025 at 11:47:07AM +0530, Ankit Nautiyal wrote:
> Configure VRR timing generator for DP MST for fixed refresh rate.
> Currently the variable timings are supported only for DP and eDP and not
> for DP MST. Call intel_vrr_compute_config for MST which will configure
> fixed refresh rate timings irrespective of whether VRR is supported or
> not.

Also needs actual justification like the HDMI version.

> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 167e4a70ab12..2c4a9ac6f61e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -51,6 +51,7 @@
>  #include "intel_link_bw.h"
>  #include "intel_psr.h"
>  #include "intel_vdsc.h"
> +#include "intel_vrr.h"
>  #include "skl_scaler.h"
>  
>  /*
> @@ -709,6 +710,8 @@ static int mst_stream_compute_config(struct intel_encoder *encoder,
>  		pipe_config->lane_lat_optim_mask =
>  			bxt_dpio_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
>  
> +	intel_vrr_compute_config(pipe_config, conn_state);
> +
>  	intel_dp_audio_compute_config(encoder, pipe_config, conn_state);
>  
>  	intel_ddi_compute_min_voltage_level(pipe_config);
> -- 
> 2.45.2

-- 
Ville Syrjälä
Intel