Re: [Intel-xe] [PATCH] drm/xe/pvc: Disable FPU Residue

[Matthew Brost <matthew.brost@intel.com>]

On Mon, Jul 10, 2023 at 02:44:59PM -0700, Niranjana Vishwanathapura wrote:
> To reduce the power consumption disable FPU residue on some specific
> devices if total EUs are 1024.
> 
> Signed-off-by: Aravind Iddamsetty <aravind.iddamsetty@intel.com>
> Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
> ---
>  drivers/gpu/drm/xe/regs/xe_gt_regs.h |  1 +
>  drivers/gpu/drm/xe/xe_gt_topology.c  |  3 ---
>  drivers/gpu/drm/xe/xe_gt_types.h     |  3 +++
>  drivers/gpu/drm/xe/xe_wa.c           | 34 ++++++++++++++++++++++++++++
>  4 files changed, 38 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> index d654f3311351..16405b16fddf 100644
> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> @@ -316,6 +316,7 @@
>  #define   DIS_FIX_EOT1_FLUSH			REG_BIT(9)
>  
>  #define ROW_CHICKEN				XE_REG_MCR(0xe4f0, XE_REG_OPTION_MASKED)
> +#define   FPU_RESIDUE_DISABLE			REG_BIT(14)
>  #define   UGM_BACKUP_MODE			REG_BIT(13)
>  #define   MDQ_ARBITRATION_MODE			REG_BIT(12)
>  
> diff --git a/drivers/gpu/drm/xe/xe_gt_topology.c b/drivers/gpu/drm/xe/xe_gt_topology.c
> index d4bbd0a835c2..a2da443160ab 100644
> --- a/drivers/gpu/drm/xe/xe_gt_topology.c
> +++ b/drivers/gpu/drm/xe/xe_gt_topology.c
> @@ -11,9 +11,6 @@
>  #include "xe_gt.h"
>  #include "xe_mmio.h"
>  
> -#define XE_MAX_DSS_FUSE_BITS (32 * XE_MAX_DSS_FUSE_REGS)
> -#define XE_MAX_EU_FUSE_BITS (32 * XE_MAX_EU_FUSE_REGS)
> -
>  static void
>  load_dss_mask(struct xe_gt *gt, xe_dss_mask_t mask, int numregs, ...)
>  {
> diff --git a/drivers/gpu/drm/xe/xe_gt_types.h b/drivers/gpu/drm/xe/xe_gt_types.h
> index 7d4de019f9a5..e4b894bd28bc 100644
> --- a/drivers/gpu/drm/xe/xe_gt_types.h
> +++ b/drivers/gpu/drm/xe/xe_gt_types.h
> @@ -25,7 +25,10 @@ enum xe_gt_type {
>  };
>  
>  #define XE_MAX_DSS_FUSE_REGS	2
> +#define XE_MAX_DSS_FUSE_BITS (32 * XE_MAX_DSS_FUSE_REGS)
> +
>  #define XE_MAX_EU_FUSE_REGS	1
> +#define XE_MAX_EU_FUSE_BITS (32 * XE_MAX_EU_FUSE_REGS)
>  
>  typedef unsigned long xe_dss_mask_t[BITS_TO_LONGS(32 * XE_MAX_DSS_FUSE_REGS)];
>  typedef unsigned long xe_eu_mask_t[BITS_TO_LONGS(32 * XE_MAX_EU_FUSE_REGS)];
> diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
> index 5eaa9bed9d12..2852eaef6043 100644
> --- a/drivers/gpu/drm/xe/xe_wa.c
> +++ b/drivers/gpu/drm/xe/xe_wa.c
> @@ -13,6 +13,7 @@
>  #include "regs/xe_engine_regs.h"
>  #include "regs/xe_gt_regs.h"
>  #include "regs/xe_regs.h"
> +#include "xe_device.h"
>  #include "xe_device_types.h"
>  #include "xe_force_wake.h"
>  #include "xe_gt.h"
> @@ -256,6 +257,29 @@ static const struct xe_rtp_entry_sr gt_was[] = {
>  	{}
>  };
>  
> +static bool xe_wa_match_fpu_disable(const struct xe_gt *gt,
> +				    const struct xe_hw_engine *hwe)
> +{
> +	struct xe_device *xe = gt_to_xe(hwe->gt);

s/hwe->gt/gt

> +	struct xe_gt *gti;

Not needed, just use gt. 

> +	u16 eu_count = 0;
> +	u8 gt_id;
> +
> +	if (xe->info.devid != 0x0bd6)

Is there a define for 0x0bd6 or another way to test for this?

Matt

> +		return false;
> +
> +	for_each_gt(gti, xe, gt_id) {
> +		u16 n_dss = bitmap_weight(gti->fuse_topo.c_dss_mask,
> +					  XE_MAX_DSS_FUSE_BITS);
> +		u16 n_eu = bitmap_weight(gti->fuse_topo.eu_mask_per_dss,
> +					 XE_MAX_EU_FUSE_BITS);
> +
> +		eu_count += n_dss * n_eu;
> +	}
> +
> +	return eu_count == 1024;
> +}
> +
>  static const struct xe_rtp_entry_sr engine_was[] = {
>  	{ XE_RTP_NAME("22010931296, 18011464164, 14010919138"),
>  	  XE_RTP_RULES(GRAPHICS_VERSION(1200), ENGINE_CLASS(RENDER)),
> @@ -518,6 +542,16 @@ static const struct xe_rtp_entry_sr engine_was[] = {
>  		       GRAPHICS_STEP(B0, C0)),
>  	  XE_RTP_ACTIONS(SET(CACHE_MODE_SS, DISABLE_ECC))
>  	},
> +	/*
> +	 * Not a workaournd, but for tuning power.
> +	 * FPU residue disable will lower the power consumption.
> +	 */
> +	{ XE_RTP_NAME("WaFPUResidueDisable"),
> +	  XE_RTP_RULES(PLATFORM(PVC),
> +		       FUNC(xe_rtp_match_first_render_or_compute),
> +		       FUNC(xe_wa_match_fpu_disable)),
> +	  XE_RTP_ACTIONS(SET(ROW_CHICKEN, FPU_RESIDUE_DISABLE)),
> +	},
>  
>  	/* Xe_LPG */
>  	{ XE_RTP_NAME("14017856879"),
> -- 
> 2.21.0.rc0.32.g243a4c7e27
>