From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Janga Rahul Kumar <janga.rahul.kumar@intel.com>
Cc: matthew.d.roper@intel.com, intel-xe@lists.freedesktop.org,
ramadevi.gandi@intel.com
Subject: Re: [Intel-xe] [PATCH] drm/xe: Extend query ioctl to expose tile count
Date: Wed, 4 Oct 2023 12:18:04 -0400 [thread overview]
Message-ID: <ZR2QPM/V8p5+5cb3@intel.com> (raw)
In-Reply-To: <20231004085138.1825175-1-janga.rahul.kumar@intel.com>
On Wed, Oct 04, 2023 at 02:21:38PM +0530, Janga Rahul Kumar wrote:
> Tile count can be queried by UMD's using the query ioctl.
> VM bind ioctl has tile mask param whose valid range can be
> determined based on the tile count info.
And what exactly UMD is doing with the tile count?
Please let's hold on this idea for now. I'm more trending to propose
killing both tile and gt concepts of the uapi. For user the important
parts are the hw-engine and the memory-region where the BO is placed.
>
> Cc: Aravind Iddamsetty <aravind.iddamsetty@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Janga Rahul Kumar <janga.rahul.kumar@intel.com>
> ---
> drivers/gpu/drm/xe/xe_query.c | 2 ++
> include/uapi/drm/xe_drm.h | 3 ++-
> 2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> index a951205100fe..ada1f26dc1d9 100644
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
> @@ -200,6 +200,8 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
> hweight_long(xe->info.mem_region_mask);
> config->info[XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY] =
> xe_exec_queue_device_get_max_priority(xe);
> + config->info[XE_QUERY_CONFIG_TILE_COUNT] =
> + xe->info.tile_count;
>
> if (copy_to_user(query_ptr, config, size)) {
> kfree(config);
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index d48d8e3c898c..1d207b5398ae 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -257,7 +257,8 @@ struct drm_xe_query_config {
> #define XE_QUERY_CONFIG_GT_COUNT 4
> #define XE_QUERY_CONFIG_MEM_REGION_COUNT 5
> #define XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY 6
> -#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY + 1)
> +#define XE_QUERY_CONFIG_TILE_COUNT 7
> +#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_CONFIG_TILE_COUNT + 1)
> /** @info: array of elements containing the config info */
> __u64 info[];
> };
> --
> 2.25.1
>
next prev parent reply other threads:[~2023-10-04 16:18 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-04 8:51 [Intel-xe] [PATCH] drm/xe: Extend query ioctl to expose tile count Janga Rahul Kumar
2023-10-04 8:51 ` [Intel-xe] ✓ CI.Patch_applied: success for " Patchwork
2023-10-04 8:51 ` [Intel-xe] ✓ CI.checkpatch: " Patchwork
2023-10-04 8:52 ` [Intel-xe] ✓ CI.KUnit: " Patchwork
2023-10-04 8:59 ` [Intel-xe] ✓ CI.Build: " Patchwork
2023-10-04 9:00 ` [Intel-xe] ✗ CI.Hooks: failure " Patchwork
2023-10-04 9:01 ` [Intel-xe] ✓ CI.checksparse: success " Patchwork
2023-10-04 9:41 ` [Intel-xe] ✗ CI.BAT: failure " Patchwork
2023-10-04 16:18 ` Rodrigo Vivi [this message]
2023-10-05 15:26 ` [Intel-xe] [PATCH] " Kumar, Janga Rahul
2023-10-11 17:00 ` Rodrigo Vivi
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