Re: [Intel-xe] [PATCH 2/3] drm/xe: Fix devcoredump readout of IPEHR

[Rodrigo Vivi <rodrigo.vivi@intel.com>]

On Tue, Oct 03, 2023 at 01:27:27PM -0700, José Roberto de Souza wrote:
> It was reading (base) + 0x88 but that is not a valid register

s/88/8c

but you probably need a similar commit message used in commit 3.
After updating it,

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> and instead it should read (base) + 0x68.
> 
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/xe/regs/xe_engine_regs.h | 1 -
>  drivers/gpu/drm/xe/xe_hw_engine.c        | 2 +-
>  2 files changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> index 692213d09ceaa..792d431161c68 100644
> --- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> @@ -37,7 +37,6 @@
>  #define RING_DMA_FADD(base)			XE_REG((base) + 0x78)
>  #define RING_HWS_PGA(base)			XE_REG((base) + 0x80)
>  #define IPEIR(base)				XE_REG((base) + 0x88)
> -#define IPEHR(base)				XE_REG((base) + 0x8c)
>  #define RING_HWSTAM(base)			XE_REG((base) + 0x98)
>  #define RING_MI_MODE(base)			XE_REG((base) + 0x9c)
>  #define RING_NOPID(base)			XE_REG((base) + 0x94)
> diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
> index dc9dd83d99c52..c2db391cf2674 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine.c
> +++ b/drivers/gpu/drm/xe/xe_hw_engine.c
> @@ -728,7 +728,7 @@ xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe)
>  	snapshot->reg.ring_dma_fadd =
>  		hw_engine_mmio_read32(hwe, RING_DMA_FADD(0));
>  	snapshot->reg.ipeir = hw_engine_mmio_read32(hwe, IPEIR(0));
> -	snapshot->reg.ipehr = hw_engine_mmio_read32(hwe, IPEHR(0));
> +	snapshot->reg.ipehr = hw_engine_mmio_read32(hwe, RING_IPEHR(0));
>  
>  	if (snapshot->class == XE_ENGINE_CLASS_COMPUTE)
>  		snapshot->reg.rcu_mode = xe_mmio_read32(hwe->gt, RCU_MODE);
> -- 
> 2.42.0
>