Re: [Intel-xe] [PATCH 2/5] fixup! drm/xe/rplu: s/ADLP/ALDERLAKE_P

[Rodrigo Vivi <rodrigo.vivi@intel.com>]

On Wed, Oct 04, 2023 at 01:16:48PM -0500, Lucas De Marchi wrote:
> On Wed, Oct 04, 2023 at 10:58:05AM +0300, Jani Nikula wrote:
> > On Tue, 03 Oct 2023, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote:
> > > Extend the change introduced in the previous patch to xe
> > > driver.
> > 
> > This is not a fixup to the previous patch. This needs to be a fixup to
> > the commit that added the file to begin with.
> > 
> > The order of the patches will be changed to add display enabling last.
> 
> 
> assuming we are still going to move display up. Rodrigo mentioned
> recently about maybe stopping that. +Rodrigo

I hope we don't need to move them up anymore. but let's revisit this
in about 2 weeks.

> 
> In this case the commit message should be:
> 
> 	Subject: fixup! drm/xe/display: Implement display support

since this is the fixup, then the right placement is as first patch
in the series to avoid further conflicts when autosquashing without
moving the rest of display up.

> 
> Lucas De Marchi
> 
> > 
> > BR,
> > Jani.
> > 
> > > 
> > > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > > ---
> > >  drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
> > > index 7c825f129166..918dd27868fa 100644
> > > --- a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
> > > +++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
> > > @@ -146,7 +146,7 @@ static inline struct drm_i915_private *kdev_to_i915(struct device *kdev)
> > >  #define IS_DG2_G10(xe) ((xe)->info.subplatform == XE_SUBPLATFORM_DG2_G10)
> > >  #define IS_DG2_G11(xe) ((xe)->info.subplatform == XE_SUBPLATFORM_DG2_G11)
> > >  #define IS_DG2_G12(xe) ((xe)->info.subplatform == XE_SUBPLATFORM_DG2_G12)
> > > -#define IS_RAPTORLAKE_U(xe) ((xe)->info.subplatform == XE_SUBPLATFORM_ADLP_RPLU)
> > > +#define IS_RAPTORLAKE_U(xe) ((xe)->info.subplatform == XE_SUBPLATFORM_ALDERLAKE_P_RPLU)
> > >  #define IS_ICL_WITH_PORT_F(xe) (xe && 0)
> > >  #define HAS_FLAT_CCS(xe) (xe_device_has_flat_ccs(xe))
> > >  #define to_intel_bo(x) gem_to_xe_bo((x))
> > 
> > -- 
> > Jani Nikula, Intel