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From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Luca Coelho <luca@coelho.fi>
Cc: "Ville Syrjälä" <ville.syrjala@intel.com>,
	"Jani Nikula" <jani.nikula@intel.com>,
	"Lucas De Marchi" <lucas.demarchi@intel.com>,
	"Matthew Auld" <matthew.auld@intel.com>,
	"Matt Roper" <matthew.d.roper@intel.com>,
	intel-xe@lists.freedesktop.org
Subject: Re: [Intel-xe] [RFC] drm/xe: A minimal assert for some forcewake domain on xe_mmio.
Date: Thu, 19 Oct 2023 09:50:53 -0400	[thread overview]
Message-ID: <ZTE0PRFUaC/Zearu@intel.com> (raw)
In-Reply-To: <53c4b27aeb2aa333c288b3c0c867a04035b72ee8.camel@coelho.fi>

On Thu, Oct 19, 2023 at 11:43:10AM +0300, Luca Coelho wrote:
> On Tue, 2023-10-17 at 11:12 -0400, Rodrigo Vivi wrote:
> > On Mon, Oct 16, 2023 at 05:58:41PM -0700, Matt Roper wrote:
> > > On Mon, Oct 16, 2023 at 06:10:14PM -0400, Rodrigo Vivi wrote:
> > > > On Tue, Oct 17, 2023 at 12:33:39AM +0300, Luca Coelho wrote:
> > > > 
> > > > > But maybe I misunderstood the proposal.  And, if this is not the plan,
> > > > > then the only way to do it is to add the "wakelock" logic to the
> > > > > display orthogonally to the general MMIO access operations, which I
> > > > > wanted to avoid.
> > > > 
> > > > well, let's have it inside intel_de_ and we have only one implementation.
> > > > no port needed. Regardless of the future of the xe_mmio or the future
> > > > of xe_forcewake.
> > > 
> > > Implementing it solely at the intel_de layer sounds reasonable to me as
> > > well.
> > 
> > yeap, they appear to be orthogonal discussions. Even going with the
> > intrinsic forcewake inside xe_mmio, I still believe that the right place
> > for this wakelock is inside intel_de anyway.
> 
> Thanks for all the comments and helping me understand this a bit
> better.  The way I saw it was that Xe would be where underlying HW
> access is implemented, so to me it would make sense to have this HW
> access restriction (regardless of being used only by the display)
> there.  I don't think it's a "display thing", but a HW limitation that
> affects only the display.

I believe the best way to see this is the display driver driving the
display IP block, regardless of which driver it is 'paired' with.

So, it drives the hardware...  at least the display block of the hardware.

Then, the side driver provides a path to the basic hw *access* and
basic *resouces*, only because we are in the same pci card and share
some of the resources.

> 
> In any case, doing it entirely in intel_de is probably the easiest
> thing to do, so let's go with that.
> 
> --
> Cheers,
> Luca.

  reply	other threads:[~2023-10-19 13:51 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-22 22:15 [Intel-xe] [RFC] drm/xe: A minimal assert for some forcewake domain on xe_mmio Rodrigo Vivi
2023-05-22 22:17 ` [Intel-xe] ✓ CI.Patch_applied: success for " Patchwork
2023-05-22 22:19 ` [Intel-xe] ✓ CI.KUnit: " Patchwork
2023-05-22 22:23 ` [Intel-xe] ✓ CI.Build: " Patchwork
2023-05-23  3:28 ` [Intel-xe] [RFC] " Matt Roper
2023-05-23 13:56   ` Matthew Brost
2023-05-23 16:38     ` Matt Roper
2023-05-23 23:52       ` Matthew Brost
2023-10-09  9:22         ` Luca Coelho
2023-10-09 21:15           ` Rodrigo Vivi
2023-10-10  7:00             ` Luca Coelho
2023-10-10  7:26               ` Luca Coelho
2023-10-12 19:58                 ` Rodrigo Vivi
2023-10-12 20:04               ` Rodrigo Vivi
2023-10-16 10:22                 ` Luca Coelho
2023-10-16 18:09                   ` Rodrigo Vivi
2023-10-16 19:40                     ` Luca Coelho
2023-10-16 20:08                       ` Rodrigo Vivi
2023-10-16 21:33                         ` Luca Coelho
2023-10-16 22:10                           ` Rodrigo Vivi
2023-10-17  0:58                             ` Matt Roper
2023-10-17 15:12                               ` Rodrigo Vivi
2023-10-19  8:43                                 ` Luca Coelho
2023-10-19 13:50                                   ` Rodrigo Vivi [this message]
2023-05-24 17:06   ` Rodrigo Vivi

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