Re: [PATCH] drm/i915/dp: Wait more before rearming FIFO underrun during retrain

[Rodrigo Vivi <rodrigo.vivi@intel.com>]

On Wed, Jun 26, 2024 at 02:06:24PM +0530, Ankit Nautiyal wrote:
> During Link re-training reporting underrun is disabled and then
> renabled after re-training is completed. For BMG its seen that we get
> FIFO underrun just after the retraining is completed and the underrun
> reporting is re-enabled.
> Add one more intel_crtc_wait_for_next_vblank before re-arming the
> underruns.

Cc: Arthur Runyan <arthur.j.runyan@intel.com>

Art, any new workaround in BMG for this issue?

> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 3903f6ead6e6..25af51499383 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -5325,7 +5325,12 @@ static int intel_dp_retrain_link(struct intel_encoder *encoder,
>  		const struct intel_crtc_state *crtc_state =
>  			to_intel_crtc_state(crtc->base.state);
>  
> -		/* Keep underrun reporting disabled until things are stable */
> +		/*
> +		 * Keep underrun reporting disabled until things are stable.
> +		 * Wait for some more time, as we see (at least on BMG) that
> +		 * underrun gets reported just after the reporting is enabled.
> +		 */
> +		intel_crtc_wait_for_next_vblank(crtc);
>  		intel_crtc_wait_for_next_vblank(crtc);
>  
>  		intel_set_cpu_fifo_underrun_reporting(dev_priv, crtc->pipe, true);
> -- 
> 2.40.1
>