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> >>> - vsub = 1; > >>> + > >>> + /* > >>> + * Wa_16023981245 for display version 20. > >>> + * Do not support odd x-panning for NV12. > >>> + */ > >>> + if (intel_display_needs_wa_16023981245(i915) && > >>> + fb->format->format == DRM_FORMAT_NV12) { > >>> + vsub = 1; > >>> + } else { > >>> + hsub = 1; > >>> + vsub = 1; > >>> + } > >> > >>Nitpick, the whole thing could be simplified to only touch hsub since > >>the w/a is about x-panning and vsub is the same in both branches. > >> > >>> } else { > >>> hsub = fb->format->hsub; > >>> vsub = fb->format->vsub; > >>> diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h > >>> index be644ab6ae00..9be35a751503 100644 > >>> --- a/drivers/gpu/drm/i915/display/intel_display_wa.h > >>> +++ b/drivers/gpu/drm/i915/display/intel_display_wa.h > >>> @@ -14,8 +14,10 @@ void intel_display_wa_apply(struct drm_i915_private *i915); > >>> > >>> #ifdef I915 > >>> static inline bool intel_display_needs_wa_16023588340(struct drm_i915_private *i915) { return false; } > >>> +static inline bool intel_display_needs_wa_16023981245(struct drm_i915_private *i915) { return false; } > >>> #else > >>> bool intel_display_needs_wa_16023588340(struct drm_i915_private *i915); > >>> +bool intel_display_needs_wa_16023981245(struct drm_i915_private *i915); > >>> #endif > >>> > >>> #endif > >>> diff --git a/drivers/gpu/drm/xe/display/xe_display_wa.c b/drivers/gpu/drm/xe/display/xe_display_wa.c > >>> index 68e3d1959ad6..fde4e09589a3 100644 > >>> --- a/drivers/gpu/drm/xe/display/xe_display_wa.c > >>> +++ b/drivers/gpu/drm/xe/display/xe_display_wa.c > >>> @@ -14,3 +14,8 @@ bool intel_display_needs_wa_16023588340(struct drm_i915_private *i915) > >>> { > >>> return XE_WA(xe_root_mmio_gt(i915), 16023588340); > >>> } > >>> + > >>> +bool intel_display_needs_wa_16023981245(struct drm_i915_private *i915) > >>> +{ > >>> + return XE_WA(xe_root_mmio_gt(i915), 22019338487_display); > >> > >>16023981245 vs 22019338487 and not explained in the commit message?!? > >> > >>Rodrigo, Lucas, I think we're going to need to handle display > >>workarounds separately in i915 display. I'm fine with merging this now, > >>it's not a big deal, but this interface is not future compatible. > >> > >>The first step could be simply converting these two to the old style > >>workarounds in i915 display, i.e. just checking for display version or > >>platform directly, and later adding wa infrastructure similar to what xe > >>has, but for display only. > > > > Do you expect any WA like this to be enabled for both xe and i915? There > > are no platform with i915 and display_ver == 20. I think for past > > platforms, just following the display version and platform check is fine. > > For newer ones, where there's only support in xe, we use the xe way. > > Consider having an independent intel-display.ko that caters for display > IP support, regardless of whether it's being used by i915 or xe. > > >From that perspective, any interfaces like this become increasingly > weird. Display code should depend on its own platform, display version > and stepping identification, also for workarounds. > > The xe_wa_oob.rules file doesn't have a single display version or > stepping check. There's a single display w/a that looks at > PLATFORM(LUNARLAKE). And that's all it can do. Nowadays xe core doesn't > have the information on display version or stepping. It has no business > looking at the guts of struct intel_display to figure it out. Yeap, I agree with Jani here. Regardless of which platform is calling the display side, intel_display should be in full control of its IP block including the W/As. Perhaps we could add a display wa infra similar to this nice xe one there as well. > > BR, > Jani. > > > > > > Lucas De Marchi > > > >> > >>BR, > >>Jani. > >> > >> > >> > >>> +} > >> > >> > >> > >> > >> > >>-- > >>Jani Nikula, Intel > > -- > Jani Nikula, Intel