From: Matthew Brost <matthew.brost@intel.com>
To: John Harrison <john.c.harrison@intel.com>
Cc: Nirmoy Das <nirmoy.das@intel.com>,
<intel-xe@lists.freedesktop.org>,
"Badal Nilawar" <badal.nilawar@intel.com>,
Jani Nikula <jani.nikula@intel.com>,
Matthew Auld <matthew.auld@intel.com>,
Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>,
Lucas De Marchi <lucas.demarchi@intel.com>,
<stable@vger.kernel.org>
Subject: Re: [PATCH v2] drm/xe/ufence: Flush xe ordered_wq in case of ufence timeout
Date: Thu, 24 Oct 2024 17:22:37 +0000 [thread overview]
Message-ID: <ZxqCXUp+0EWLVX7u@DUT025-TGLU.fm.intel.com> (raw)
In-Reply-To: <ed863a65-5238-4bb9-9173-d297ed953d1f@intel.com>
On Thu, Oct 24, 2024 at 10:14:21AM -0700, John Harrison wrote:
> On 10/24/2024 08:18, Nirmoy Das wrote:
> > Flush xe ordered_wq in case of ufence timeout which is observed
> > on LNL and that points to the recent scheduling issue with E-cores.
> >
> > This is similar to the recent fix:
> > commit e51527233804 ("drm/xe/guc/ct: Flush g2h worker in case of g2h
> > response timeout") and should be removed once there is E core
> > scheduling fix.
> >
> > v2: Add platform check(Himal)
> > s/__flush_workqueue/flush_workqueue(Jani)
> >
> > Cc: Badal Nilawar <badal.nilawar@intel.com>
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Cc: Matthew Auld <matthew.auld@intel.com>
> > Cc: John Harrison <John.C.Harrison@Intel.com>
> > Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> > Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> > Cc: <stable@vger.kernel.org> # v6.11+
> > Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2754
> > Suggested-by: Matthew Brost <matthew.brost@intel.com>
> > Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
> > Reviewed-by: Matthew Brost <matthew.brost@intel.com>
> > ---
> > drivers/gpu/drm/xe/xe_wait_user_fence.c | 14 ++++++++++++++
> > 1 file changed, 14 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_wait_user_fence.c b/drivers/gpu/drm/xe/xe_wait_user_fence.c
> > index f5deb81eba01..78a0ad3c78fe 100644
> > --- a/drivers/gpu/drm/xe/xe_wait_user_fence.c
> > +++ b/drivers/gpu/drm/xe/xe_wait_user_fence.c
> > @@ -13,6 +13,7 @@
> > #include "xe_device.h"
> > #include "xe_gt.h"
> > #include "xe_macros.h"
> > +#include "compat-i915-headers/i915_drv.h"
> > #include "xe_exec_queue.h"
> > static int do_compare(u64 addr, u64 value, u64 mask, u16 op)
> > @@ -155,6 +156,19 @@ int xe_wait_user_fence_ioctl(struct drm_device *dev, void *data,
> > }
> > if (!timeout) {
> > + if (IS_LUNARLAKE(xe)) {
> > + /*
> > + * This is analogous to e51527233804 ("drm/xe/guc/ct: Flush g2h
> > + * worker in case of g2h response timeout")
> > + *
> > + * TODO: Drop this change once workqueue scheduling delay issue is
> > + * fixed on LNL Hybrid CPU.
> > + */
> > + flush_workqueue(xe->ordered_wq);
> If we are having multiple instances of this workaround, can we wrap them up
> in as 'LNL_FLUSH_WORKQUEUE(q)' or some such? Put the IS_LNL check inside the
> macro and make it pretty obvious exactly where all the instances are by
> having a single macro name to search for.
>
+1, I think Lucas is suggesting something similar to this on the chat to
make sure we don't lose track of removing these W/A when this gets
fixed.
Matt
> John.
>
> > + err = do_compare(addr, args->value, args->mask, args->op);
> > + if (err <= 0)
> > + break;
> > + }
> > err = -ETIME;
> > break;
> > }
>
next prev parent reply other threads:[~2024-10-24 17:23 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-24 15:18 [PATCH v2] drm/xe/ufence: Flush xe ordered_wq in case of ufence timeout Nirmoy Das
2024-10-24 16:08 ` Nirmoy Das
2024-10-24 16:32 ` Jani Nikula
2024-10-25 16:03 ` Nirmoy Das
2024-10-25 18:27 ` John Harrison
2024-10-25 18:34 ` Matthew Brost
2024-10-25 19:33 ` Nirmoy Das
2024-10-25 19:56 ` Lucas De Marchi
2024-10-28 9:58 ` Nirmoy Das
2024-10-24 17:14 ` John Harrison
2024-10-24 17:22 ` Matthew Brost [this message]
2024-10-25 16:06 ` Nirmoy Das
2024-10-25 17:29 ` Matthew Brost
2024-10-25 1:52 ` ✓ CI.Patch_applied: success for drm/xe/ufence: Flush xe ordered_wq in case of ufence timeout (rev2) Patchwork
2024-10-25 1:52 ` ✗ CI.checkpatch: warning " Patchwork
2024-10-25 1:53 ` ✗ CI.KUnit: failure " Patchwork
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