Re: [PATCH 2/2] drm/xe/hwmon: Expose card power and energy attributes of BMG

["Nilawar, Badal" <badal.nilawar@intel.com>]

On 23-05-2024 20:13, Balasubramani Vivekanandan wrote:
> From: Karthik Poosa <karthik.poosa@intel.com>
> 
> In BMG there are separate registers for card/platform power and
> energy.
> These are exposed through channel 0 i.e power_1/energy1_xxx.
> 
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
> ---

LGTM
Reviewed-by: Badal Nilawar <badal.nilawar@intel.com>

Regards,
Badal
>   drivers/gpu/drm/xe/regs/xe_pcode_regs.h |  2 ++
>   drivers/gpu/drm/xe/xe_hwmon.c           | 26 +++++++++++++++++--------
>   2 files changed, 20 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_pcode_regs.h b/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
> index beba16d592fc..0b0b49d850ae 100644
> --- a/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
> @@ -22,5 +22,7 @@
>   #define BMG_PACKAGE_POWER_SKU_UNIT		XE_REG(0x1380dc)
>   #define BMG_PACKAGE_ENERGY_STATUS		XE_REG(0x138120)
>   #define BMG_PACKAGE_RAPL_LIMIT			XE_REG(0x138440)
> +#define BMG_PLATFORM_ENERGY_STATUS		XE_REG(0x138458)
> +#define BMG_PLATFORM_POWER_LIMIT		XE_REG(0x138460)
>   
>   #endif /* _XE_PCODE_REGS_H_ */
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index 8daa070d7b1a..aae9670428a3 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -86,12 +86,17 @@ static struct xe_reg xe_hwmon_get_reg(struct xe_hwmon *hwmon, enum xe_hwmon_reg
>   
>   	switch (hwmon_reg) {
>   	case REG_PKG_RAPL_LIMIT:
> -		if (xe->info.platform == XE_BATTLEMAGE && channel == CHANNEL_PKG)
> -			return BMG_PACKAGE_RAPL_LIMIT;
> -		else if (xe->info.platform == XE_PVC && channel == CHANNEL_PKG)
> +		if (xe->info.platform == XE_BATTLEMAGE) {
> +			if (channel == CHANNEL_PKG) {
> +				return BMG_PACKAGE_RAPL_LIMIT;
> +			} else {
> +				return BMG_PLATFORM_POWER_LIMIT;
> +			}
> +		} else if (xe->info.platform == XE_PVC && channel == CHANNEL_PKG) {
>   			return PVC_GT0_PACKAGE_RAPL_LIMIT;
> -		else if ((xe->info.platform == XE_DG2) && (channel == CHANNEL_PKG))
> +		} else if ((xe->info.platform == XE_DG2) && (channel == CHANNEL_PKG)) {
>   			return PCU_CR_PACKAGE_RAPL_LIMIT;
> +		}
>   		break;
>   	case REG_PKG_POWER_SKU:
>   		if (xe->info.platform == XE_BATTLEMAGE)
> @@ -114,12 +119,17 @@ static struct xe_reg xe_hwmon_get_reg(struct xe_hwmon *hwmon, enum xe_hwmon_reg
>   			return GT_PERF_STATUS;
>   		break;
>   	case REG_PKG_ENERGY_STATUS:
> -		if (xe->info.platform == XE_BATTLEMAGE && channel == CHANNEL_PKG)
> -			return BMG_PACKAGE_ENERGY_STATUS;
> -		else if (xe->info.platform == XE_PVC && channel == CHANNEL_PKG)
> +		if (xe->info.platform == XE_BATTLEMAGE) {
> +			if (channel == CHANNEL_PKG) {
> +				return BMG_PACKAGE_ENERGY_STATUS;
> +			} else {
> +				return BMG_PLATFORM_ENERGY_STATUS;
> +			}
> +		} else if (xe->info.platform == XE_PVC && channel == CHANNEL_PKG) {
>   			return PVC_GT0_PLATFORM_ENERGY_STATUS;
> -		else if ((xe->info.platform == XE_DG2) && (channel == CHANNEL_PKG))
> +		} else if ((xe->info.platform == XE_DG2) && (channel == CHANNEL_PKG)) {
>   			return PCU_CR_PACKAGE_ENERGY_STATUS;
> +		}
>   		break;
>   	default:
>   		drm_warn(&xe->drm, "Unknown xe hwmon reg id: %d\n", hwmon_reg);