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X-OriginatorOrg: intel.com Subject: Re: [Intel-xe] [RFC][PATCH 1/1] drm/xe: Add throttle reason sysfs attributes X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-xe@lists.freedesktop.org Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On 8/23/2023 5:27 AM, Matthew Brost wrote: > On Tue, Aug 22, 2023 at 10:28:25AM +0530, Sujaritha Sundaresan wrote: >> Add throttle reasons sysfs interface under device/../gt#/ >> Currently there is one overall status and eight reasons >> attributes. >> >> The new sysfs structure will have the below layout >> >> device/> ├── gt0 >> │ └── throttle >> │ ├── >> │ >> │ >> ├── gtN >> │ └── throttle >> │ ├── >> >> Signed-off-by: Sujaritha Sundaresan >> --- >> drivers/gpu/drm/xe/Makefile | 1 + >> drivers/gpu/drm/xe/regs/xe_gt_regs.h | 13 + >> .../drm/xe/regs/xe_gt_throttle_sysfs_types.h | 36 +++ >> drivers/gpu/drm/xe/xe_gt.c | 3 + >> drivers/gpu/drm/xe/xe_gt_throttle_sysfs.c | 282 ++++++++++++++++++ >> drivers/gpu/drm/xe/xe_gt_throttle_sysfs.h | 17 ++ >> .../gpu/drm/xe/xe_gt_throttle_sysfs_types.h | 35 +++ >> drivers/gpu/drm/xe/xe_gt_types.h | 4 + >> 8 files changed, 391 insertions(+) >> create mode 100644 drivers/gpu/drm/xe/regs/xe_gt_throttle_sysfs_types.h >> create mode 100644 drivers/gpu/drm/xe/xe_gt_throttle_sysfs.c >> create mode 100644 drivers/gpu/drm/xe/xe_gt_throttle_sysfs.h >> create mode 100644 drivers/gpu/drm/xe/xe_gt_throttle_sysfs_types.h >> >> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile >> index 550cdfed729e..eb3ccd90b2fa 100644 >> --- a/drivers/gpu/drm/xe/Makefile >> +++ b/drivers/gpu/drm/xe/Makefile >> @@ -63,6 +63,7 @@ xe-y += xe_bb.o \ >> xe_gt_mcr.o \ >> xe_gt_pagefault.o \ >> xe_gt_sysfs.o \ >> + xe_gt_throttle_sysfs.o \ >> xe_gt_tlb_invalidation.o \ >> xe_gt_topology.o \ >> xe_guc.o \ >> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h >> index baa00557f114..8416d483e7c3 100644 >> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h >> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h >> @@ -400,4 +400,17 @@ >> #define XEHPC_BCS5_BCS6_INTR_MASK XE_REG(0x190118) >> #define XEHPC_BCS7_BCS8_INTR_MASK XE_REG(0x19011c) >> >> +#define GT0_PERF_LIMIT_REASONS XE_REG(0x1381a8) >> +#define GT0_PERF_LIMIT_REASONS_MASK 0xde3 >> +#define PROCHOT_MASK REG_BIT(0) >> +#define THERMAL_LIMIT_MASK REG_BIT(1) >> +#define RATL_MASK REG_BIT(5) >> +#define VR_THERMALERT_MASK REG_BIT(6) >> +#define VR_TDC_MASK REG_BIT(7) >> +#define POWER_LIMIT_4_MASK REG_BIT(8) >> +#define POWER_LIMIT_1_MASK REG_BIT(10) >> +#define POWER_LIMIT_2_MASK REG_BIT(11) >> +#define GT0_PERF_LIMIT_REASONS_LOG_MASK REG_GENMASK(31, 16) >> +#define MTL_MEDIA_PERF_LIMIT_REASONS XE_REG(0x138030) >> + >> #endif >> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_throttle_sysfs_types.h b/drivers/gpu/drm/xe/regs/xe_gt_throttle_sysfs_types.h >> new file mode 100644 >> index 000000000000..b71865f467ce >> --- /dev/null >> +++ b/drivers/gpu/drm/xe/regs/xe_gt_throttle_sysfs_types.h >> @@ -0,0 +1,36 @@ >> +/* SPDX-License-Identifier: MIT */ >> +/* >> + * Copyright © 2023 Intel Corporation >> + */ >> + >> +#ifndef _XE_GT_THROTTLE_SYSFS_TYPES_H_ >> +#define _XE_GT_THROTTLE_SYSFS_TYPES_H_ >> + >> +#include >> + >> +/** >> + * struct xe_gt_throttle - A struct that contains frequency throttle reasons in gt >> + */ >> +struct xe_gt_throttle { >> + /** @status: status */ >> + bool status; >> + /** @reason_pl1: */ >> + bool reason_pl1; >> + /** @reason_pl2: */ >> + bool reason_pl2; >> + /** @reason_pl4: */ >> + bool reason_pl4; >> + /** @reason_thermal: */ >> + bool reason_thermal; >> + /** @reason_prochot */ >> + bool reason_prochot; >> + /** @reason_ratl */ >> + bool reason_ratl; >> + /** @reason_vr_thermalert */ >> + bool reason_vr_thermalert; >> + /** @reason_vr_tdc */ >> + bool reason_vr_tdc; >> +}; >> + >> +#endif /* _XE_GT_THROTTLE_SYSFS_TYPES_H_ */ >> + >> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c >> index 13320af4ddd3..03be2c2980d4 100644 >> --- a/drivers/gpu/drm/xe/xe_gt.c >> +++ b/drivers/gpu/drm/xe/xe_gt.c >> @@ -24,6 +24,7 @@ >> #include "xe_gt_pagefault.h" >> #include "xe_gt_printk.h" >> #include "xe_gt_sysfs.h" >> +#include "xe_gt_throttle_sysfs.h" >> #include "xe_gt_tlb_invalidation.h" >> #include "xe_gt_topology.h" >> #include "xe_guc_exec_queue_types.h" >> @@ -442,6 +443,8 @@ int xe_gt_init(struct xe_gt *gt) >> >> xe_gt_sysfs_init(gt); >> >> + xe_gt_throttle_sysfs_init(>->throttle); > This is the wrong place, xe_gt_sysfs_init should call xe_gt_throttle_sysfs_init. > > Matt Okay will make this change. > >> + >> err = gt_fw_domain_init(gt); >> if (err) >> return err; >> diff --git a/drivers/gpu/drm/xe/xe_gt_throttle_sysfs.c b/drivers/gpu/drm/xe/xe_gt_throttle_sysfs.c >> new file mode 100644 >> index 000000000000..7db67b5fc138 >> --- /dev/null >> +++ b/drivers/gpu/drm/xe/xe_gt_throttle_sysfs.c >> @@ -0,0 +1,282 @@ >> +// SPDX-License-Identifier: MIT >> +/* >> + * Copyright © 2023 Intel Corporation >> + */ >> + >> +#include >> + >> +#include >> +#include "xe_device.h" >> +#include "xe_gt.h" >> +#include "xe_gt_sysfs.h" >> +#include "xe_gt_throttle_sysfs.h" >> +#include "xe_guc_pc.h" >> +#include "xe_mmio.h" >> + >> +/** >> + * DOC: Xe GT Throttle >> + * >> + * Provides sysfs entries for frequency throttle reasons in GT >> + * >> + * device/gt#/throttle/status - Overall status >> + * device/gt#/throttle/throttle_reason_pl1 - Frequency throttle due to PL1 >> + * device/gt#/throttle/throttle_reason_pl2 - Frequency throttle due to PL2 >> + * device/gt#/throttle/throttle_reason_pl4 - Frequency throttle due to PL4, Iccmax etc. >> + * device/gt#/throttle/throttle_reason_thermal - Frequency throttle due to thermal >> + * device/gt#/throttle/throttle_reason_prochot - Frequency throttle due to prochot >> + * device/gt#/throttle/throttle_reason_ratl - Frequency throttle due to RATL >> + * device/gt#/throttle/throttle_reason_vr_thermalert - Frequency throttle due to VR THERMALERT >> + * device/gt#/throttle/throttle_reason_vr_tdc - Frequency throttle due to VR TDC >> + */ >> + >> +static struct xe_gt_throttle *dev_to_throttle(struct device *dev) >> +{ >> + struct kobject *kobj = &dev->kobj; >> + >> + return &kobj_to_gt(kobj->parent)->throttle; >> +} >> + >> +static struct xe_gt *throttle_to_gt(struct xe_gt_throttle *throttle) >> +{ >> + return container_of(throttle, struct xe_gt, throttle); >> +} >> + >> +u32 read_perf_limit_reasons(struct xe_gt *gt) >> +{ >> + u32 reg; >> + if (xe_gt_is_media_type(gt)) >> + reg = xe_mmio_read32(gt, MTL_MEDIA_PERF_LIMIT_REASONS); >> + else >> + reg = xe_mmio_read32(gt, GT0_PERF_LIMIT_REASONS); >> + >> + return reg; >> +} >> + >> +u32 xe_read_status(struct xe_gt_throttle *throttle) >> +{ >> + struct xe_gt *gt = throttle_to_gt(throttle); >> + u32 status = read_perf_limit_reasons(gt) & GT0_PERF_LIMIT_REASONS_MASK; >> + >> + return status; >> +} >> + >> +u32 xe_read_reason_pl1(struct xe_gt_throttle *throttle) >> +{ >> + struct xe_gt *gt = throttle_to_gt(throttle); >> + u32 pl1 = read_perf_limit_reasons(gt) & POWER_LIMIT_1_MASK; >> + >> + return pl1; >> +} >> + >> +u32 xe_read_reason_pl2(struct xe_gt_throttle *throttle) >> +{ >> + struct xe_gt *gt = throttle_to_gt(throttle); >> + u32 pl2 = read_perf_limit_reasons(gt) & POWER_LIMIT_2_MASK; >> + >> + return pl2; >> +} >> + >> +u32 xe_read_reason_pl4(struct xe_gt_throttle *throttle) >> +{ >> + struct xe_gt *gt = throttle_to_gt(throttle); >> + u32 pl4 = read_perf_limit_reasons(gt) & POWER_LIMIT_4_MASK; >> + >> + return pl4; >> +} >> + >> +u32 xe_read_reason_thermal(struct xe_gt_throttle *throttle) >> +{ >> + struct xe_gt *gt = throttle_to_gt(throttle); >> + u32 thermal = read_perf_limit_reasons(gt) & THERMAL_LIMIT_MASK; >> + >> + return thermal; >> +} >> + >> +u32 xe_read_reason_prochot(struct xe_gt_throttle *throttle) >> +{ >> + struct xe_gt *gt = throttle_to_gt(throttle); >> + u32 prochot = read_perf_limit_reasons(gt) & PROCHOT_MASK; >> + >> + return prochot; >> +} >> + >> +u32 xe_read_reason_ratl(struct xe_gt_throttle *throttle) >> +{ >> + struct xe_gt *gt = throttle_to_gt(throttle); >> + u32 ratl = read_perf_limit_reasons(gt) & RATL_MASK; >> + >> + return ratl; >> +} >> + >> +u32 xe_read_reason_vr_thermalert(struct xe_gt_throttle *throttle) >> +{ >> + struct xe_gt *gt = throttle_to_gt(throttle); >> + u32 thermalert = read_perf_limit_reasons(gt) & VR_THERMALERT_MASK; >> + >> + return thermalert; >> +} >> + >> +u32 xe_read_reason_vr_tdc(struct xe_gt_throttle *throttle) >> +{ >> + struct xe_gt *gt = throttle_to_gt(throttle); >> + u32 tdc = read_perf_limit_reasons(gt) & VR_TDC_MASK; >> + >> + return tdc; >> +} >> + >> +static ssize_t status_show(struct device *dev, >> + struct device_attribute *attr, >> + char *buff) >> +{ >> + struct xe_gt_throttle *throttle = dev_to_throttle(dev); >> + struct xe_gt *gt = throttle_to_gt(throttle); >> + bool status = !!xe_read_status(>->throttle); >> + >> + return sysfs_emit(buff, "%u\n", status); >> +} >> +static DEVICE_ATTR_RO(status); >> + >> +static ssize_t reason_pl1_show(struct device *dev, >> + struct device_attribute *attr, >> + char *buff) >> +{ >> + struct xe_gt_throttle *throttle = dev_to_throttle(dev); >> + struct xe_gt *gt = throttle_to_gt(throttle); >> + bool pl1 = !!xe_read_reason_pl1(>->throttle); >> + >> + return sysfs_emit(buff, "%u\n", pl1); >> +} >> +static DEVICE_ATTR_RO(reason_pl1); >> + >> +static ssize_t reason_pl2_show(struct device *dev, >> + struct device_attribute *attr, >> + char *buff) >> +{ >> + struct xe_gt_throttle *throttle = dev_to_throttle(dev); >> + struct xe_gt *gt = throttle_to_gt(throttle); >> + bool pl2 = !!xe_read_reason_pl2(>->throttle); >> + >> + return sysfs_emit(buff, "%u\n", pl2); >> +} >> +static DEVICE_ATTR_RO(reason_pl2); >> + >> +static ssize_t reason_pl4_show(struct device *dev, >> + struct device_attribute *attr, >> + char *buff) >> +{ >> + struct xe_gt_throttle *throttle = dev_to_throttle(dev); >> + struct xe_gt *gt = throttle_to_gt(throttle); >> + bool pl4 = !!xe_read_reason_pl4(>->throttle); >> + >> + return sysfs_emit(buff, "%u\n", pl4); >> +} >> +static DEVICE_ATTR_RO(reason_pl4); >> + >> +static ssize_t reason_thermal_show(struct device *dev, >> + struct device_attribute *attr, >> + char *buff) >> +{ >> + struct xe_gt_throttle *throttle = dev_to_throttle(dev); >> + struct xe_gt *gt = throttle_to_gt(throttle); >> + bool thermal = !!xe_read_reason_thermal(>->throttle); >> + >> + return sysfs_emit(buff, "%u\n", thermal); >> +} >> +static DEVICE_ATTR_RO(reason_thermal); >> + >> +static ssize_t reason_prochot_show(struct device *dev, >> + struct device_attribute *attr, >> + char *buff) >> +{ >> + struct xe_gt_throttle *throttle = dev_to_throttle(dev); >> + struct xe_gt *gt = throttle_to_gt(throttle); >> + bool prochot = !!xe_read_reason_prochot(>->throttle); >> + >> + return sysfs_emit(buff, "%u\n", prochot); >> +} >> +static DEVICE_ATTR_RO(reason_prochot); >> + >> +static ssize_t reason_ratl_show(struct device *dev, >> + struct device_attribute *attr, >> + char *buff) >> +{ >> + struct xe_gt_throttle *throttle = dev_to_throttle(dev); >> + struct xe_gt *gt = throttle_to_gt(throttle); >> + bool ratl = !!xe_read_reason_ratl(>->throttle); >> + >> + return sysfs_emit(buff, "%u\n", ratl); >> +} >> +static DEVICE_ATTR_RO(reason_ratl); >> + >> +static ssize_t reason_vr_thermalert_show(struct device *dev, >> + struct device_attribute *attr, >> + char *buff) >> +{ >> + struct xe_gt_throttle *throttle = dev_to_throttle(dev); >> + struct xe_gt *gt = throttle_to_gt(throttle); >> + bool thermalert = !!xe_read_reason_vr_thermalert(>->throttle); >> + >> + return sysfs_emit(buff, "%u\n", thermalert); >> +} >> +static DEVICE_ATTR_RO(reason_vr_thermalert); >> + >> +static ssize_t reason_vr_tdc_show(struct device *dev, >> + struct device_attribute *attr, >> + char *buff) >> +{ >> + struct xe_gt_throttle *throttle = dev_to_throttle(dev); >> + struct xe_gt *gt = throttle_to_gt(throttle); >> + bool tdc = !!xe_read_reason_vr_tdc(>->throttle); >> + >> + return sysfs_emit(buff, "%u\n", tdc); >> +} >> +static DEVICE_ATTR_RO(reason_vr_tdc); >> + >> +static const struct attribute *throttle_attrs[] = { >> + &dev_attr_status.attr, >> + &dev_attr_reason_pl1.attr, >> + &dev_attr_reason_pl2.attr, >> + &dev_attr_reason_pl4.attr, >> + &dev_attr_reason_thermal.attr, >> + &dev_attr_reason_prochot.attr, >> + &dev_attr_reason_ratl.attr, >> + &dev_attr_reason_vr_thermalert.attr, >> + &dev_attr_reason_vr_tdc.attr, >> + NULL >> +}; >> + >> +static void gt_throttle_sysfs_fini(struct drm_device *drm, void *arg) >> +{ >> + struct kobject *kobj = arg; >> + >> + sysfs_remove_files(kobj, throttle_attrs); >> + kobject_put(kobj); >> +} >> + >> +void xe_gt_throttle_sysfs_init(struct xe_gt_throttle *throttle) >> +{ >> + struct xe_gt *gt = throttle_to_gt(throttle); >> + struct xe_device *xe = gt_to_xe(gt); >> + struct kobject *kobj; >> + int err; >> + >> + kobj = kobject_create_and_add("throttle", gt->sysfs); >> + if (!kobj) { >> + drm_warn(&xe->drm, "%s failed, err: %d\n", __func__, -ENOMEM); >> + return; >> + } >> + >> + err = sysfs_create_files(kobj, throttle_attrs); >> + if (err) { >> + kobject_put(kobj); >> + drm_warn(&xe->drm, "failed to register throttle sysfs, err: %d\n", err); >> + return; >> + } >> + >> + err = drmm_add_action_or_reset(&xe->drm, gt_throttle_sysfs_fini, kobj); >> + if (err) >> + drm_warn(&xe->drm, "%s: drmm_add_action_or_reset failed, err: %d\n", >> + __func__, err); >> +} >> + >> + >> diff --git a/drivers/gpu/drm/xe/xe_gt_throttle_sysfs.h b/drivers/gpu/drm/xe/xe_gt_throttle_sysfs.h >> new file mode 100644 >> index 000000000000..809213c3bba1 >> --- /dev/null >> +++ b/drivers/gpu/drm/xe/xe_gt_throttle_sysfs.h >> @@ -0,0 +1,17 @@ >> +/* SPDX-License-Identifier: MIT */ >> +/* >> + * Copyright © 2023 Intel Corporation >> + */ >> + >> +#ifndef _XE_GT_THROTTLE_SYSFS_H_ >> +#define _XE_GT_THROTTLE_SYSFS_H_ >> + >> +#include >> + >> +#include "xe_device.h" >> +#include "xe_gt.h" >> +#include "xe_gt_throttle_sysfs_types.h" >> + >> +void xe_gt_throttle_sysfs_init(struct xe_gt_throttle *throttle); >> + >> +#endif /* _XE_GT_THROTTLE_SYSFS_H_ */ >> diff --git a/drivers/gpu/drm/xe/xe_gt_throttle_sysfs_types.h b/drivers/gpu/drm/xe/xe_gt_throttle_sysfs_types.h >> new file mode 100644 >> index 000000000000..acc23ce8d0fc >> --- /dev/null >> +++ b/drivers/gpu/drm/xe/xe_gt_throttle_sysfs_types.h >> @@ -0,0 +1,35 @@ >> +/* SPDX-License-Identifier: MIT */ >> +/* >> + * Copyright © 2023 Intel Corporation >> + */ >> + >> +#ifndef _XE_GT_THROTTLE_SYSFS_TYPES_H_ >> +#define _XE_GT_THROTTLE_SYSFS_TYPES_H_ >> + >> +#include >> + >> +struct xe_gt; >> + >> +struct xe_gt_throttle { >> + /** @status: overall throttling status */ >> + bool status; >> + /** @pl1: throttling reason is PL1 */ >> + bool pl1; >> + /** @pl2: throttling reason is PL2 */ >> + bool pl2; >> + /** @pl4: throttling reason is PL4 */ >> + bool pl4; >> + /** @thermal: throttling reason is thermal */ >> + bool thermal; >> + /** @prochot: throttling reason is PROCHOT */ >> + bool prochot; >> + /** @ratl: throttling reason is running average thermal limit */ >> + bool ratl; >> + /** @thermalert: throttling reason is vr thermalert */ >> + bool thermalert; >> + /** @tdc: throttling reason is vr tdc */ >> + bool tdc; >> +}; >> + >> +#endif /* _XE_GT_THROTTLE_SYSFS_TYPES_H_ */ >> + >> diff --git a/drivers/gpu/drm/xe/xe_gt_types.h b/drivers/gpu/drm/xe/xe_gt_types.h >> index 35b8c19fa8bf..c55815d1114a 100644 >> --- a/drivers/gpu/drm/xe/xe_gt_types.h >> +++ b/drivers/gpu/drm/xe/xe_gt_types.h >> @@ -8,6 +8,7 @@ >> >> #include "xe_force_wake_types.h" >> #include "xe_gt_idle_sysfs_types.h" >> +#include "xe_gt_throttle_sysfs_types.h" >> #include "xe_hw_engine_types.h" >> #include "xe_hw_fence_types.h" >> #include "xe_reg_sr_types.h" >> @@ -298,6 +299,9 @@ struct xe_gt { >> /** @sysfs: sysfs' kobj used by xe_gt_sysfs */ >> struct kobject *sysfs; >> >> + /** @throttle: frequency throttling reasons in GT */ >> + struct xe_gt_throttle throttle; >> + >> /** @mocs: info */ >> struct { >> /** @uc_index: UC index */ >> -- >> 2.25.1 >>