Re: [PATCH v6 18/18] drm/i915/alpm: Disallow ALPM for UHBR link rate

["Hogander, Jouni" <jouni.hogander@intel.com>]

On Tue, 2026-09-15 at 23:34 +0530, Animesh Manna wrote:
> DP2.1 ALPM is not supported on UHBR (128b/132b) link rates on the NVL
> platform. Reject the ALPM parameter computation for external DP
> running
> at a UHBR rate on display version 35, so that ALPM (and the Panel
> Replay
> and LOBF features that rely on it) is not enabled in that case. eDP
> is
> excluded so eDP ALPM keeps working at any link rate.
> 
> Cc: Jouni Högander <jouni.hogander@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_alpm.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> b/drivers/gpu/drm/i915/display/intel_alpm.c
> index 84777c8d31bb..51805a6bca86 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -453,6 +453,12 @@ bool intel_alpm_compute_params(struct intel_dp
> *intel_dp,
>  	int precharge = intel_dp_aux_fw_sync_len(intel_dp) -
> preamble;
>  	u8 max_wake_lines;
>  
> +	/* DP2.1 ALPM is not supported on UHBR (128b/132b) link
> rates on NVL. */
> +	if (DISPLAY_VER(display) == 35 &&
> +	    !intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) &&
> +	    intel_dp_is_uhbr(crtc_state))
> +		return false;
> +
>  	io_wake_time = max(precharge,
> io_buffer_wake_time(crtc_state)) +
>  		preamble + phy_wake + tfw_exit_latency;
>  	fast_wake_time = precharge + preamble + phy_wake +

I think more logical place for this would be in intel_alpm_is_possible.

BR,
Jouni Högander