* [PATCH 0/5] Add get-error-counter support for CRI
@ 2026-03-20 10:25 Riana Tauro
2026-03-20 10:25 ` [PATCH 1/5] drm/xe/xe_sysctrl: Add System controller patch Riana Tauro
` (8 more replies)
0 siblings, 9 replies; 11+ messages in thread
From: Riana Tauro @ 2026-03-20 10:25 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi
Add support to query error counter for CRI in XE DRM RAS.
This patch adds the necessary structures and commands to query error counter
from the System controller. It also integrates with the existing XE DRM
RAS framework to allow userspace to retrieve error counter vaue.
Example: Query error counter using ynl tool
$ sudo ynl --family drm_ras --dump get-error-counter \
--json '{"node-id":1}'
[{"error-id": 1, "error-name": "core-compute", "error-value": 0},
{"error-id": 2, "error-name": "soc-internal", "error-value": 0},
{"error-id": 3, "error-name": "device-memory", "error-value": 0},
{"error-id": 4, "error-name": "pcie", "error-value": 0},
{"error-id": 5, "error-name": "fabric", "error-value": 0},]
Query single error counter
$ sudo ynl --family drm_ras --do get-error-counter --json \
'{"node-id":1, "error-id":1}'
{'error-id': 1, 'error-name': 'core-compute', 'error-value': 2}
Anoop Vijay (1):
drm/xe/xe_sysctrl: Add System controller patch
Riana Tauro (4):
drm/xe/uapi: Add additional error components to XE DRM RAS
drm/xe/ras: Add flag for Xe RAS
drm/xe/xe_ras: Add structures and commands for get counter
drm/xe/xe_ras: Add support to query error counter for CRI
drivers/gpu/drm/xe/Makefile | 3 +
drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h | 74 ++++
drivers/gpu/drm/xe/regs/xe_sysctrl_regs.h | 36 ++
drivers/gpu/drm/xe/xe_device.c | 5 +
drivers/gpu/drm/xe/xe_device_types.h | 8 +
drivers/gpu/drm/xe/xe_drm_ras.c | 22 +-
drivers/gpu/drm/xe/xe_hw_error.c | 2 +-
drivers/gpu/drm/xe/xe_pci.c | 5 +
drivers/gpu/drm/xe/xe_pci_types.h | 2 +
drivers/gpu/drm/xe/xe_pm.c | 11 +
drivers/gpu/drm/xe/xe_ras.c | 111 ++++++
drivers/gpu/drm/xe/xe_ras.h | 16 +
drivers/gpu/drm/xe/xe_ras_types.h | 151 +++++++
drivers/gpu/drm/xe/xe_sysctrl.c | 128 ++++++
drivers/gpu/drm/xe/xe_sysctrl.h | 23 ++
drivers/gpu/drm/xe/xe_sysctrl_mailbox.c | 369 ++++++++++++++++++
drivers/gpu/drm/xe/xe_sysctrl_mailbox.h | 31 ++
drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 40 ++
drivers/gpu/drm/xe/xe_sysctrl_types.h | 32 ++
include/uapi/drm/xe_drm.h | 11 +-
20 files changed, 1070 insertions(+), 10 deletions(-)
create mode 100644 drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h
create mode 100644 drivers/gpu/drm/xe/regs/xe_sysctrl_regs.h
create mode 100644 drivers/gpu/drm/xe/xe_ras.c
create mode 100644 drivers/gpu/drm/xe/xe_ras.h
create mode 100644 drivers/gpu/drm/xe/xe_ras_types.h
create mode 100644 drivers/gpu/drm/xe/xe_sysctrl.c
create mode 100644 drivers/gpu/drm/xe/xe_sysctrl.h
create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_types.h
--
2.47.1
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 1/5] drm/xe/xe_sysctrl: Add System controller patch 2026-03-20 10:25 [PATCH 0/5] Add get-error-counter support for CRI Riana Tauro @ 2026-03-20 10:25 ` Riana Tauro 2026-03-20 10:25 ` [PATCH 2/5] drm/xe/uapi: Add additional error components to XE DRM RAS Riana Tauro ` (7 subsequent siblings) 8 siblings, 0 replies; 11+ messages in thread From: Riana Tauro @ 2026-03-20 10:25 UTC (permalink / raw) To: intel-xe Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty, badal.nilawar, raag.jadav, ravi.kishore.koppuravuri, mallesh.koujalagi, Anoop Vijay From: Anoop Vijay <anoop.c.vijay@intel.com> DO NOT REVIEW. COMPILATION ONLY This patch is from https://patchwork.freedesktop.org/series/159554/ Added only for Compilation. Signed-off-by: Anoop Vijay <anoop.c.vijay@intel.com> Signed-off-by: Riana Tauro <riana.tauro@intel.com> --- drivers/gpu/drm/xe/Makefile | 2 + drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h | 65 +++ drivers/gpu/drm/xe/regs/xe_sysctrl_regs.h | 36 ++ drivers/gpu/drm/xe/xe_device.c | 5 + drivers/gpu/drm/xe/xe_device_types.h | 6 + drivers/gpu/drm/xe/xe_pci.c | 2 + drivers/gpu/drm/xe/xe_pci_types.h | 1 + drivers/gpu/drm/xe/xe_pm.c | 11 + drivers/gpu/drm/xe/xe_sysctrl.c | 128 ++++++ drivers/gpu/drm/xe/xe_sysctrl.h | 23 ++ drivers/gpu/drm/xe/xe_sysctrl_mailbox.c | 369 ++++++++++++++++++ drivers/gpu/drm/xe/xe_sysctrl_mailbox.h | 31 ++ drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 40 ++ drivers/gpu/drm/xe/xe_sysctrl_types.h | 32 ++ 14 files changed, 751 insertions(+) create mode 100644 drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h create mode 100644 drivers/gpu/drm/xe/regs/xe_sysctrl_regs.h create mode 100644 drivers/gpu/drm/xe/xe_sysctrl.c create mode 100644 drivers/gpu/drm/xe/xe_sysctrl.h create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_mailbox.c create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_mailbox.h create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_types.h diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile index dab979287a96..f9abaf687d46 100644 --- a/drivers/gpu/drm/xe/Makefile +++ b/drivers/gpu/drm/xe/Makefile @@ -123,6 +123,8 @@ xe-y += xe_bb.o \ xe_step.o \ xe_survivability_mode.o \ xe_sync.o \ + xe_sysctrl.o \ + xe_sysctrl_mailbox.o \ xe_tile.o \ xe_tile_sysfs.o \ xe_tlb_inval.o \ diff --git a/drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h b/drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h new file mode 100644 index 000000000000..4cbde267ac44 --- /dev/null +++ b/drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h @@ -0,0 +1,65 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2026 Intel Corporation + */ + +#ifndef _XE_SYSCTRL_ABI_H_ +#define _XE_SYSCTRL_ABI_H_ + +#include <linux/types.h> + +/** + * DOC: System Controller ABI + * + * This header defines the Application Binary Interface (ABI) used by + * drm/xe to communicate with System Controller firmware on Intel Xe3p + * discrete GPU platforms. + * + * System Controller (sysctrl) is a firmware-managed entity on Intel + * dGPUs responsible for certain low-level platform management + * functions. + * + * Communication protocol: + * + * Communication uses a mailbox interface with messages composed of: + * + * - Application message header (struct xe_sysctrl_app_msg_hdr) + * containing group_id, command, and version + * - Variable-length, command-specific payload + * + * Message header format: + * + * The 32-bit application message header is packed as: + * + * - Bits [7:0] : Group ID identifying command group + * - Bits [15:8] : Command identifier within group + * - Bits [23:16] : Command version for interface compatibility + * - Bits [31:24] : Reserved, must be zero + * + * This header defines firmware ABI message formats and constants shared + * between driver and System Controller firmware. + */ + +/** + * struct xe_sysctrl_app_msg_hdr - Application layer message header + * @data: 32-bit header data + * + * Header structure for application-level messages. + */ +struct xe_sysctrl_app_msg_hdr { + u32 data; +} __packed; + +#define SYSCTRL_HDR_GROUP_ID_MASK GENMASK(7, 0) +#define SYSCTRL_HDR_COMMAND_MASK GENMASK(14, 8) +#define SYSCTRL_HDR_COMMAND_MAX 0x7f +#define SYSCTRL_HDR_IS_RESPONSE BIT(15) +#define SYSCTRL_HDR_RESERVED_MASK GENMASK(23, 16) +#define SYSCTRL_HDR_RESULT_MASK GENMASK(31, 24) + +#define APP_HDR_GROUP_ID_MASK GENMASK(7, 0) +#define APP_HDR_COMMAND_MASK GENMASK(15, 8) +#define APP_HDR_VERSION_MASK GENMASK(23, 16) +#define APP_HDR_RESERVED_MASK GENMASK(31, 24) + +#endif diff --git a/drivers/gpu/drm/xe/regs/xe_sysctrl_regs.h b/drivers/gpu/drm/xe/regs/xe_sysctrl_regs.h new file mode 100644 index 000000000000..59f3f3ec59a6 --- /dev/null +++ b/drivers/gpu/drm/xe/regs/xe_sysctrl_regs.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2026 Intel Corporation + */ + +#ifndef _XE_SYSCTRL_REGS_H_ +#define _XE_SYSCTRL_REGS_H_ + +#include "xe_regs.h" + +#define SYSCTRL_BASE_OFFSET 0xdb000 +#define SYSCTRL_BASE (SOC_BASE + SYSCTRL_BASE_OFFSET) +#define SYSCTRL_MAILBOX_INDEX 0x03 +#define SYSCTRL_BAR_LENGTH 0x1000 + +#define SYSCTRL_MB_CTRL XE_REG(0x10) +#define SYSCTRL_MB_CTRL_RUN_BUSY REG_BIT(31) +#define SYSCTRL_MB_CTRL_IRQ REG_BIT(30) +#define SYSCTRL_MB_CTRL_RUN_BUSY_OUT REG_BIT(29) +#define SYSCTRL_MB_CTRL_PARAM3_MASK REG_GENMASK(28, 24) +#define SYSCTRL_MB_CTRL_PARAM2_MASK REG_GENMASK(23, 16) +#define SYSCTRL_MB_CTRL_PARAM1_MASK REG_GENMASK(15, 8) +#define SYSCTRL_MB_CTRL_COMMAND_MASK REG_GENMASK(7, 0) +#define SYSCTRL_MB_CTRL_CMD REG_FIELD_PREP(SYSCTRL_MB_CTRL_COMMAND_MASK, 5) + +#define SYSCTRL_MB_DATA0 XE_REG(0x14) +#define SYSCTRL_MB_DATA1 XE_REG(0x18) +#define SYSCTRL_MB_DATA2 XE_REG(0x1c) +#define SYSCTRL_MB_DATA3 XE_REG(0x20) + +#define SYSCTRL_FRAME_PHASE REG_BIT(24) +#define SYSCTRL_FRAME_CURRENT_MASK REG_GENMASK(21, 16) +#define SYSCTRL_FRAME_TOTAL_MASK REG_GENMASK(13, 8) +#define SYSCTRL_FRAME_COMMAND_MASK REG_GENMASK(7, 0) + +#endif diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c index e77a3a3db73d..c70d4ae413a9 100644 --- a/drivers/gpu/drm/xe/xe_device.c +++ b/drivers/gpu/drm/xe/xe_device.c @@ -65,6 +65,7 @@ #include "xe_survivability_mode.h" #include "xe_sriov.h" #include "xe_svm.h" +#include "xe_sysctrl.h" #include "xe_tile.h" #include "xe_ttm_stolen_mgr.h" #include "xe_ttm_sys_mgr.h" @@ -985,6 +986,10 @@ int xe_device_probe(struct xe_device *xe) if (err) goto err_unregister_display; + err = xe_sysctrl_init(xe); + if (err) + goto err_unregister_display; + err = xe_device_sysfs_init(xe); if (err) goto err_unregister_display; diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h index 615218d775b1..150c76b2acaf 100644 --- a/drivers/gpu/drm/xe/xe_device_types.h +++ b/drivers/gpu/drm/xe/xe_device_types.h @@ -27,6 +27,7 @@ #include "xe_sriov_vf_ccs_types.h" #include "xe_step_types.h" #include "xe_survivability_mode_types.h" +#include "xe_sysctrl_types.h" #include "xe_tile_types.h" #include "xe_validation.h" @@ -196,6 +197,8 @@ struct xe_device { u8 has_soc_remapper_telem:1; /** @info.has_sriov: Supports SR-IOV */ u8 has_sriov:1; + /** @info.has_sysctrl: Supports System Controller */ + u8 has_sysctrl:1; /** @info.has_usm: Device has unified shared memory support */ u8 has_usm:1; /** @info.has_64bit_timestamp: Device supports 64-bit timestamps */ @@ -508,6 +511,9 @@ struct xe_device { /** @i2c: I2C host controller */ struct xe_i2c *i2c; + /** @sc: System Controller */ + struct xe_sysctrl sc; + /** @atomic_svm_timeslice_ms: Atomic SVM fault timeslice MS */ u32 atomic_svm_timeslice_ms; diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c index 189e2a1c29f9..f5dd77b6680f 100644 --- a/drivers/gpu/drm/xe/xe_pci.c +++ b/drivers/gpu/drm/xe/xe_pci.c @@ -465,6 +465,7 @@ static const struct xe_device_desc cri_desc = { .has_soc_remapper_sysctrl = true, .has_soc_remapper_telem = true, .has_sriov = true, + .has_sysctrl = true, .max_gt_per_tile = 2, MULTI_LRC_MASK, .require_force_probe = true, @@ -764,6 +765,7 @@ static int xe_info_init_early(struct xe_device *xe, xe->info.has_soc_remapper_telem = desc->has_soc_remapper_telem; xe->info.has_sriov = xe_configfs_primary_gt_allowed(to_pci_dev(xe->drm.dev)) && desc->has_sriov; + xe->info.has_sysctrl = desc->has_sysctrl; xe->info.skip_guc_pc = desc->skip_guc_pc; xe->info.skip_mtcfg = desc->skip_mtcfg; xe->info.skip_pcode = desc->skip_pcode; diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h index 8eee4fb1c57c..08386c5eca27 100644 --- a/drivers/gpu/drm/xe/xe_pci_types.h +++ b/drivers/gpu/drm/xe/xe_pci_types.h @@ -57,6 +57,7 @@ struct xe_device_desc { u8 has_soc_remapper_sysctrl:1; u8 has_soc_remapper_telem:1; u8 has_sriov:1; + u8 has_sysctrl:1; u8 needs_scratch:1; u8 skip_guc_pc:1; u8 skip_mtcfg:1; diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c index 01185f10a883..abdddd44a575 100644 --- a/drivers/gpu/drm/xe/xe_pm.c +++ b/drivers/gpu/drm/xe/xe_pm.c @@ -26,6 +26,7 @@ #include "xe_pcode.h" #include "xe_pxp.h" #include "xe_sriov_vf_ccs.h" +#include "xe_sysctrl.h" #include "xe_trace.h" #include "xe_vm.h" #include "xe_wa.h" @@ -206,6 +207,8 @@ int xe_pm_suspend(struct xe_device *xe) xe_i2c_pm_suspend(xe); + xe_sysctrl_pm_suspend(xe); + drm_dbg(&xe->drm, "Device suspended\n"); xe_pm_block_end_signalling(); @@ -259,6 +262,8 @@ int xe_pm_resume(struct xe_device *xe) xe_i2c_pm_resume(xe, true); + xe_sysctrl_pm_resume(xe); + xe_irq_resume(xe); for_each_gt(gt, xe, id) { @@ -618,6 +623,9 @@ int xe_pm_runtime_suspend(struct xe_device *xe) xe_i2c_pm_suspend(xe); + if (xe->d3cold.allowed) + xe_sysctrl_pm_suspend(xe); + xe_rpm_lockmap_release(xe); xe_pm_write_callback_task(xe, NULL); return 0; @@ -670,6 +678,9 @@ int xe_pm_runtime_resume(struct xe_device *xe) xe_i2c_pm_resume(xe, xe->d3cold.allowed); + if (xe->d3cold.allowed) + xe_sysctrl_pm_resume(xe); + xe_irq_resume(xe); for_each_gt(gt, xe, id) { diff --git a/drivers/gpu/drm/xe/xe_sysctrl.c b/drivers/gpu/drm/xe/xe_sysctrl.c new file mode 100644 index 000000000000..d8f1f8cc2244 --- /dev/null +++ b/drivers/gpu/drm/xe/xe_sysctrl.c @@ -0,0 +1,128 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright © 2026 Intel Corporation + */ + +#include <linux/device.h> +#include <linux/mutex.h> + +#include <drm/drm_managed.h> + +#include "regs/xe_sysctrl_regs.h" +#include "xe_assert.h" +#include "xe_device.h" +#include "xe_mmio.h" +#include "xe_printk.h" +#include "xe_soc_remapper.h" +#include "xe_sriov.h" +#include "xe_sysctrl.h" +#include "xe_sysctrl_mailbox.h" +#include "xe_sysctrl_types.h" + +/** + * DOC: System Controller (sysctrl) + * + * System Controller (sysctrl) is a firmware-managed entity on Intel dGPUs + * responsible for selected low-level platform management functions. + * Communication between driver and System Controller is performed + * via a mailbox interface, enabling command and response exchange. + * + * This module provides initialization and support code for interacting + * with System Controller through the mailbox interface. + */ +static void sysctrl_fini(void *arg) +{ + struct xe_device *xe = arg; + + xe->soc_remapper.set_sysctrl_region(xe, 0); +} + +/** + * xe_sysctrl_init() - Initialize System Controller subsystem + * @xe: xe device instance + * + * Entry point for System Controller initialization, called from xe_device_probe. + * This function checks platform support and initializes the system controller. + * + * Return: 0 on success, error code on failure + */ +int xe_sysctrl_init(struct xe_device *xe) +{ + struct xe_tile *tile = xe_device_get_root_tile(xe); + struct xe_sysctrl *sc = &xe->sc; + int ret; + + if (!xe->info.has_sysctrl) + return 0; + + if (IS_SRIOV_VF(xe)) + return 0; + + xe_assert(xe, xe->soc_remapper.set_sysctrl_region); + + xe->soc_remapper.set_sysctrl_region(xe, SYSCTRL_MAILBOX_INDEX); + + ret = devm_add_action_or_reset(xe->drm.dev, sysctrl_fini, xe); + if (ret) + return ret; + + sc->mmio = devm_kzalloc(xe->drm.dev, sizeof(*sc->mmio), GFP_KERNEL); + if (!sc->mmio) + return -ENOMEM; + + xe_mmio_init(sc->mmio, tile, tile->mmio.regs, tile->mmio.regs_size); + sc->mmio->adj_offset = SYSCTRL_BASE; + sc->mmio->adj_limit = U32_MAX; + + ret = devm_mutex_init(xe->drm.dev, &sc->cmd_lock); + if (ret) + return ret; + + xe_sysctrl_mailbox_init(sc); + + return 0; +} + +/** + * xe_sysctrl_pm_suspend() - System Controller suspend handler + * @xe: xe device instance + * + * Invoked during system suspend (S3/S4) and runtime suspend to D3. + * + * The SoC remapper region is cleared automatically by hardware on D3 + * cold entry. No action is required. This function is kept to preserve + * suspend/resume symmetry and provide a hook for future System Controller + * suspend handling. + */ +void xe_sysctrl_pm_suspend(struct xe_device *xe) +{ + if (!xe->info.has_sysctrl) + return; + + if (IS_SRIOV_VF(xe)) + return; + + /* SoC remapper region is disabled automatically on D3 cold entry; no action required. */ +} + +/** + * xe_sysctrl_pm_resume() - System Controller resume handler + * @xe: xe device instance + * + * Invoked during system resume (S3/S4 to S0) and runtime resume from D3cold. + * Restores SoC remapper configuration and reinitializes mailbox interface. + */ +void xe_sysctrl_pm_resume(struct xe_device *xe) +{ + struct xe_sysctrl *sc = &xe->sc; + + if (!xe->info.has_sysctrl) + return; + + if (IS_SRIOV_VF(xe)) + return; + + xe->soc_remapper.set_sysctrl_region(xe, SYSCTRL_MAILBOX_INDEX); + + xe_sysctrl_mailbox_init(sc); +} diff --git a/drivers/gpu/drm/xe/xe_sysctrl.h b/drivers/gpu/drm/xe/xe_sysctrl.h new file mode 100644 index 000000000000..a816feed8da6 --- /dev/null +++ b/drivers/gpu/drm/xe/xe_sysctrl.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2026 Intel Corporation + */ + +#ifndef _XE_SYSCTRL_H_ +#define _XE_SYSCTRL_H_ + +#include <linux/container_of.h> + +#include "xe_device_types.h" +#include "xe_sysctrl_types.h" + +static inline struct xe_device *sc_to_xe(struct xe_sysctrl *sc) +{ + return container_of(sc, struct xe_device, sc); +} + +int xe_sysctrl_init(struct xe_device *xe); +void xe_sysctrl_pm_suspend(struct xe_device *xe); +void xe_sysctrl_pm_resume(struct xe_device *xe); + +#endif diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c new file mode 100644 index 000000000000..b10c8b7e0c40 --- /dev/null +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c @@ -0,0 +1,369 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright © 2026 Intel Corporation + */ + +#include <linux/bitfield.h> +#include <linux/cleanup.h> +#include <linux/minmax.h> +#include <linux/slab.h> +#include <linux/string.h> + +#include "regs/xe_sysctrl_regs.h" +#include "xe_device.h" +#include "xe_mmio.h" +#include "xe_pm.h" +#include "xe_printk.h" +#include "xe_sysctrl.h" +#include "xe_sysctrl_mailbox.h" +#include "xe_sysctrl_mailbox_types.h" + +struct xe_sysctrl_mailbox_msg_hdr { + __le32 data; +} __packed; + +#define XE_SYSCTRL_HDR_GROUP_ID(hdr) \ + FIELD_GET(SYSCTRL_HDR_GROUP_ID_MASK, le32_to_cpu((hdr)->data)) + +#define XE_SYSCTRL_HDR_COMMAND(hdr) \ + FIELD_GET(SYSCTRL_HDR_COMMAND_MASK, le32_to_cpu((hdr)->data)) + +#define XE_SYSCTRL_HDR_IS_RESPONSE(hdr) \ + FIELD_GET(SYSCTRL_HDR_IS_RESPONSE, le32_to_cpu((hdr)->data)) + +#define XE_SYSCTRL_HDR_RESULT(hdr) \ + FIELD_GET(SYSCTRL_HDR_RESULT_MASK, le32_to_cpu((hdr)->data)) + +static bool sysctrl_wait_bit_clear(struct xe_sysctrl *sc, u32 bit_mask, + unsigned int timeout_ms) +{ + int ret; + + ret = xe_mmio_wait32_not(sc->mmio, SYSCTRL_MB_CTRL, bit_mask, bit_mask, + timeout_ms * 1000, NULL, false); + + return ret == 0; +} + +static bool sysctrl_wait_bit_set(struct xe_sysctrl *sc, u32 bit_mask, + unsigned int timeout_ms) +{ + int ret; + + ret = xe_mmio_wait32(sc->mmio, SYSCTRL_MB_CTRL, bit_mask, bit_mask, + timeout_ms * 1000, NULL, false); + + return ret == 0; +} + +static int sysctrl_write_frame(struct xe_sysctrl *sc, const void *frame, + size_t len) +{ + static const struct xe_reg regs[] = { + SYSCTRL_MB_DATA0, SYSCTRL_MB_DATA1, SYSCTRL_MB_DATA2, SYSCTRL_MB_DATA3 + }; + struct xe_device *xe = sc_to_xe(sc); + u32 val[XE_SYSCTRL_MB_FRAME_SIZE / sizeof(u32)] = {0}; + u32 dw = DIV_ROUND_UP(len, sizeof(u32)); + u32 i; + + xe_assert(xe, len > 0 && len <= XE_SYSCTRL_MB_FRAME_SIZE); + + memcpy(val, frame, len); + + for (i = 0; i < dw; i++) + xe_mmio_write32(sc->mmio, regs[i], val[i]); + + return 0; +} + +static int sysctrl_read_frame(struct xe_sysctrl *sc, void *frame, + size_t len) +{ + static const struct xe_reg regs[] = { + SYSCTRL_MB_DATA0, SYSCTRL_MB_DATA1, SYSCTRL_MB_DATA2, SYSCTRL_MB_DATA3 + }; + struct xe_device *xe = sc_to_xe(sc); + u32 val[XE_SYSCTRL_MB_FRAME_SIZE / sizeof(u32)] = {0}; + u32 dw = DIV_ROUND_UP(len, sizeof(u32)); + u32 i; + + xe_assert(xe, len > 0 && len <= XE_SYSCTRL_MB_FRAME_SIZE); + + for (i = 0; i < dw; i++) + val[i] = xe_mmio_read32(sc->mmio, regs[i]); + + memcpy(frame, val, len); + + return 0; +} + +static void sysctrl_clear_response(struct xe_sysctrl *sc) +{ + xe_mmio_rmw32(sc->mmio, SYSCTRL_MB_CTRL, SYSCTRL_MB_CTRL_RUN_BUSY_OUT, 0); +} + +static int sysctrl_prepare_command(struct xe_device *xe, + u8 group_id, u8 command, + const void *data_in, size_t data_in_len, + u8 **mbox_cmd, size_t *cmd_size) +{ + struct xe_sysctrl_mailbox_msg_hdr *hdr; + size_t size; + u8 *buffer; + + xe_assert(xe, command <= SYSCTRL_HDR_COMMAND_MAX); + + if (data_in_len > XE_SYSCTRL_MB_MAX_MESSAGE_SIZE - sizeof(*hdr)) { + xe_err(xe, "sysctrl: Input data too large: %zu bytes\n", data_in_len); + return -EINVAL; + } + + size = sizeof(*hdr) + data_in_len; + + buffer = kmalloc(size, GFP_KERNEL); + if (!buffer) + return -ENOMEM; + + hdr = (struct xe_sysctrl_mailbox_msg_hdr *)buffer; + hdr->data = cpu_to_le32(FIELD_PREP(SYSCTRL_HDR_GROUP_ID_MASK, group_id) | + FIELD_PREP(SYSCTRL_HDR_COMMAND_MASK, command)); + + if (data_in && data_in_len) + memcpy(buffer + sizeof(*hdr), data_in, data_in_len); + + *mbox_cmd = buffer; + *cmd_size = size; + + return 0; +} + +static int sysctrl_send_frames(struct xe_sysctrl *sc, + const u8 *mbox_cmd, + size_t cmd_size, unsigned int timeout_ms) +{ + struct xe_device *xe = sc_to_xe(sc); + u32 ctrl_reg, total_frames, frame; + size_t bytes_sent, frame_size; + + total_frames = DIV_ROUND_UP(cmd_size, XE_SYSCTRL_MB_FRAME_SIZE); + + if (!sysctrl_wait_bit_clear(sc, SYSCTRL_MB_CTRL_RUN_BUSY, timeout_ms)) { + xe_err(xe, "sysctrl: Mailbox busy\n"); + return -EBUSY; + } + + sc->phase_bit ^= 1; + bytes_sent = 0; + + for (frame = 0; frame < total_frames; frame++) { + frame_size = min_t(size_t, cmd_size - bytes_sent, XE_SYSCTRL_MB_FRAME_SIZE); + + if (sysctrl_write_frame(sc, mbox_cmd + bytes_sent, frame_size)) { + xe_err(xe, "sysctrl: Failed to write frame %u\n", frame); + sc->phase_bit = 0; + return -EIO; + } + + ctrl_reg = SYSCTRL_MB_CTRL_RUN_BUSY | + REG_FIELD_PREP(SYSCTRL_FRAME_CURRENT_MASK, frame) | + REG_FIELD_PREP(SYSCTRL_FRAME_TOTAL_MASK, total_frames - 1) | + SYSCTRL_MB_CTRL_CMD | + (sc->phase_bit ? SYSCTRL_FRAME_PHASE : 0); + + xe_mmio_write32(sc->mmio, SYSCTRL_MB_CTRL, ctrl_reg); + + if (!sysctrl_wait_bit_clear(sc, SYSCTRL_MB_CTRL_RUN_BUSY, timeout_ms)) { + xe_err(xe, "sysctrl: Frame %u acknowledgment timeout\n", frame); + sc->phase_bit = 0; + return -ETIMEDOUT; + } + + bytes_sent += frame_size; + } + + return 0; +} + +static int sysctrl_process_frame(struct xe_sysctrl *sc, void *out, + size_t frame_size, unsigned int timeout_ms, + bool *done) +{ + u32 curr_frame, total_frames, ctrl_reg; + struct xe_device *xe = sc_to_xe(sc); + int ret; + + if (!sysctrl_wait_bit_set(sc, SYSCTRL_MB_CTRL_RUN_BUSY_OUT, timeout_ms)) { + xe_err(xe, "sysctrl: Response frame timeout\n"); + return -ETIMEDOUT; + } + + ctrl_reg = xe_mmio_read32(sc->mmio, SYSCTRL_MB_CTRL); + total_frames = FIELD_GET(SYSCTRL_FRAME_TOTAL_MASK, ctrl_reg); + curr_frame = FIELD_GET(SYSCTRL_FRAME_CURRENT_MASK, ctrl_reg); + + ret = sysctrl_read_frame(sc, out, frame_size); + if (ret) + return ret; + + sysctrl_clear_response(sc); + + if (curr_frame == total_frames) + *done = true; + + return 0; +} + +static int sysctrl_receive_frames(struct xe_sysctrl *sc, + const struct xe_sysctrl_mailbox_msg_hdr *req, + void *data_out, size_t data_out_len, + size_t *rdata_len, unsigned int timeout_ms) +{ + struct xe_sysctrl_mailbox_msg_hdr *hdr; + struct xe_device *xe = sc_to_xe(sc); + size_t remain = sizeof(*hdr) + data_out_len; + u8 *buffer __free(kfree) = kzalloc(remain, GFP_KERNEL); + size_t frame_size; + bool done = false; + int ret = 0; + u8 *out; + + if (!buffer) + return -ENOMEM; + + out = buffer; + while (!done && remain) { + frame_size = min_t(size_t, remain, XE_SYSCTRL_MB_FRAME_SIZE); + + ret = sysctrl_process_frame(sc, out, frame_size, timeout_ms, + &done); + if (ret) + return ret; + + remain -= frame_size; + out += frame_size; + } + + hdr = (struct xe_sysctrl_mailbox_msg_hdr *)buffer; + + if (!XE_SYSCTRL_HDR_IS_RESPONSE(hdr) || + XE_SYSCTRL_HDR_GROUP_ID(hdr) != XE_SYSCTRL_HDR_GROUP_ID(req) || + XE_SYSCTRL_HDR_COMMAND(hdr) != XE_SYSCTRL_HDR_COMMAND(req)) { + xe_err(xe, "sysctrl: Response header mismatch\n"); + return -EPROTO; + } + + if (XE_SYSCTRL_HDR_RESULT(hdr) != 0) { + xe_err(xe, "sysctrl: Firmware error: 0x%02lx\n", + XE_SYSCTRL_HDR_RESULT(hdr)); + return -EIO; + } + + memcpy(data_out, hdr + 1, data_out_len); + *rdata_len = out - buffer - sizeof(*hdr); + + return 0; +} + +static int sysctrl_send_command(struct xe_sysctrl *sc, + const u8 *mbox_cmd, size_t cmd_size, + void *data_out, size_t data_out_len, + size_t *rdata_len, unsigned int timeout_ms) +{ + const struct xe_sysctrl_mailbox_msg_hdr *hdr; + size_t received; + int ret; + + ret = sysctrl_send_frames(sc, mbox_cmd, cmd_size, timeout_ms); + if (ret) + return ret; + + if (!data_out || !rdata_len) + return 0; + + hdr = (const struct xe_sysctrl_mailbox_msg_hdr *)mbox_cmd; + + ret = sysctrl_receive_frames(sc, hdr, data_out, data_out_len, + &received, timeout_ms); + if (ret) + return ret; + + *rdata_len = received; + + return 0; +} + +/** + * xe_sysctrl_mailbox_init - Initialize System Controller mailbox interface + * @sc: System controller structure + * + * Initialize system controller mailbox interface for communication. + */ +void xe_sysctrl_mailbox_init(struct xe_sysctrl *sc) +{ + u32 ctrl_reg; + + ctrl_reg = xe_mmio_read32(sc->mmio, SYSCTRL_MB_CTRL); + sc->phase_bit = (ctrl_reg & SYSCTRL_FRAME_PHASE) ? 1 : 0; +} + +/** + * xe_sysctrl_send_command() - Send mailbox command to System Controller + * @sc: System Controller instance + * @cmd: Command descriptor containing request header and payload buffers + * @rdata_len: Pointer to store actual response data length + * + * Sends a mailbox command to System Controller firmware using + * System Controller mailbox and waits for a response. + * + * Request payload is provided via @cmd->data_in and @cmd->data_in_len. + * If a response is expected, @cmd->data_out must point to a buffer of + * size @cmd->data_out_len supplied by caller. + * + * On success, @rdata_len is updated with number of valid response bytes + * returned by firmware, bounded by @cmd->data_out_len. + * + * Return: 0 on success, or negative errno on failure. + */ +int xe_sysctrl_send_command(struct xe_sysctrl *sc, + struct xe_sysctrl_mailbox_command *cmd, + size_t *rdata_len) +{ + struct xe_device *xe = sc_to_xe(sc); + u8 group_id, command_code; + u8 *mbox_cmd = NULL; + size_t cmd_size = 0; + int ret; + + guard(xe_pm_runtime_noresume)(xe); + + xe_assert(xe, xe->info.has_sysctrl); + xe_assert(xe, cmd->data_in || cmd->data_out); + xe_assert(xe, !cmd->data_in || cmd->data_in_len); + xe_assert(xe, !cmd->data_out || cmd->data_out_len); + + group_id = XE_SYSCTRL_APP_HDR_GROUP_ID(&cmd->header); + command_code = XE_SYSCTRL_APP_HDR_COMMAND(&cmd->header); + + might_sleep(); + + ret = sysctrl_prepare_command(xe, group_id, command_code, + cmd->data_in, cmd->data_in_len, + &mbox_cmd, &cmd_size); + if (ret) { + xe_err(xe, "sysctrl: Failed to prepare command: %pe\n", ERR_PTR(ret)); + return ret; + } + + guard(mutex)(&sc->cmd_lock); + + ret = sysctrl_send_command(sc, mbox_cmd, cmd_size, + cmd->data_out, cmd->data_out_len, rdata_len, + XE_SYSCTRL_MB_DEFAULT_TIMEOUT_MS); + if (ret) + xe_err(xe, "sysctrl: Mailbox command failed: %pe\n", ERR_PTR(ret)); + + kfree(mbox_cmd); + + return ret; +} diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h new file mode 100644 index 000000000000..91460be9e22c --- /dev/null +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2026 Intel Corporation + */ + +#ifndef _XE_SYSCTRL_MAILBOX_H_ +#define _XE_SYSCTRL_MAILBOX_H_ + +#include <linux/bitfield.h> +#include <linux/types.h> + +#include "abi/xe_sysctrl_abi.h" + +struct xe_sysctrl; +struct xe_sysctrl_mailbox_command; + +#define XE_SYSCTRL_APP_HDR_GROUP_ID(hdr) \ + FIELD_GET(APP_HDR_GROUP_ID_MASK, le32_to_cpu((hdr)->data)) + +#define XE_SYSCTRL_APP_HDR_COMMAND(hdr) \ + FIELD_GET(APP_HDR_COMMAND_MASK, le32_to_cpu((hdr)->data)) + +#define XE_SYSCTRL_APP_HDR_VERSION(hdr) \ + FIELD_GET(APP_HDR_VERSION_MASK, le32_to_cpu((hdr)->data)) + +void xe_sysctrl_mailbox_init(struct xe_sysctrl *sc); +int xe_sysctrl_send_command(struct xe_sysctrl *sc, + struct xe_sysctrl_mailbox_command *cmd, + size_t *rdata_len); + +#endif diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h new file mode 100644 index 000000000000..89456aec6097 --- /dev/null +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2026 Intel Corporation + */ + +#ifndef _XE_SYSCTRL_MAILBOX_TYPES_H_ +#define _XE_SYSCTRL_MAILBOX_TYPES_H_ + +#include <linux/types.h> + +#include "abi/xe_sysctrl_abi.h" + +/** + * struct xe_sysctrl_mailbox_command - System Controller mailbox command + */ +struct xe_sysctrl_mailbox_command { + /** @header: Application message header containing command information */ + struct xe_sysctrl_app_msg_hdr header; + + /** @data_in: Pointer to input payload data (can be NULL if no input data) */ + void *data_in; + + /** @data_in_len: Size of input payload in bytes (0 if no input data) */ + size_t data_in_len; + + /** @data_out: Pointer to output buffer for response data (can be NULL if no response) */ + void *data_out; + + /** @data_out_len: Size of output buffer in bytes (0 if no response expected) */ + size_t data_out_len; +}; + +#define XE_SYSCTRL_MB_FRAME_SIZE 16 +#define XE_SYSCTRL_MB_MAX_FRAMES 64 +#define XE_SYSCTRL_MB_MAX_MESSAGE_SIZE \ + (XE_SYSCTRL_MB_FRAME_SIZE * XE_SYSCTRL_MB_MAX_FRAMES) + +#define XE_SYSCTRL_MB_DEFAULT_TIMEOUT_MS 500 + +#endif diff --git a/drivers/gpu/drm/xe/xe_sysctrl_types.h b/drivers/gpu/drm/xe/xe_sysctrl_types.h new file mode 100644 index 000000000000..8217f6befe70 --- /dev/null +++ b/drivers/gpu/drm/xe/xe_sysctrl_types.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2026 Intel Corporation + */ + +#ifndef _XE_SYSCTRL_TYPES_H_ +#define _XE_SYSCTRL_TYPES_H_ + +#include <linux/mutex.h> +#include <linux/types.h> + +struct xe_mmio; + +/** + * struct xe_sysctrl - System Controller driver context + * + * This structure maintains the runtime state for System Controller + * communication. All fields are initialized during xe_sysctrl_init() + * and protected appropriately for concurrent access. + */ +struct xe_sysctrl { + /** @mmio: MMIO region for system control registers */ + struct xe_mmio *mmio; + + /** @cmd_lock: Mutex protecting mailbox command operations */ + struct mutex cmd_lock; + + /** @phase_bit: Message boundary phase toggle bit (0 or 1) */ + bool phase_bit; +}; + +#endif -- 2.47.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 2/5] drm/xe/uapi: Add additional error components to XE DRM RAS 2026-03-20 10:25 [PATCH 0/5] Add get-error-counter support for CRI Riana Tauro 2026-03-20 10:25 ` [PATCH 1/5] drm/xe/xe_sysctrl: Add System controller patch Riana Tauro @ 2026-03-20 10:25 ` Riana Tauro 2026-03-25 9:24 ` Aravind Iddamsetty 2026-03-20 10:25 ` [PATCH 3/5] drm/xe/ras: Add flag for Xe RAS Riana Tauro ` (6 subsequent siblings) 8 siblings, 1 reply; 11+ messages in thread From: Riana Tauro @ 2026-03-20 10:25 UTC (permalink / raw) To: intel-xe Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty, badal.nilawar, raag.jadav, ravi.kishore.koppuravuri, mallesh.koujalagi Add additional Error components supported by XE RAS (Reliability, Availability and Serviceability). Signed-off-by: Riana Tauro <riana.tauro@intel.com> --- include/uapi/drm/xe_drm.h | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h index f8b2afb20540..a1b1e15209cf 100644 --- a/include/uapi/drm/xe_drm.h +++ b/include/uapi/drm/xe_drm.h @@ -2432,6 +2432,12 @@ enum drm_xe_ras_error_component { DRM_XE_RAS_ERR_COMP_CORE_COMPUTE = 1, /** @DRM_XE_RAS_ERR_COMP_SOC_INTERNAL: SoC Internal Error */ DRM_XE_RAS_ERR_COMP_SOC_INTERNAL, + /** @DRM_XE_RAS_ERR_COMP_DEVICE_MEMORY: Device Memory Error */ + DRM_XE_RAS_ERR_COMP_DEVICE_MEMORY, + /** @DRM_XE_RAS_ERR_COMP_PCIE: PCIe Subsystem Error */ + DRM_XE_RAS_ERR_COMP_PCIE, + /** @DRM_XE_RAS_ERR_COMP_FABRIC: Fabric Subsystem Error */ + DRM_XE_RAS_ERR_COMP_FABRIC, /** @DRM_XE_RAS_ERR_COMP_MAX: Max Error */ DRM_XE_RAS_ERR_COMP_MAX /* non-ABI */ }; @@ -2449,7 +2455,10 @@ enum drm_xe_ras_error_component { */ #define DRM_XE_RAS_ERROR_COMPONENT_NAMES { \ [DRM_XE_RAS_ERR_COMP_CORE_COMPUTE] = "core-compute", \ - [DRM_XE_RAS_ERR_COMP_SOC_INTERNAL] = "soc-internal" \ + [DRM_XE_RAS_ERR_COMP_SOC_INTERNAL] = "soc-internal", \ + [DRM_XE_RAS_ERR_COMP_DEVICE_MEMORY] = "device-memory", \ + [DRM_XE_RAS_ERR_COMP_PCIE] = "pcie", \ + [DRM_XE_RAS_ERR_COMP_FABRIC] = "fabric", \ } #if defined(__cplusplus) -- 2.47.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH 2/5] drm/xe/uapi: Add additional error components to XE DRM RAS 2026-03-20 10:25 ` [PATCH 2/5] drm/xe/uapi: Add additional error components to XE DRM RAS Riana Tauro @ 2026-03-25 9:24 ` Aravind Iddamsetty 0 siblings, 0 replies; 11+ messages in thread From: Aravind Iddamsetty @ 2026-03-25 9:24 UTC (permalink / raw) To: Riana Tauro, intel-xe Cc: anshuman.gupta, rodrigo.vivi, badal.nilawar, raag.jadav, ravi.kishore.koppuravuri, mallesh.koujalagi On 20-03-2026 15:55, Riana Tauro wrote: > Add additional Error components supported by XE RAS (Reliability, > Availability and Serviceability). > > Signed-off-by: Riana Tauro <riana.tauro@intel.com> > --- > include/uapi/drm/xe_drm.h | 11 ++++++++++- > 1 file changed, 10 insertions(+), 1 deletion(-) > > diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h > index f8b2afb20540..a1b1e15209cf 100644 > --- a/include/uapi/drm/xe_drm.h > +++ b/include/uapi/drm/xe_drm.h > @@ -2432,6 +2432,12 @@ enum drm_xe_ras_error_component { > DRM_XE_RAS_ERR_COMP_CORE_COMPUTE = 1, > /** @DRM_XE_RAS_ERR_COMP_SOC_INTERNAL: SoC Internal Error */ > DRM_XE_RAS_ERR_COMP_SOC_INTERNAL, > + /** @DRM_XE_RAS_ERR_COMP_DEVICE_MEMORY: Device Memory Error */ > + DRM_XE_RAS_ERR_COMP_DEVICE_MEMORY, > + /** @DRM_XE_RAS_ERR_COMP_PCIE: PCIe Subsystem Error */ > + DRM_XE_RAS_ERR_COMP_PCIE, > + /** @DRM_XE_RAS_ERR_COMP_FABRIC: Fabric Subsystem Error */ > + DRM_XE_RAS_ERR_COMP_FABRIC, > /** @DRM_XE_RAS_ERR_COMP_MAX: Max Error */ > DRM_XE_RAS_ERR_COMP_MAX /* non-ABI */ > }; > @@ -2449,7 +2455,10 @@ enum drm_xe_ras_error_component { > */ > #define DRM_XE_RAS_ERROR_COMPONENT_NAMES { \ > [DRM_XE_RAS_ERR_COMP_CORE_COMPUTE] = "core-compute", \ > - [DRM_XE_RAS_ERR_COMP_SOC_INTERNAL] = "soc-internal" \ > + [DRM_XE_RAS_ERR_COMP_SOC_INTERNAL] = "soc-internal", \ > + [DRM_XE_RAS_ERR_COMP_DEVICE_MEMORY] = "device-memory", \ > + [DRM_XE_RAS_ERR_COMP_PCIE] = "pcie", \ > + [DRM_XE_RAS_ERR_COMP_FABRIC] = "fabric", \ > } > Reviewed-by: Aravind Iddamsetty <aravind.iddamsetty@linux.intel.com> Thanks, Aravind. > #if defined(__cplusplus) ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 3/5] drm/xe/ras: Add flag for Xe RAS 2026-03-20 10:25 [PATCH 0/5] Add get-error-counter support for CRI Riana Tauro 2026-03-20 10:25 ` [PATCH 1/5] drm/xe/xe_sysctrl: Add System controller patch Riana Tauro 2026-03-20 10:25 ` [PATCH 2/5] drm/xe/uapi: Add additional error components to XE DRM RAS Riana Tauro @ 2026-03-20 10:25 ` Riana Tauro 2026-03-20 10:25 ` [PATCH 4/5] drm/xe/xe_ras: Add structures and commands for get counter Riana Tauro ` (5 subsequent siblings) 8 siblings, 0 replies; 11+ messages in thread From: Riana Tauro @ 2026-03-20 10:25 UTC (permalink / raw) To: intel-xe Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty, badal.nilawar, raag.jadav, ravi.kishore.koppuravuri, mallesh.koujalagi Add a flag for RAS. If enabled, XE driver registers with DRM RAS and exposes supported counters. Currently this is enabled for PVC and CRI. Signed-off-by: Riana Tauro <riana.tauro@intel.com> --- drivers/gpu/drm/xe/xe_device_types.h | 2 ++ drivers/gpu/drm/xe/xe_hw_error.c | 2 +- drivers/gpu/drm/xe/xe_pci.c | 3 +++ drivers/gpu/drm/xe/xe_pci_types.h | 1 + 4 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h index 150c76b2acaf..bfb23d6c0511 100644 --- a/drivers/gpu/drm/xe/xe_device_types.h +++ b/drivers/gpu/drm/xe/xe_device_types.h @@ -191,6 +191,8 @@ struct xe_device { u8 has_ctx_tlb_inval:1; /** @info.has_range_tlb_inval: Has range based TLB invalidations */ u8 has_range_tlb_inval:1; + /** @info.has_ras: Device supports RAS (Reliability, Availability, Serviceability) */ + u8 has_ras:1; /** @info.has_soc_remapper_sysctrl: Has SoC remapper system controller */ u8 has_soc_remapper_sysctrl:1; /** @info.has_soc_remapper_telem: Has SoC remapper telemetry support */ diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c index 2a31b430570e..3ab0fceb151f 100644 --- a/drivers/gpu/drm/xe/xe_hw_error.c +++ b/drivers/gpu/drm/xe/xe_hw_error.c @@ -520,7 +520,7 @@ void xe_hw_error_irq_handler(struct xe_tile *tile, const u32 master_ctl) static int hw_error_info_init(struct xe_device *xe) { - if (xe->info.platform != XE_PVC) + if (!xe->info.has_ras) return 0; return xe_drm_ras_init(xe); diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c index f5dd77b6680f..e44003b5aee3 100644 --- a/drivers/gpu/drm/xe/xe_pci.c +++ b/drivers/gpu/drm/xe/xe_pci.c @@ -364,6 +364,7 @@ static const __maybe_unused struct xe_device_desc pvc_desc = { .vm_max_level = 4, .vram_flags = XE_VRAM_FLAGS_NEED64K, .has_mbx_power_limits = false, + .has_ras = true, }; static const struct xe_device_desc mtl_desc = { @@ -471,6 +472,7 @@ static const struct xe_device_desc cri_desc = { .require_force_probe = true, .va_bits = 57, .vm_max_level = 4, + .has_ras = true, }; static const struct xe_device_desc nvlp_desc = { @@ -761,6 +763,7 @@ static int xe_info_init_early(struct xe_device *xe, xe->info.has_page_reclaim_hw_assist = desc->has_page_reclaim_hw_assist; xe->info.has_pre_prod_wa = desc->has_pre_prod_wa; xe->info.has_pxp = desc->has_pxp; + xe->info.has_ras = desc->has_ras; xe->info.has_soc_remapper_sysctrl = desc->has_soc_remapper_sysctrl; xe->info.has_soc_remapper_telem = desc->has_soc_remapper_telem; xe->info.has_sriov = xe_configfs_primary_gt_allowed(to_pci_dev(xe->drm.dev)) && diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h index 08386c5eca27..cb7d79f51753 100644 --- a/drivers/gpu/drm/xe/xe_pci_types.h +++ b/drivers/gpu/drm/xe/xe_pci_types.h @@ -54,6 +54,7 @@ struct xe_device_desc { u8 has_pre_prod_wa:1; u8 has_page_reclaim_hw_assist:1; u8 has_pxp:1; + u8 has_ras:1; u8 has_soc_remapper_sysctrl:1; u8 has_soc_remapper_telem:1; u8 has_sriov:1; -- 2.47.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 4/5] drm/xe/xe_ras: Add structures and commands for get counter 2026-03-20 10:25 [PATCH 0/5] Add get-error-counter support for CRI Riana Tauro ` (2 preceding siblings ...) 2026-03-20 10:25 ` [PATCH 3/5] drm/xe/ras: Add flag for Xe RAS Riana Tauro @ 2026-03-20 10:25 ` Riana Tauro 2026-03-20 10:26 ` [PATCH 5/5] drm/xe/xe_ras: Add support to query error counter for CRI Riana Tauro ` (4 subsequent siblings) 8 siblings, 0 replies; 11+ messages in thread From: Riana Tauro @ 2026-03-20 10:25 UTC (permalink / raw) To: intel-xe Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty, badal.nilawar, raag.jadav, ravi.kishore.koppuravuri, mallesh.koujalagi Add request and response structures for get counter command. Signed-off-by: Riana Tauro <riana.tauro@intel.com> --- drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h | 9 ++ drivers/gpu/drm/xe/xe_ras_types.h | 151 ++++++++++++++++++++++++ 2 files changed, 160 insertions(+) create mode 100644 drivers/gpu/drm/xe/xe_ras_types.h diff --git a/drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h b/drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h index 4cbde267ac44..fd4248b82f69 100644 --- a/drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h +++ b/drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h @@ -40,6 +40,15 @@ * between driver and System Controller firmware. */ +/** + * enum xe_sysctrl_group - System Controller command groups + * + * @XE_SYSCTRL_GROUP_GFSP: GFSP group for RAS commands + */ +enum xe_sysctrl_group { + XE_SYSCTRL_GROUP_GFSP = 0x01 +}; + /** * struct xe_sysctrl_app_msg_hdr - Application layer message header * @data: 32-bit header data diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h new file mode 100644 index 000000000000..b3256a28221e --- /dev/null +++ b/drivers/gpu/drm/xe/xe_ras_types.h @@ -0,0 +1,151 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2026 Intel Corporation + */ + +#ifndef _XE_RAS_TYPES_H_ +#define _XE_RAS_TYPES_H_ + +#include <linux/types.h> + +#define XE_RAS_INFO_QUEUE_MAX_CHUNK_SIZE 200 + +/** + * enum xe_ras_command - RAS Command IDs for GFSP group + * + * @XE_RAS_CMD_GET_COUNTER: Get RAS counter information + */ +enum xe_ras_command { + XE_RAS_CMD_GET_COUNTER = 0x03 +}; + +/** + * struct xe_ras_error_common - Common RAS error class + * + * This structure contains error severity and component information + * across all products + */ +struct xe_ras_error_common { + /** @severity: Error Severity */ + u8 severity; + /** @component: IP where the error originated */ + u8 component; +} __packed; + +/** + * struct xe_ras_error_unit - Error unit information + */ +struct xe_ras_error_unit { + /** @tile: Tile identifier */ + u8 tile; + /** @instance: Instance identifier within a component */ + u32 instance; +} __packed; + +/** + * struct xe_ras_error_cause - Error cause information + */ +struct xe_ras_error_cause { + /** @cause: Cause */ + u32 cause; + /** @reserved: For future use */ + u8 reserved; +} __packed; + +/** + * struct xe_ras_error_product - Error fields that are specific to the product + */ +struct xe_ras_error_product { + /** @unit: Unit within IP block */ + struct xe_ras_error_unit unit; + /** @error_cause: Cause/checker */ + struct xe_ras_error_cause error_cause; +} __packed; + +/** + * struct xe_ras_error_class - Complete RAS Error Class + * + * This structure provides the complete error classification by combining + * the common error class with the product-specific error class. + */ +struct xe_ras_error_class { + /** @common: Common error severity and component */ + struct xe_ras_error_common common; + /** @product: Product-specific unit and cause */ + struct xe_ras_error_product product; +} __packed; + +/** + * struct xe_ras_info_queue_header - Info queue header + * + * This structure provides metadata about large info queue data + */ +struct xe_ras_info_queue_header { + /** @total_size: Total size of complete info queue data (bytes) */ + u32 total_size; + /** @chunk_offset: Offset of this chunk within total data (bytes) */ + u32 chunk_offset; + /** @chunk_size: Size of data in this chunk (bytes) */ + u32 chunk_size; + /** @sequence_number: Sequence number of this chunk (Starts at 0) */ + u32 sequence_number; + /** @flags: Info queue control flags */ + u32 flags:8; + /** @compression_type: Compression type used for this chunk */ + u32 compression_type:4; + /** @reserved: Reserved for future use */ + u32 reserved:20; + /** @checksum: Checksum of the chunk data */ + u32 checksum; +} __packed; + +/** + * struct xe_ras_info_queue_response - Info queue response + * + * This structure provides the response for commands with info queue + */ +struct xe_ras_info_queue_response { + /** @queue_header: Info queue metadata */ + struct xe_ras_info_queue_header queue_header; + /** @queue_data: Info queue data chunk */ + u8 queue_data[XE_RAS_INFO_QUEUE_MAX_CHUNK_SIZE]; +} __packed; + +/** + * struct xe_ras_get_counter_request - Request for XE_RAS_CMD_GET_COUNTER + * + * This structure defines the request format for getting RAS counter values + */ +struct xe_ras_get_counter_request { + /** @counter_class: RAS error class */ + struct xe_ras_error_class counter_class; + /** @reserved: Reserved for future use */ + u32 reserved; +} __packed; + +/** + * struct xe_ras_get_counter_response - Response for XE_RAS_CMD_GET_COUNTER + * + * This structure defines the response format for getting RAS counter values + */ +struct xe_ras_get_counter_response { + /** @counter_class: RAS error class */ + struct xe_ras_error_class counter_class; + /** @counter_value: Current counter value */ + u32 counter_value; + /** @timestamp: Timestamp of the counter value */ + u64 timestamp; + /** @threshold_value: Threshold value for the counter */ + u32 threshold_value; + /** @counter_status: Status of the counter */ + u32 counter_status:8; + /** @reserved: Reserved for future use */ + u32 reserved:1; + /** @has_info_queue: Indicates if info queue is present */ + u32 has_info_queue:1; + /** @reserved1: Reserved for future use */ + u32 reserved1:22; + /** @info_queue: Info queue data */ + struct xe_ras_info_queue_response info_queue; +} __packed; +#endif -- 2.47.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 5/5] drm/xe/xe_ras: Add support to query error counter for CRI 2026-03-20 10:25 [PATCH 0/5] Add get-error-counter support for CRI Riana Tauro ` (3 preceding siblings ...) 2026-03-20 10:25 ` [PATCH 4/5] drm/xe/xe_ras: Add structures and commands for get counter Riana Tauro @ 2026-03-20 10:26 ` Riana Tauro 2026-03-20 10:33 ` ✗ CI.checkpatch: warning for Add get-error-counter support " Patchwork ` (3 subsequent siblings) 8 siblings, 0 replies; 11+ messages in thread From: Riana Tauro @ 2026-03-20 10:26 UTC (permalink / raw) To: intel-xe Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty, badal.nilawar, raag.jadav, ravi.kishore.koppuravuri, mallesh.koujalagi Add support to query error counter for all errors. When userspace queries a DRM RAS error counter, fetch the latest value from system controller. Integrate this with XE DRM RAS. Example : query the counters using ynl List all supported errors $ sudo ynl --family drm_ras --dump get-error-counter \ --json '{"node-id":1}' [{"error-id": 1, "error-name": "core-compute", "error-value": 0}, {"error-id": 2, "error-name": "soc-internal", "error-value": 0}, {"error-id": 3, "error-name": "device-memory", "error-value": 0}, {"error-id": 4, "error-name": "pcie", "error-value": 0}, {"error-id": 5, "error-name": "fabric", "error-value": 0},] Query single error counter $ sudo ynl --family drm_ras --do get-error-counter --json \ '{"node-id":1, "error-id":1}' {'error-id': 1, 'error-name': 'core-compute', 'error-value': 20} Signed-off-by: Riana Tauro <riana.tauro@intel.com> --- drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm/xe/xe_drm_ras.c | 22 ++++--- drivers/gpu/drm/xe/xe_ras.c | 111 ++++++++++++++++++++++++++++++++ drivers/gpu/drm/xe/xe_ras.h | 16 +++++ 4 files changed, 142 insertions(+), 8 deletions(-) create mode 100644 drivers/gpu/drm/xe/xe_ras.c create mode 100644 drivers/gpu/drm/xe/xe_ras.h diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile index f9abaf687d46..2493a3ce4a94 100644 --- a/drivers/gpu/drm/xe/Makefile +++ b/drivers/gpu/drm/xe/Makefile @@ -111,6 +111,7 @@ xe-y += xe_bb.o \ xe_pxp_debugfs.o \ xe_pxp_submit.o \ xe_query.o \ + xe_ras.o \ xe_range_fence.o \ xe_reg_sr.o \ xe_reg_whitelist.o \ diff --git a/drivers/gpu/drm/xe/xe_drm_ras.c b/drivers/gpu/drm/xe/xe_drm_ras.c index e07dc23a155e..b334881e034a 100644 --- a/drivers/gpu/drm/xe/xe_drm_ras.c +++ b/drivers/gpu/drm/xe/xe_drm_ras.c @@ -11,17 +11,27 @@ #include "xe_device_types.h" #include "xe_drm_ras.h" +#include "xe_ras.h" static const char * const error_components[] = DRM_XE_RAS_ERROR_COMPONENT_NAMES; static const char * const error_severity[] = DRM_XE_RAS_ERROR_SEVERITY_NAMES; -static int hw_query_error_counter(struct xe_drm_ras_counter *info, - u32 error_id, const char **name, u32 *val) +static int hw_query_error_counter(struct xe_device *xe, + const enum drm_xe_ras_error_severity severity, u32 error_id, + const char **name, u32 *val) { + struct xe_drm_ras *ras = &xe->ras; + struct xe_drm_ras_counter *info = ras->info[severity]; + if (!info || !info[error_id].name) return -ENOENT; *name = info[error_id].name; + + /* Fetch counter from system controller if supported */ + if (xe->info.has_sysctrl) + return xe_ras_get_error_counter(xe, severity, error_id, val); + *val = atomic_read(&info[error_id].counter); return 0; @@ -31,20 +41,16 @@ static int query_uncorrectable_error_counter(struct drm_ras_node *ep, u32 error_ const char **name, u32 *val) { struct xe_device *xe = ep->priv; - struct xe_drm_ras *ras = &xe->ras; - struct xe_drm_ras_counter *info = ras->info[DRM_XE_RAS_ERR_SEV_UNCORRECTABLE]; - return hw_query_error_counter(info, error_id, name, val); + return hw_query_error_counter(xe, DRM_XE_RAS_ERR_SEV_UNCORRECTABLE, error_id, name, val); } static int query_correctable_error_counter(struct drm_ras_node *ep, u32 error_id, const char **name, u32 *val) { struct xe_device *xe = ep->priv; - struct xe_drm_ras *ras = &xe->ras; - struct xe_drm_ras_counter *info = ras->info[DRM_XE_RAS_ERR_SEV_CORRECTABLE]; - return hw_query_error_counter(info, error_id, name, val); + return hw_query_error_counter(xe, DRM_XE_RAS_ERR_SEV_CORRECTABLE, error_id, name, val); } static struct xe_drm_ras_counter *allocate_and_copy_counters(struct xe_device *xe) diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c new file mode 100644 index 000000000000..47d0a4715735 --- /dev/null +++ b/drivers/gpu/drm/xe/xe_ras.c @@ -0,0 +1,111 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright © 2026 Intel Corporation + */ + +#include "xe_device_types.h" +#include "xe_pm.h" +#include "xe_printk.h" +#include "xe_ras.h" +#include "xe_ras_types.h" +#include "xe_sysctrl_mailbox.h" +#include "xe_sysctrl_mailbox_types.h" + +/* Severity classification of detected errors */ +enum xe_ras_severity { + XE_RAS_SEVERITY_NOT_SUPPORTED = 0, + XE_RAS_SEVERITY_CORRECTABLE, + XE_RAS_SEVERITY_UNCORRECTABLE, + XE_RAS_SEVERITY_INFORMATIONAL, + XE_RAS_SEVERITY_MAX +}; + +/* major IP blocks where errors can originate */ +enum xe_ras_component { + XE_RAS_COMPONENT_NOT_SUPPORTED = 0, + XE_RAS_COMPONENT_DEVICE_MEMORY, + XE_RAS_COMPONENT_CORE_COMPUTE, + XE_RAS_COMPONENT_RESERVED, + XE_RAS_COMPONENT_PCIE, + XE_RAS_COMPONENT_FABRIC, + XE_RAS_COMPONENT_SOC_INTERNAL, + XE_RAS_COMPONENT_MAX +}; + +/* Mapping from DRM RAS components to XE RAS component */ +static const int drm_to_xe_ras_component[] = { + [DRM_XE_RAS_ERR_COMP_CORE_COMPUTE] = XE_RAS_COMPONENT_CORE_COMPUTE, + [DRM_XE_RAS_ERR_COMP_SOC_INTERNAL] = XE_RAS_COMPONENT_SOC_INTERNAL, + [DRM_XE_RAS_ERR_COMP_DEVICE_MEMORY] = XE_RAS_COMPONENT_DEVICE_MEMORY, + [DRM_XE_RAS_ERR_COMP_PCIE] = XE_RAS_COMPONENT_PCIE, + [DRM_XE_RAS_ERR_COMP_FABRIC] = XE_RAS_COMPONENT_FABRIC +}; +static_assert(ARRAY_SIZE(drm_to_xe_ras_component) == DRM_XE_RAS_ERR_COMP_MAX); + +/* Mapping from DRM RAS severity to XE RAS severity */ +static const int drm_to_xe_ras_severity[] = { + [DRM_XE_RAS_ERR_SEV_CORRECTABLE] = XE_RAS_SEVERITY_CORRECTABLE, + [DRM_XE_RAS_ERR_SEV_UNCORRECTABLE] = XE_RAS_SEVERITY_UNCORRECTABLE +}; + +static void prepare_sysctrl_command(struct xe_sysctrl_mailbox_command *command, + u32 cmd_mask, void *request, size_t request_len, + void *response, size_t response_len) +{ + struct xe_sysctrl_app_msg_hdr hdr = {0}; + u32 req_hdr; + + req_hdr = FIELD_PREP(APP_HDR_GROUP_ID_MASK, XE_SYSCTRL_GROUP_GFSP) | + FIELD_PREP(APP_HDR_COMMAND_MASK, cmd_mask); + + hdr.data = req_hdr; + command->header = hdr; + command->data_in = request; + command->data_in_len = request_len; + command->data_out = response; + command->data_out_len = response_len; +} + +/** + * xe_ras_get_error_counter() - Get error counter value + * @xe: xe device instance + * @severity: Error severity level to be queried + * @error_id: Error component to be queried + * @value: Counter value + * + * This function retrieves the value of a specific RAS error counter based on + * the provided severity and component. + * + * Return: 0 on success, negative error code on failure. + */ +int xe_ras_get_error_counter(struct xe_device *xe, const enum drm_xe_ras_error_severity severity, + u32 error_id, u32 *value) +{ + struct xe_ras_get_counter_response response = {0}; + struct xe_ras_get_counter_request request = {0}; + struct xe_sysctrl_mailbox_command command = {0}; + struct xe_ras_error_class *error_class = &request.counter_class; + ssize_t rlen; + int ret; + + error_class->common.severity = drm_to_xe_ras_severity[severity]; + error_class->common.component = drm_to_xe_ras_component[error_id]; + + prepare_sysctrl_command(&command, XE_RAS_CMD_GET_COUNTER, &request, sizeof(request), + &response, sizeof(response)); + + guard(xe_pm_runtime)(xe); + ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen); + if (ret) { + xe_err(xe, "[RAS]: Sysctrl error ret %d\n", ret); + return ret; + } + + if (rlen != sizeof(response)) { + xe_err(xe, "[RAS]: Sysctrl response does not match len %zu!!\n", rlen); + return -EINVAL; + } + + *value = response.counter_value; + return 0; +} diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h new file mode 100644 index 000000000000..e468c414148e --- /dev/null +++ b/drivers/gpu/drm/xe/xe_ras.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2026 Intel Corporation + */ + +#ifndef _XE_RAS_H_ +#define _XE_RAS_H_ + +#include <uapi/drm/xe_drm.h> + +struct xe_device; + +int xe_ras_get_error_counter(struct xe_device *xe, const enum drm_xe_ras_error_severity severity, + u32 error_id, u32 *value); + +#endif -- 2.47.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* ✗ CI.checkpatch: warning for Add get-error-counter support for CRI 2026-03-20 10:25 [PATCH 0/5] Add get-error-counter support for CRI Riana Tauro ` (4 preceding siblings ...) 2026-03-20 10:26 ` [PATCH 5/5] drm/xe/xe_ras: Add support to query error counter for CRI Riana Tauro @ 2026-03-20 10:33 ` Patchwork 2026-03-20 10:35 ` ✓ CI.KUnit: success " Patchwork ` (2 subsequent siblings) 8 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2026-03-20 10:33 UTC (permalink / raw) To: Riana Tauro; +Cc: intel-xe == Series Details == Series: Add get-error-counter support for CRI URL : https://patchwork.freedesktop.org/series/163576/ State : warning == Summary == + KERNEL=/kernel + git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt Cloning into 'mt'... warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/ + git -C mt rev-list -n1 origin/master 1f57ba1afceae32108bd24770069f764d940a0e4 + cd /kernel + git config --global --add safe.directory /kernel + git log -n1 commit 68f67adb8ef89098921fbc4faf08894fbcf0f122 Author: Riana Tauro <riana.tauro@intel.com> Date: Fri Mar 20 15:56:00 2026 +0530 drm/xe/xe_ras: Add support to query error counter for CRI Add support to query error counter for all errors. When userspace queries a DRM RAS error counter, fetch the latest value from system controller. Integrate this with XE DRM RAS. Example : query the counters using ynl List all supported errors $ sudo ynl --family drm_ras --dump get-error-counter \ --json '{"node-id":1}' [{"error-id": 1, "error-name": "core-compute", "error-value": 0}, {"error-id": 2, "error-name": "soc-internal", "error-value": 0}, {"error-id": 3, "error-name": "device-memory", "error-value": 0}, {"error-id": 4, "error-name": "pcie", "error-value": 0}, {"error-id": 5, "error-name": "fabric", "error-value": 0},] Query single error counter $ sudo ynl --family drm_ras --do get-error-counter --json \ '{"node-id":1, "error-id":1}' {'error-id': 1, 'error-name': 'core-compute', 'error-value': 20} Signed-off-by: Riana Tauro <riana.tauro@intel.com> + /mt/dim checkpatch 7535044a2418d22b59be0eb64af0353971f16bd8 drm-intel e8bb56c93c25 drm/xe/xe_sysctrl: Add System controller patch -:27: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #27: new file mode 100644 -:668: WARNING:LINE_SPACING: Missing a blank line after declarations #668: FILE: drivers/gpu/drm/xe/xe_sysctrl_mailbox.c:225: + size_t remain = sizeof(*hdr) + data_out_len; + u8 *buffer __free(kfree) = kzalloc(remain, GFP_KERNEL); total: 0 errors, 2 warnings, 0 checks, 835 lines checked ce613758b0ce drm/xe/uapi: Add additional error components to XE DRM RAS 54fab64feef7 drm/xe/ras: Add flag for Xe RAS -:21: WARNING:LONG_LINE_COMMENT: line length of 101 exceeds 100 columns #21: FILE: drivers/gpu/drm/xe/xe_device_types.h:194: + /** @info.has_ras: Device supports RAS (Reliability, Availability, Serviceability) */ total: 0 errors, 1 warnings, 0 checks, 44 lines checked 7171e58ddb2b drm/xe/xe_ras: Add structures and commands for get counter -:31: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #31: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 166 lines checked 68f67adb8ef8 drm/xe/xe_ras: Add support to query error counter for CRI -:103: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #103: new file mode 100644 -:150: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations #150: FILE: drivers/gpu/drm/xe/xe_ras.c:43: +}; +static_assert(ARRAY_SIZE(drm_to_xe_ras_component) == DRM_XE_RAS_ERR_COMP_MAX); total: 0 errors, 1 warnings, 1 checks, 185 lines checked ^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ CI.KUnit: success for Add get-error-counter support for CRI 2026-03-20 10:25 [PATCH 0/5] Add get-error-counter support for CRI Riana Tauro ` (5 preceding siblings ...) 2026-03-20 10:33 ` ✗ CI.checkpatch: warning for Add get-error-counter support " Patchwork @ 2026-03-20 10:35 ` Patchwork 2026-03-20 11:16 ` ✗ Xe.CI.BAT: failure " Patchwork 2026-03-21 8:10 ` ✓ Xe.CI.FULL: success " Patchwork 8 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2026-03-20 10:35 UTC (permalink / raw) To: Riana Tauro; +Cc: intel-xe == Series Details == Series: Add get-error-counter support for CRI URL : https://patchwork.freedesktop.org/series/163576/ State : success == Summary == + trap cleanup EXIT + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig [10:33:51] Configuring KUnit Kernel ... Generating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [10:33:55] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [10:34:26] Starting KUnit Kernel (1/1)... [10:34:26] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [10:34:26] ================== guc_buf (11 subtests) =================== [10:34:26] [PASSED] test_smallest [10:34:26] [PASSED] test_largest [10:34:26] [PASSED] test_granular [10:34:26] [PASSED] test_unique [10:34:26] [PASSED] test_overlap [10:34:26] [PASSED] test_reusable [10:34:26] [PASSED] test_too_big [10:34:26] [PASSED] test_flush [10:34:26] [PASSED] test_lookup [10:34:26] [PASSED] test_data [10:34:26] [PASSED] test_class [10:34:26] ===================== [PASSED] guc_buf ===================== [10:34:26] =================== guc_dbm (7 subtests) =================== [10:34:26] [PASSED] test_empty [10:34:26] [PASSED] test_default [10:34:26] ======================== test_size ======================== [10:34:26] [PASSED] 4 [10:34:26] [PASSED] 8 [10:34:26] [PASSED] 32 [10:34:26] [PASSED] 256 [10:34:26] ==================== [PASSED] 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[PASSED] guc_dbm ===================== [10:34:26] =================== guc_idm (6 subtests) =================== [10:34:26] [PASSED] bad_init [10:34:26] [PASSED] no_init [10:34:26] [PASSED] init_fini [10:34:26] [PASSED] check_used [10:34:26] [PASSED] check_quota [10:34:26] [PASSED] check_all [10:34:26] ===================== [PASSED] guc_idm ===================== [10:34:26] ================== no_relay (3 subtests) =================== [10:34:26] [PASSED] xe_drops_guc2pf_if_not_ready [10:34:26] [PASSED] xe_drops_guc2vf_if_not_ready [10:34:26] [PASSED] xe_rejects_send_if_not_ready [10:34:26] ==================== [PASSED] no_relay ===================== [10:34:26] ================== pf_relay (14 subtests) ================== [10:34:26] [PASSED] pf_rejects_guc2pf_too_short [10:34:26] [PASSED] pf_rejects_guc2pf_too_long [10:34:26] [PASSED] pf_rejects_guc2pf_no_payload [10:34:26] [PASSED] pf_fails_no_payload [10:34:26] [PASSED] pf_fails_bad_origin [10:34:26] [PASSED] pf_fails_bad_type [10:34:26] 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======================== fair_vram ======================== [10:34:26] [PASSED] 1 VF [10:34:26] [PASSED] 2 VFs [10:34:26] [PASSED] 3 VFs [10:34:26] [PASSED] 4 VFs [10:34:26] [PASSED] 5 VFs [10:34:26] [PASSED] 6 VFs [10:34:26] [PASSED] 7 VFs [10:34:26] [PASSED] 8 VFs [10:34:26] [PASSED] 9 VFs [10:34:26] [PASSED] 10 VFs [10:34:26] [PASSED] 11 VFs [10:34:26] [PASSED] 12 VFs [10:34:26] [PASSED] 13 VFs [10:34:26] [PASSED] 14 VFs [10:34:26] [PASSED] 15 VFs [10:34:26] [PASSED] 16 VFs [10:34:26] [PASSED] 17 VFs [10:34:26] [PASSED] 18 VFs [10:34:26] [PASSED] 19 VFs [10:34:26] [PASSED] 20 VFs [10:34:26] [PASSED] 21 VFs [10:34:26] [PASSED] 22 VFs [10:34:26] [PASSED] 23 VFs [10:34:26] [PASSED] 24 VFs [10:34:26] [PASSED] 25 VFs [10:34:26] [PASSED] 26 VFs [10:34:26] [PASSED] 27 VFs [10:34:26] [PASSED] 28 VFs [10:34:26] [PASSED] 29 VFs [10:34:26] [PASSED] 30 VFs [10:34:26] [PASSED] 31 VFs [10:34:26] [PASSED] 32 VFs [10:34:26] [PASSED] 33 VFs [10:34:26] [PASSED] 34 VFs [10:34:26] [PASSED] 35 VFs [10:34:26] [PASSED] 36 VFs [10:34:26] [PASSED] 37 VFs [10:34:26] [PASSED] 38 VFs [10:34:26] [PASSED] 39 VFs [10:34:26] [PASSED] 40 VFs [10:34:26] [PASSED] 41 VFs [10:34:26] [PASSED] 42 VFs [10:34:26] [PASSED] 43 VFs [10:34:26] [PASSED] 44 VFs [10:34:26] [PASSED] 45 VFs [10:34:26] [PASSED] 46 VFs [10:34:26] [PASSED] 47 VFs [10:34:26] [PASSED] 48 VFs [10:34:26] [PASSED] 49 VFs [10:34:26] [PASSED] 50 VFs [10:34:26] [PASSED] 51 VFs [10:34:26] [PASSED] 52 VFs [10:34:26] [PASSED] 53 VFs [10:34:26] [PASSED] 54 VFs [10:34:26] [PASSED] 55 VFs [10:34:26] [PASSED] 56 VFs [10:34:26] [PASSED] 57 VFs [10:34:26] [PASSED] 58 VFs [10:34:26] [PASSED] 59 VFs [10:34:26] [PASSED] 60 VFs [10:34:26] [PASSED] 61 VFs [10:34:26] [PASSED] 62 VFs [10:34:26] [PASSED] 63 VFs [10:34:26] ==================== [PASSED] fair_vram ==================== [10:34:26] ================== [PASSED] pf_gt_config =================== [10:34:26] ===================== lmtt (1 subtest) ===================== [10:34:26] ======================== test_ops ========================= [10:34:26] [PASSED] 2-level [10:34:26] [PASSED] multi-level [10:34:26] ==================== [PASSED] test_ops ===================== [10:34:26] ====================== [PASSED] lmtt ======================= [10:34:26] ================= pf_service (11 subtests) ================= [10:34:26] [PASSED] pf_negotiate_any [10:34:26] [PASSED] pf_negotiate_base_match [10:34:26] [PASSED] pf_negotiate_base_newer [10:34:26] [PASSED] pf_negotiate_base_next [10:34:26] [SKIPPED] pf_negotiate_base_older [10:34:26] [PASSED] pf_negotiate_base_prev [10:34:26] [PASSED] pf_negotiate_latest_match [10:34:26] [PASSED] pf_negotiate_latest_newer [10:34:26] [PASSED] pf_negotiate_latest_next [10:34:26] [SKIPPED] pf_negotiate_latest_older [10:34:26] [SKIPPED] pf_negotiate_latest_prev [10:34:26] =================== [PASSED] pf_service ==================== [10:34:26] ================= xe_guc_g2g (2 subtests) ================== [10:34:26] ============== xe_live_guc_g2g_kunit_default ============== [10:34:26] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ========== [10:34:26] ============== xe_live_guc_g2g_kunit_allmem =============== [10:34:26] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ========== [10:34:26] =================== [SKIPPED] xe_guc_g2g =================== [10:34:26] =================== xe_mocs (2 subtests) =================== [10:34:26] ================ xe_live_mocs_kernel_kunit ================ [10:34:26] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============ [10:34:26] ================ xe_live_mocs_reset_kunit ================= [10:34:26] ============ [SKIPPED] xe_live_mocs_reset_kunit ============ [10:34:26] ==================== [SKIPPED] xe_mocs ===================== [10:34:26] ================= xe_migrate (2 subtests) ================== [10:34:26] ================= xe_migrate_sanity_kunit ================= [10:34:26] ============ [SKIPPED] xe_migrate_sanity_kunit ============= [10:34:26] ================== xe_validate_ccs_kunit ================== [10:34:26] ============= [SKIPPED] xe_validate_ccs_kunit ============== [10:34:26] =================== [SKIPPED] xe_migrate =================== [10:34:26] ================== xe_dma_buf (1 subtest) ================== [10:34:26] ==================== xe_dma_buf_kunit ===================== [10:34:26] ================ [SKIPPED] xe_dma_buf_kunit ================ [10:34:26] =================== [SKIPPED] xe_dma_buf =================== [10:34:26] ================= xe_bo_shrink (1 subtest) ================= [10:34:26] =================== xe_bo_shrink_kunit ==================== [10:34:26] =============== [SKIPPED] xe_bo_shrink_kunit =============== [10:34:26] ================== [SKIPPED] xe_bo_shrink ================== [10:34:26] ==================== xe_bo (2 subtests) ==================== [10:34:26] ================== xe_ccs_migrate_kunit =================== [10:34:26] ============== [SKIPPED] xe_ccs_migrate_kunit ============== [10:34:26] ==================== xe_bo_evict_kunit ==================== [10:34:26] =============== [SKIPPED] xe_bo_evict_kunit ================ [10:34:26] ===================== [SKIPPED] xe_bo ====================== [10:34:26] ==================== args (13 subtests) ==================== [10:34:26] [PASSED] count_args_test [10:34:26] [PASSED] call_args_example [10:34:26] [PASSED] call_args_test [10:34:26] [PASSED] drop_first_arg_example [10:34:26] [PASSED] drop_first_arg_test [10:34:26] [PASSED] first_arg_example [10:34:26] [PASSED] first_arg_test [10:34:26] [PASSED] last_arg_example [10:34:26] [PASSED] last_arg_test [10:34:26] [PASSED] pick_arg_example [10:34:26] [PASSED] if_args_example [10:34:26] [PASSED] if_args_test [10:34:26] [PASSED] sep_comma_example [10:34:26] ====================== [PASSED] args ======================= [10:34:26] =================== xe_pci (3 subtests) ==================== [10:34:26] ==================== check_graphics_ip ==================== [10:34:26] [PASSED] 12.00 Xe_LP [10:34:26] [PASSED] 12.10 Xe_LP+ [10:34:26] [PASSED] 12.55 Xe_HPG [10:34:26] [PASSED] 12.60 Xe_HPC [10:34:26] [PASSED] 12.70 Xe_LPG [10:34:26] [PASSED] 12.71 Xe_LPG [10:34:26] [PASSED] 12.74 Xe_LPG+ [10:34:26] [PASSED] 20.01 Xe2_HPG [10:34:26] [PASSED] 20.02 Xe2_HPG [10:34:26] [PASSED] 20.04 Xe2_LPG [10:34:26] [PASSED] 30.00 Xe3_LPG [10:34:26] [PASSED] 30.01 Xe3_LPG [10:34:26] [PASSED] 30.03 Xe3_LPG [10:34:26] [PASSED] 30.04 Xe3_LPG [10:34:26] [PASSED] 30.05 Xe3_LPG [10:34:26] [PASSED] 35.10 Xe3p_LPG [10:34:26] [PASSED] 35.11 Xe3p_XPC [10:34:26] ================ [PASSED] check_graphics_ip ================ [10:34:26] ===================== check_media_ip ====================== [10:34:26] [PASSED] 12.00 Xe_M [10:34:26] [PASSED] 12.55 Xe_HPM [10:34:26] [PASSED] 13.00 Xe_LPM+ [10:34:26] [PASSED] 13.01 Xe2_HPM [10:34:26] [PASSED] 20.00 Xe2_LPM [10:34:26] [PASSED] 30.00 Xe3_LPM [10:34:26] [PASSED] 30.02 Xe3_LPM [10:34:26] [PASSED] 35.00 Xe3p_LPM [10:34:26] [PASSED] 35.03 Xe3p_HPM [10:34:26] ================= [PASSED] check_media_ip ================== [10:34:26] =================== check_platform_desc =================== [10:34:26] [PASSED] 0x9A60 (TIGERLAKE) [10:34:26] [PASSED] 0x9A68 (TIGERLAKE) [10:34:26] [PASSED] 0x9A70 (TIGERLAKE) [10:34:26] [PASSED] 0x9A40 (TIGERLAKE) [10:34:26] [PASSED] 0x9A49 (TIGERLAKE) [10:34:26] [PASSED] 0x9A59 (TIGERLAKE) [10:34:26] [PASSED] 0x9A78 (TIGERLAKE) [10:34:26] [PASSED] 0x9AC0 (TIGERLAKE) [10:34:26] [PASSED] 0x9AC9 (TIGERLAKE) [10:34:26] [PASSED] 0x9AD9 (TIGERLAKE) [10:34:26] [PASSED] 0x9AF8 (TIGERLAKE) [10:34:26] [PASSED] 0x4C80 (ROCKETLAKE) [10:34:26] [PASSED] 0x4C8A (ROCKETLAKE) [10:34:26] [PASSED] 0x4C8B (ROCKETLAKE) [10:34:26] [PASSED] 0x4C8C (ROCKETLAKE) [10:34:26] [PASSED] 0x4C90 (ROCKETLAKE) [10:34:26] [PASSED] 0x4C9A (ROCKETLAKE) [10:34:26] [PASSED] 0x4680 (ALDERLAKE_S) [10:34:26] [PASSED] 0x4682 (ALDERLAKE_S) [10:34:26] [PASSED] 0x4688 (ALDERLAKE_S) [10:34:26] [PASSED] 0x468A (ALDERLAKE_S) [10:34:26] [PASSED] 0x468B (ALDERLAKE_S) [10:34:26] [PASSED] 0x4690 (ALDERLAKE_S) [10:34:26] [PASSED] 0x4692 (ALDERLAKE_S) [10:34:26] [PASSED] 0x4693 (ALDERLAKE_S) [10:34:26] [PASSED] 0x46A0 (ALDERLAKE_P) [10:34:26] [PASSED] 0x46A1 (ALDERLAKE_P) [10:34:26] [PASSED] 0x46A2 (ALDERLAKE_P) [10:34:26] [PASSED] 0x46A3 (ALDERLAKE_P) [10:34:26] [PASSED] 0x46A6 (ALDERLAKE_P) [10:34:26] [PASSED] 0x46A8 (ALDERLAKE_P) [10:34:26] [PASSED] 0x46AA (ALDERLAKE_P) [10:34:26] [PASSED] 0x462A (ALDERLAKE_P) [10:34:26] [PASSED] 0x4626 (ALDERLAKE_P) [10:34:26] [PASSED] 0x4628 (ALDERLAKE_P) [10:34:26] [PASSED] 0x46B0 (ALDERLAKE_P) [10:34:26] [PASSED] 0x46B1 (ALDERLAKE_P) [10:34:26] [PASSED] 0x46B2 (ALDERLAKE_P) [10:34:26] [PASSED] 0x46B3 (ALDERLAKE_P) [10:34:26] [PASSED] 0x46C0 (ALDERLAKE_P) [10:34:26] [PASSED] 0x46C1 (ALDERLAKE_P) [10:34:26] [PASSED] 0x46C2 (ALDERLAKE_P) [10:34:26] [PASSED] 0x46C3 (ALDERLAKE_P) [10:34:26] [PASSED] 0x46D0 (ALDERLAKE_N) [10:34:26] [PASSED] 0x46D1 (ALDERLAKE_N) [10:34:26] [PASSED] 0x46D2 (ALDERLAKE_N) [10:34:26] [PASSED] 0x46D3 (ALDERLAKE_N) [10:34:26] [PASSED] 0x46D4 (ALDERLAKE_N) [10:34:26] [PASSED] 0xA721 (ALDERLAKE_P) [10:34:26] [PASSED] 0xA7A1 (ALDERLAKE_P) [10:34:26] [PASSED] 0xA7A9 (ALDERLAKE_P) [10:34:26] [PASSED] 0xA7AC (ALDERLAKE_P) [10:34:26] [PASSED] 0xA7AD (ALDERLAKE_P) [10:34:26] [PASSED] 0xA720 (ALDERLAKE_P) [10:34:26] [PASSED] 0xA7A0 (ALDERLAKE_P) [10:34:26] [PASSED] 0xA7A8 (ALDERLAKE_P) [10:34:26] [PASSED] 0xA7AA (ALDERLAKE_P) [10:34:26] [PASSED] 0xA7AB (ALDERLAKE_P) [10:34:26] [PASSED] 0xA780 (ALDERLAKE_S) [10:34:26] [PASSED] 0xA781 (ALDERLAKE_S) [10:34:26] [PASSED] 0xA782 (ALDERLAKE_S) [10:34:26] [PASSED] 0xA783 (ALDERLAKE_S) [10:34:26] [PASSED] 0xA788 (ALDERLAKE_S) [10:34:26] [PASSED] 0xA789 (ALDERLAKE_S) [10:34:26] [PASSED] 0xA78A (ALDERLAKE_S) [10:34:26] [PASSED] 0xA78B (ALDERLAKE_S) [10:34:26] [PASSED] 0x4905 (DG1) [10:34:26] [PASSED] 0x4906 (DG1) [10:34:26] [PASSED] 0x4907 (DG1) [10:34:26] [PASSED] 0x4908 (DG1) [10:34:26] [PASSED] 0x4909 (DG1) [10:34:26] [PASSED] 0x56C0 (DG2) [10:34:26] [PASSED] 0x56C2 (DG2) [10:34:26] [PASSED] 0x56C1 (DG2) [10:34:26] [PASSED] 0x7D51 (METEORLAKE) [10:34:26] [PASSED] 0x7DD1 (METEORLAKE) [10:34:26] [PASSED] 0x7D41 (METEORLAKE) [10:34:26] [PASSED] 0x7D67 (METEORLAKE) [10:34:26] [PASSED] 0xB640 (METEORLAKE) [10:34:26] [PASSED] 0x56A0 (DG2) [10:34:26] [PASSED] 0x56A1 (DG2) [10:34:26] [PASSED] 0x56A2 (DG2) [10:34:26] [PASSED] 0x56BE (DG2) [10:34:26] [PASSED] 0x56BF (DG2) [10:34:26] [PASSED] 0x5690 (DG2) [10:34:26] [PASSED] 0x5691 (DG2) [10:34:26] [PASSED] 0x5692 (DG2) [10:34:26] [PASSED] 0x56A5 (DG2) [10:34:26] [PASSED] 0x56A6 (DG2) [10:34:26] [PASSED] 0x56B0 (DG2) [10:34:26] [PASSED] 0x56B1 (DG2) [10:34:26] [PASSED] 0x56BA (DG2) [10:34:26] [PASSED] 0x56BB (DG2) [10:34:26] [PASSED] 0x56BC (DG2) [10:34:26] [PASSED] 0x56BD (DG2) [10:34:26] [PASSED] 0x5693 (DG2) [10:34:26] [PASSED] 0x5694 (DG2) [10:34:26] [PASSED] 0x5695 (DG2) [10:34:26] [PASSED] 0x56A3 (DG2) [10:34:26] [PASSED] 0x56A4 (DG2) [10:34:26] [PASSED] 0x56B2 (DG2) [10:34:26] [PASSED] 0x56B3 (DG2) [10:34:26] [PASSED] 0x5696 (DG2) [10:34:26] [PASSED] 0x5697 (DG2) [10:34:26] [PASSED] 0xB69 (PVC) [10:34:26] [PASSED] 0xB6E (PVC) [10:34:26] [PASSED] 0xBD4 (PVC) [10:34:26] [PASSED] 0xBD5 (PVC) [10:34:26] [PASSED] 0xBD6 (PVC) [10:34:26] [PASSED] 0xBD7 (PVC) [10:34:26] [PASSED] 0xBD8 (PVC) [10:34:26] [PASSED] 0xBD9 (PVC) [10:34:26] [PASSED] 0xBDA (PVC) [10:34:26] [PASSED] 0xBDB (PVC) [10:34:26] [PASSED] 0xBE0 (PVC) [10:34:26] [PASSED] 0xBE1 (PVC) [10:34:26] [PASSED] 0xBE5 (PVC) [10:34:26] [PASSED] 0x7D40 (METEORLAKE) [10:34:26] [PASSED] 0x7D45 (METEORLAKE) [10:34:26] [PASSED] 0x7D55 (METEORLAKE) [10:34:26] [PASSED] 0x7D60 (METEORLAKE) [10:34:26] [PASSED] 0x7DD5 (METEORLAKE) [10:34:26] [PASSED] 0x6420 (LUNARLAKE) [10:34:26] [PASSED] 0x64A0 (LUNARLAKE) [10:34:26] [PASSED] 0x64B0 (LUNARLAKE) [10:34:26] [PASSED] 0xE202 (BATTLEMAGE) [10:34:26] [PASSED] 0xE209 (BATTLEMAGE) [10:34:26] [PASSED] 0xE20B (BATTLEMAGE) [10:34:26] [PASSED] 0xE20C (BATTLEMAGE) [10:34:26] [PASSED] 0xE20D (BATTLEMAGE) [10:34:26] [PASSED] 0xE210 (BATTLEMAGE) [10:34:26] [PASSED] 0xE211 (BATTLEMAGE) [10:34:26] [PASSED] 0xE212 (BATTLEMAGE) [10:34:26] [PASSED] 0xE216 (BATTLEMAGE) [10:34:26] [PASSED] 0xE220 (BATTLEMAGE) [10:34:26] [PASSED] 0xE221 (BATTLEMAGE) [10:34:26] [PASSED] 0xE222 (BATTLEMAGE) [10:34:26] [PASSED] 0xE223 (BATTLEMAGE) [10:34:26] [PASSED] 0xB080 (PANTHERLAKE) [10:34:26] [PASSED] 0xB081 (PANTHERLAKE) [10:34:26] [PASSED] 0xB082 (PANTHERLAKE) [10:34:26] [PASSED] 0xB083 (PANTHERLAKE) [10:34:26] [PASSED] 0xB084 (PANTHERLAKE) [10:34:26] [PASSED] 0xB085 (PANTHERLAKE) [10:34:26] [PASSED] 0xB086 (PANTHERLAKE) [10:34:26] [PASSED] 0xB087 (PANTHERLAKE) [10:34:26] [PASSED] 0xB08F (PANTHERLAKE) [10:34:26] [PASSED] 0xB090 (PANTHERLAKE) [10:34:26] [PASSED] 0xB0A0 (PANTHERLAKE) [10:34:26] [PASSED] 0xB0B0 (PANTHERLAKE) [10:34:26] [PASSED] 0xFD80 (PANTHERLAKE) [10:34:26] [PASSED] 0xFD81 (PANTHERLAKE) [10:34:26] [PASSED] 0xD740 (NOVALAKE_S) [10:34:26] [PASSED] 0xD741 (NOVALAKE_S) [10:34:26] [PASSED] 0xD742 (NOVALAKE_S) [10:34:26] [PASSED] 0xD743 (NOVALAKE_S) [10:34:26] [PASSED] 0xD744 (NOVALAKE_S) [10:34:26] [PASSED] 0xD745 (NOVALAKE_S) [10:34:26] [PASSED] 0x674C (CRESCENTISLAND) [10:34:26] [PASSED] 0xD750 (NOVALAKE_P) [10:34:26] [PASSED] 0xD751 (NOVALAKE_P) [10:34:26] [PASSED] 0xD752 (NOVALAKE_P) [10:34:26] [PASSED] 0xD753 (NOVALAKE_P) [10:34:26] [PASSED] 0xD754 (NOVALAKE_P) [10:34:26] [PASSED] 0xD755 (NOVALAKE_P) [10:34:26] [PASSED] 0xD756 (NOVALAKE_P) [10:34:26] [PASSED] 0xD757 (NOVALAKE_P) [10:34:26] [PASSED] 0xD75F (NOVALAKE_P) [10:34:26] =============== [PASSED] check_platform_desc =============== [10:34:26] ===================== [PASSED] xe_pci ====================== [10:34:26] =================== xe_rtp (2 subtests) ==================== [10:34:26] =============== xe_rtp_process_to_sr_tests ================ [10:34:26] [PASSED] coalesce-same-reg [10:34:26] [PASSED] no-match-no-add [10:34:26] [PASSED] match-or [10:34:26] [PASSED] match-or-xfail [10:34:26] [PASSED] no-match-no-add-multiple-rules [10:34:26] [PASSED] two-regs-two-entries [10:34:26] [PASSED] clr-one-set-other [10:34:26] [PASSED] set-field [10:34:26] [PASSED] conflict-duplicate stty: 'standard input': Inappropriate ioctl for device [10:34:26] [PASSED] conflict-not-disjoint [10:34:26] [PASSED] conflict-reg-type [10:34:26] =========== [PASSED] xe_rtp_process_to_sr_tests ============ [10:34:26] ================== xe_rtp_process_tests =================== [10:34:26] [PASSED] active1 [10:34:26] [PASSED] active2 [10:34:26] [PASSED] active-inactive [10:34:26] [PASSED] inactive-active [10:34:26] [PASSED] inactive-1st_or_active-inactive [10:34:26] [PASSED] inactive-2nd_or_active-inactive [10:34:26] [PASSED] inactive-last_or_active-inactive [10:34:26] [PASSED] inactive-no_or_active-inactive [10:34:26] ============== [PASSED] xe_rtp_process_tests =============== [10:34:26] ===================== [PASSED] xe_rtp ====================== [10:34:26] ==================== xe_wa (1 subtest) ===================== [10:34:26] ======================== xe_wa_gt ========================= [10:34:26] [PASSED] TIGERLAKE B0 [10:34:26] [PASSED] DG1 A0 [10:34:26] [PASSED] DG1 B0 [10:34:26] [PASSED] ALDERLAKE_S A0 [10:34:26] [PASSED] ALDERLAKE_S B0 [10:34:26] [PASSED] ALDERLAKE_S C0 [10:34:26] [PASSED] ALDERLAKE_S D0 [10:34:26] [PASSED] ALDERLAKE_P A0 [10:34:26] [PASSED] ALDERLAKE_P B0 [10:34:26] [PASSED] ALDERLAKE_P C0 [10:34:26] [PASSED] ALDERLAKE_S RPLS D0 [10:34:26] [PASSED] ALDERLAKE_P RPLU E0 [10:34:26] [PASSED] DG2 G10 C0 [10:34:26] [PASSED] DG2 G11 B1 [10:34:26] [PASSED] DG2 G12 A1 [10:34:26] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0 [10:34:26] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0 [10:34:26] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0 [10:34:26] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0 [10:34:26] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0 [10:34:26] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1 [10:34:26] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0 [10:34:26] ==================== [PASSED] xe_wa_gt ===================== [10:34:26] ====================== [PASSED] xe_wa ====================== [10:34:26] ============================================================ [10:34:26] Testing complete. Ran 597 tests: passed: 579, skipped: 18 [10:34:26] Elapsed time: 35.484s total, 4.183s configuring, 30.683s building, 0.603s running + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig [10:34:26] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [10:34:28] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [10:34:52] Starting KUnit Kernel (1/1)... [10:34:52] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [10:34:53] ============ drm_test_pick_cmdline (2 subtests) ============ [10:34:53] [PASSED] drm_test_pick_cmdline_res_1920_1080_60 [10:34:53] =============== drm_test_pick_cmdline_named =============== [10:34:53] [PASSED] NTSC [10:34:53] [PASSED] NTSC-J [10:34:53] [PASSED] PAL [10:34:53] [PASSED] PAL-M [10:34:53] =========== [PASSED] drm_test_pick_cmdline_named =========== [10:34:53] ============== [PASSED] drm_test_pick_cmdline ============== [10:34:53] == drm_test_atomic_get_connector_for_encoder (1 subtest) === [10:34:53] [PASSED] drm_test_drm_atomic_get_connector_for_encoder [10:34:53] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ==== [10:34:53] =========== drm_validate_clone_mode (2 subtests) =========== [10:34:53] ============== drm_test_check_in_clone_mode =============== [10:34:53] [PASSED] in_clone_mode [10:34:53] [PASSED] not_in_clone_mode [10:34:53] ========== [PASSED] drm_test_check_in_clone_mode =========== [10:34:53] =============== drm_test_check_valid_clones =============== [10:34:53] [PASSED] not_in_clone_mode [10:34:53] [PASSED] valid_clone [10:34:53] [PASSED] invalid_clone [10:34:53] =========== [PASSED] drm_test_check_valid_clones =========== [10:34:53] ============= [PASSED] drm_validate_clone_mode ============= [10:34:53] ============= drm_validate_modeset (1 subtest) ============= [10:34:53] [PASSED] drm_test_check_connector_changed_modeset [10:34:53] ============== [PASSED] drm_validate_modeset =============== [10:34:53] ====== drm_test_bridge_get_current_state (2 subtests) ====== [10:34:53] [PASSED] drm_test_drm_bridge_get_current_state_atomic [10:34:53] [PASSED] drm_test_drm_bridge_get_current_state_legacy [10:34:53] ======== [PASSED] drm_test_bridge_get_current_state ======== [10:34:53] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ====== [10:34:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic [10:34:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled [10:34:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy [10:34:53] ======== [PASSED] drm_test_bridge_helper_reset_crtc ======== [10:34:53] ============== drm_bridge_alloc (2 subtests) =============== [10:34:53] [PASSED] drm_test_drm_bridge_alloc_basic [10:34:53] [PASSED] drm_test_drm_bridge_alloc_get_put [10:34:53] ================ [PASSED] drm_bridge_alloc ================= [10:34:53] ============= drm_cmdline_parser (40 subtests) ============= [10:34:53] [PASSED] drm_test_cmdline_force_d_only [10:34:53] [PASSED] drm_test_cmdline_force_D_only_dvi [10:34:53] [PASSED] drm_test_cmdline_force_D_only_hdmi [10:34:53] [PASSED] drm_test_cmdline_force_D_only_not_digital [10:34:53] [PASSED] drm_test_cmdline_force_e_only [10:34:53] [PASSED] drm_test_cmdline_res [10:34:53] [PASSED] drm_test_cmdline_res_vesa [10:34:53] [PASSED] drm_test_cmdline_res_vesa_rblank [10:34:53] [PASSED] drm_test_cmdline_res_rblank [10:34:53] [PASSED] drm_test_cmdline_res_bpp [10:34:53] [PASSED] drm_test_cmdline_res_refresh [10:34:53] [PASSED] drm_test_cmdline_res_bpp_refresh [10:34:53] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced [10:34:53] [PASSED] drm_test_cmdline_res_bpp_refresh_margins [10:34:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off [10:34:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on [10:34:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog [10:34:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital [10:34:53] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on [10:34:53] [PASSED] drm_test_cmdline_res_margins_force_on [10:34:53] [PASSED] drm_test_cmdline_res_vesa_margins [10:34:53] [PASSED] drm_test_cmdline_name [10:34:53] [PASSED] drm_test_cmdline_name_bpp [10:34:53] [PASSED] drm_test_cmdline_name_option [10:34:53] [PASSED] drm_test_cmdline_name_bpp_option [10:34:53] [PASSED] drm_test_cmdline_rotate_0 [10:34:53] [PASSED] drm_test_cmdline_rotate_90 [10:34:53] [PASSED] drm_test_cmdline_rotate_180 [10:34:53] [PASSED] drm_test_cmdline_rotate_270 [10:34:53] [PASSED] drm_test_cmdline_hmirror [10:34:53] [PASSED] drm_test_cmdline_vmirror [10:34:53] [PASSED] drm_test_cmdline_margin_options [10:34:53] [PASSED] drm_test_cmdline_multiple_options [10:34:53] [PASSED] drm_test_cmdline_bpp_extra_and_option [10:34:53] [PASSED] drm_test_cmdline_extra_and_option [10:34:53] [PASSED] drm_test_cmdline_freestanding_options [10:34:53] [PASSED] drm_test_cmdline_freestanding_force_e_and_options [10:34:53] [PASSED] drm_test_cmdline_panel_orientation [10:34:53] ================ drm_test_cmdline_invalid ================= [10:34:53] [PASSED] margin_only [10:34:53] [PASSED] interlace_only [10:34:53] [PASSED] res_missing_x [10:34:53] [PASSED] res_missing_y [10:34:53] [PASSED] res_bad_y [10:34:53] [PASSED] res_missing_y_bpp [10:34:53] [PASSED] res_bad_bpp [10:34:53] [PASSED] res_bad_refresh [10:34:53] [PASSED] res_bpp_refresh_force_on_off [10:34:53] [PASSED] res_invalid_mode [10:34:53] [PASSED] res_bpp_wrong_place_mode [10:34:53] [PASSED] name_bpp_refresh [10:34:53] [PASSED] name_refresh [10:34:53] [PASSED] name_refresh_wrong_mode [10:34:53] [PASSED] name_refresh_invalid_mode [10:34:53] [PASSED] rotate_multiple [10:34:53] [PASSED] rotate_invalid_val [10:34:53] [PASSED] rotate_truncated [10:34:53] [PASSED] invalid_option [10:34:53] [PASSED] invalid_tv_option [10:34:53] [PASSED] truncated_tv_option [10:34:53] ============ [PASSED] drm_test_cmdline_invalid ============= [10:34:53] =============== drm_test_cmdline_tv_options =============== [10:34:53] [PASSED] NTSC [10:34:53] [PASSED] NTSC_443 [10:34:53] [PASSED] NTSC_J [10:34:53] [PASSED] PAL [10:34:53] [PASSED] PAL_M [10:34:53] [PASSED] PAL_N [10:34:53] [PASSED] SECAM [10:34:53] [PASSED] MONO_525 [10:34:53] [PASSED] MONO_625 [10:34:53] =========== [PASSED] drm_test_cmdline_tv_options =========== [10:34:53] =============== [PASSED] drm_cmdline_parser ================ [10:34:53] ========== drmm_connector_hdmi_init (20 subtests) ========== [10:34:53] [PASSED] drm_test_connector_hdmi_init_valid [10:34:53] [PASSED] drm_test_connector_hdmi_init_bpc_8 [10:34:53] [PASSED] drm_test_connector_hdmi_init_bpc_10 [10:34:53] [PASSED] drm_test_connector_hdmi_init_bpc_12 [10:34:53] [PASSED] drm_test_connector_hdmi_init_bpc_invalid [10:34:53] [PASSED] drm_test_connector_hdmi_init_bpc_null [10:34:53] [PASSED] drm_test_connector_hdmi_init_formats_empty [10:34:53] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb [10:34:53] === drm_test_connector_hdmi_init_formats_yuv420_allowed === [10:34:53] [PASSED] supported_formats=0x9 yuv420_allowed=1 [10:34:53] [PASSED] supported_formats=0x9 yuv420_allowed=0 [10:34:53] [PASSED] supported_formats=0x3 yuv420_allowed=1 [10:34:53] [PASSED] supported_formats=0x3 yuv420_allowed=0 [10:34:53] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed === [10:34:53] [PASSED] drm_test_connector_hdmi_init_null_ddc [10:34:53] [PASSED] drm_test_connector_hdmi_init_null_product [10:34:53] [PASSED] drm_test_connector_hdmi_init_null_vendor [10:34:53] [PASSED] drm_test_connector_hdmi_init_product_length_exact [10:34:53] [PASSED] drm_test_connector_hdmi_init_product_length_too_long [10:34:53] [PASSED] drm_test_connector_hdmi_init_product_valid [10:34:53] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact [10:34:53] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long [10:34:53] [PASSED] drm_test_connector_hdmi_init_vendor_valid [10:34:53] ========= drm_test_connector_hdmi_init_type_valid ========= [10:34:53] [PASSED] HDMI-A [10:34:53] [PASSED] HDMI-B [10:34:53] ===== [PASSED] drm_test_connector_hdmi_init_type_valid ===== [10:34:53] ======== drm_test_connector_hdmi_init_type_invalid ======== [10:34:53] [PASSED] Unknown [10:34:53] [PASSED] VGA [10:34:53] [PASSED] DVI-I [10:34:53] [PASSED] DVI-D [10:34:53] [PASSED] DVI-A [10:34:53] [PASSED] Composite [10:34:53] [PASSED] SVIDEO [10:34:53] [PASSED] LVDS [10:34:53] [PASSED] Component [10:34:53] [PASSED] DIN [10:34:53] [PASSED] DP [10:34:53] [PASSED] TV [10:34:53] [PASSED] eDP [10:34:53] [PASSED] Virtual [10:34:53] [PASSED] DSI [10:34:53] [PASSED] DPI [10:34:53] [PASSED] Writeback [10:34:53] [PASSED] SPI [10:34:53] [PASSED] USB [10:34:53] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ==== [10:34:53] ============ [PASSED] drmm_connector_hdmi_init ============= [10:34:53] ============= drmm_connector_init (3 subtests) ============= [10:34:53] [PASSED] drm_test_drmm_connector_init [10:34:53] [PASSED] drm_test_drmm_connector_init_null_ddc [10:34:53] ========= drm_test_drmm_connector_init_type_valid ========= [10:34:53] [PASSED] Unknown [10:34:53] [PASSED] VGA [10:34:53] [PASSED] DVI-I [10:34:53] [PASSED] DVI-D [10:34:53] [PASSED] DVI-A [10:34:53] [PASSED] Composite [10:34:53] [PASSED] SVIDEO [10:34:53] [PASSED] LVDS [10:34:53] [PASSED] Component [10:34:53] [PASSED] DIN [10:34:53] [PASSED] DP [10:34:53] [PASSED] HDMI-A [10:34:53] [PASSED] HDMI-B [10:34:53] [PASSED] TV [10:34:53] [PASSED] eDP [10:34:53] [PASSED] Virtual [10:34:53] [PASSED] DSI [10:34:53] [PASSED] DPI [10:34:53] [PASSED] Writeback [10:34:53] [PASSED] SPI [10:34:53] [PASSED] USB [10:34:53] ===== [PASSED] drm_test_drmm_connector_init_type_valid ===== [10:34:53] =============== [PASSED] drmm_connector_init =============== [10:34:53] ========= drm_connector_dynamic_init (6 subtests) ========== [10:34:53] [PASSED] drm_test_drm_connector_dynamic_init [10:34:53] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc [10:34:53] [PASSED] drm_test_drm_connector_dynamic_init_not_added [10:34:53] [PASSED] drm_test_drm_connector_dynamic_init_properties [10:34:53] ===== drm_test_drm_connector_dynamic_init_type_valid ====== [10:34:53] [PASSED] Unknown [10:34:53] [PASSED] VGA [10:34:53] [PASSED] DVI-I [10:34:53] [PASSED] DVI-D [10:34:53] [PASSED] DVI-A [10:34:53] [PASSED] Composite [10:34:53] [PASSED] SVIDEO [10:34:53] [PASSED] LVDS [10:34:53] [PASSED] Component [10:34:53] [PASSED] DIN [10:34:53] [PASSED] DP [10:34:53] [PASSED] HDMI-A [10:34:53] [PASSED] HDMI-B [10:34:53] [PASSED] TV [10:34:53] [PASSED] eDP [10:34:53] [PASSED] Virtual [10:34:53] [PASSED] DSI [10:34:53] [PASSED] DPI [10:34:53] [PASSED] Writeback [10:34:53] [PASSED] SPI [10:34:53] [PASSED] USB [10:34:53] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid == [10:34:53] ======== drm_test_drm_connector_dynamic_init_name ========= [10:34:53] [PASSED] Unknown [10:34:53] [PASSED] VGA [10:34:53] [PASSED] DVI-I [10:34:53] [PASSED] DVI-D [10:34:53] [PASSED] DVI-A [10:34:53] [PASSED] Composite [10:34:53] [PASSED] SVIDEO [10:34:53] [PASSED] LVDS [10:34:53] [PASSED] Component [10:34:53] [PASSED] DIN [10:34:53] [PASSED] DP [10:34:53] [PASSED] HDMI-A [10:34:53] [PASSED] HDMI-B [10:34:53] [PASSED] TV [10:34:53] [PASSED] eDP [10:34:53] [PASSED] Virtual [10:34:53] [PASSED] DSI [10:34:53] [PASSED] DPI [10:34:53] [PASSED] Writeback [10:34:53] [PASSED] SPI [10:34:53] [PASSED] USB [10:34:53] ==== [PASSED] drm_test_drm_connector_dynamic_init_name ===== [10:34:53] =========== [PASSED] drm_connector_dynamic_init ============ [10:34:53] ==== drm_connector_dynamic_register_early (4 subtests) ===== [10:34:53] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list [10:34:53] [PASSED] drm_test_drm_connector_dynamic_register_early_defer [10:34:53] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init [10:34:53] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object [10:34:53] ====== [PASSED] drm_connector_dynamic_register_early ======= [10:34:53] ======= drm_connector_dynamic_register (7 subtests) ======== [10:34:53] [PASSED] drm_test_drm_connector_dynamic_register_on_list [10:34:53] [PASSED] drm_test_drm_connector_dynamic_register_no_defer [10:34:53] [PASSED] drm_test_drm_connector_dynamic_register_no_init [10:34:53] [PASSED] drm_test_drm_connector_dynamic_register_mode_object [10:34:53] [PASSED] drm_test_drm_connector_dynamic_register_sysfs [10:34:53] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name [10:34:53] [PASSED] drm_test_drm_connector_dynamic_register_debugfs [10:34:53] ========= [PASSED] drm_connector_dynamic_register ========== [10:34:53] = drm_connector_attach_broadcast_rgb_property (2 subtests) = [10:34:53] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property [10:34:53] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector [10:34:53] === [PASSED] drm_connector_attach_broadcast_rgb_property === [10:34:53] ========== drm_get_tv_mode_from_name (2 subtests) ========== [10:34:53] ========== drm_test_get_tv_mode_from_name_valid =========== [10:34:53] [PASSED] NTSC [10:34:53] [PASSED] NTSC-443 [10:34:53] [PASSED] NTSC-J [10:34:53] [PASSED] PAL [10:34:53] [PASSED] PAL-M [10:34:53] [PASSED] PAL-N [10:34:53] [PASSED] SECAM [10:34:53] [PASSED] Mono [10:34:53] ====== [PASSED] drm_test_get_tv_mode_from_name_valid ======= [10:34:53] [PASSED] drm_test_get_tv_mode_from_name_truncated [10:34:53] ============ [PASSED] drm_get_tv_mode_from_name ============ [10:34:53] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) = [10:34:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb [10:34:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc [10:34:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1 [10:34:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc [10:34:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1 [10:34:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double [10:34:53] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid = [10:34:53] [PASSED] VIC 96 [10:34:53] [PASSED] VIC 97 [10:34:53] [PASSED] VIC 101 [10:34:53] [PASSED] VIC 102 [10:34:53] [PASSED] VIC 106 [10:34:53] [PASSED] VIC 107 [10:34:53] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid === [10:34:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc [10:34:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc [10:34:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc [10:34:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc [10:34:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc [10:34:53] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ==== [10:34:53] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) == [10:34:53] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ==== [10:34:53] [PASSED] Automatic [10:34:53] [PASSED] Full [10:34:53] [PASSED] Limited 16:235 [10:34:53] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name === [10:34:53] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid [10:34:53] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ==== [10:34:53] == drm_hdmi_connector_get_output_format_name (2 subtests) == [10:34:53] === drm_test_drm_hdmi_connector_get_output_format_name ==== [10:34:53] [PASSED] RGB [10:34:53] [PASSED] YUV 4:2:0 [10:34:53] [PASSED] YUV 4:2:2 [10:34:53] [PASSED] YUV 4:4:4 [10:34:53] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name === [10:34:53] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid [10:34:53] ==== [PASSED] drm_hdmi_connector_get_output_format_name ==== [10:34:53] ============= drm_damage_helper (21 subtests) ============== [10:34:53] [PASSED] drm_test_damage_iter_no_damage [10:34:53] [PASSED] drm_test_damage_iter_no_damage_fractional_src [10:34:53] [PASSED] drm_test_damage_iter_no_damage_src_moved [10:34:53] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved [10:34:53] [PASSED] drm_test_damage_iter_no_damage_not_visible [10:34:53] [PASSED] drm_test_damage_iter_no_damage_no_crtc [10:34:53] [PASSED] drm_test_damage_iter_no_damage_no_fb [10:34:53] [PASSED] drm_test_damage_iter_simple_damage [10:34:53] [PASSED] drm_test_damage_iter_single_damage [10:34:53] [PASSED] drm_test_damage_iter_single_damage_intersect_src [10:34:53] [PASSED] drm_test_damage_iter_single_damage_outside_src [10:34:53] [PASSED] drm_test_damage_iter_single_damage_fractional_src [10:34:53] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src [10:34:53] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src [10:34:53] [PASSED] drm_test_damage_iter_single_damage_src_moved [10:34:53] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved [10:34:53] [PASSED] drm_test_damage_iter_damage [10:34:53] [PASSED] drm_test_damage_iter_damage_one_intersect [10:34:53] [PASSED] drm_test_damage_iter_damage_one_outside [10:34:53] [PASSED] drm_test_damage_iter_damage_src_moved [10:34:53] [PASSED] drm_test_damage_iter_damage_not_visible [10:34:53] ================ [PASSED] drm_damage_helper ================ [10:34:53] ============== drm_dp_mst_helper (3 subtests) ============== [10:34:53] ============== drm_test_dp_mst_calc_pbn_mode ============== [10:34:53] [PASSED] Clock 154000 BPP 30 DSC disabled [10:34:53] [PASSED] Clock 234000 BPP 30 DSC disabled [10:34:53] [PASSED] Clock 297000 BPP 24 DSC disabled [10:34:53] [PASSED] Clock 332880 BPP 24 DSC enabled [10:34:53] [PASSED] Clock 324540 BPP 24 DSC enabled [10:34:53] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ========== [10:34:53] ============== drm_test_dp_mst_calc_pbn_div =============== [10:34:53] [PASSED] Link rate 2000000 lane count 4 [10:34:53] [PASSED] Link rate 2000000 lane count 2 [10:34:53] [PASSED] Link rate 2000000 lane count 1 [10:34:53] [PASSED] Link rate 1350000 lane count 4 [10:34:53] [PASSED] Link rate 1350000 lane count 2 [10:34:53] [PASSED] Link rate 1350000 lane count 1 [10:34:53] [PASSED] Link rate 1000000 lane count 4 [10:34:53] [PASSED] Link rate 1000000 lane count 2 [10:34:53] [PASSED] Link rate 1000000 lane count 1 [10:34:53] [PASSED] Link rate 810000 lane count 4 [10:34:53] [PASSED] Link rate 810000 lane count 2 [10:34:53] [PASSED] Link rate 810000 lane count 1 [10:34:53] [PASSED] Link rate 540000 lane count 4 [10:34:53] [PASSED] Link rate 540000 lane count 2 [10:34:53] [PASSED] Link rate 540000 lane count 1 [10:34:53] [PASSED] Link rate 270000 lane count 4 [10:34:53] [PASSED] Link rate 270000 lane count 2 [10:34:53] [PASSED] Link rate 270000 lane count 1 [10:34:53] [PASSED] Link rate 162000 lane count 4 [10:34:53] [PASSED] Link rate 162000 lane count 2 [10:34:53] [PASSED] Link rate 162000 lane count 1 [10:34:53] ========== [PASSED] drm_test_dp_mst_calc_pbn_div =========== [10:34:53] ========= drm_test_dp_mst_sideband_msg_req_decode ========= [10:34:53] [PASSED] DP_ENUM_PATH_RESOURCES with port number [10:34:53] [PASSED] DP_POWER_UP_PHY with port number [10:34:53] [PASSED] DP_POWER_DOWN_PHY with port number [10:34:53] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks [10:34:53] [PASSED] DP_ALLOCATE_PAYLOAD with port number [10:34:53] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI [10:34:53] [PASSED] DP_ALLOCATE_PAYLOAD with PBN [10:34:53] [PASSED] DP_QUERY_PAYLOAD with port number [10:34:53] [PASSED] DP_QUERY_PAYLOAD with VCPI [10:34:53] [PASSED] DP_REMOTE_DPCD_READ with port number [10:34:53] [PASSED] DP_REMOTE_DPCD_READ with DPCD address [10:34:53] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes [10:34:53] [PASSED] DP_REMOTE_DPCD_WRITE with port number [10:34:53] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address [10:34:53] [PASSED] DP_REMOTE_DPCD_WRITE with data array [10:34:53] [PASSED] DP_REMOTE_I2C_READ with port number [10:34:53] [PASSED] DP_REMOTE_I2C_READ with I2C device ID [10:34:53] [PASSED] DP_REMOTE_I2C_READ with transactions array [10:34:53] [PASSED] DP_REMOTE_I2C_WRITE with port number [10:34:53] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID [10:34:53] [PASSED] DP_REMOTE_I2C_WRITE with data array [10:34:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID [10:34:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID [10:34:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event [10:34:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event [10:34:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior [10:34:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior [10:34:53] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode ===== [10:34:53] ================ [PASSED] drm_dp_mst_helper ================ [10:34:53] ================== drm_exec (7 subtests) =================== [10:34:53] [PASSED] sanitycheck [10:34:53] [PASSED] test_lock [10:34:53] [PASSED] test_lock_unlock [10:34:53] [PASSED] test_duplicates [10:34:53] [PASSED] test_prepare [10:34:53] [PASSED] test_prepare_array [10:34:53] [PASSED] test_multiple_loops [10:34:53] ==================== [PASSED] drm_exec ===================== [10:34:53] =========== drm_format_helper_test (17 subtests) =========== [10:34:53] ============== drm_test_fb_xrgb8888_to_gray8 ============== [10:34:53] [PASSED] single_pixel_source_buffer [10:34:53] [PASSED] single_pixel_clip_rectangle [10:34:53] [PASSED] well_known_colors [10:34:53] [PASSED] destination_pitch [10:34:53] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ========== [10:34:53] ============= drm_test_fb_xrgb8888_to_rgb332 ============== [10:34:53] [PASSED] single_pixel_source_buffer [10:34:53] [PASSED] single_pixel_clip_rectangle [10:34:53] [PASSED] well_known_colors [10:34:53] [PASSED] destination_pitch [10:34:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ========== [10:34:53] ============= drm_test_fb_xrgb8888_to_rgb565 ============== [10:34:53] [PASSED] single_pixel_source_buffer [10:34:53] [PASSED] single_pixel_clip_rectangle [10:34:53] [PASSED] well_known_colors [10:34:53] [PASSED] destination_pitch [10:34:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ========== [10:34:53] ============ drm_test_fb_xrgb8888_to_xrgb1555 ============= [10:34:53] [PASSED] single_pixel_source_buffer [10:34:53] [PASSED] single_pixel_clip_rectangle [10:34:53] [PASSED] well_known_colors [10:34:53] [PASSED] destination_pitch [10:34:53] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 ========= [10:34:53] ============ drm_test_fb_xrgb8888_to_argb1555 ============= [10:34:53] [PASSED] single_pixel_source_buffer [10:34:53] [PASSED] single_pixel_clip_rectangle [10:34:53] [PASSED] well_known_colors [10:34:53] [PASSED] destination_pitch [10:34:53] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 ========= [10:34:53] ============ drm_test_fb_xrgb8888_to_rgba5551 ============= [10:34:53] [PASSED] single_pixel_source_buffer [10:34:53] [PASSED] single_pixel_clip_rectangle [10:34:53] [PASSED] well_known_colors [10:34:53] [PASSED] destination_pitch [10:34:53] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 ========= [10:34:53] ============= drm_test_fb_xrgb8888_to_rgb888 ============== [10:34:53] [PASSED] single_pixel_source_buffer [10:34:53] [PASSED] single_pixel_clip_rectangle [10:34:53] [PASSED] well_known_colors [10:34:53] [PASSED] destination_pitch [10:34:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ========== [10:34:53] ============= drm_test_fb_xrgb8888_to_bgr888 ============== [10:34:53] [PASSED] single_pixel_source_buffer [10:34:53] [PASSED] single_pixel_clip_rectangle [10:34:53] [PASSED] well_known_colors [10:34:53] [PASSED] destination_pitch [10:34:53] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ========== [10:34:53] ============ drm_test_fb_xrgb8888_to_argb8888 ============= [10:34:53] [PASSED] single_pixel_source_buffer [10:34:53] [PASSED] single_pixel_clip_rectangle [10:34:53] [PASSED] well_known_colors [10:34:53] [PASSED] destination_pitch [10:34:53] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 ========= [10:34:53] =========== drm_test_fb_xrgb8888_to_xrgb2101010 =========== [10:34:53] [PASSED] single_pixel_source_buffer [10:34:53] [PASSED] single_pixel_clip_rectangle [10:34:53] [PASSED] well_known_colors [10:34:53] [PASSED] destination_pitch [10:34:53] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 ======= [10:34:53] =========== drm_test_fb_xrgb8888_to_argb2101010 =========== [10:34:53] [PASSED] single_pixel_source_buffer [10:34:53] [PASSED] single_pixel_clip_rectangle [10:34:53] [PASSED] well_known_colors [10:34:53] [PASSED] destination_pitch [10:34:53] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 ======= [10:34:53] ============== drm_test_fb_xrgb8888_to_mono =============== [10:34:53] [PASSED] single_pixel_source_buffer [10:34:53] [PASSED] single_pixel_clip_rectangle [10:34:53] [PASSED] well_known_colors [10:34:53] [PASSED] destination_pitch [10:34:53] ========== [PASSED] drm_test_fb_xrgb8888_to_mono =========== [10:34:53] ==================== drm_test_fb_swab ===================== [10:34:53] [PASSED] single_pixel_source_buffer [10:34:53] [PASSED] single_pixel_clip_rectangle [10:34:53] [PASSED] well_known_colors [10:34:53] [PASSED] destination_pitch [10:34:53] ================ [PASSED] drm_test_fb_swab ================= [10:34:53] ============ drm_test_fb_xrgb8888_to_xbgr8888 ============= [10:34:53] [PASSED] single_pixel_source_buffer [10:34:53] [PASSED] single_pixel_clip_rectangle [10:34:53] [PASSED] well_known_colors [10:34:53] [PASSED] destination_pitch [10:34:53] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 ========= [10:34:53] ============ drm_test_fb_xrgb8888_to_abgr8888 ============= [10:34:53] [PASSED] single_pixel_source_buffer [10:34:53] [PASSED] single_pixel_clip_rectangle [10:34:53] [PASSED] well_known_colors [10:34:53] [PASSED] destination_pitch [10:34:53] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 ========= [10:34:53] ================= drm_test_fb_clip_offset ================= [10:34:53] [PASSED] pass through [10:34:53] [PASSED] horizontal offset [10:34:53] [PASSED] vertical offset [10:34:53] [PASSED] horizontal and vertical offset [10:34:53] [PASSED] horizontal offset (custom pitch) [10:34:53] [PASSED] vertical offset (custom pitch) [10:34:53] [PASSED] horizontal and vertical offset (custom pitch) [10:34:53] ============= [PASSED] drm_test_fb_clip_offset ============= [10:34:53] =================== drm_test_fb_memcpy ==================== [10:34:53] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258) [10:34:53] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258) [10:34:53] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559) [10:34:53] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258) [10:34:53] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258) [10:34:53] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559) [10:34:53] [PASSED] well_known_colors: XB24 little-endian (0x34324258) [10:34:53] [PASSED] well_known_colors: XRA8 little-endian (0x38415258) [10:34:53] [PASSED] well_known_colors: YU24 little-endian (0x34325559) [10:34:53] [PASSED] destination_pitch: XB24 little-endian (0x34324258) [10:34:53] [PASSED] destination_pitch: XRA8 little-endian (0x38415258) [10:34:53] [PASSED] destination_pitch: YU24 little-endian (0x34325559) [10:34:53] =============== [PASSED] drm_test_fb_memcpy ================ [10:34:53] ============= [PASSED] drm_format_helper_test ============== [10:34:53] ================= drm_format (18 subtests) ================= [10:34:53] [PASSED] drm_test_format_block_width_invalid [10:34:53] [PASSED] drm_test_format_block_width_one_plane [10:34:53] [PASSED] drm_test_format_block_width_two_plane [10:34:53] [PASSED] drm_test_format_block_width_three_plane [10:34:53] [PASSED] drm_test_format_block_width_tiled [10:34:53] [PASSED] drm_test_format_block_height_invalid [10:34:53] [PASSED] drm_test_format_block_height_one_plane [10:34:53] [PASSED] drm_test_format_block_height_two_plane [10:34:53] [PASSED] drm_test_format_block_height_three_plane [10:34:53] [PASSED] drm_test_format_block_height_tiled [10:34:53] [PASSED] drm_test_format_min_pitch_invalid [10:34:53] [PASSED] drm_test_format_min_pitch_one_plane_8bpp [10:34:53] [PASSED] drm_test_format_min_pitch_one_plane_16bpp [10:34:53] [PASSED] drm_test_format_min_pitch_one_plane_24bpp [10:34:53] [PASSED] drm_test_format_min_pitch_one_plane_32bpp [10:34:53] [PASSED] drm_test_format_min_pitch_two_plane [10:34:53] [PASSED] drm_test_format_min_pitch_three_plane_8bpp [10:34:53] [PASSED] drm_test_format_min_pitch_tiled [10:34:53] =================== [PASSED] drm_format ==================== [10:34:53] ============== drm_framebuffer (10 subtests) =============== [10:34:53] ========== drm_test_framebuffer_check_src_coords ========== [10:34:53] [PASSED] Success: source fits into fb [10:34:53] [PASSED] Fail: overflowing fb with x-axis coordinate [10:34:53] [PASSED] Fail: overflowing fb with y-axis coordinate [10:34:53] [PASSED] Fail: overflowing fb with source width [10:34:53] [PASSED] Fail: overflowing fb with source height [10:34:53] ====== [PASSED] drm_test_framebuffer_check_src_coords ====== [10:34:53] [PASSED] drm_test_framebuffer_cleanup [10:34:53] =============== drm_test_framebuffer_create =============== [10:34:53] [PASSED] ABGR8888 normal sizes [10:34:53] [PASSED] ABGR8888 max sizes [10:34:53] [PASSED] ABGR8888 pitch greater than min required [10:34:53] [PASSED] ABGR8888 pitch less than min required [10:34:53] [PASSED] ABGR8888 Invalid width [10:34:53] [PASSED] ABGR8888 Invalid buffer handle [10:34:53] [PASSED] No pixel format [10:34:53] [PASSED] ABGR8888 Width 0 [10:34:53] [PASSED] ABGR8888 Height 0 [10:34:53] [PASSED] ABGR8888 Out of bound height * pitch combination [10:34:53] [PASSED] ABGR8888 Large buffer offset [10:34:53] [PASSED] ABGR8888 Buffer offset for inexistent plane [10:34:53] [PASSED] ABGR8888 Invalid flag [10:34:53] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers [10:34:53] [PASSED] ABGR8888 Valid buffer modifier [10:34:53] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE) [10:34:53] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS [10:34:53] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS [10:34:53] [PASSED] NV12 Normal sizes [10:34:53] [PASSED] NV12 Max sizes [10:34:53] [PASSED] NV12 Invalid pitch [10:34:53] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag [10:34:53] [PASSED] NV12 different modifier per-plane [10:34:53] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE [10:34:53] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS [10:34:53] [PASSED] NV12 Modifier for inexistent plane [10:34:53] [PASSED] NV12 Handle for inexistent plane [10:34:53] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS [10:34:53] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier [10:34:53] [PASSED] YVU420 Normal sizes [10:34:53] [PASSED] YVU420 Max sizes [10:34:53] [PASSED] YVU420 Invalid pitch [10:34:53] [PASSED] YVU420 Different pitches [10:34:53] [PASSED] YVU420 Different buffer offsets/pitches [10:34:53] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS [10:34:53] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS [10:34:53] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS [10:34:53] [PASSED] YVU420 Valid modifier [10:34:53] [PASSED] YVU420 Different modifiers per plane [10:34:53] [PASSED] YVU420 Modifier for inexistent plane [10:34:53] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR) [10:34:53] [PASSED] X0L2 Normal sizes [10:34:53] [PASSED] X0L2 Max sizes [10:34:53] [PASSED] X0L2 Invalid pitch [10:34:53] [PASSED] X0L2 Pitch greater than minimum required [10:34:53] [PASSED] X0L2 Handle for inexistent plane [10:34:53] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set [10:34:53] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set [10:34:53] [PASSED] X0L2 Valid modifier [10:34:53] [PASSED] X0L2 Modifier for inexistent plane [10:34:53] =========== [PASSED] drm_test_framebuffer_create =========== [10:34:53] [PASSED] drm_test_framebuffer_free [10:34:53] [PASSED] drm_test_framebuffer_init [10:34:53] [PASSED] drm_test_framebuffer_init_bad_format [10:34:53] [PASSED] drm_test_framebuffer_init_dev_mismatch [10:34:53] [PASSED] drm_test_framebuffer_lookup [10:34:53] [PASSED] drm_test_framebuffer_lookup_inexistent [10:34:53] [PASSED] drm_test_framebuffer_modifiers_not_supported [10:34:53] ================= [PASSED] drm_framebuffer ================= [10:34:53] ================ drm_gem_shmem (8 subtests) ================ [10:34:53] [PASSED] drm_gem_shmem_test_obj_create [10:34:53] [PASSED] drm_gem_shmem_test_obj_create_private [10:34:53] [PASSED] drm_gem_shmem_test_pin_pages [10:34:53] [PASSED] drm_gem_shmem_test_vmap [10:34:53] [PASSED] drm_gem_shmem_test_get_sg_table [10:34:53] [PASSED] drm_gem_shmem_test_get_pages_sgt [10:34:53] [PASSED] drm_gem_shmem_test_madvise [10:34:53] [PASSED] drm_gem_shmem_test_purge [10:34:53] ================== [PASSED] drm_gem_shmem ================== [10:34:53] === drm_atomic_helper_connector_hdmi_check (27 subtests) === [10:34:53] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode [10:34:53] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1 [10:34:53] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode [10:34:53] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1 [10:34:53] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode [10:34:53] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1 [10:34:53] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 ======= [10:34:53] [PASSED] Automatic [10:34:53] [PASSED] Full [10:34:53] [PASSED] Limited 16:235 [10:34:53] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 === [10:34:53] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed [10:34:53] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed [10:34:53] [PASSED] drm_test_check_disable_connector [10:34:53] [PASSED] drm_test_check_hdmi_funcs_reject_rate [10:34:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb [10:34:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420 [10:34:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422 [10:34:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420 [10:34:53] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420 [10:34:53] [PASSED] drm_test_check_output_bpc_crtc_mode_changed [10:34:53] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed [10:34:53] [PASSED] drm_test_check_output_bpc_dvi [10:34:53] [PASSED] drm_test_check_output_bpc_format_vic_1 [10:34:53] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only [10:34:53] [PASSED] drm_test_check_output_bpc_format_display_rgb_only [10:34:53] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only [10:34:53] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only [10:34:53] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc [10:34:53] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc [10:34:53] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc [10:34:53] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ====== [10:34:53] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ==== [10:34:53] [PASSED] drm_test_check_broadcast_rgb_value [10:34:53] [PASSED] drm_test_check_bpc_8_value [10:34:53] [PASSED] drm_test_check_bpc_10_value [10:34:53] [PASSED] drm_test_check_bpc_12_value [10:34:53] [PASSED] drm_test_check_format_value [10:34:53] [PASSED] drm_test_check_tmds_char_value [10:34:53] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ====== [10:34:53] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) = [10:34:53] [PASSED] drm_test_check_mode_valid [10:34:53] [PASSED] drm_test_check_mode_valid_reject [10:34:53] [PASSED] drm_test_check_mode_valid_reject_rate [10:34:53] [PASSED] drm_test_check_mode_valid_reject_max_clock [10:34:53] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid === [10:34:53] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) = [10:34:53] [PASSED] drm_test_check_infoframes [10:34:53] [PASSED] drm_test_check_reject_avi_infoframe [10:34:53] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8 [10:34:53] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10 [10:34:53] [PASSED] drm_test_check_reject_audio_infoframe [10:34:53] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes === [10:34:53] ================= drm_managed (2 subtests) ================= [10:34:53] [PASSED] drm_test_managed_release_action [10:34:53] [PASSED] drm_test_managed_run_action [10:34:53] =================== [PASSED] drm_managed =================== [10:34:53] =================== drm_mm (6 subtests) ==================== [10:34:53] [PASSED] drm_test_mm_init [10:34:53] [PASSED] drm_test_mm_debug [10:34:53] [PASSED] drm_test_mm_align32 [10:34:53] [PASSED] drm_test_mm_align64 [10:34:53] [PASSED] drm_test_mm_lowest [10:34:53] [PASSED] drm_test_mm_highest [10:34:53] ===================== [PASSED] drm_mm ====================== [10:34:53] ============= drm_modes_analog_tv (5 subtests) ============= [10:34:53] [PASSED] drm_test_modes_analog_tv_mono_576i [10:34:53] [PASSED] drm_test_modes_analog_tv_ntsc_480i [10:34:53] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined [10:34:53] [PASSED] drm_test_modes_analog_tv_pal_576i [10:34:53] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined [10:34:53] =============== [PASSED] drm_modes_analog_tv =============== [10:34:53] ============== drm_plane_helper (2 subtests) =============== [10:34:53] =============== drm_test_check_plane_state ================ [10:34:53] [PASSED] clipping_simple [10:34:53] [PASSED] clipping_rotate_reflect [10:34:53] [PASSED] positioning_simple [10:34:53] [PASSED] upscaling [10:34:53] [PASSED] downscaling [10:34:53] [PASSED] rounding1 [10:34:53] [PASSED] rounding2 [10:34:53] [PASSED] rounding3 [10:34:53] [PASSED] rounding4 [10:34:53] =========== [PASSED] drm_test_check_plane_state ============ [10:34:53] =========== drm_test_check_invalid_plane_state ============ [10:34:53] [PASSED] positioning_invalid [10:34:53] [PASSED] upscaling_invalid [10:34:53] [PASSED] downscaling_invalid [10:34:53] ======= [PASSED] drm_test_check_invalid_plane_state ======== [10:34:53] ================ [PASSED] drm_plane_helper ================= [10:34:53] ====== drm_connector_helper_tv_get_modes (1 subtest) ======= [10:34:53] ====== drm_test_connector_helper_tv_get_modes_check ======= [10:34:53] [PASSED] None [10:34:53] [PASSED] PAL [10:34:53] [PASSED] NTSC [10:34:53] [PASSED] Both, NTSC Default [10:34:53] [PASSED] Both, PAL Default [10:34:53] [PASSED] Both, NTSC Default, with PAL on command-line [10:34:53] [PASSED] Both, PAL Default, with NTSC on command-line [10:34:53] == [PASSED] drm_test_connector_helper_tv_get_modes_check === [10:34:53] ======== [PASSED] drm_connector_helper_tv_get_modes ======== [10:34:53] ================== drm_rect (9 subtests) =================== [10:34:53] [PASSED] drm_test_rect_clip_scaled_div_by_zero [10:34:53] [PASSED] drm_test_rect_clip_scaled_not_clipped [10:34:53] [PASSED] drm_test_rect_clip_scaled_clipped [10:34:53] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned [10:34:53] ================= drm_test_rect_intersect ================= [10:34:53] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0 [10:34:53] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1 [10:34:53] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0 [10:34:53] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1 [10:34:53] [PASSED] right x left: 2x1+0+0 x 3x1+1+0 [10:34:53] [PASSED] left x right: 3x1+1+0 x 2x1+0+0 [10:34:53] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1 [10:34:53] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0 [10:34:53] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1 [10:34:53] [PASSED] touching side: 1x1+0+0 x 1x1+1+0 [10:34:53] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0 [10:34:53] [PASSED] inside another: 2x2+0+0 x 1x1+1+1 [10:34:53] [PASSED] far away: 1x1+0+0 x 1x1+3+6 [10:34:53] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10 [10:34:53] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10 [10:34:53] ============= [PASSED] drm_test_rect_intersect ============= [10:34:53] ================ drm_test_rect_calc_hscale ================ [10:34:53] [PASSED] normal use [10:34:53] [PASSED] out of max range [10:34:53] [PASSED] out of min range [10:34:53] [PASSED] zero dst [10:34:53] [PASSED] negative src [10:34:53] [PASSED] negative dst [10:34:53] ============ [PASSED] drm_test_rect_calc_hscale ============ [10:34:53] ================ drm_test_rect_calc_vscale ================ [10:34:53] [PASSED] normal use [10:34:53] [PASSED] out of max range [10:34:53] [PASSED] out of min range [10:34:53] [PASSED] zero dst [10:34:53] [PASSED] negative src [10:34:53] [PASSED] negative dst stty: 'standard input': Inappropriate ioctl for device [10:34:53] ============ [PASSED] drm_test_rect_calc_vscale ============ [10:34:53] ================== drm_test_rect_rotate =================== [10:34:53] [PASSED] reflect-x [10:34:53] [PASSED] reflect-y [10:34:53] [PASSED] rotate-0 [10:34:53] [PASSED] rotate-90 [10:34:53] [PASSED] rotate-180 [10:34:53] [PASSED] rotate-270 [10:34:53] ============== [PASSED] drm_test_rect_rotate =============== [10:34:53] ================ drm_test_rect_rotate_inv ================= [10:34:53] [PASSED] reflect-x [10:34:53] [PASSED] reflect-y [10:34:53] [PASSED] rotate-0 [10:34:53] [PASSED] rotate-90 [10:34:53] [PASSED] rotate-180 [10:34:53] [PASSED] rotate-270 [10:34:53] ============ [PASSED] drm_test_rect_rotate_inv ============= [10:34:53] ==================== [PASSED] drm_rect ===================== [10:34:53] ============ drm_sysfb_modeset_test (1 subtest) ============ [10:34:53] ============ drm_test_sysfb_build_fourcc_list ============= [10:34:53] [PASSED] no native formats [10:34:53] [PASSED] XRGB8888 as native format [10:34:53] [PASSED] remove duplicates [10:34:53] [PASSED] convert alpha formats [10:34:53] [PASSED] random formats [10:34:53] ======== [PASSED] drm_test_sysfb_build_fourcc_list ========= [10:34:53] ============= [PASSED] drm_sysfb_modeset_test ============== [10:34:53] ================== drm_fixp (2 subtests) =================== [10:34:53] [PASSED] drm_test_int2fixp [10:34:53] [PASSED] drm_test_sm2fixp [10:34:53] ==================== [PASSED] drm_fixp ===================== [10:34:53] ============================================================ [10:34:53] Testing complete. Ran 621 tests: passed: 621 [10:34:53] Elapsed time: 26.346s total, 1.683s configuring, 24.494s building, 0.166s running + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig [10:34:53] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [10:34:54] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [10:35:04] Starting KUnit Kernel (1/1)... [10:35:04] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [10:35:04] ================= ttm_device (5 subtests) ================== [10:35:04] [PASSED] ttm_device_init_basic [10:35:04] [PASSED] ttm_device_init_multiple [10:35:04] [PASSED] ttm_device_fini_basic [10:35:04] [PASSED] ttm_device_init_no_vma_man [10:35:04] ================== ttm_device_init_pools ================== [10:35:04] [PASSED] No DMA allocations, no DMA32 required [10:35:04] [PASSED] DMA allocations, DMA32 required [10:35:04] [PASSED] No DMA allocations, DMA32 required [10:35:04] [PASSED] DMA allocations, no DMA32 required [10:35:04] ============== [PASSED] ttm_device_init_pools ============== [10:35:04] =================== [PASSED] ttm_device ==================== [10:35:04] ================== ttm_pool (8 subtests) =================== [10:35:04] ================== ttm_pool_alloc_basic =================== [10:35:04] [PASSED] One page [10:35:04] [PASSED] More than one page [10:35:04] [PASSED] Above the allocation limit [10:35:04] [PASSED] One page, with coherent DMA mappings enabled [10:35:04] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [10:35:04] ============== [PASSED] ttm_pool_alloc_basic =============== [10:35:04] ============== ttm_pool_alloc_basic_dma_addr ============== [10:35:04] [PASSED] One page [10:35:04] [PASSED] More than one page [10:35:04] [PASSED] Above the allocation limit [10:35:04] [PASSED] One page, with coherent DMA mappings enabled [10:35:04] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [10:35:04] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ========== [10:35:04] [PASSED] ttm_pool_alloc_order_caching_match [10:35:04] [PASSED] ttm_pool_alloc_caching_mismatch [10:35:04] [PASSED] ttm_pool_alloc_order_mismatch [10:35:04] [PASSED] ttm_pool_free_dma_alloc [10:35:04] [PASSED] ttm_pool_free_no_dma_alloc [10:35:04] [PASSED] ttm_pool_fini_basic [10:35:04] ==================== [PASSED] ttm_pool ===================== [10:35:04] ================ ttm_resource (8 subtests) ================= [10:35:04] ================= ttm_resource_init_basic ================= [10:35:04] [PASSED] Init resource in TTM_PL_SYSTEM [10:35:04] [PASSED] Init resource in TTM_PL_VRAM [10:35:04] [PASSED] Init resource in a private placement [10:35:04] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags [10:35:04] ============= [PASSED] ttm_resource_init_basic ============= [10:35:04] [PASSED] ttm_resource_init_pinned [10:35:04] [PASSED] ttm_resource_fini_basic [10:35:04] [PASSED] ttm_resource_manager_init_basic [10:35:04] [PASSED] ttm_resource_manager_usage_basic [10:35:04] [PASSED] ttm_resource_manager_set_used_basic [10:35:04] [PASSED] ttm_sys_man_alloc_basic [10:35:04] [PASSED] ttm_sys_man_free_basic [10:35:04] ================== [PASSED] ttm_resource =================== [10:35:04] =================== ttm_tt (15 subtests) =================== [10:35:04] ==================== ttm_tt_init_basic ==================== [10:35:04] [PASSED] Page-aligned size [10:35:04] [PASSED] Extra pages requested [10:35:04] ================ [PASSED] ttm_tt_init_basic ================ [10:35:04] [PASSED] ttm_tt_init_misaligned [10:35:04] [PASSED] ttm_tt_fini_basic [10:35:04] [PASSED] ttm_tt_fini_sg [10:35:04] [PASSED] ttm_tt_fini_shmem [10:35:04] [PASSED] ttm_tt_create_basic [10:35:04] [PASSED] ttm_tt_create_invalid_bo_type [10:35:04] [PASSED] ttm_tt_create_ttm_exists [10:35:04] [PASSED] ttm_tt_create_failed [10:35:04] [PASSED] ttm_tt_destroy_basic [10:35:04] [PASSED] ttm_tt_populate_null_ttm [10:35:04] [PASSED] ttm_tt_populate_populated_ttm [10:35:04] [PASSED] ttm_tt_unpopulate_basic [10:35:04] [PASSED] ttm_tt_unpopulate_empty_ttm [10:35:04] [PASSED] ttm_tt_swapin_basic [10:35:04] ===================== [PASSED] ttm_tt ====================== [10:35:04] =================== ttm_bo (14 subtests) =================== [10:35:04] =========== ttm_bo_reserve_optimistic_no_ticket =========== [10:35:04] [PASSED] Cannot be interrupted and sleeps [10:35:04] [PASSED] Cannot be interrupted, locks straight away [10:35:04] [PASSED] Can be interrupted, sleeps [10:35:04] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket ======= [10:35:04] [PASSED] ttm_bo_reserve_locked_no_sleep [10:35:04] [PASSED] ttm_bo_reserve_no_wait_ticket [10:35:04] [PASSED] ttm_bo_reserve_double_resv [10:35:04] [PASSED] ttm_bo_reserve_interrupted [10:35:04] [PASSED] ttm_bo_reserve_deadlock [10:35:04] [PASSED] ttm_bo_unreserve_basic [10:35:04] [PASSED] ttm_bo_unreserve_pinned [10:35:04] [PASSED] ttm_bo_unreserve_bulk [10:35:04] [PASSED] ttm_bo_fini_basic [10:35:04] [PASSED] ttm_bo_fini_shared_resv [10:35:04] [PASSED] ttm_bo_pin_basic [10:35:04] [PASSED] ttm_bo_pin_unpin_resource [10:35:04] [PASSED] ttm_bo_multiple_pin_one_unpin [10:35:04] ===================== [PASSED] ttm_bo ====================== [10:35:04] ============== ttm_bo_validate (22 subtests) =============== [10:35:04] ============== ttm_bo_init_reserved_sys_man =============== [10:35:04] [PASSED] Buffer object for userspace [10:35:04] [PASSED] Kernel buffer object [10:35:04] [PASSED] Shared buffer object [10:35:04] ========== [PASSED] ttm_bo_init_reserved_sys_man =========== [10:35:04] ============== ttm_bo_init_reserved_mock_man ============== [10:35:04] [PASSED] Buffer object for userspace [10:35:04] [PASSED] Kernel buffer object [10:35:04] [PASSED] Shared buffer object [10:35:04] ========== [PASSED] ttm_bo_init_reserved_mock_man ========== [10:35:04] [PASSED] ttm_bo_init_reserved_resv [10:35:04] ================== ttm_bo_validate_basic ================== [10:35:04] [PASSED] Buffer object for userspace [10:35:04] [PASSED] Kernel buffer object [10:35:04] [PASSED] Shared buffer object [10:35:04] ============== [PASSED] ttm_bo_validate_basic ============== [10:35:04] [PASSED] ttm_bo_validate_invalid_placement [10:35:04] ============= ttm_bo_validate_same_placement ============== [10:35:04] [PASSED] System manager [10:35:04] [PASSED] VRAM manager [10:35:04] ========= [PASSED] ttm_bo_validate_same_placement ========== [10:35:04] [PASSED] ttm_bo_validate_failed_alloc [10:35:04] [PASSED] ttm_bo_validate_pinned [10:35:04] [PASSED] ttm_bo_validate_busy_placement [10:35:04] ================ ttm_bo_validate_multihop ================= [10:35:04] [PASSED] Buffer object for userspace [10:35:04] [PASSED] Kernel buffer object [10:35:04] [PASSED] Shared buffer object [10:35:04] ============ [PASSED] ttm_bo_validate_multihop ============= [10:35:04] ========== ttm_bo_validate_no_placement_signaled ========== [10:35:04] [PASSED] Buffer object in system domain, no page vector [10:35:04] [PASSED] Buffer object in system domain with an existing page vector [10:35:04] ====== [PASSED] ttm_bo_validate_no_placement_signaled ====== [10:35:04] ======== ttm_bo_validate_no_placement_not_signaled ======== [10:35:04] [PASSED] Buffer object for userspace [10:35:04] [PASSED] Kernel buffer object [10:35:04] [PASSED] Shared buffer object [10:35:04] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ==== [10:35:04] [PASSED] ttm_bo_validate_move_fence_signaled [10:35:04] ========= ttm_bo_validate_move_fence_not_signaled ========= [10:35:04] [PASSED] Waits for GPU [10:35:04] [PASSED] Tries to lock straight away [10:35:04] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled ===== [10:35:04] [PASSED] ttm_bo_validate_swapout [10:35:04] [PASSED] ttm_bo_validate_happy_evict [10:35:04] [PASSED] ttm_bo_validate_all_pinned_evict [10:35:04] [PASSED] ttm_bo_validate_allowed_only_evict [10:35:04] [PASSED] ttm_bo_validate_deleted_evict [10:35:04] [PASSED] ttm_bo_validate_busy_domain_evict [10:35:04] [PASSED] ttm_bo_validate_evict_gutting [10:35:04] [PASSED] ttm_bo_validate_recrusive_evict stty: 'standard input': Inappropriate ioctl for device [10:35:04] ================= [PASSED] ttm_bo_validate ================= [10:35:04] ============================================================ [10:35:04] Testing complete. Ran 102 tests: passed: 102 [10:35:04] Elapsed time: 11.322s total, 1.715s configuring, 9.341s building, 0.226s running + cleanup ++ stat -c %u:%g /kernel + chown -R 1003:1003 /kernel ^ permalink raw reply [flat|nested] 11+ messages in thread
* ✗ Xe.CI.BAT: failure for Add get-error-counter support for CRI 2026-03-20 10:25 [PATCH 0/5] Add get-error-counter support for CRI Riana Tauro ` (6 preceding siblings ...) 2026-03-20 10:35 ` ✓ CI.KUnit: success " Patchwork @ 2026-03-20 11:16 ` Patchwork 2026-03-21 8:10 ` ✓ Xe.CI.FULL: success " Patchwork 8 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2026-03-20 11:16 UTC (permalink / raw) To: Riana Tauro; +Cc: intel-xe [-- Attachment #1: Type: text/plain, Size: 1399 bytes --] == Series Details == Series: Add get-error-counter support for CRI URL : https://patchwork.freedesktop.org/series/163576/ State : failure == Summary == CI Bug Log - changes from xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0_BAT -> xe-pw-163576v1_BAT ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with xe-pw-163576v1_BAT absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in xe-pw-163576v1_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (14 -> 4) ------------------------------ ERROR: It appears as if the changes made in xe-pw-163576v1_BAT prevented too many machines from booting. Missing (10): bat-bmg-1 bat-lnl-2 bat-lnl-1 bat-ptl-vm bat-atsm-2 bat-bmg-3 bat-wcl-1 bat-wcl-2 bat-bmg-2 bat-adlp-7 Changes ------- No changes found Build changes ------------- * Linux: xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0 -> xe-pw-163576v1 IGT_8814: 8814 xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0: e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0 xe-pw-163576v1: 163576v1 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/index.html [-- Attachment #2: Type: text/html, Size: 1971 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ Xe.CI.FULL: success for Add get-error-counter support for CRI 2026-03-20 10:25 [PATCH 0/5] Add get-error-counter support for CRI Riana Tauro ` (7 preceding siblings ...) 2026-03-20 11:16 ` ✗ Xe.CI.BAT: failure " Patchwork @ 2026-03-21 8:10 ` Patchwork 8 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2026-03-21 8:10 UTC (permalink / raw) To: Riana Tauro; +Cc: intel-xe [-- Attachment #1: Type: text/plain, Size: 29053 bytes --] == Series Details == Series: Add get-error-counter support for CRI URL : https://patchwork.freedesktop.org/series/163576/ State : success == Summary == CI Bug Log - changes from xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0_FULL -> xe-pw-163576v1_FULL ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (2 -> 2) ------------------------------ No changes in participating hosts Known issues ------------ Here are the changes found in xe-pw-163576v1_FULL that come from known issues: ### IGT changes ### #### Issues hit #### * igt@device_reset@unbind-reset-rebind: - shard-bmg: [PASS][1] -> [ABORT][2] ([Intel XE#7578]) [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-7/igt@device_reset@unbind-reset-rebind.html [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-1/igt@device_reset@unbind-reset-rebind.html * igt@intel_hwmon@hwmon-write: - shard-lnl: NOTRUN -> [SKIP][3] ([Intel XE#1125] / [Intel XE#7312]) [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@intel_hwmon@hwmon-write.html * igt@kms_big_fb@linear-32bpp-rotate-90: - shard-lnl: NOTRUN -> [SKIP][4] ([Intel XE#1407]) [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@kms_big_fb@linear-32bpp-rotate-90.html * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip: - shard-lnl: NOTRUN -> [SKIP][5] ([Intel XE#1124]) +2 other tests skip [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html * igt@kms_bw@linear-tiling-2-displays-3840x2160p: - shard-lnl: NOTRUN -> [SKIP][6] ([Intel XE#367] / [Intel XE#7354]) [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@kms_bw@linear-tiling-2-displays-3840x2160p.html * igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs-cc: - shard-lnl: NOTRUN -> [SKIP][7] ([Intel XE#2887]) +1 other test skip [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs-cc.html * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-a-edp-1: - shard-lnl: NOTRUN -> [SKIP][8] ([Intel XE#2669] / [Intel XE#7389]) +3 other tests skip [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-a-edp-1.html * igt@kms_chamelium_hpd@dp-hpd-storm: - shard-lnl: NOTRUN -> [SKIP][9] ([Intel XE#373]) [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@kms_chamelium_hpd@dp-hpd-storm.html * igt@kms_content_protection@srm@pipe-a-dp-2: - shard-bmg: NOTRUN -> [FAIL][10] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-8/igt@kms_content_protection@srm@pipe-a-dp-2.html * igt@kms_cursor_crc@cursor-onscreen-512x512: - shard-lnl: NOTRUN -> [SKIP][11] ([Intel XE#2321] / [Intel XE#7355]) [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@kms_cursor_crc@cursor-onscreen-512x512.html * igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic: - shard-bmg: [PASS][12] -> [SKIP][13] ([Intel XE#2291]) +2 other tests skip [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-2/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-5/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html * igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size: - shard-lnl: NOTRUN -> [SKIP][14] ([Intel XE#309] / [Intel XE#7343]) [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html * igt@kms_dirtyfb@drrs-dirtyfb-ioctl: - shard-lnl: NOTRUN -> [SKIP][15] ([Intel XE#1508]) [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html * igt@kms_dp_linktrain_fallback@dp-fallback: - shard-bmg: [PASS][16] -> [SKIP][17] ([Intel XE#4294]) [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-1/igt@kms_dp_linktrain_fallback@dp-fallback.html [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-5/igt@kms_dp_linktrain_fallback@dp-fallback.html * igt@kms_flip@2x-flip-vs-modeset: - shard-lnl: NOTRUN -> [SKIP][18] ([Intel XE#1421]) +1 other test skip [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@kms_flip@2x-flip-vs-modeset.html * igt@kms_flip@2x-flip-vs-wf_vblank-interruptible: - shard-bmg: [PASS][19] -> [SKIP][20] ([Intel XE#2316]) +5 other tests skip [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-4/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-3/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html * igt@kms_flip@2x-plain-flip-ts-check-interruptible@bd-dp2-hdmi-a3: - shard-bmg: [PASS][21] -> [ABORT][22] ([Intel XE#5545] / [Intel XE#6652]) +3 other tests abort [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-9/igt@kms_flip@2x-plain-flip-ts-check-interruptible@bd-dp2-hdmi-a3.html [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-2/igt@kms_flip@2x-plain-flip-ts-check-interruptible@bd-dp2-hdmi-a3.html * igt@kms_flip@flip-vs-suspend@b-hdmi-a3: - shard-bmg: [PASS][23] -> [INCOMPLETE][24] ([Intel XE#2049] / [Intel XE#2597]) [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-1/igt@kms_flip@flip-vs-suspend@b-hdmi-a3.html [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-6/igt@kms_flip@flip-vs-suspend@b-hdmi-a3.html * igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling: - shard-lnl: NOTRUN -> [SKIP][25] ([Intel XE#1397] / [Intel XE#1745] / [Intel XE#7385]) [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-default-mode: - shard-lnl: NOTRUN -> [SKIP][26] ([Intel XE#1397] / [Intel XE#7385]) [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-default-mode.html * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-move: - shard-lnl: NOTRUN -> [SKIP][27] ([Intel XE#6312] / [Intel XE#651]) +1 other test skip [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-move.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-wc: - shard-lnl: NOTRUN -> [SKIP][28] ([Intel XE#656]) +2 other tests skip [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscreen-pri-shrfb-draw-mmap-wc: - shard-lnl: NOTRUN -> [SKIP][29] ([Intel XE#6312]) [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscreen-pri-shrfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@psr-argb161616f-draw-render: - shard-lnl: NOTRUN -> [SKIP][30] ([Intel XE#7061] / [Intel XE#7356]) [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@kms_frontbuffer_tracking@psr-argb161616f-draw-render.html * igt@kms_hdr@static-toggle-dpms: - shard-bmg: [PASS][31] -> [SKIP][32] ([Intel XE#1503]) [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-2/igt@kms_hdr@static-toggle-dpms.html [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-5/igt@kms_hdr@static-toggle-dpms.html * igt@kms_plane_scaling@2x-scaler-multi-pipe: - shard-bmg: [PASS][33] -> [SKIP][34] ([Intel XE#2571] / [Intel XE#7343]) [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-1/igt@kms_plane_scaling@2x-scaler-multi-pipe.html [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-5/igt@kms_plane_scaling@2x-scaler-multi-pipe.html * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-b: - shard-lnl: NOTRUN -> [SKIP][35] ([Intel XE#2763] / [Intel XE#6886]) +3 other tests skip [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-b.html * igt@kms_pm_rpm@modeset-non-lpsp-stress: - shard-lnl: NOTRUN -> [SKIP][36] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383]) [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@kms_pm_rpm@modeset-non-lpsp-stress.html * igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area: - shard-lnl: NOTRUN -> [SKIP][37] ([Intel XE#2893] / [Intel XE#7304]) +1 other test skip [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area.html * igt@kms_psr@fbc-psr2-primary-blt: - shard-lnl: NOTRUN -> [SKIP][38] ([Intel XE#1406] / [Intel XE#7345]) +1 other test skip [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@kms_psr@fbc-psr2-primary-blt.html * igt@kms_psr@fbc-psr2-primary-blt@edp-1: - shard-lnl: NOTRUN -> [SKIP][39] ([Intel XE#1406] / [Intel XE#4609]) +1 other test skip [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@kms_psr@fbc-psr2-primary-blt@edp-1.html * igt@xe_eudebug@basic-vm-bind-ufence-reconnect: - shard-lnl: NOTRUN -> [SKIP][40] ([Intel XE#4837]) [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@xe_eudebug@basic-vm-bind-ufence-reconnect.html * igt@xe_eudebug_online@set-breakpoint: - shard-lnl: NOTRUN -> [SKIP][41] ([Intel XE#4837] / [Intel XE#6665]) [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@xe_eudebug_online@set-breakpoint.html * igt@xe_evict@evict-cm-threads-small-multi-queue: - shard-lnl: NOTRUN -> [SKIP][42] ([Intel XE#6540] / [Intel XE#688]) +1 other test skip [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@xe_evict@evict-cm-threads-small-multi-queue.html * igt@xe_exec_balancer@once-parallel-userptr: - shard-lnl: NOTRUN -> [SKIP][43] ([Intel XE#7482]) +4 other tests skip [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@xe_exec_balancer@once-parallel-userptr.html * igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate: - shard-lnl: NOTRUN -> [SKIP][44] ([Intel XE#1392]) [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate.html * igt@xe_exec_fault_mode@many-execqueues-multi-queue-invalid-fault: - shard-lnl: NOTRUN -> [SKIP][45] ([Intel XE#7136]) +2 other tests skip [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@xe_exec_fault_mode@many-execqueues-multi-queue-invalid-fault.html * igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-close-fd-smem: - shard-lnl: NOTRUN -> [SKIP][46] ([Intel XE#6874]) +3 other tests skip [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-close-fd-smem.html * igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-rebind: - shard-lnl: NOTRUN -> [SKIP][47] ([Intel XE#7138]) [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-rebind.html * igt@xe_pm@s3-basic-exec: - shard-lnl: NOTRUN -> [SKIP][48] ([Intel XE#584] / [Intel XE#7369]) [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@xe_pm@s3-basic-exec.html * igt@xe_query@multigpu-query-pxp-status: - shard-lnl: NOTRUN -> [SKIP][49] ([Intel XE#944]) [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@xe_query@multigpu-query-pxp-status.html * igt@xe_sriov_admin@preempt-timeout-write-readback-vfs-disabled: - shard-lnl: NOTRUN -> [SKIP][50] ([Intel XE#7174]) [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-1/igt@xe_sriov_admin@preempt-timeout-write-readback-vfs-disabled.html #### Possible fixes #### * igt@kms_bw@connected-linear-tiling-1-displays-3840x2160p: - shard-bmg: [SKIP][51] ([Intel XE#7621]) -> [PASS][52] [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-2/igt@kms_bw@connected-linear-tiling-1-displays-3840x2160p.html [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-5/igt@kms_bw@connected-linear-tiling-1-displays-3840x2160p.html * igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p: - shard-bmg: [SKIP][53] ([Intel XE#2314] / [Intel XE#2894] / [Intel XE#7373]) -> [PASS][54] [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-3/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-8/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size: - shard-bmg: [DMESG-WARN][55] ([Intel XE#5354]) -> [PASS][56] [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-10/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html * igt@kms_cursor_legacy@cursorb-vs-flipa-legacy: - shard-bmg: [SKIP][57] ([Intel XE#2291]) -> [PASS][58] [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-3/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-8/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic: - shard-bmg: [FAIL][59] ([Intel XE#7586]) -> [PASS][60] [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-3/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-8/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html * igt@kms_flip@2x-plain-flip: - shard-bmg: [SKIP][61] ([Intel XE#2316]) -> [PASS][62] +2 other tests pass [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-3/igt@kms_flip@2x-plain-flip.html [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-8/igt@kms_flip@2x-plain-flip.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-lnl: [FAIL][63] ([Intel XE#301]) -> [PASS][64] +1 other test pass [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html * igt@kms_plane_multiple@2x-tiling-none: - shard-bmg: [SKIP][65] ([Intel XE#4596]) -> [PASS][66] [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-3/igt@kms_plane_multiple@2x-tiling-none.html [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-8/igt@kms_plane_multiple@2x-tiling-none.html * igt@xe_evict@evict-beng-mixed-many-threads-small: - shard-bmg: [INCOMPLETE][67] ([Intel XE#6321]) -> [PASS][68] [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-1/igt@xe_evict@evict-beng-mixed-many-threads-small.html [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-8/igt@xe_evict@evict-beng-mixed-many-threads-small.html * igt@xe_query@query-cs-cycles: - shard-bmg: [FAIL][69] -> [PASS][70] [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-5/igt@xe_query@query-cs-cycles.html [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-5/igt@xe_query@query-cs-cycles.html #### Warnings #### * igt@kms_content_protection@legacy: - shard-bmg: [FAIL][71] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) -> [SKIP][72] ([Intel XE#2341]) +1 other test skip [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-2/igt@kms_content_protection@legacy.html [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-5/igt@kms_content_protection@legacy.html * igt@kms_content_protection@srm: - shard-bmg: [SKIP][73] ([Intel XE#2341]) -> [FAIL][74] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-3/igt@kms_content_protection@srm.html [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-8/igt@kms_content_protection@srm.html * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc: - shard-bmg: [SKIP][75] ([Intel XE#2311]) -> [SKIP][76] ([Intel XE#2312]) +9 other tests skip [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt: - shard-bmg: [SKIP][77] ([Intel XE#4141]) -> [SKIP][78] ([Intel XE#2312]) +5 other tests skip [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt.html [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc: - shard-bmg: [SKIP][79] ([Intel XE#2312]) -> [SKIP][80] ([Intel XE#4141]) [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-indfb-draw-render: - shard-bmg: [SKIP][81] ([Intel XE#2312]) -> [SKIP][82] ([Intel XE#2311]) +1 other test skip [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-indfb-draw-render.html [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-msflip-blt: - shard-bmg: [SKIP][83] ([Intel XE#2312]) -> [SKIP][84] ([Intel XE#2313]) +3 other tests skip [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-msflip-blt.html [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-msflip-blt.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc: - shard-bmg: [SKIP][85] ([Intel XE#2313]) -> [SKIP][86] ([Intel XE#2312]) +8 other tests skip [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html * igt@kms_rotation_crc@primary-y-tiled-reflect-x-90: - shard-bmg: [SKIP][87] ([Intel XE#3904] / [Intel XE#7342]) -> [SKIP][88] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342]) [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-4/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-3/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html * igt@kms_tiled_display@basic-test-pattern: - shard-bmg: [SKIP][89] ([Intel XE#2426] / [Intel XE#5848]) -> [FAIL][90] ([Intel XE#1729] / [Intel XE#7424]) [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0/shard-bmg-9/igt@kms_tiled_display@basic-test-pattern.html [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern.html [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124 [Intel XE#1125]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1125 [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178 [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392 [Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397 [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406 [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407 [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421 [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439 [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503 [Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508 [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729 [Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745 [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049 [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291 [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311 [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312 [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313 [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314 [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316 [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321 [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341 [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426 [Intel XE#2571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2571 [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597 [Intel XE#2669]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2669 [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763 [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887 [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893 [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894 [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301 [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309 [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141 [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304 [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414 [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367 [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373 [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904 [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141 [Intel XE#4294]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4294 [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596 [Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609 [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837 [Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354 [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545 [Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584 [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848 [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312 [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321 [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651 [Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540 [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656 [Intel XE#6652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6652 [Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665 [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874 [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688 [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886 [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061 [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136 [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138 [Intel XE#7174]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7174 [Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304 [Intel XE#7312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7312 [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342 [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343 [Intel XE#7345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7345 [Intel XE#7354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7354 [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355 [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356 [Intel XE#7369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7369 [Intel XE#7373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7373 [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374 [Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383 [Intel XE#7385]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7385 [Intel XE#7389]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7389 [Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424 [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482 [Intel XE#7578]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7578 [Intel XE#7586]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7586 [Intel XE#7621]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7621 [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944 Build changes ------------- * Linux: xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0 -> xe-pw-163576v1 IGT_8814: 8814 xe-4750-e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0: e4242b1733f42c5cf067ef4cda1a7e424d9b1dc0 xe-pw-163576v1: 163576v1 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163576v1/index.html [-- Attachment #2: Type: text/html, Size: 32569 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2026-03-25 9:24 UTC | newest] Thread overview: 11+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-03-20 10:25 [PATCH 0/5] Add get-error-counter support for CRI Riana Tauro 2026-03-20 10:25 ` [PATCH 1/5] drm/xe/xe_sysctrl: Add System controller patch Riana Tauro 2026-03-20 10:25 ` [PATCH 2/5] drm/xe/uapi: Add additional error components to XE DRM RAS Riana Tauro 2026-03-25 9:24 ` Aravind Iddamsetty 2026-03-20 10:25 ` [PATCH 3/5] drm/xe/ras: Add flag for Xe RAS Riana Tauro 2026-03-20 10:25 ` [PATCH 4/5] drm/xe/xe_ras: Add structures and commands for get counter Riana Tauro 2026-03-20 10:26 ` [PATCH 5/5] drm/xe/xe_ras: Add support to query error counter for CRI Riana Tauro 2026-03-20 10:33 ` ✗ CI.checkpatch: warning for Add get-error-counter support " Patchwork 2026-03-20 10:35 ` ✓ CI.KUnit: success " Patchwork 2026-03-20 11:16 ` ✗ Xe.CI.BAT: failure " Patchwork 2026-03-21 8:10 ` ✓ Xe.CI.FULL: success " Patchwork
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