From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "Shankar, Uma" <uma.shankar@intel.com>
Cc: "intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
"intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>
Subject: Re: [PATCH v2 07/12] drm/i915/flipq: Provide the nuts and bolts code for flip queue
Date: Wed, 21 May 2025 20:40:56 +0300 [thread overview]
Message-ID: <aC4QKAibwpjWmLCf@intel.com> (raw)
In-Reply-To: <DM4PR11MB63608A222F893F4AE14DF776F49FA@DM4PR11MB6360.namprd11.prod.outlook.com>
On Tue, May 20, 2025 at 07:06:42AM +0000, Shankar, Uma wrote:
> > +static int intel_flipq_exec_time_us(struct intel_display *display) {
> > + /* TODO ask the DSB code what this should be */
> > + int dsb_exec_time = 20;
>
> I think optimum value would be 100.
> From bspec: "For the flip queue use case, the recommended DSB execution time is 100us + one SAGV block time"
That's just a random number someone pulled out of a hat. We currently
use 20 usec for the arming registers writes, and we don't have any estimate
for the non-arming stuff since we don't need it. But for flip queue we need
to guesstimate the whole thing, so I suppose I might as well slap in a 80usec
for the non-arming part now.
Ideally we should calculate this based on how many registers we are writing,
but that would require measuring the DSB execution speed and coming up with
a reasonable formula for it...
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2025-05-21 17:41 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-16 11:33 [PATCH 00/12] drm/i915/flipq: Rough flip queue implementation Ville Syrjala
2025-05-16 11:33 ` [PATCH 01/12] drm/i915/dsb: Extract intel_dsb_ins_align() Ville Syrjala
2025-05-16 11:33 ` [PATCH 02/12] drm/i915/dsb: Use intel_dsb_ins_align() in intel_dsb_align_tail() Ville Syrjala
2025-05-16 11:33 ` [PATCH 03/12] drm/i915/dsb: Extract assert_dsb_tail_is_aligned() Ville Syrjala
2025-05-16 11:34 ` [PATCH 04/12] drm/i915/dsb: Extract intel_dsb_{head,tail}() Ville Syrjala
2025-05-16 11:34 ` [PATCH 05/12] drm/i915/dsb: Provide intel_dsb_head() and intel_dsb_size() Ville Syrjala
2025-05-18 18:44 ` Shankar, Uma
2025-05-16 11:34 ` [PATCH 06/12] drm/i915/dmc: Define flip queue related PIPEDMC registers Ville Syrjala
2025-05-18 19:41 ` Shankar, Uma
2025-05-21 17:43 ` Ville Syrjälä
2025-05-23 9:12 ` Shankar, Uma
2025-05-16 11:34 ` [PATCH 07/12] drm/i915/flipq: Provide the nuts and bolts code for flip queue Ville Syrjala
2025-05-16 11:48 ` Jani Nikula
2025-05-18 20:21 ` Shankar, Uma
2025-05-19 17:08 ` [PATCH v2 " Ville Syrjala
2025-05-20 7:06 ` Shankar, Uma
2025-05-21 17:40 ` Ville Syrjälä [this message]
2025-05-23 9:07 ` Shankar, Uma
2025-05-16 11:34 ` [PATCH 08/12] drm/i915/flipq: Implement flipq queue based commit path Ville Syrjala
2025-05-18 20:27 ` Shankar, Uma
2025-05-19 17:09 ` [PATCH v2 " Ville Syrjala
2025-05-20 6:53 ` Shankar, Uma
2025-05-16 11:34 ` [PATCH 09/12] drm/i915/flipq: Implement Wa_18034343758 Ville Syrjala
2025-05-18 20:32 ` Shankar, Uma
2025-05-16 11:34 ` [PATCH 10/12] drm/i915/flipq: Implement Wa_16018781658 for LNL-A0 Ville Syrjala
2025-05-20 7:11 ` Shankar, Uma
2025-05-16 11:34 ` [PATCH 11/12] drm/i915/flipq: Add intel_flipq_dump() Ville Syrjala
2025-05-18 20:36 ` Shankar, Uma
2025-05-16 11:34 ` [PATCH 12/12] drm/i915/flipq: Enable flipq by default for testing Ville Syrjala
2025-05-16 12:22 ` ✓ CI.Patch_applied: success for drm/i915/flipq: Rough flip queue implementation Patchwork
2025-05-16 12:22 ` ✗ CI.checkpatch: warning " Patchwork
2025-05-16 12:23 ` ✓ CI.KUnit: success " Patchwork
2025-05-16 12:33 ` ✓ CI.Build: " Patchwork
2025-05-16 12:36 ` ✓ CI.Hooks: " Patchwork
2025-05-16 12:38 ` ✗ CI.checksparse: warning " Patchwork
2025-05-16 13:14 ` ✓ Xe.CI.BAT: success " Patchwork
2025-05-17 7:14 ` ✗ Xe.CI.Full: failure " Patchwork
2025-05-19 17:14 ` ✓ CI.Patch_applied: success for drm/i915/flipq: Rough flip queue implementation (rev3) Patchwork
2025-05-19 17:15 ` ✗ CI.checkpatch: warning " Patchwork
2025-05-19 17:16 ` ✓ CI.KUnit: success " Patchwork
2025-05-19 17:26 ` ✓ CI.Build: " Patchwork
2025-05-19 17:29 ` ✓ CI.Hooks: " Patchwork
2025-05-19 17:30 ` ✗ CI.checksparse: warning " Patchwork
2025-05-19 17:54 ` ✓ Xe.CI.BAT: success " Patchwork
2025-05-19 21:19 ` ✗ Xe.CI.Full: failure " Patchwork
2025-05-20 6:56 ` [PATCH 00/12] drm/i915/flipq: Rough flip queue implementation Shankar, Uma
2025-05-27 5:05 ` ✗ CI.Patch_applied: failure for drm/i915/flipq: Rough flip queue implementation (rev3) Patchwork
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