Intel-XE Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Suraj Kandpal <suraj.kandpal@intel.com>
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
	ankit.k.nautiyal@intel.com
Subject: Re: [PATCH] drm/i915/xe3lpd: Prune modes for YUV420
Date: Mon, 9 Jun 2025 20:59:45 +0300	[thread overview]
Message-ID: <aEchEa8p0bIKXMJa@intel.com> (raw)
In-Reply-To: <20250609164548.2878908-1-suraj.kandpal@intel.com>

On Mon, Jun 09, 2025 at 10:15:48PM +0530, Suraj Kandpal wrote:
> We only support resolution up to 4k for single pipe when using
> YUV420 format so we prune these modes and restrict the plane size
> at src. This is because pipe scaling will not support YUV420 scaling
> for hwidth > 4096.
> 
> --v2
> -Use output format to check [Ville]
> -Add Bspec references
> -Modify commit messge to point to why this is needed
> 
> Bspec: 49247, 50441
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index d04609460e8c..2691eeb50a26 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1419,6 +1419,7 @@ intel_dp_mode_valid(struct drm_connector *_connector,
>  	struct intel_display *display = to_intel_display(_connector->dev);
>  	struct intel_connector *connector = to_intel_connector(_connector);
>  	struct intel_dp *intel_dp = intel_attached_dp(connector);
> +	enum intel_output_format sink_format, output_format;
>  	const struct drm_display_mode *fixed_mode;
>  	int target_clock = mode->clock;
>  	int max_rate, mode_rate, max_lanes, max_link_clock;
> @@ -1452,6 +1453,14 @@ intel_dp_mode_valid(struct drm_connector *_connector,
>  						     mode->hdisplay, target_clock);
>  	max_dotclk *= num_joined_pipes;
>  
> +	sink_format = intel_dp_sink_format(connector, mode);
> +	output_format = intel_dp_output_format(connector, sink_format);
> +	if (num_joined_pipes == 1) {
> +		if (output_format == INTEL_OUTPUT_FORMAT_YCBCR420 &&
> +		    mode->hdisplay > 4096)

Sprinkling random hw limits all over the codebase isn't a very good
approach. I think we want some kind of skl_scaler_mode_valid() for this.
And that should probably be routed via a intel_pfit_mode_valid() to keep
the level of abstraction similar to intel_pfit_compute_config().

> +			return MODE_NO_420;
> +	}
> +
>  	if (target_clock > max_dotclk)
>  		return MODE_CLOCK_HIGH;
>  
> @@ -1467,11 +1476,8 @@ intel_dp_mode_valid(struct drm_connector *_connector,
>  					   intel_dp_mode_min_output_bpp(connector, mode));
>  
>  	if (intel_dp_has_dsc(connector)) {
> -		enum intel_output_format sink_format, output_format;
>  		int pipe_bpp;
>  
> -		sink_format = intel_dp_sink_format(connector, mode);
> -		output_format = intel_dp_output_format(connector, sink_format);
>  		/*
>  		 * TBD pass the connector BPC,
>  		 * for now U8_MAX so that max BPC on that platform would be picked
> -- 
> 2.34.1

-- 
Ville Syrjälä
Intel

  parent reply	other threads:[~2025-06-09 17:59 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-09 16:45 [PATCH] drm/i915/xe3lpd: Prune modes for YUV420 Suraj Kandpal
2025-06-09 17:20 ` Cavitt, Jonathan
2025-06-09 17:59 ` Ville Syrjälä [this message]
2025-06-11  1:10   ` Kandpal, Suraj
2025-06-09 20:12 ` ✓ CI.Patch_applied: success for " Patchwork
2025-06-09 20:12 ` ✓ CI.checkpatch: " Patchwork
2025-06-09 20:13 ` ✓ CI.KUnit: " Patchwork
2025-06-09 20:24 ` ✓ CI.Build: " Patchwork
2025-06-09 20:26 ` ✓ CI.Hooks: " Patchwork
2025-06-09 20:28 ` ✓ CI.checksparse: " Patchwork
2025-06-09 21:18 ` ✓ Xe.CI.BAT: " Patchwork
2025-06-09 22:25 ` ✗ Xe.CI.Full: failure " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2025-06-17  4:43 [PATCH] " Suraj Kandpal
2025-06-17  9:00 ` Jani Nikula
2025-06-17  9:32   ` Kandpal, Suraj
2025-06-20  6:46   ` Kandpal, Suraj
2025-06-20  9:25 Suraj Kandpal
2025-07-07  4:30 ` Nautiyal, Ankit K

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=aEchEa8p0bIKXMJa@intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=ankit.k.nautiyal@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=suraj.kandpal@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox