[PATCH 0/2] Revert patch to reject HBR3 for all eDP panels

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* [PATCH 0/2] Revert patch to reject HBR3 for all eDP panels
@ 2025-06-20 12:44 Ankit Nautiyal
  2025-06-20 12:44 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
                   ` (6 more replies)
  0 siblings, 7 replies; 25+ messages in thread
From: Ankit Nautiyal @ 2025-06-20 12:44 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: ville.syrjala, jani.nikula, Ankit Nautiyal

Revert the existing patch that rejects HBR3 for all eDP panels that
do not support TPS4. With the patch reverted, the gitlab issue#5969 [1]
will get opened again. Add a quirk to limit the rate to HBR2 for the
device mentioned in [1] and close the issue.

This series is a continuation from [2], and [3].

[1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
[2] https://lore.kernel.org/all/1cd154a09823abf6d34221ae9e02f9cd342cc3a3@intel.com/
[3] https://lore.kernel.org/all/87y0uzh5tz.fsf@intel.com/

Ankit Nautiyal (2):
  Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
  drm/i915/dp: Add device specific quirk to limit eDP rate to HBR2

 drivers/gpu/drm/i915/display/intel_dp.c     | 29 ++++++++-------------
 drivers/gpu/drm/i915/display/intel_quirks.c |  9 +++++++
 drivers/gpu/drm/i915/display/intel_quirks.h |  1 +
 3 files changed, 21 insertions(+), 18 deletions(-)

-- 
2.45.2


^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
  2025-06-20 12:44 [PATCH 0/2] Revert patch to reject HBR3 for all eDP panels Ankit Nautiyal
@ 2025-06-20 12:44 ` Ankit Nautiyal
  2025-06-23 14:42   ` Ville Syrjälä
  2025-06-20 12:44 ` [PATCH 2/2] drm/i915/dp: Add device specific quirk to limit eDP rate to HBR2 Ankit Nautiyal
                   ` (5 subsequent siblings)
  6 siblings, 1 reply; 25+ messages in thread
From: Ankit Nautiyal @ 2025-06-20 12:44 UTC (permalink / raw)
  To: intel-gfx, intel-xe
  Cc: ville.syrjala, jani.nikula, Ankit Nautiyal, Jani Nikula

This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
Commit 584cf613c24a ("drm/i915/dp: Reject HBR3 when sink doesn't support
TPS4") introduced a blanket rejection of HBR3 link rate when the sink does
not support TPS4. While this was intended to address instability observed
on certain eDP panels [1], the TPS4 requirement is only mandated for DPRX
and not for eDPRX.

This change inadvertently causes blank screens on some eDP panels that do
not advertise TPS4 support, and require HBR3 to operate at their fixed
native resolution.

Revert the commit to restore functionality for such panels.

[1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
 1 file changed, 7 insertions(+), 42 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 277b40b13948..74f331ae97ff 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -173,28 +173,10 @@ int intel_dp_link_symbol_clock(int rate)
 
 static int max_dprx_rate(struct intel_dp *intel_dp)
 {
-	struct intel_display *display = to_intel_display(intel_dp);
-	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
-	int max_rate;
-
 	if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
-		max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
-	else
-		max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
+		return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
 
-	/*
-	 * Some broken eDP sinks illegally declare support for
-	 * HBR3 without TPS4, and are unable to produce a stable
-	 * output. Reject HBR3 when TPS4 is not available.
-	 */
-	if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
-		drm_dbg_kms(display->drm,
-			    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
-			    encoder->base.base.id, encoder->base.name);
-		max_rate = 540000;
-	}
-
-	return max_rate;
+	return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
 }
 
 static int max_dprx_lane_count(struct intel_dp *intel_dp)
@@ -4270,9 +4252,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
 static void
 intel_edp_set_sink_rates(struct intel_dp *intel_dp)
 {
-	struct intel_display *display = to_intel_display(intel_dp);
-	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
-
 	intel_dp->num_sink_rates = 0;
 
 	if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
@@ -4283,7 +4262,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
 				 sink_rates, sizeof(sink_rates));
 
 		for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
-			int rate;
+			int val = le16_to_cpu(sink_rates[i]);
+
+			if (val == 0)
+				break;
 
 			/* Value read multiplied by 200kHz gives the per-lane
 			 * link rate in kHz. The source rates are, however,
@@ -4291,24 +4273,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
 			 * back to symbols is
 			 * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
 			 */
-			rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
-
-			if (rate == 0)
-				break;
-
-			/*
-			 * Some broken eDP sinks illegally declare support for
-			 * HBR3 without TPS4, and are unable to produce a stable
-			 * output. Reject HBR3 when TPS4 is not available.
-			 */
-			if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
-				drm_dbg_kms(display->drm,
-					    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
-					    encoder->base.base.id, encoder->base.name);
-				break;
-			}
-
-			intel_dp->sink_rates[i] = rate;
+			intel_dp->sink_rates[i] = (val * 200) / 10;
 		}
 		intel_dp->num_sink_rates = i;
 	}
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 25+ messages in thread

* Re: [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
  2025-06-20 12:44 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
@ 2025-06-23 14:42   ` Ville Syrjälä
  2025-06-24  4:40     ` Nautiyal, Ankit K
  0 siblings, 1 reply; 25+ messages in thread
From: Ville Syrjälä @ 2025-06-23 14:42 UTC (permalink / raw)
  To: Ankit Nautiyal; +Cc: intel-gfx, intel-xe, jani.nikula, Jani Nikula

On Fri, Jun 20, 2025 at 06:14:16PM +0530, Ankit Nautiyal wrote:
> This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
> Commit 584cf613c24a ("drm/i915/dp: Reject HBR3 when sink doesn't support
> TPS4") introduced a blanket rejection of HBR3 link rate when the sink does
> not support TPS4. While this was intended to address instability observed
> on certain eDP panels [1], the TPS4 requirement is only mandated for DPRX
> and not for eDPRX.

I see no exception given for eDP regarding this rule. The only exception
allowed is that eDP can say DPCD_REV=1.4 + TPS4_SUPPORTED=0. So I still
claim that these eDP sinks are violating the spec.

> 
> This change inadvertently causes blank screens on some eDP panels that do
> not advertise TPS4 support, and require HBR3 to operate at their fixed
> native resolution.
> 
> Revert the commit to restore functionality for such panels.
> 
> [1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Acked-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
>  1 file changed, 7 insertions(+), 42 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 277b40b13948..74f331ae97ff 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -173,28 +173,10 @@ int intel_dp_link_symbol_clock(int rate)
>  
>  static int max_dprx_rate(struct intel_dp *intel_dp)
>  {
> -	struct intel_display *display = to_intel_display(intel_dp);
> -	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> -	int max_rate;
> -
>  	if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
> -		max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
> -	else
> -		max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
> +		return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>  
> -	/*
> -	 * Some broken eDP sinks illegally declare support for
> -	 * HBR3 without TPS4, and are unable to produce a stable
> -	 * output. Reject HBR3 when TPS4 is not available.
> -	 */
> -	if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
> -		drm_dbg_kms(display->drm,
> -			    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
> -			    encoder->base.base.id, encoder->base.name);
> -		max_rate = 540000;
> -	}
> -
> -	return max_rate;
> +	return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
>  }
>  
>  static int max_dprx_lane_count(struct intel_dp *intel_dp)
> @@ -4270,9 +4252,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
>  static void
>  intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>  {
> -	struct intel_display *display = to_intel_display(intel_dp);
> -	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> -
>  	intel_dp->num_sink_rates = 0;
>  
>  	if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
> @@ -4283,7 +4262,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>  				 sink_rates, sizeof(sink_rates));
>  
>  		for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
> -			int rate;
> +			int val = le16_to_cpu(sink_rates[i]);
> +
> +			if (val == 0)
> +				break;
>  
>  			/* Value read multiplied by 200kHz gives the per-lane
>  			 * link rate in kHz. The source rates are, however,
> @@ -4291,24 +4273,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>  			 * back to symbols is
>  			 * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
>  			 */
> -			rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
> -
> -			if (rate == 0)
> -				break;
> -
> -			/*
> -			 * Some broken eDP sinks illegally declare support for
> -			 * HBR3 without TPS4, and are unable to produce a stable
> -			 * output. Reject HBR3 when TPS4 is not available.
> -			 */
> -			if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
> -				drm_dbg_kms(display->drm,
> -					    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
> -					    encoder->base.base.id, encoder->base.name);
> -				break;
> -			}
> -
> -			intel_dp->sink_rates[i] = rate;
> +			intel_dp->sink_rates[i] = (val * 200) / 10;
>  		}
>  		intel_dp->num_sink_rates = i;
>  	}
> -- 
> 2.45.2

-- 
Ville Syrjälä
Intel

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
  2025-06-23 14:42   ` Ville Syrjälä
@ 2025-06-24  4:40     ` Nautiyal, Ankit K
  2025-06-24 16:49       ` Ville Syrjälä
  0 siblings, 1 reply; 25+ messages in thread
From: Nautiyal, Ankit K @ 2025-06-24  4:40 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: intel-gfx, intel-xe, jani.nikula, Jani Nikula


On 6/23/2025 8:12 PM, Ville Syrjälä wrote:
> On Fri, Jun 20, 2025 at 06:14:16PM +0530, Ankit Nautiyal wrote:
>> This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
>> Commit 584cf613c24a ("drm/i915/dp: Reject HBR3 when sink doesn't support
>> TPS4") introduced a blanket rejection of HBR3 link rate when the sink does
>> not support TPS4. While this was intended to address instability observed
>> on certain eDP panels [1], the TPS4 requirement is only mandated for DPRX
>> and not for eDPRX.
> I see no exception given for eDP regarding this rule. The only exception
> allowed is that eDP can say DPCD_REV=1.4 + TPS4_SUPPORTED=0. So I still
> claim that these eDP sinks are violating the spec.

Hmm.. Yes the spec allows eDP sinks to report DPCD_REV=1.4 and 
TPS4_SUPPORTED, so perhaps eDPs claiming HBR3 with DPCD rev other than 
rev 1.4 and not supporting TPS4 are indeed violating the spec.

Would it make sense to add a condition that checks for DPCD_REV=1.4.

Specifically:

if DPCD_REV=1.4 and TPS4_SUPPORTED = 0, then do not prune the HBR3 rate?

Or otherway if DPCD_REV!=1.4 and TPS4_SUPPORTER = 0, prune the HBR3 rate

This way the patch need not be reverted, but modified to address 
instability issues for eDP panels that are not aligned with the spec.

That said, the gitlab issue#5969 [1] will still need another solution 
since it seems to have DPCD rev 14 as per logs:

DPCD: 14 1e 44 41 00 00 01 80 02 00 02 00 00 0b 80


Regards,

Ankit

>
>> This change inadvertently causes blank screens on some eDP panels that do
>> not advertise TPS4 support, and require HBR3 to operate at their fixed
>> native resolution.
>>
>> Revert the commit to restore functionality for such panels.
>>
>> [1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> Acked-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
>>   1 file changed, 7 insertions(+), 42 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index 277b40b13948..74f331ae97ff 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -173,28 +173,10 @@ int intel_dp_link_symbol_clock(int rate)
>>   
>>   static int max_dprx_rate(struct intel_dp *intel_dp)
>>   {
>> -	struct intel_display *display = to_intel_display(intel_dp);
>> -	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>> -	int max_rate;
>> -
>>   	if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
>> -		max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>> -	else
>> -		max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
>> +		return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>>   
>> -	/*
>> -	 * Some broken eDP sinks illegally declare support for
>> -	 * HBR3 without TPS4, and are unable to produce a stable
>> -	 * output. Reject HBR3 when TPS4 is not available.
>> -	 */
>> -	if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
>> -		drm_dbg_kms(display->drm,
>> -			    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
>> -			    encoder->base.base.id, encoder->base.name);
>> -		max_rate = 540000;
>> -	}
>> -
>> -	return max_rate;
>> +	return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
>>   }
>>   
>>   static int max_dprx_lane_count(struct intel_dp *intel_dp)
>> @@ -4270,9 +4252,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
>>   static void
>>   intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>>   {
>> -	struct intel_display *display = to_intel_display(intel_dp);
>> -	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>> -
>>   	intel_dp->num_sink_rates = 0;
>>   
>>   	if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
>> @@ -4283,7 +4262,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>>   				 sink_rates, sizeof(sink_rates));
>>   
>>   		for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
>> -			int rate;
>> +			int val = le16_to_cpu(sink_rates[i]);
>> +
>> +			if (val == 0)
>> +				break;
>>   
>>   			/* Value read multiplied by 200kHz gives the per-lane
>>   			 * link rate in kHz. The source rates are, however,
>> @@ -4291,24 +4273,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>>   			 * back to symbols is
>>   			 * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
>>   			 */
>> -			rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
>> -
>> -			if (rate == 0)
>> -				break;
>> -
>> -			/*
>> -			 * Some broken eDP sinks illegally declare support for
>> -			 * HBR3 without TPS4, and are unable to produce a stable
>> -			 * output. Reject HBR3 when TPS4 is not available.
>> -			 */
>> -			if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
>> -				drm_dbg_kms(display->drm,
>> -					    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
>> -					    encoder->base.base.id, encoder->base.name);
>> -				break;
>> -			}
>> -
>> -			intel_dp->sink_rates[i] = rate;
>> +			intel_dp->sink_rates[i] = (val * 200) / 10;
>>   		}
>>   		intel_dp->num_sink_rates = i;
>>   	}
>> -- 
>> 2.45.2

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
  2025-06-24  4:40     ` Nautiyal, Ankit K
@ 2025-06-24 16:49       ` Ville Syrjälä
  2025-06-25  8:18         ` Jani Nikula
  0 siblings, 1 reply; 25+ messages in thread
From: Ville Syrjälä @ 2025-06-24 16:49 UTC (permalink / raw)
  To: Nautiyal, Ankit K; +Cc: intel-gfx, intel-xe, jani.nikula, Jani Nikula

On Tue, Jun 24, 2025 at 10:10:53AM +0530, Nautiyal, Ankit K wrote:
> 
> On 6/23/2025 8:12 PM, Ville Syrjälä wrote:
> > On Fri, Jun 20, 2025 at 06:14:16PM +0530, Ankit Nautiyal wrote:
> >> This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
> >> Commit 584cf613c24a ("drm/i915/dp: Reject HBR3 when sink doesn't support
> >> TPS4") introduced a blanket rejection of HBR3 link rate when the sink does
> >> not support TPS4. While this was intended to address instability observed
> >> on certain eDP panels [1], the TPS4 requirement is only mandated for DPRX
> >> and not for eDPRX.
> > I see no exception given for eDP regarding this rule. The only exception
> > allowed is that eDP can say DPCD_REV=1.4 + TPS4_SUPPORTED=0. So I still
> > claim that these eDP sinks are violating the spec.
> 
> Hmm.. Yes the spec allows eDP sinks to report DPCD_REV=1.4 and 
> TPS4_SUPPORTED, so perhaps eDPs claiming HBR3 with DPCD rev other than 
> rev 1.4 and not supporting TPS4 are indeed violating the spec.
> 
> Would it make sense to add a condition that checks for DPCD_REV=1.4.
> 
> Specifically:
> 
> if DPCD_REV=1.4 and TPS4_SUPPORTED = 0, then do not prune the HBR3 rate?
> 
> Or otherway if DPCD_REV!=1.4 and TPS4_SUPPORTER = 0, prune the HBR3 rate
> 
> This way the patch need not be reverted, but modified to address 
> instability issues for eDP panels that are not aligned with the spec.
> 
> That said, the gitlab issue#5969 [1] will still need another solution 
> since it seems to have DPCD rev 14 as per logs:
> 
> DPCD: 14 1e 44 41 00 00 01 80 02 00 02 00 00 0b 80

I think we do need the quirk. But the commit message should IMO be
adjusted so that it doesn't claim that these panels are 100% legal.

-- 
Ville Syrjälä
Intel

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
  2025-06-24 16:49       ` Ville Syrjälä
@ 2025-06-25  8:18         ` Jani Nikula
  2025-06-26 11:31           ` Ville Syrjälä
  0 siblings, 1 reply; 25+ messages in thread
From: Jani Nikula @ 2025-06-25  8:18 UTC (permalink / raw)
  To: Ville Syrjälä, Nautiyal, Ankit K; +Cc: intel-gfx, intel-xe

On Tue, 24 Jun 2025, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Tue, Jun 24, 2025 at 10:10:53AM +0530, Nautiyal, Ankit K wrote:
>> 
>> On 6/23/2025 8:12 PM, Ville Syrjälä wrote:
>> > On Fri, Jun 20, 2025 at 06:14:16PM +0530, Ankit Nautiyal wrote:
>> >> This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
>> >> Commit 584cf613c24a ("drm/i915/dp: Reject HBR3 when sink doesn't support
>> >> TPS4") introduced a blanket rejection of HBR3 link rate when the sink does
>> >> not support TPS4. While this was intended to address instability observed
>> >> on certain eDP panels [1], the TPS4 requirement is only mandated for DPRX
>> >> and not for eDPRX.
>> > I see no exception given for eDP regarding this rule. The only exception
>> > allowed is that eDP can say DPCD_REV=1.4 + TPS4_SUPPORTED=0. So I still
>> > claim that these eDP sinks are violating the spec.
>> 
>> Hmm.. Yes the spec allows eDP sinks to report DPCD_REV=1.4 and 
>> TPS4_SUPPORTED, so perhaps eDPs claiming HBR3 with DPCD rev other than 
>> rev 1.4 and not supporting TPS4 are indeed violating the spec.
>> 
>> Would it make sense to add a condition that checks for DPCD_REV=1.4.
>> 
>> Specifically:
>> 
>> if DPCD_REV=1.4 and TPS4_SUPPORTED = 0, then do not prune the HBR3 rate?
>> 
>> Or otherway if DPCD_REV!=1.4 and TPS4_SUPPORTER = 0, prune the HBR3 rate
>> 
>> This way the patch need not be reverted, but modified to address 
>> instability issues for eDP panels that are not aligned with the spec.
>> 
>> That said, the gitlab issue#5969 [1] will still need another solution 
>> since it seems to have DPCD rev 14 as per logs:
>> 
>> DPCD: 14 1e 44 41 00 00 01 80 02 00 02 00 00 0b 80
>
> I think we do need the quirk. But the commit message should IMO be
> adjusted so that it doesn't claim that these panels are 100% legal.

Right. But are you okay with reverting 584cf613c24a ("drm/i915/dp:
Reject HBR3 when sink doesn't support TPS4") i.e. allowing HBR3
*without* TPS4 by default, and quirking the panel that can't handle
HBR3?

No matter what the spec says, this seems to be common. More regressing
systems are cropping up, e.g. [1].


BR,
Jani.


[1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14517




-- 
Jani Nikula, Intel

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
  2025-06-25  8:18         ` Jani Nikula
@ 2025-06-26 11:31           ` Ville Syrjälä
  0 siblings, 0 replies; 25+ messages in thread
From: Ville Syrjälä @ 2025-06-26 11:31 UTC (permalink / raw)
  To: Jani Nikula; +Cc: Nautiyal, Ankit K, intel-gfx, intel-xe

On Wed, Jun 25, 2025 at 11:18:03AM +0300, Jani Nikula wrote:
> On Tue, 24 Jun 2025, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> > On Tue, Jun 24, 2025 at 10:10:53AM +0530, Nautiyal, Ankit K wrote:
> >> 
> >> On 6/23/2025 8:12 PM, Ville Syrjälä wrote:
> >> > On Fri, Jun 20, 2025 at 06:14:16PM +0530, Ankit Nautiyal wrote:
> >> >> This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
> >> >> Commit 584cf613c24a ("drm/i915/dp: Reject HBR3 when sink doesn't support
> >> >> TPS4") introduced a blanket rejection of HBR3 link rate when the sink does
> >> >> not support TPS4. While this was intended to address instability observed
> >> >> on certain eDP panels [1], the TPS4 requirement is only mandated for DPRX
> >> >> and not for eDPRX.
> >> > I see no exception given for eDP regarding this rule. The only exception
> >> > allowed is that eDP can say DPCD_REV=1.4 + TPS4_SUPPORTED=0. So I still
> >> > claim that these eDP sinks are violating the spec.
> >> 
> >> Hmm.. Yes the spec allows eDP sinks to report DPCD_REV=1.4 and 
> >> TPS4_SUPPORTED, so perhaps eDPs claiming HBR3 with DPCD rev other than 
> >> rev 1.4 and not supporting TPS4 are indeed violating the spec.
> >> 
> >> Would it make sense to add a condition that checks for DPCD_REV=1.4.
> >> 
> >> Specifically:
> >> 
> >> if DPCD_REV=1.4 and TPS4_SUPPORTED = 0, then do not prune the HBR3 rate?
> >> 
> >> Or otherway if DPCD_REV!=1.4 and TPS4_SUPPORTER = 0, prune the HBR3 rate
> >> 
> >> This way the patch need not be reverted, but modified to address 
> >> instability issues for eDP panels that are not aligned with the spec.
> >> 
> >> That said, the gitlab issue#5969 [1] will still need another solution 
> >> since it seems to have DPCD rev 14 as per logs:
> >> 
> >> DPCD: 14 1e 44 41 00 00 01 80 02 00 02 00 00 0b 80
> >
> > I think we do need the quirk. But the commit message should IMO be
> > adjusted so that it doesn't claim that these panels are 100% legal.
> 
> Right. But are you okay with reverting 584cf613c24a ("drm/i915/dp:
> Reject HBR3 when sink doesn't support TPS4") i.e. allowing HBR3
> *without* TPS4 by default, and quirking the panel that can't handle
> HBR3?

Yeah, I think the revert+quirk for the one known bad system is the way
to go.

> 
> No matter what the spec says, this seems to be common. More regressing
> systems are cropping up, e.g. [1].
> 
> 
> BR,
> Jani.
> 
> 
> [1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14517
> 
> 
> 
> 
> -- 
> Jani Nikula, Intel

-- 
Ville Syrjälä
Intel

^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH 2/2] drm/i915/dp: Add device specific quirk to limit eDP rate to HBR2
  2025-06-20 12:44 [PATCH 0/2] Revert patch to reject HBR3 for all eDP panels Ankit Nautiyal
  2025-06-20 12:44 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
@ 2025-06-20 12:44 ` Ankit Nautiyal
  2025-06-23  9:59   ` Jani Nikula
  2025-06-20 13:23 ` ✓ CI.KUnit: success for Revert patch to reject HBR3 for all eDP panels Patchwork
                   ` (4 subsequent siblings)
  6 siblings, 1 reply; 25+ messages in thread
From: Ankit Nautiyal @ 2025-06-20 12:44 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: ville.syrjala, jani.nikula, Ankit Nautiyal

Some ICL/TGL platforms with combo PHY ports can theoretically support HBR3,
but in practice, signal integrity issues may prevent stable operation.
While some systems include a Parade PS8461 mux chip to mitigate jitter and
enable HBR3, there is no reliable way to detect its presence.
Additionally, many systems have broken or missing VBT entries, making it
unsafe to rely on VBT for link rate limits.

To address this, introduce a device specific quirk to limit the eDP link
rate to be capped at HBR2 (540000 kHz), overriding any higher advertised
rates from the sink or DPCD.

Currently the quirk is added for Dell XPS 13 7390 2-in-1 which is
reported in gitlab issue#5969.

Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c     | 42 +++++++++++++++++----
 drivers/gpu/drm/i915/display/intel_quirks.c |  9 +++++
 drivers/gpu/drm/i915/display/intel_quirks.h |  1 +
 3 files changed, 45 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 74f331ae97ff..4441fef4f853 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -173,10 +173,25 @@ int intel_dp_link_symbol_clock(int rate)
 
 static int max_dprx_rate(struct intel_dp *intel_dp)
 {
+	struct intel_display *display = to_intel_display(intel_dp);
+	int max_rate;
+
 	if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
-		return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
+		max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
+	else
+		max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
+
+	/*
+	 * Some platforms with combo PHY ports may not reliably support HBR3
+	 * due to signal integrity limitations, despite advertising it.
+	 * Cap the link rate to HBR2 to avoid unstable configurations for the
+	 * known machines.
+	 */
+	if (max_rate >= 810000 &&
+	    intel_has_quirk(display, QUIRK_EDP_LIMIT_RATE_HBR2))
+		max_rate = 540000;
 
-	return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
+	return max_rate;
 }
 
 static int max_dprx_lane_count(struct intel_dp *intel_dp)
@@ -4252,6 +4267,8 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
 static void
 intel_edp_set_sink_rates(struct intel_dp *intel_dp)
 {
+	struct intel_display *display = to_intel_display(intel_dp);
+
 	intel_dp->num_sink_rates = 0;
 
 	if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
@@ -4262,10 +4279,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
 				 sink_rates, sizeof(sink_rates));
 
 		for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
-			int val = le16_to_cpu(sink_rates[i]);
-
-			if (val == 0)
-				break;
+			int rate;
 
 			/* Value read multiplied by 200kHz gives the per-lane
 			 * link rate in kHz. The source rates are, however,
@@ -4273,7 +4287,21 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
 			 * back to symbols is
 			 * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
 			 */
-			intel_dp->sink_rates[i] = (val * 200) / 10;
+			rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
+
+			if (rate == 0)
+				break;
+
+			/*
+			 * Some platforms cannot reliably drive HBR3 rates due to PHY limitations,
+			 * even if the sink advertises support. Reject any sink rates above HBR2 on
+			 * the known machines for stable output.
+			 */
+			if (rate >= 810000 &&
+			    intel_has_quirk(display, QUIRK_EDP_LIMIT_RATE_HBR2))
+				break;
+
+			intel_dp->sink_rates[i] = rate;
 		}
 		intel_dp->num_sink_rates = i;
 	}
diff --git a/drivers/gpu/drm/i915/display/intel_quirks.c b/drivers/gpu/drm/i915/display/intel_quirks.c
index a32fae510ed2..d2e16b79d6be 100644
--- a/drivers/gpu/drm/i915/display/intel_quirks.c
+++ b/drivers/gpu/drm/i915/display/intel_quirks.c
@@ -80,6 +80,12 @@ static void quirk_fw_sync_len(struct intel_dp *intel_dp)
 	drm_info(display->drm, "Applying Fast Wake sync pulse count quirk\n");
 }
 
+static void quirk_edp_limit_rate_hbr2(struct intel_display *display)
+{
+	intel_set_quirk(display, QUIRK_EDP_LIMIT_RATE_HBR2);
+	drm_info(display->drm, "Applying eDP Limit rate to HBR2 quirk\n");
+}
+
 struct intel_quirk {
 	int device;
 	int subsystem_vendor;
@@ -231,6 +237,9 @@ static struct intel_quirk intel_quirks[] = {
 	{ 0x3184, 0x1019, 0xa94d, quirk_increase_ddi_disabled_time },
 	/* HP Notebook - 14-r206nv */
 	{ 0x0f31, 0x103c, 0x220f, quirk_invert_brightness },
+
+	/* Dell XPS 13 7390 2-in-1 */
+	{ 0x8a12, 0x1028, 0x08b0, quirk_edp_limit_rate_hbr2 },
 };
 
 static const struct intel_dpcd_quirk intel_dpcd_quirks[] = {
diff --git a/drivers/gpu/drm/i915/display/intel_quirks.h b/drivers/gpu/drm/i915/display/intel_quirks.h
index cafdebda7535..06da0e286c67 100644
--- a/drivers/gpu/drm/i915/display/intel_quirks.h
+++ b/drivers/gpu/drm/i915/display/intel_quirks.h
@@ -20,6 +20,7 @@ enum intel_quirk_id {
 	QUIRK_LVDS_SSC_DISABLE,
 	QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK,
 	QUIRK_FW_SYNC_LEN,
+	QUIRK_EDP_LIMIT_RATE_HBR2,
 };
 
 void intel_init_quirks(struct intel_display *display);
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 25+ messages in thread

* Re: [PATCH 2/2] drm/i915/dp: Add device specific quirk to limit eDP rate to HBR2
  2025-06-20 12:44 ` [PATCH 2/2] drm/i915/dp: Add device specific quirk to limit eDP rate to HBR2 Ankit Nautiyal
@ 2025-06-23  9:59   ` Jani Nikula
  2025-06-24  7:32     ` Nautiyal, Ankit K
  0 siblings, 1 reply; 25+ messages in thread
From: Jani Nikula @ 2025-06-23  9:59 UTC (permalink / raw)
  To: Ankit Nautiyal, intel-gfx, intel-xe; +Cc: ville.syrjala, Ankit Nautiyal

On Fri, 20 Jun 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> Some ICL/TGL platforms with combo PHY ports can theoretically support HBR3,
> but in practice, signal integrity issues may prevent stable operation.
> While some systems include a Parade PS8461 mux chip to mitigate jitter and
> enable HBR3, there is no reliable way to detect its presence.
> Additionally, many systems have broken or missing VBT entries, making it
> unsafe to rely on VBT for link rate limits.
>
> To address this, introduce a device specific quirk to limit the eDP link
> rate to be capped at HBR2 (540000 kHz), overriding any higher advertised
> rates from the sink or DPCD.
>
> Currently the quirk is added for Dell XPS 13 7390 2-in-1 which is
> reported in gitlab issue#5969.
>
> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c     | 42 +++++++++++++++++----
>  drivers/gpu/drm/i915/display/intel_quirks.c |  9 +++++
>  drivers/gpu/drm/i915/display/intel_quirks.h |  1 +
>  3 files changed, 45 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 74f331ae97ff..4441fef4f853 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -173,10 +173,25 @@ int intel_dp_link_symbol_clock(int rate)
>  
>  static int max_dprx_rate(struct intel_dp *intel_dp)
>  {
> +	struct intel_display *display = to_intel_display(intel_dp);
> +	int max_rate;
> +
>  	if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
> -		return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
> +		max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
> +	else
> +		max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);

The way these lines go back and forth with the revert and the quirk, I'm
actually wondering if it isn't cleanest to just join the two changes
into one i.e. fix the commit, that's it. What do you think?

> +
> +	/*
> +	 * Some platforms with combo PHY ports may not reliably support HBR3
> +	 * due to signal integrity limitations, despite advertising it.
> +	 * Cap the link rate to HBR2 to avoid unstable configurations for the
> +	 * known machines.
> +	 */
> +	if (max_rate >= 810000 &&
> +	    intel_has_quirk(display, QUIRK_EDP_LIMIT_RATE_HBR2))
> +		max_rate = 540000;

It's misleading to call the quirk QUIRK_EDP_LIMIT_RATE_HBR2 when you in
fact apply it to all DP not just eDP. Maybe it should be just
QUIRK_DP_LIMIT_RATE_HBR2?

And you don't really need to check for max_rate >= something here. It's
really just:

	if (intel_has_quirk(display, QUIRK_DP_LIMIT_RATE_HBR2))
		max_rate = min(max_rate, 540000);

Anyway, I think the overall result is okay.


BR,
Jani.

>  
> -	return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
> +	return max_rate;
>  }
>  
>  static int max_dprx_lane_count(struct intel_dp *intel_dp)
> @@ -4252,6 +4267,8 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
>  static void
>  intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>  {
> +	struct intel_display *display = to_intel_display(intel_dp);
> +
>  	intel_dp->num_sink_rates = 0;
>  
>  	if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
> @@ -4262,10 +4279,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>  				 sink_rates, sizeof(sink_rates));
>  
>  		for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
> -			int val = le16_to_cpu(sink_rates[i]);
> -
> -			if (val == 0)
> -				break;
> +			int rate;
>  
>  			/* Value read multiplied by 200kHz gives the per-lane
>  			 * link rate in kHz. The source rates are, however,
> @@ -4273,7 +4287,21 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>  			 * back to symbols is
>  			 * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
>  			 */
> -			intel_dp->sink_rates[i] = (val * 200) / 10;
> +			rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
> +
> +			if (rate == 0)
> +				break;
> +
> +			/*
> +			 * Some platforms cannot reliably drive HBR3 rates due to PHY limitations,
> +			 * even if the sink advertises support. Reject any sink rates above HBR2 on
> +			 * the known machines for stable output.
> +			 */
> +			if (rate >= 810000 &&
> +			    intel_has_quirk(display, QUIRK_EDP_LIMIT_RATE_HBR2))
> +				break;
> +
> +			intel_dp->sink_rates[i] = rate;
>  		}
>  		intel_dp->num_sink_rates = i;
>  	}
> diff --git a/drivers/gpu/drm/i915/display/intel_quirks.c b/drivers/gpu/drm/i915/display/intel_quirks.c
> index a32fae510ed2..d2e16b79d6be 100644
> --- a/drivers/gpu/drm/i915/display/intel_quirks.c
> +++ b/drivers/gpu/drm/i915/display/intel_quirks.c
> @@ -80,6 +80,12 @@ static void quirk_fw_sync_len(struct intel_dp *intel_dp)
>  	drm_info(display->drm, "Applying Fast Wake sync pulse count quirk\n");
>  }
>  
> +static void quirk_edp_limit_rate_hbr2(struct intel_display *display)
> +{
> +	intel_set_quirk(display, QUIRK_EDP_LIMIT_RATE_HBR2);
> +	drm_info(display->drm, "Applying eDP Limit rate to HBR2 quirk\n");
> +}
> +
>  struct intel_quirk {
>  	int device;
>  	int subsystem_vendor;
> @@ -231,6 +237,9 @@ static struct intel_quirk intel_quirks[] = {
>  	{ 0x3184, 0x1019, 0xa94d, quirk_increase_ddi_disabled_time },
>  	/* HP Notebook - 14-r206nv */
>  	{ 0x0f31, 0x103c, 0x220f, quirk_invert_brightness },
> +
> +	/* Dell XPS 13 7390 2-in-1 */
> +	{ 0x8a12, 0x1028, 0x08b0, quirk_edp_limit_rate_hbr2 },
>  };
>  
>  static const struct intel_dpcd_quirk intel_dpcd_quirks[] = {
> diff --git a/drivers/gpu/drm/i915/display/intel_quirks.h b/drivers/gpu/drm/i915/display/intel_quirks.h
> index cafdebda7535..06da0e286c67 100644
> --- a/drivers/gpu/drm/i915/display/intel_quirks.h
> +++ b/drivers/gpu/drm/i915/display/intel_quirks.h
> @@ -20,6 +20,7 @@ enum intel_quirk_id {
>  	QUIRK_LVDS_SSC_DISABLE,
>  	QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK,
>  	QUIRK_FW_SYNC_LEN,
> +	QUIRK_EDP_LIMIT_RATE_HBR2,
>  };
>  
>  void intel_init_quirks(struct intel_display *display);

-- 
Jani Nikula, Intel

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 2/2] drm/i915/dp: Add device specific quirk to limit eDP rate to HBR2
  2025-06-23  9:59   ` Jani Nikula
@ 2025-06-24  7:32     ` Nautiyal, Ankit K
  0 siblings, 0 replies; 25+ messages in thread
From: Nautiyal, Ankit K @ 2025-06-24  7:32 UTC (permalink / raw)
  To: Jani Nikula, intel-gfx, intel-xe; +Cc: ville.syrjala


On 6/23/2025 3:29 PM, Jani Nikula wrote:
> On Fri, 20 Jun 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>> Some ICL/TGL platforms with combo PHY ports can theoretically support HBR3,
>> but in practice, signal integrity issues may prevent stable operation.
>> While some systems include a Parade PS8461 mux chip to mitigate jitter and
>> enable HBR3, there is no reliable way to detect its presence.
>> Additionally, many systems have broken or missing VBT entries, making it
>> unsafe to rely on VBT for link rate limits.
>>
>> To address this, introduce a device specific quirk to limit the eDP link
>> rate to be capped at HBR2 (540000 kHz), overriding any higher advertised
>> rates from the sink or DPCD.
>>
>> Currently the quirk is added for Dell XPS 13 7390 2-in-1 which is
>> reported in gitlab issue#5969.
>>
>> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_dp.c     | 42 +++++++++++++++++----
>>   drivers/gpu/drm/i915/display/intel_quirks.c |  9 +++++
>>   drivers/gpu/drm/i915/display/intel_quirks.h |  1 +
>>   3 files changed, 45 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index 74f331ae97ff..4441fef4f853 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -173,10 +173,25 @@ int intel_dp_link_symbol_clock(int rate)
>>   
>>   static int max_dprx_rate(struct intel_dp *intel_dp)
>>   {
>> +	struct intel_display *display = to_intel_display(intel_dp);
>> +	int max_rate;
>> +
>>   	if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
>> -		return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>> +		max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>> +	else
>> +		max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
> The way these lines go back and forth with the revert and the quirk, I'm
> actually wondering if it isn't cleanest to just join the two changes
> into one i.e. fix the commit, that's it. What do you think?

Yes I was thinking about the same, but as per discussion on patch#1, we 
might not require a revert.


>
>> +
>> +	/*
>> +	 * Some platforms with combo PHY ports may not reliably support HBR3
>> +	 * due to signal integrity limitations, despite advertising it.
>> +	 * Cap the link rate to HBR2 to avoid unstable configurations for the
>> +	 * known machines.
>> +	 */
>> +	if (max_rate >= 810000 &&
>> +	    intel_has_quirk(display, QUIRK_EDP_LIMIT_RATE_HBR2))
>> +		max_rate = 540000;
> It's misleading to call the quirk QUIRK_EDP_LIMIT_RATE_HBR2 when you in
> fact apply it to all DP not just eDP. Maybe it should be just
> QUIRK_DP_LIMIT_RATE_HBR2?

I missed to add check for eDP, intention was to only apply the quirk for 
eDP.

Will add the missing check here and also in comments.

>
> And you don't really need to check for max_rate >= something here. It's
> really just:
>
> 	if (intel_has_quirk(display, QUIRK_DP_LIMIT_RATE_HBR2))
> 		max_rate = min(max_rate, 540000);

Agreed, this indeed is better.


Thanks for the suggested changes, I will add these in the next revision.

Regards,

Ankit


>
> Anyway, I think the overall result is okay.
>
>
> BR,
> Jani.
>
>>   
>> -	return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
>> +	return max_rate;
>>   }
>>   
>>   static int max_dprx_lane_count(struct intel_dp *intel_dp)
>> @@ -4252,6 +4267,8 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
>>   static void
>>   intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>>   {
>> +	struct intel_display *display = to_intel_display(intel_dp);
>> +
>>   	intel_dp->num_sink_rates = 0;
>>   
>>   	if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
>> @@ -4262,10 +4279,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>>   				 sink_rates, sizeof(sink_rates));
>>   
>>   		for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
>> -			int val = le16_to_cpu(sink_rates[i]);
>> -
>> -			if (val == 0)
>> -				break;
>> +			int rate;
>>   
>>   			/* Value read multiplied by 200kHz gives the per-lane
>>   			 * link rate in kHz. The source rates are, however,
>> @@ -4273,7 +4287,21 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>>   			 * back to symbols is
>>   			 * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
>>   			 */
>> -			intel_dp->sink_rates[i] = (val * 200) / 10;
>> +			rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
>> +
>> +			if (rate == 0)
>> +				break;
>> +
>> +			/*
>> +			 * Some platforms cannot reliably drive HBR3 rates due to PHY limitations,
>> +			 * even if the sink advertises support. Reject any sink rates above HBR2 on
>> +			 * the known machines for stable output.
>> +			 */
>> +			if (rate >= 810000 &&
>> +			    intel_has_quirk(display, QUIRK_EDP_LIMIT_RATE_HBR2))
>> +				break;
>> +
>> +			intel_dp->sink_rates[i] = rate;
>>   		}
>>   		intel_dp->num_sink_rates = i;
>>   	}
>> diff --git a/drivers/gpu/drm/i915/display/intel_quirks.c b/drivers/gpu/drm/i915/display/intel_quirks.c
>> index a32fae510ed2..d2e16b79d6be 100644
>> --- a/drivers/gpu/drm/i915/display/intel_quirks.c
>> +++ b/drivers/gpu/drm/i915/display/intel_quirks.c
>> @@ -80,6 +80,12 @@ static void quirk_fw_sync_len(struct intel_dp *intel_dp)
>>   	drm_info(display->drm, "Applying Fast Wake sync pulse count quirk\n");
>>   }
>>   
>> +static void quirk_edp_limit_rate_hbr2(struct intel_display *display)
>> +{
>> +	intel_set_quirk(display, QUIRK_EDP_LIMIT_RATE_HBR2);
>> +	drm_info(display->drm, "Applying eDP Limit rate to HBR2 quirk\n");
>> +}
>> +
>>   struct intel_quirk {
>>   	int device;
>>   	int subsystem_vendor;
>> @@ -231,6 +237,9 @@ static struct intel_quirk intel_quirks[] = {
>>   	{ 0x3184, 0x1019, 0xa94d, quirk_increase_ddi_disabled_time },
>>   	/* HP Notebook - 14-r206nv */
>>   	{ 0x0f31, 0x103c, 0x220f, quirk_invert_brightness },
>> +
>> +	/* Dell XPS 13 7390 2-in-1 */
>> +	{ 0x8a12, 0x1028, 0x08b0, quirk_edp_limit_rate_hbr2 },
>>   };
>>   
>>   static const struct intel_dpcd_quirk intel_dpcd_quirks[] = {
>> diff --git a/drivers/gpu/drm/i915/display/intel_quirks.h b/drivers/gpu/drm/i915/display/intel_quirks.h
>> index cafdebda7535..06da0e286c67 100644
>> --- a/drivers/gpu/drm/i915/display/intel_quirks.h
>> +++ b/drivers/gpu/drm/i915/display/intel_quirks.h
>> @@ -20,6 +20,7 @@ enum intel_quirk_id {
>>   	QUIRK_LVDS_SSC_DISABLE,
>>   	QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK,
>>   	QUIRK_FW_SYNC_LEN,
>> +	QUIRK_EDP_LIMIT_RATE_HBR2,
>>   };
>>   
>>   void intel_init_quirks(struct intel_display *display);

^ permalink raw reply	[flat|nested] 25+ messages in thread

* ✓ CI.KUnit: success for Revert patch to reject HBR3 for all eDP panels
  2025-06-20 12:44 [PATCH 0/2] Revert patch to reject HBR3 for all eDP panels Ankit Nautiyal
  2025-06-20 12:44 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
  2025-06-20 12:44 ` [PATCH 2/2] drm/i915/dp: Add device specific quirk to limit eDP rate to HBR2 Ankit Nautiyal
@ 2025-06-20 13:23 ` Patchwork
  2025-06-20 23:47 ` ✓ Xe.CI.Full: " Patchwork
                   ` (3 subsequent siblings)
  6 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2025-06-20 13:23 UTC (permalink / raw)
  To: Ankit Nautiyal; +Cc: intel-xe

== Series Details ==

Series: Revert patch to reject HBR3 for all eDP panels
URL   : https://patchwork.freedesktop.org/series/150568/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[13:22:15] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:22:19] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:22:46] Starting KUnit Kernel (1/1)...
[13:22:46] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:22:46] ================== guc_buf (11 subtests) ===================
[13:22:46] [PASSED] test_smallest
[13:22:46] [PASSED] test_largest
[13:22:46] [PASSED] test_granular
[13:22:46] [PASSED] test_unique
[13:22:46] [PASSED] test_overlap
[13:22:46] [PASSED] test_reusable
[13:22:46] [PASSED] test_too_big
[13:22:46] [PASSED] test_flush
[13:22:46] [PASSED] test_lookup
[13:22:46] [PASSED] test_data
[13:22:46] [PASSED] test_class
[13:22:46] ===================== [PASSED] guc_buf =====================
[13:22:46] =================== guc_dbm (7 subtests) ===================
[13:22:46] [PASSED] test_empty
[13:22:46] [PASSED] test_default
[13:22:46] ======================== test_size  ========================
[13:22:46] [PASSED] 4
[13:22:46] [PASSED] 8
[13:22:46] [PASSED] 32
[13:22:46] [PASSED] 256
[13:22:46] ==================== [PASSED] test_size ====================
[13:22:46] ======================= test_reuse  ========================
[13:22:46] [PASSED] 4
[13:22:46] [PASSED] 8
[13:22:46] [PASSED] 32
[13:22:46] [PASSED] 256
[13:22:46] =================== [PASSED] test_reuse ====================
[13:22:46] =================== test_range_overlap  ====================
[13:22:46] [PASSED] 4
[13:22:46] [PASSED] 8
[13:22:46] [PASSED] 32
[13:22:46] [PASSED] 256
[13:22:46] =============== [PASSED] test_range_overlap ================
[13:22:46] =================== test_range_compact  ====================
[13:22:46] [PASSED] 4
[13:22:46] [PASSED] 8
[13:22:46] [PASSED] 32
[13:22:46] [PASSED] 256
[13:22:46] =============== [PASSED] test_range_compact ================
[13:22:46] ==================== test_range_spare  =====================
[13:22:46] [PASSED] 4
[13:22:46] [PASSED] 8
[13:22:46] [PASSED] 32
[13:22:46] [PASSED] 256
[13:22:46] ================ [PASSED] test_range_spare =================
[13:22:46] ===================== [PASSED] guc_dbm =====================
[13:22:46] =================== guc_idm (6 subtests) ===================
[13:22:46] [PASSED] bad_init
[13:22:46] [PASSED] no_init
[13:22:46] [PASSED] init_fini
[13:22:46] [PASSED] check_used
[13:22:46] [PASSED] check_quota
[13:22:46] [PASSED] check_all
[13:22:46] ===================== [PASSED] guc_idm =====================
[13:22:46] ================== no_relay (3 subtests) ===================
[13:22:46] [PASSED] xe_drops_guc2pf_if_not_ready
[13:22:46] [PASSED] xe_drops_guc2vf_if_not_ready
[13:22:46] [PASSED] xe_rejects_send_if_not_ready
[13:22:46] ==================== [PASSED] no_relay =====================
[13:22:46] ================== pf_relay (14 subtests) ==================
[13:22:46] [PASSED] pf_rejects_guc2pf_too_short
[13:22:46] [PASSED] pf_rejects_guc2pf_too_long
[13:22:46] [PASSED] pf_rejects_guc2pf_no_payload
[13:22:46] [PASSED] pf_fails_no_payload
[13:22:46] [PASSED] pf_fails_bad_origin
[13:22:46] [PASSED] pf_fails_bad_type
[13:22:46] [PASSED] pf_txn_reports_error
[13:22:46] [PASSED] pf_txn_sends_pf2guc
[13:22:46] [PASSED] pf_sends_pf2guc
[13:22:46] [SKIPPED] pf_loopback_nop
[13:22:46] [SKIPPED] pf_loopback_echo
[13:22:46] [SKIPPED] pf_loopback_fail
[13:22:46] [SKIPPED] pf_loopback_busy
[13:22:46] [SKIPPED] pf_loopback_retry
[13:22:46] ==================== [PASSED] pf_relay =====================
[13:22:46] ================== vf_relay (3 subtests) ===================
[13:22:46] [PASSED] vf_rejects_guc2vf_too_short
[13:22:46] [PASSED] vf_rejects_guc2vf_too_long
[13:22:46] [PASSED] vf_rejects_guc2vf_no_payload
[13:22:46] ==================== [PASSED] vf_relay =====================
[13:22:46] ================= pf_service (11 subtests) =================
[13:22:46] [PASSED] pf_negotiate_any
[13:22:46] [PASSED] pf_negotiate_base_match
[13:22:46] [PASSED] pf_negotiate_base_newer
[13:22:46] [PASSED] pf_negotiate_base_next
[13:22:46] [SKIPPED] pf_negotiate_base_older
[13:22:46] [PASSED] pf_negotiate_base_prev
[13:22:46] [PASSED] pf_negotiate_latest_match
[13:22:46] [PASSED] pf_negotiate_latest_newer
[13:22:46] [PASSED] pf_negotiate_latest_next
[13:22:46] [SKIPPED] pf_negotiate_latest_older
[13:22:46] [SKIPPED] pf_negotiate_latest_prev
[13:22:46] =================== [PASSED] pf_service ====================
[13:22:46] ===================== lmtt (1 subtest) =====================
[13:22:46] ======================== test_ops  =========================
[13:22:46] [PASSED] 2-level
[13:22:46] [PASSED] multi-level
[13:22:46] ==================== [PASSED] test_ops =====================
[13:22:46] ====================== [PASSED] lmtt =======================
[13:22:46] =================== xe_mocs (2 subtests) ===================
[13:22:46] ================ xe_live_mocs_kernel_kunit  ================
[13:22:46] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[13:22:46] ================ xe_live_mocs_reset_kunit  =================
[13:22:46] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[13:22:46] ==================== [SKIPPED] xe_mocs =====================
[13:22:46] ================= xe_migrate (2 subtests) ==================
[13:22:46] ================= xe_migrate_sanity_kunit  =================
[13:22:46] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[13:22:46] ================== xe_validate_ccs_kunit  ==================
[13:22:46] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[13:22:46] =================== [SKIPPED] xe_migrate ===================
[13:22:46] ================== xe_dma_buf (1 subtest) ==================
[13:22:46] ==================== xe_dma_buf_kunit  =====================
[13:22:46] ================ [SKIPPED] xe_dma_buf_kunit ================
[13:22:46] =================== [SKIPPED] xe_dma_buf ===================
[13:22:46] ================= xe_bo_shrink (1 subtest) =================
[13:22:46] =================== xe_bo_shrink_kunit  ====================
[13:22:46] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[13:22:46] ================== [SKIPPED] xe_bo_shrink ==================
[13:22:46] ==================== xe_bo (2 subtests) ====================
[13:22:46] ================== xe_ccs_migrate_kunit  ===================
[13:22:46] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[13:22:46] ==================== xe_bo_evict_kunit  ====================
[13:22:46] =============== [SKIPPED] xe_bo_evict_kunit ================
[13:22:46] ===================== [SKIPPED] xe_bo ======================
[13:22:46] ==================== args (11 subtests) ====================
[13:22:46] [PASSED] count_args_test
[13:22:46] [PASSED] call_args_example
[13:22:46] [PASSED] call_args_test
[13:22:46] [PASSED] drop_first_arg_example
[13:22:46] [PASSED] drop_first_arg_test
[13:22:46] [PASSED] first_arg_example
[13:22:46] [PASSED] first_arg_test
[13:22:46] [PASSED] last_arg_example
[13:22:46] [PASSED] last_arg_test
[13:22:46] [PASSED] pick_arg_example
[13:22:46] [PASSED] sep_comma_example
[13:22:46] ====================== [PASSED] args =======================
[13:22:46] =================== xe_pci (2 subtests) ====================
[13:22:46] ==================== check_graphics_ip  ====================
[13:22:46] [PASSED] 12.70 Xe_LPG
[13:22:46] [PASSED] 12.71 Xe_LPG
[13:22:46] [PASSED] 12.74 Xe_LPG+
[13:22:46] [PASSED] 20.01 Xe2_HPG
[13:22:46] [PASSED] 20.02 Xe2_HPG
[13:22:46] [PASSED] 20.04 Xe2_LPG
[13:22:46] [PASSED] 30.00 Xe3_LPG
[13:22:46] [PASSED] 30.01 Xe3_LPG
[13:22:46] [PASSED] 30.03 Xe3_LPG
[13:22:46] ================ [PASSED] check_graphics_ip ================
[13:22:46] ===================== check_media_ip  ======================
[13:22:46] [PASSED] 13.00 Xe_LPM+
[13:22:46] [PASSED] 13.01 Xe2_HPM
[13:22:46] [PASSED] 20.00 Xe2_LPM
[13:22:46] [PASSED] 30.00 Xe3_LPM
[13:22:46] [PASSED] 30.02 Xe3_LPM
stty: 'standard input': Inappropriate ioctl for device
[13:22:46] ================= [PASSED] check_media_ip ==================
[13:22:46] ===================== [PASSED] xe_pci ======================
[13:22:46] =================== xe_rtp (2 subtests) ====================
[13:22:46] =============== xe_rtp_process_to_sr_tests  ================
[13:22:46] [PASSED] coalesce-same-reg
[13:22:46] [PASSED] no-match-no-add
[13:22:46] [PASSED] match-or
[13:22:46] [PASSED] match-or-xfail
[13:22:46] [PASSED] no-match-no-add-multiple-rules
[13:22:46] [PASSED] two-regs-two-entries
[13:22:46] [PASSED] clr-one-set-other
[13:22:46] [PASSED] set-field
[13:22:46] [PASSED] conflict-duplicate
[13:22:46] [PASSED] conflict-not-disjoint
[13:22:46] [PASSED] conflict-reg-type
[13:22:46] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[13:22:46] ================== xe_rtp_process_tests  ===================
[13:22:46] [PASSED] active1
[13:22:46] [PASSED] active2
[13:22:46] [PASSED] active-inactive
[13:22:46] [PASSED] inactive-active
[13:22:46] [PASSED] inactive-1st_or_active-inactive
[13:22:46] [PASSED] inactive-2nd_or_active-inactive
[13:22:46] [PASSED] inactive-last_or_active-inactive
[13:22:46] [PASSED] inactive-no_or_active-inactive
[13:22:46] ============== [PASSED] xe_rtp_process_tests ===============
[13:22:46] ===================== [PASSED] xe_rtp ======================
[13:22:46] ==================== xe_wa (1 subtest) =====================
[13:22:46] ======================== xe_wa_gt  =========================
[13:22:46] [PASSED] TIGERLAKE (B0)
[13:22:46] [PASSED] DG1 (A0)
[13:22:46] [PASSED] DG1 (B0)
[13:22:46] [PASSED] ALDERLAKE_S (A0)
[13:22:46] [PASSED] ALDERLAKE_S (B0)
[13:22:46] [PASSED] ALDERLAKE_S (C0)
[13:22:46] [PASSED] ALDERLAKE_S (D0)
[13:22:46] [PASSED] ALDERLAKE_P (A0)
[13:22:46] [PASSED] ALDERLAKE_P (B0)
[13:22:46] [PASSED] ALDERLAKE_P (C0)
[13:22:46] [PASSED] ALDERLAKE_S_RPLS (D0)
[13:22:46] [PASSED] ALDERLAKE_P_RPLU (E0)
[13:22:46] [PASSED] DG2_G10 (C0)
[13:22:46] [PASSED] DG2_G11 (B1)
[13:22:46] [PASSED] DG2_G12 (A1)
[13:22:46] [PASSED] METEORLAKE (g:A0, m:A0)
[13:22:46] [PASSED] METEORLAKE (g:A0, m:A0)
[13:22:46] [PASSED] METEORLAKE (g:A0, m:A0)
[13:22:46] [PASSED] LUNARLAKE (g:A0, m:A0)
[13:22:46] [PASSED] LUNARLAKE (g:B0, m:A0)
[13:22:46] [PASSED] BATTLEMAGE (g:A0, m:A1)
[13:22:46] ==================== [PASSED] xe_wa_gt =====================
[13:22:46] ====================== [PASSED] xe_wa ======================
[13:22:46] ============================================================
[13:22:46] Testing complete. Ran 145 tests: passed: 129, skipped: 16
[13:22:46] Elapsed time: 31.168s total, 4.180s configuring, 26.670s building, 0.305s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[13:22:46] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:22:48] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:23:09] Starting KUnit Kernel (1/1)...
[13:23:09] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:23:09] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[13:23:09] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[13:23:09] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[13:23:09] =========== drm_validate_clone_mode (2 subtests) ===========
[13:23:09] ============== drm_test_check_in_clone_mode  ===============
[13:23:09] [PASSED] in_clone_mode
[13:23:09] [PASSED] not_in_clone_mode
[13:23:09] ========== [PASSED] drm_test_check_in_clone_mode ===========
[13:23:09] =============== drm_test_check_valid_clones  ===============
[13:23:09] [PASSED] not_in_clone_mode
[13:23:09] [PASSED] valid_clone
[13:23:09] [PASSED] invalid_clone
[13:23:09] =========== [PASSED] drm_test_check_valid_clones ===========
[13:23:09] ============= [PASSED] drm_validate_clone_mode =============
[13:23:09] ============= drm_validate_modeset (1 subtest) =============
[13:23:09] [PASSED] drm_test_check_connector_changed_modeset
[13:23:09] ============== [PASSED] drm_validate_modeset ===============
[13:23:09] ====== drm_test_bridge_get_current_state (2 subtests) ======
[13:23:09] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[13:23:09] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[13:23:09] ======== [PASSED] drm_test_bridge_get_current_state ========
[13:23:09] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[13:23:09] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[13:23:09] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[13:23:09] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[13:23:09] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[13:23:09] ============== drm_bridge_alloc (2 subtests) ===============
[13:23:09] [PASSED] drm_test_drm_bridge_alloc_basic
[13:23:09] [PASSED] drm_test_drm_bridge_alloc_get_put
[13:23:09] ================ [PASSED] drm_bridge_alloc =================
[13:23:09] ================== drm_buddy (7 subtests) ==================
[13:23:09] [PASSED] drm_test_buddy_alloc_limit
[13:23:09] [PASSED] drm_test_buddy_alloc_optimistic
[13:23:09] [PASSED] drm_test_buddy_alloc_pessimistic
[13:23:09] [PASSED] drm_test_buddy_alloc_pathological
[13:23:09] [PASSED] drm_test_buddy_alloc_contiguous
[13:23:09] [PASSED] drm_test_buddy_alloc_clear
[13:23:09] [PASSED] drm_test_buddy_alloc_range_bias
[13:23:09] ==================== [PASSED] drm_buddy ====================
[13:23:09] ============= drm_cmdline_parser (40 subtests) =============
[13:23:09] [PASSED] drm_test_cmdline_force_d_only
[13:23:09] [PASSED] drm_test_cmdline_force_D_only_dvi
[13:23:09] [PASSED] drm_test_cmdline_force_D_only_hdmi
[13:23:09] [PASSED] drm_test_cmdline_force_D_only_not_digital
[13:23:09] [PASSED] drm_test_cmdline_force_e_only
[13:23:09] [PASSED] drm_test_cmdline_res
[13:23:09] [PASSED] drm_test_cmdline_res_vesa
[13:23:09] [PASSED] drm_test_cmdline_res_vesa_rblank
[13:23:09] [PASSED] drm_test_cmdline_res_rblank
[13:23:09] [PASSED] drm_test_cmdline_res_bpp
[13:23:09] [PASSED] drm_test_cmdline_res_refresh
[13:23:09] [PASSED] drm_test_cmdline_res_bpp_refresh
[13:23:09] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[13:23:09] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[13:23:09] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[13:23:09] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[13:23:09] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[13:23:09] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[13:23:09] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[13:23:09] [PASSED] drm_test_cmdline_res_margins_force_on
[13:23:09] [PASSED] drm_test_cmdline_res_vesa_margins
[13:23:09] [PASSED] drm_test_cmdline_name
[13:23:09] [PASSED] drm_test_cmdline_name_bpp
[13:23:09] [PASSED] drm_test_cmdline_name_option
[13:23:09] [PASSED] drm_test_cmdline_name_bpp_option
[13:23:09] [PASSED] drm_test_cmdline_rotate_0
[13:23:09] [PASSED] drm_test_cmdline_rotate_90
[13:23:09] [PASSED] drm_test_cmdline_rotate_180
[13:23:09] [PASSED] drm_test_cmdline_rotate_270
[13:23:09] [PASSED] drm_test_cmdline_hmirror
[13:23:09] [PASSED] drm_test_cmdline_vmirror
[13:23:09] [PASSED] drm_test_cmdline_margin_options
[13:23:09] [PASSED] drm_test_cmdline_multiple_options
[13:23:09] [PASSED] drm_test_cmdline_bpp_extra_and_option
[13:23:09] [PASSED] drm_test_cmdline_extra_and_option
[13:23:09] [PASSED] drm_test_cmdline_freestanding_options
[13:23:09] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[13:23:09] [PASSED] drm_test_cmdline_panel_orientation
[13:23:09] ================ drm_test_cmdline_invalid  =================
[13:23:09] [PASSED] margin_only
[13:23:09] [PASSED] interlace_only
[13:23:09] [PASSED] res_missing_x
[13:23:09] [PASSED] res_missing_y
[13:23:09] [PASSED] res_bad_y
[13:23:09] [PASSED] res_missing_y_bpp
[13:23:09] [PASSED] res_bad_bpp
[13:23:09] [PASSED] res_bad_refresh
[13:23:09] [PASSED] res_bpp_refresh_force_on_off
[13:23:09] [PASSED] res_invalid_mode
[13:23:09] [PASSED] res_bpp_wrong_place_mode
[13:23:09] [PASSED] name_bpp_refresh
[13:23:09] [PASSED] name_refresh
[13:23:09] [PASSED] name_refresh_wrong_mode
[13:23:09] [PASSED] name_refresh_invalid_mode
[13:23:09] [PASSED] rotate_multiple
[13:23:09] [PASSED] rotate_invalid_val
[13:23:09] [PASSED] rotate_truncated
[13:23:09] [PASSED] invalid_option
[13:23:09] [PASSED] invalid_tv_option
[13:23:09] [PASSED] truncated_tv_option
[13:23:09] ============ [PASSED] drm_test_cmdline_invalid =============
[13:23:09] =============== drm_test_cmdline_tv_options  ===============
[13:23:09] [PASSED] NTSC
[13:23:09] [PASSED] NTSC_443
[13:23:09] [PASSED] NTSC_J
[13:23:09] [PASSED] PAL
[13:23:09] [PASSED] PAL_M
[13:23:09] [PASSED] PAL_N
[13:23:09] [PASSED] SECAM
[13:23:09] [PASSED] MONO_525
[13:23:09] [PASSED] MONO_625
[13:23:09] =========== [PASSED] drm_test_cmdline_tv_options ===========
[13:23:09] =============== [PASSED] drm_cmdline_parser ================
[13:23:09] ========== drmm_connector_hdmi_init (20 subtests) ==========
[13:23:09] [PASSED] drm_test_connector_hdmi_init_valid
[13:23:09] [PASSED] drm_test_connector_hdmi_init_bpc_8
[13:23:09] [PASSED] drm_test_connector_hdmi_init_bpc_10
[13:23:09] [PASSED] drm_test_connector_hdmi_init_bpc_12
[13:23:09] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[13:23:09] [PASSED] drm_test_connector_hdmi_init_bpc_null
[13:23:09] [PASSED] drm_test_connector_hdmi_init_formats_empty
[13:23:09] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[13:23:09] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[13:23:09] [PASSED] supported_formats=0x9 yuv420_allowed=1
[13:23:09] [PASSED] supported_formats=0x9 yuv420_allowed=0
[13:23:09] [PASSED] supported_formats=0x3 yuv420_allowed=1
[13:23:09] [PASSED] supported_formats=0x3 yuv420_allowed=0
[13:23:09] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[13:23:09] [PASSED] drm_test_connector_hdmi_init_null_ddc
[13:23:09] [PASSED] drm_test_connector_hdmi_init_null_product
[13:23:09] [PASSED] drm_test_connector_hdmi_init_null_vendor
[13:23:09] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[13:23:09] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[13:23:09] [PASSED] drm_test_connector_hdmi_init_product_valid
[13:23:09] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[13:23:09] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[13:23:09] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[13:23:09] ========= drm_test_connector_hdmi_init_type_valid  =========
[13:23:09] [PASSED] HDMI-A
[13:23:09] [PASSED] HDMI-B
[13:23:09] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[13:23:09] ======== drm_test_connector_hdmi_init_type_invalid  ========
[13:23:09] [PASSED] Unknown
[13:23:09] [PASSED] VGA
[13:23:09] [PASSED] DVI-I
[13:23:09] [PASSED] DVI-D
[13:23:09] [PASSED] DVI-A
[13:23:09] [PASSED] Composite
[13:23:09] [PASSED] SVIDEO
[13:23:09] [PASSED] LVDS
[13:23:09] [PASSED] Component
[13:23:09] [PASSED] DIN
[13:23:09] [PASSED] DP
[13:23:09] [PASSED] TV
[13:23:09] [PASSED] eDP
[13:23:09] [PASSED] Virtual
[13:23:09] [PASSED] DSI
[13:23:09] [PASSED] DPI
[13:23:09] [PASSED] Writeback
[13:23:09] [PASSED] SPI
[13:23:09] [PASSED] USB
[13:23:09] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[13:23:09] ============ [PASSED] drmm_connector_hdmi_init =============
[13:23:09] ============= drmm_connector_init (3 subtests) =============
[13:23:09] [PASSED] drm_test_drmm_connector_init
[13:23:09] [PASSED] drm_test_drmm_connector_init_null_ddc
[13:23:09] ========= drm_test_drmm_connector_init_type_valid  =========
[13:23:09] [PASSED] Unknown
[13:23:09] [PASSED] VGA
[13:23:09] [PASSED] DVI-I
[13:23:09] [PASSED] DVI-D
[13:23:09] [PASSED] DVI-A
[13:23:09] [PASSED] Composite
[13:23:09] [PASSED] SVIDEO
[13:23:09] [PASSED] LVDS
[13:23:09] [PASSED] Component
[13:23:09] [PASSED] DIN
[13:23:09] [PASSED] DP
[13:23:09] [PASSED] HDMI-A
[13:23:09] [PASSED] HDMI-B
[13:23:09] [PASSED] TV
[13:23:09] [PASSED] eDP
[13:23:09] [PASSED] Virtual
[13:23:09] [PASSED] DSI
[13:23:09] [PASSED] DPI
[13:23:09] [PASSED] Writeback
[13:23:09] [PASSED] SPI
[13:23:09] [PASSED] USB
[13:23:09] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[13:23:09] =============== [PASSED] drmm_connector_init ===============
[13:23:09] ========= drm_connector_dynamic_init (6 subtests) ==========
[13:23:09] [PASSED] drm_test_drm_connector_dynamic_init
[13:23:09] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[13:23:09] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[13:23:09] [PASSED] drm_test_drm_connector_dynamic_init_properties
[13:23:09] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[13:23:09] [PASSED] Unknown
[13:23:09] [PASSED] VGA
[13:23:09] [PASSED] DVI-I
[13:23:09] [PASSED] DVI-D
[13:23:09] [PASSED] DVI-A
[13:23:09] [PASSED] Composite
[13:23:09] [PASSED] SVIDEO
[13:23:09] [PASSED] LVDS
[13:23:09] [PASSED] Component
[13:23:09] [PASSED] DIN
[13:23:09] [PASSED] DP
[13:23:09] [PASSED] HDMI-A
[13:23:09] [PASSED] HDMI-B
[13:23:09] [PASSED] TV
[13:23:09] [PASSED] eDP
[13:23:09] [PASSED] Virtual
[13:23:09] [PASSED] DSI
[13:23:09] [PASSED] DPI
[13:23:09] [PASSED] Writeback
[13:23:09] [PASSED] SPI
[13:23:09] [PASSED] USB
[13:23:09] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[13:23:09] ======== drm_test_drm_connector_dynamic_init_name  =========
[13:23:09] [PASSED] Unknown
[13:23:09] [PASSED] VGA
[13:23:09] [PASSED] DVI-I
[13:23:09] [PASSED] DVI-D
[13:23:09] [PASSED] DVI-A
[13:23:09] [PASSED] Composite
[13:23:09] [PASSED] SVIDEO
[13:23:09] [PASSED] LVDS
[13:23:09] [PASSED] Component
[13:23:09] [PASSED] DIN
[13:23:09] [PASSED] DP
[13:23:09] [PASSED] HDMI-A
[13:23:09] [PASSED] HDMI-B
[13:23:09] [PASSED] TV
[13:23:09] [PASSED] eDP
[13:23:09] [PASSED] Virtual
[13:23:09] [PASSED] DSI
[13:23:09] [PASSED] DPI
[13:23:09] [PASSED] Writeback
[13:23:09] [PASSED] SPI
[13:23:09] [PASSED] USB
[13:23:09] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[13:23:09] =========== [PASSED] drm_connector_dynamic_init ============
[13:23:09] ==== drm_connector_dynamic_register_early (4 subtests) =====
[13:23:09] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[13:23:09] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[13:23:09] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[13:23:09] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[13:23:09] ====== [PASSED] drm_connector_dynamic_register_early =======
[13:23:09] ======= drm_connector_dynamic_register (7 subtests) ========
[13:23:09] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[13:23:09] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[13:23:09] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[13:23:09] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[13:23:09] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[13:23:09] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[13:23:09] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[13:23:09] ========= [PASSED] drm_connector_dynamic_register ==========
[13:23:09] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[13:23:09] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[13:23:09] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[13:23:09] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[13:23:09] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[13:23:09] ========== drm_test_get_tv_mode_from_name_valid  ===========
[13:23:09] [PASSED] NTSC
[13:23:09] [PASSED] NTSC-443
[13:23:09] [PASSED] NTSC-J
[13:23:09] [PASSED] PAL
[13:23:09] [PASSED] PAL-M
[13:23:09] [PASSED] PAL-N
[13:23:09] [PASSED] SECAM
[13:23:09] [PASSED] Mono
[13:23:09] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[13:23:09] [PASSED] drm_test_get_tv_mode_from_name_truncated
[13:23:09] ============ [PASSED] drm_get_tv_mode_from_name ============
[13:23:09] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[13:23:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[13:23:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[13:23:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[13:23:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[13:23:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[13:23:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[13:23:09] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[13:23:09] [PASSED] VIC 96
[13:23:09] [PASSED] VIC 97
[13:23:09] [PASSED] VIC 101
[13:23:09] [PASSED] VIC 102
[13:23:09] [PASSED] VIC 106
[13:23:09] [PASSED] VIC 107
[13:23:09] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[13:23:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[13:23:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[13:23:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[13:23:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[13:23:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[13:23:09] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[13:23:09] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[13:23:09] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[13:23:09] [PASSED] Automatic
[13:23:09] [PASSED] Full
[13:23:09] [PASSED] Limited 16:235
[13:23:09] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[13:23:09] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[13:23:09] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[13:23:09] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[13:23:09] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[13:23:09] [PASSED] RGB
[13:23:09] [PASSED] YUV 4:2:0
[13:23:09] [PASSED] YUV 4:2:2
[13:23:09] [PASSED] YUV 4:4:4
[13:23:09] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[13:23:09] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[13:23:09] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[13:23:09] ============= drm_damage_helper (21 subtests) ==============
[13:23:09] [PASSED] drm_test_damage_iter_no_damage
[13:23:09] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[13:23:09] [PASSED] drm_test_damage_iter_no_damage_src_moved
[13:23:09] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[13:23:09] [PASSED] drm_test_damage_iter_no_damage_not_visible
[13:23:09] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[13:23:09] [PASSED] drm_test_damage_iter_no_damage_no_fb
[13:23:09] [PASSED] drm_test_damage_iter_simple_damage
[13:23:09] [PASSED] drm_test_damage_iter_single_damage
[13:23:09] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[13:23:09] [PASSED] drm_test_damage_iter_single_damage_outside_src
[13:23:09] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[13:23:09] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[13:23:09] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[13:23:09] [PASSED] drm_test_damage_iter_single_damage_src_moved
[13:23:09] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[13:23:09] [PASSED] drm_test_damage_iter_damage
[13:23:09] [PASSED] drm_test_damage_iter_damage_one_intersect
[13:23:09] [PASSED] drm_test_damage_iter_damage_one_outside
[13:23:09] [PASSED] drm_test_damage_iter_damage_src_moved
[13:23:09] [PASSED] drm_test_damage_iter_damage_not_visible
[13:23:09] ================ [PASSED] drm_damage_helper ================
[13:23:09] ============== drm_dp_mst_helper (3 subtests) ==============
[13:23:09] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[13:23:09] [PASSED] Clock 154000 BPP 30 DSC disabled
[13:23:09] [PASSED] Clock 234000 BPP 30 DSC disabled
[13:23:09] [PASSED] Clock 297000 BPP 24 DSC disabled
[13:23:09] [PASSED] Clock 332880 BPP 24 DSC enabled
[13:23:09] [PASSED] Clock 324540 BPP 24 DSC enabled
[13:23:09] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[13:23:09] ============== drm_test_dp_mst_calc_pbn_div  ===============
[13:23:09] [PASSED] Link rate 2000000 lane count 4
[13:23:09] [PASSED] Link rate 2000000 lane count 2
[13:23:09] [PASSED] Link rate 2000000 lane count 1
[13:23:09] [PASSED] Link rate 1350000 lane count 4
[13:23:09] [PASSED] Link rate 1350000 lane count 2
[13:23:09] [PASSED] Link rate 1350000 lane count 1
[13:23:09] [PASSED] Link rate 1000000 lane count 4
[13:23:09] [PASSED] Link rate 1000000 lane count 2
[13:23:09] [PASSED] Link rate 1000000 lane count 1
[13:23:09] [PASSED] Link rate 810000 lane count 4
[13:23:09] [PASSED] Link rate 810000 lane count 2
[13:23:09] [PASSED] Link rate 810000 lane count 1
[13:23:09] [PASSED] Link rate 540000 lane count 4
[13:23:09] [PASSED] Link rate 540000 lane count 2
[13:23:09] [PASSED] Link rate 540000 lane count 1
[13:23:09] [PASSED] Link rate 270000 lane count 4
[13:23:09] [PASSED] Link rate 270000 lane count 2
[13:23:09] [PASSED] Link rate 270000 lane count 1
[13:23:09] [PASSED] Link rate 162000 lane count 4
[13:23:09] [PASSED] Link rate 162000 lane count 2
[13:23:09] [PASSED] Link rate 162000 lane count 1
[13:23:09] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[13:23:09] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[13:23:09] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[13:23:09] [PASSED] DP_POWER_UP_PHY with port number
[13:23:09] [PASSED] DP_POWER_DOWN_PHY with port number
[13:23:09] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[13:23:09] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[13:23:09] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[13:23:09] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[13:23:09] [PASSED] DP_QUERY_PAYLOAD with port number
[13:23:09] [PASSED] DP_QUERY_PAYLOAD with VCPI
[13:23:09] [PASSED] DP_REMOTE_DPCD_READ with port number
[13:23:09] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[13:23:09] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[13:23:09] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[13:23:09] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[13:23:09] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[13:23:09] [PASSED] DP_REMOTE_I2C_READ with port number
[13:23:09] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[13:23:09] [PASSED] DP_REMOTE_I2C_READ with transactions array
[13:23:09] [PASSED] DP_REMOTE_I2C_WRITE with port number
[13:23:09] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[13:23:09] [PASSED] DP_REMOTE_I2C_WRITE with data array
[13:23:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[13:23:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[13:23:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[13:23:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[13:23:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[13:23:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[13:23:09] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[13:23:09] ================ [PASSED] drm_dp_mst_helper ================
[13:23:09] ================== drm_exec (7 subtests) ===================
[13:23:09] [PASSED] sanitycheck
[13:23:09] [PASSED] test_lock
[13:23:09] [PASSED] test_lock_unlock
[13:23:09] [PASSED] test_duplicates
[13:23:09] [PASSED] test_prepare
[13:23:09] [PASSED] test_prepare_array
[13:23:09] [PASSED] test_multiple_loops
[13:23:09] ==================== [PASSED] drm_exec =====================
[13:23:09] =========== drm_format_helper_test (17 subtests) ===========
[13:23:09] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[13:23:09] [PASSED] single_pixel_source_buffer
[13:23:09] [PASSED] single_pixel_clip_rectangle
[13:23:09] [PASSED] well_known_colors
[13:23:09] [PASSED] destination_pitch
[13:23:09] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[13:23:09] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[13:23:09] [PASSED] single_pixel_source_buffer
[13:23:09] [PASSED] single_pixel_clip_rectangle
[13:23:09] [PASSED] well_known_colors
[13:23:09] [PASSED] destination_pitch
[13:23:09] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[13:23:09] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[13:23:09] [PASSED] single_pixel_source_buffer
[13:23:09] [PASSED] single_pixel_clip_rectangle
[13:23:09] [PASSED] well_known_colors
[13:23:09] [PASSED] destination_pitch
[13:23:09] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[13:23:09] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[13:23:09] [PASSED] single_pixel_source_buffer
[13:23:09] [PASSED] single_pixel_clip_rectangle
[13:23:09] [PASSED] well_known_colors
[13:23:09] [PASSED] destination_pitch
[13:23:09] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[13:23:09] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[13:23:09] [PASSED] single_pixel_source_buffer
[13:23:09] [PASSED] single_pixel_clip_rectangle
[13:23:09] [PASSED] well_known_colors
[13:23:09] [PASSED] destination_pitch
[13:23:09] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[13:23:09] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[13:23:09] [PASSED] single_pixel_source_buffer
[13:23:09] [PASSED] single_pixel_clip_rectangle
[13:23:09] [PASSED] well_known_colors
[13:23:09] [PASSED] destination_pitch
[13:23:09] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[13:23:09] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[13:23:09] [PASSED] single_pixel_source_buffer
[13:23:09] [PASSED] single_pixel_clip_rectangle
[13:23:09] [PASSED] well_known_colors
[13:23:09] [PASSED] destination_pitch
[13:23:09] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[13:23:09] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[13:23:09] [PASSED] single_pixel_source_buffer
[13:23:09] [PASSED] single_pixel_clip_rectangle
[13:23:09] [PASSED] well_known_colors
[13:23:09] [PASSED] destination_pitch
[13:23:09] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[13:23:09] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[13:23:09] [PASSED] single_pixel_source_buffer
[13:23:09] [PASSED] single_pixel_clip_rectangle
[13:23:09] [PASSED] well_known_colors
[13:23:09] [PASSED] destination_pitch
[13:23:09] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[13:23:09] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[13:23:09] [PASSED] single_pixel_source_buffer
[13:23:09] [PASSED] single_pixel_clip_rectangle
[13:23:09] [PASSED] well_known_colors
[13:23:09] [PASSED] destination_pitch
[13:23:09] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[13:23:09] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[13:23:09] [PASSED] single_pixel_source_buffer
[13:23:09] [PASSED] single_pixel_clip_rectangle
[13:23:09] [PASSED] well_known_colors
[13:23:09] [PASSED] destination_pitch
[13:23:09] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[13:23:09] ============== drm_test_fb_xrgb8888_to_mono  ===============
[13:23:09] [PASSED] single_pixel_source_buffer
[13:23:09] [PASSED] single_pixel_clip_rectangle
[13:23:09] [PASSED] well_known_colors
[13:23:09] [PASSED] destination_pitch
[13:23:09] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[13:23:09] ==================== drm_test_fb_swab  =====================
[13:23:09] [PASSED] single_pixel_source_buffer
[13:23:09] [PASSED] single_pixel_clip_rectangle
[13:23:09] [PASSED] well_known_colors
[13:23:09] [PASSED] destination_pitch
[13:23:09] ================ [PASSED] drm_test_fb_swab =================
[13:23:09] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[13:23:09] [PASSED] single_pixel_source_buffer
[13:23:09] [PASSED] single_pixel_clip_rectangle
[13:23:09] [PASSED] well_known_colors
[13:23:09] [PASSED] destination_pitch
[13:23:09] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[13:23:09] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[13:23:09] [PASSED] single_pixel_source_buffer
[13:23:09] [PASSED] single_pixel_clip_rectangle
[13:23:09] [PASSED] well_known_colors
[13:23:09] [PASSED] destination_pitch
[13:23:09] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[13:23:09] ================= drm_test_fb_clip_offset  =================
[13:23:09] [PASSED] pass through
[13:23:09] [PASSED] horizontal offset
[13:23:09] [PASSED] vertical offset
[13:23:09] [PASSED] horizontal and vertical offset
[13:23:09] [PASSED] horizontal offset (custom pitch)
[13:23:09] [PASSED] vertical offset (custom pitch)
[13:23:09] [PASSED] horizontal and vertical offset (custom pitch)
[13:23:09] ============= [PASSED] drm_test_fb_clip_offset =============
[13:23:09] =================== drm_test_fb_memcpy  ====================
[13:23:09] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[13:23:09] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[13:23:09] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[13:23:09] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[13:23:09] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[13:23:09] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[13:23:09] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[13:23:09] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[13:23:09] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[13:23:09] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[13:23:09] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[13:23:09] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[13:23:09] =============== [PASSED] drm_test_fb_memcpy ================
[13:23:09] ============= [PASSED] drm_format_helper_test ==============
[13:23:09] ================= drm_format (18 subtests) =================
[13:23:09] [PASSED] drm_test_format_block_width_invalid
[13:23:09] [PASSED] drm_test_format_block_width_one_plane
[13:23:09] [PASSED] drm_test_format_block_width_two_plane
[13:23:09] [PASSED] drm_test_format_block_width_three_plane
[13:23:09] [PASSED] drm_test_format_block_width_tiled
[13:23:09] [PASSED] drm_test_format_block_height_invalid
[13:23:09] [PASSED] drm_test_format_block_height_one_plane
[13:23:09] [PASSED] drm_test_format_block_height_two_plane
[13:23:09] [PASSED] drm_test_format_block_height_three_plane
[13:23:09] [PASSED] drm_test_format_block_height_tiled
[13:23:09] [PASSED] drm_test_format_min_pitch_invalid
[13:23:09] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[13:23:09] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[13:23:09] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[13:23:09] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[13:23:09] [PASSED] drm_test_format_min_pitch_two_plane
[13:23:09] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[13:23:09] [PASSED] drm_test_format_min_pitch_tiled
[13:23:09] =================== [PASSED] drm_format ====================
[13:23:09] ============== drm_framebuffer (10 subtests) ===============
[13:23:09] ========== drm_test_framebuffer_check_src_coords  ==========
[13:23:09] [PASSED] Success: source fits into fb
[13:23:09] [PASSED] Fail: overflowing fb with x-axis coordinate
[13:23:09] [PASSED] Fail: overflowing fb with y-axis coordinate
[13:23:09] [PASSED] Fail: overflowing fb with source width
[13:23:09] [PASSED] Fail: overflowing fb with source height
[13:23:09] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[13:23:09] [PASSED] drm_test_framebuffer_cleanup
[13:23:09] =============== drm_test_framebuffer_create  ===============
[13:23:09] [PASSED] ABGR8888 normal sizes
[13:23:09] [PASSED] ABGR8888 max sizes
[13:23:09] [PASSED] ABGR8888 pitch greater than min required
[13:23:09] [PASSED] ABGR8888 pitch less than min required
[13:23:09] [PASSED] ABGR8888 Invalid width
[13:23:09] [PASSED] ABGR8888 Invalid buffer handle
[13:23:09] [PASSED] No pixel format
[13:23:09] [PASSED] ABGR8888 Width 0
[13:23:09] [PASSED] ABGR8888 Height 0
[13:23:09] [PASSED] ABGR8888 Out of bound height * pitch combination
[13:23:09] [PASSED] ABGR8888 Large buffer offset
[13:23:09] [PASSED] ABGR8888 Buffer offset for inexistent plane
[13:23:09] [PASSED] ABGR8888 Invalid flag
[13:23:09] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[13:23:09] [PASSED] ABGR8888 Valid buffer modifier
[13:23:09] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[13:23:09] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[13:23:09] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[13:23:09] [PASSED] NV12 Normal sizes
[13:23:09] [PASSED] NV12 Max sizes
[13:23:09] [PASSED] NV12 Invalid pitch
[13:23:09] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[13:23:09] [PASSED] NV12 different  modifier per-plane
[13:23:09] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[13:23:09] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[13:23:09] [PASSED] NV12 Modifier for inexistent plane
[13:23:09] [PASSED] NV12 Handle for inexistent plane
[13:23:09] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[13:23:09] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[13:23:09] [PASSED] YVU420 Normal sizes
[13:23:09] [PASSED] YVU420 Max sizes
[13:23:09] [PASSED] YVU420 Invalid pitch
[13:23:09] [PASSED] YVU420 Different pitches
[13:23:09] [PASSED] YVU420 Different buffer offsets/pitches
[13:23:09] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[13:23:09] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[13:23:09] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[13:23:09] [PASSED] YVU420 Valid modifier
[13:23:09] [PASSED] YVU420 Different modifiers per plane
[13:23:09] [PASSED] YVU420 Modifier for inexistent plane
[13:23:09] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[13:23:09] [PASSED] X0L2 Normal sizes
[13:23:09] [PASSED] X0L2 Max sizes
[13:23:09] [PASSED] X0L2 Invalid pitch
[13:23:09] [PASSED] X0L2 Pitch greater than minimum required
[13:23:09] [PASSED] X0L2 Handle for inexistent plane
[13:23:09] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[13:23:09] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[13:23:09] [PASSED] X0L2 Valid modifier
[13:23:09] [PASSED] X0L2 Modifier for inexistent plane
[13:23:09] =========== [PASSED] drm_test_framebuffer_create ===========
[13:23:09] [PASSED] drm_test_framebuffer_free
[13:23:09] [PASSED] drm_test_framebuffer_init
[13:23:09] [PASSED] drm_test_framebuffer_init_bad_format
[13:23:09] [PASSED] drm_test_framebuffer_init_dev_mismatch
[13:23:09] [PASSED] drm_test_framebuffer_lookup
[13:23:09] [PASSED] drm_test_framebuffer_lookup_inexistent
[13:23:09] [PASSED] drm_test_framebuffer_modifiers_not_supported
[13:23:09] ================= [PASSED] drm_framebuffer =================
[13:23:09] ================ drm_gem_shmem (8 subtests) ================
[13:23:09] [PASSED] drm_gem_shmem_test_obj_create
[13:23:09] [PASSED] drm_gem_shmem_test_obj_create_private
[13:23:09] [PASSED] drm_gem_shmem_test_pin_pages
[13:23:09] [PASSED] drm_gem_shmem_test_vmap
[13:23:09] [PASSED] drm_gem_shmem_test_get_pages_sgt
[13:23:09] [PASSED] drm_gem_shmem_test_get_sg_table
[13:23:09] [PASSED] drm_gem_shmem_test_madvise
[13:23:09] [PASSED] drm_gem_shmem_test_purge
[13:23:09] ================== [PASSED] drm_gem_shmem ==================
[13:23:09] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[13:23:09] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[13:23:09] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[13:23:09] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[13:23:09] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[13:23:09] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[13:23:09] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[13:23:09] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[13:23:09] [PASSED] Automatic
[13:23:09] [PASSED] Full
[13:23:09] [PASSED] Limited 16:235
[13:23:09] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[13:23:09] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[13:23:09] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[13:23:09] [PASSED] drm_test_check_disable_connector
[13:23:09] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[13:23:09] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[13:23:09] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[13:23:09] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[13:23:09] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[13:23:09] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[13:23:09] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[13:23:09] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[13:23:09] [PASSED] drm_test_check_output_bpc_dvi
[13:23:09] [PASSED] drm_test_check_output_bpc_format_vic_1
[13:23:09] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[13:23:09] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[13:23:09] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[13:23:09] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[13:23:09] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[13:23:09] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[13:23:09] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[13:23:09] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[13:23:09] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[13:23:09] [PASSED] drm_test_check_broadcast_rgb_value
[13:23:09] [PASSED] drm_test_check_bpc_8_value
[13:23:09] [PASSED] drm_test_check_bpc_10_value
[13:23:09] [PASSED] drm_test_check_bpc_12_value
[13:23:09] [PASSED] drm_test_check_format_value
[13:23:09] [PASSED] drm_test_check_tmds_char_value
[13:23:09] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[13:23:09] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[13:23:09] [PASSED] drm_test_check_mode_valid
[13:23:09] [PASSED] drm_test_check_mode_valid_reject
[13:23:09] [PASSED] drm_test_check_mode_valid_reject_rate
[13:23:09] [PASSED] drm_test_check_mode_valid_reject_max_clock
[13:23:09] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[13:23:09] ================= drm_managed (2 subtests) =================
[13:23:09] [PASSED] drm_test_managed_release_action
[13:23:09] [PASSED] drm_test_managed_run_action
[13:23:09] =================== [PASSED] drm_managed ===================
[13:23:09] =================== drm_mm (6 subtests) ====================
[13:23:09] [PASSED] drm_test_mm_init
[13:23:09] [PASSED] drm_test_mm_debug
[13:23:09] [PASSED] drm_test_mm_align32
[13:23:09] [PASSED] drm_test_mm_align64
[13:23:09] [PASSED] drm_test_mm_lowest
[13:23:09] [PASSED] drm_test_mm_highest
[13:23:09] ===================== [PASSED] drm_mm ======================
[13:23:09] ============= drm_modes_analog_tv (5 subtests) =============
[13:23:09] [PASSED] drm_test_modes_analog_tv_mono_576i
[13:23:09] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[13:23:09] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[13:23:09] [PASSED] drm_test_modes_analog_tv_pal_576i
[13:23:09] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[13:23:09] =============== [PASSED] drm_modes_analog_tv ===============
[13:23:09] ============== drm_plane_helper (2 subtests) ===============
[13:23:09] =============== drm_test_check_plane_state  ================
[13:23:09] [PASSED] clipping_simple
[13:23:09] [PASSED] clipping_rotate_reflect
[13:23:09] [PASSED] positioning_simple
[13:23:09] [PASSED] upscaling
[13:23:09] [PASSED] downscaling
[13:23:09] [PASSED] rounding1
[13:23:09] [PASSED] rounding2
[13:23:09] [PASSED] rounding3
[13:23:09] [PASSED] rounding4
[13:23:09] =========== [PASSED] drm_test_check_plane_state ============
[13:23:09] =========== drm_test_check_invalid_plane_state  ============
[13:23:09] [PASSED] positioning_invalid
[13:23:09] [PASSED] upscaling_invalid
[13:23:09] [PASSED] downscaling_invalid
[13:23:09] ======= [PASSED] drm_test_check_invalid_plane_state ========
[13:23:09] ================ [PASSED] drm_plane_helper =================
[13:23:09] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[13:23:09] ====== drm_test_connector_helper_tv_get_modes_check  =======
[13:23:09] [PASSED] None
[13:23:09] [PASSED] PAL
[13:23:09] [PASSED] NTSC
[13:23:09] [PASSED] Both, NTSC Default
[13:23:09] [PASSED] Both, PAL Default
[13:23:09] [PASSED] Both, NTSC Default, with PAL on command-line
[13:23:09] [PASSED] Both, PAL Default, with NTSC on command-line
[13:23:09] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[13:23:09] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[13:23:09] ================== drm_rect (9 subtests) ===================
[13:23:09] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[13:23:09] [PASSED] drm_test_rect_clip_scaled_not_clipped
[13:23:09] [PASSED] drm_test_rect_clip_scaled_clipped
[13:23:09] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[13:23:09] ================= drm_test_rect_intersect  =================
[13:23:09] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[13:23:09] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[13:23:09] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[13:23:09] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[13:23:09] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[13:23:09] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[13:23:09] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[13:23:09] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[13:23:09] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[13:23:09] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[13:23:09] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[13:23:09] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[13:23:09] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[13:23:09] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[13:23:09] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[13:23:09] ============= [PASSED] drm_test_rect_intersect =============
[13:23:09] ================ drm_test_rect_calc_hscale  ================
[13:23:09] [PASSED] normal use
[13:23:09] [PASSED] out of max range
[13:23:09] [PASSED] out of min range
[13:23:09] [PASSED] zero dst
[13:23:09] [PASSED] negative src
[13:23:09] [PASSED] negative dst
[13:23:09] ============ [PASSED] drm_test_rect_calc_hscale ============
[13:23:09] ================ drm_test_rect_calc_vscale  ================
[13:23:09] [PASSED] normal use
[13:23:09] [PASSED] out of max range
[13:23:09] [PASSED] out of min range
[13:23:09] [PASSED] zero dst
[13:23:09] [PASSED] negative src
[13:23:09] [PASSED] negative dst
[13:23:09] ============ [PASSED] drm_test_rect_calc_vscale ============
[13:23:09] ================== drm_test_rect_rotate  ===================
[13:23:09] [PASSED] reflect-x
[13:23:09] [PASSED] reflect-y
[13:23:09] [PASSED] rotate-0
[13:23:09] [PASSED] rotate-90
[13:23:09] [PASSED] rotate-180
[13:23:09] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[13:23:09] ============== [PASSED] drm_test_rect_rotate ===============
[13:23:09] ================ drm_test_rect_rotate_inv  =================
[13:23:09] [PASSED] reflect-x
[13:23:09] [PASSED] reflect-y
[13:23:09] [PASSED] rotate-0
[13:23:09] [PASSED] rotate-90
[13:23:09] [PASSED] rotate-180
[13:23:09] [PASSED] rotate-270
[13:23:09] ============ [PASSED] drm_test_rect_rotate_inv =============
[13:23:09] ==================== [PASSED] drm_rect =====================
[13:23:09] ============ drm_sysfb_modeset_test (1 subtest) ============
[13:23:09] ============ drm_test_sysfb_build_fourcc_list  =============
[13:23:09] [PASSED] no native formats
[13:23:09] [PASSED] XRGB8888 as native format
[13:23:09] [PASSED] remove duplicates
[13:23:09] [PASSED] convert alpha formats
[13:23:09] [PASSED] random formats
[13:23:09] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[13:23:09] ============= [PASSED] drm_sysfb_modeset_test ==============
[13:23:09] ============================================================
[13:23:09] Testing complete. Ran 616 tests: passed: 616
[13:23:09] Elapsed time: 23.240s total, 1.711s configuring, 21.358s building, 0.150s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[13:23:09] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:23:11] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:23:19] Starting KUnit Kernel (1/1)...
[13:23:19] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:23:19] ================= ttm_device (5 subtests) ==================
[13:23:19] [PASSED] ttm_device_init_basic
[13:23:19] [PASSED] ttm_device_init_multiple
[13:23:19] [PASSED] ttm_device_fini_basic
[13:23:19] [PASSED] ttm_device_init_no_vma_man
[13:23:19] ================== ttm_device_init_pools  ==================
[13:23:19] [PASSED] No DMA allocations, no DMA32 required
[13:23:19] [PASSED] DMA allocations, DMA32 required
[13:23:19] [PASSED] No DMA allocations, DMA32 required
[13:23:19] [PASSED] DMA allocations, no DMA32 required
[13:23:19] ============== [PASSED] ttm_device_init_pools ==============
[13:23:19] =================== [PASSED] ttm_device ====================
[13:23:19] ================== ttm_pool (8 subtests) ===================
[13:23:19] ================== ttm_pool_alloc_basic  ===================
[13:23:19] [PASSED] One page
[13:23:19] [PASSED] More than one page
[13:23:19] [PASSED] Above the allocation limit
[13:23:19] [PASSED] One page, with coherent DMA mappings enabled
[13:23:19] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[13:23:19] ============== [PASSED] ttm_pool_alloc_basic ===============
[13:23:19] ============== ttm_pool_alloc_basic_dma_addr  ==============
[13:23:19] [PASSED] One page
[13:23:19] [PASSED] More than one page
[13:23:19] [PASSED] Above the allocation limit
[13:23:19] [PASSED] One page, with coherent DMA mappings enabled
[13:23:19] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[13:23:19] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[13:23:19] [PASSED] ttm_pool_alloc_order_caching_match
[13:23:19] [PASSED] ttm_pool_alloc_caching_mismatch
[13:23:19] [PASSED] ttm_pool_alloc_order_mismatch
[13:23:19] [PASSED] ttm_pool_free_dma_alloc
[13:23:19] [PASSED] ttm_pool_free_no_dma_alloc
[13:23:19] [PASSED] ttm_pool_fini_basic
[13:23:19] ==================== [PASSED] ttm_pool =====================
[13:23:19] ================ ttm_resource (8 subtests) =================
[13:23:19] ================= ttm_resource_init_basic  =================
[13:23:19] [PASSED] Init resource in TTM_PL_SYSTEM
[13:23:19] [PASSED] Init resource in TTM_PL_VRAM
[13:23:19] [PASSED] Init resource in a private placement
[13:23:19] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[13:23:19] ============= [PASSED] ttm_resource_init_basic =============
[13:23:19] [PASSED] ttm_resource_init_pinned
[13:23:19] [PASSED] ttm_resource_fini_basic
[13:23:19] [PASSED] ttm_resource_manager_init_basic
[13:23:19] [PASSED] ttm_resource_manager_usage_basic
[13:23:19] [PASSED] ttm_resource_manager_set_used_basic
[13:23:19] [PASSED] ttm_sys_man_alloc_basic
[13:23:19] [PASSED] ttm_sys_man_free_basic
[13:23:19] ================== [PASSED] ttm_resource ===================
[13:23:19] =================== ttm_tt (15 subtests) ===================
[13:23:19] ==================== ttm_tt_init_basic  ====================
[13:23:19] [PASSED] Page-aligned size
[13:23:19] [PASSED] Extra pages requested
[13:23:19] ================ [PASSED] ttm_tt_init_basic ================
[13:23:19] [PASSED] ttm_tt_init_misaligned
[13:23:19] [PASSED] ttm_tt_fini_basic
[13:23:19] [PASSED] ttm_tt_fini_sg
[13:23:19] [PASSED] ttm_tt_fini_shmem
[13:23:19] [PASSED] ttm_tt_create_basic
[13:23:19] [PASSED] ttm_tt_create_invalid_bo_type
[13:23:19] [PASSED] ttm_tt_create_ttm_exists
[13:23:19] [PASSED] ttm_tt_create_failed
[13:23:19] [PASSED] ttm_tt_destroy_basic
[13:23:19] [PASSED] ttm_tt_populate_null_ttm
[13:23:19] [PASSED] ttm_tt_populate_populated_ttm
[13:23:19] [PASSED] ttm_tt_unpopulate_basic
[13:23:19] [PASSED] ttm_tt_unpopulate_empty_ttm
[13:23:19] [PASSED] ttm_tt_swapin_basic
[13:23:19] ===================== [PASSED] ttm_tt ======================
[13:23:19] =================== ttm_bo (14 subtests) ===================
[13:23:19] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[13:23:19] [PASSED] Cannot be interrupted and sleeps
[13:23:19] [PASSED] Cannot be interrupted, locks straight away
[13:23:19] [PASSED] Can be interrupted, sleeps
[13:23:19] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[13:23:19] [PASSED] ttm_bo_reserve_locked_no_sleep
[13:23:19] [PASSED] ttm_bo_reserve_no_wait_ticket
[13:23:19] [PASSED] ttm_bo_reserve_double_resv
[13:23:19] [PASSED] ttm_bo_reserve_interrupted
[13:23:19] [PASSED] ttm_bo_reserve_deadlock
[13:23:19] [PASSED] ttm_bo_unreserve_basic
[13:23:19] [PASSED] ttm_bo_unreserve_pinned
[13:23:19] [PASSED] ttm_bo_unreserve_bulk
[13:23:19] [PASSED] ttm_bo_put_basic
[13:23:19] [PASSED] ttm_bo_put_shared_resv
[13:23:19] [PASSED] ttm_bo_pin_basic
[13:23:19] [PASSED] ttm_bo_pin_unpin_resource
[13:23:19] [PASSED] ttm_bo_multiple_pin_one_unpin
[13:23:19] ===================== [PASSED] ttm_bo ======================
[13:23:19] ============== ttm_bo_validate (22 subtests) ===============
[13:23:19] ============== ttm_bo_init_reserved_sys_man  ===============
[13:23:19] [PASSED] Buffer object for userspace
[13:23:19] [PASSED] Kernel buffer object
[13:23:19] [PASSED] Shared buffer object
[13:23:19] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[13:23:19] ============== ttm_bo_init_reserved_mock_man  ==============
[13:23:19] [PASSED] Buffer object for userspace
[13:23:19] [PASSED] Kernel buffer object
[13:23:19] [PASSED] Shared buffer object
[13:23:19] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[13:23:19] [PASSED] ttm_bo_init_reserved_resv
[13:23:19] ================== ttm_bo_validate_basic  ==================
[13:23:19] [PASSED] Buffer object for userspace
[13:23:19] [PASSED] Kernel buffer object
[13:23:19] [PASSED] Shared buffer object
[13:23:19] ============== [PASSED] ttm_bo_validate_basic ==============
[13:23:19] [PASSED] ttm_bo_validate_invalid_placement
[13:23:19] ============= ttm_bo_validate_same_placement  ==============
[13:23:19] [PASSED] System manager
[13:23:19] [PASSED] VRAM manager
[13:23:19] ========= [PASSED] ttm_bo_validate_same_placement ==========
[13:23:19] [PASSED] ttm_bo_validate_failed_alloc
[13:23:19] [PASSED] ttm_bo_validate_pinned
[13:23:19] [PASSED] ttm_bo_validate_busy_placement
[13:23:19] ================ ttm_bo_validate_multihop  =================
[13:23:19] [PASSED] Buffer object for userspace
[13:23:19] [PASSED] Kernel buffer object
[13:23:19] [PASSED] Shared buffer object
[13:23:19] ============ [PASSED] ttm_bo_validate_multihop =============
[13:23:19] ========== ttm_bo_validate_no_placement_signaled  ==========
[13:23:19] [PASSED] Buffer object in system domain, no page vector
[13:23:19] [PASSED] Buffer object in system domain with an existing page vector
[13:23:19] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[13:23:19] ======== ttm_bo_validate_no_placement_not_signaled  ========
[13:23:19] [PASSED] Buffer object for userspace
[13:23:19] [PASSED] Kernel buffer object
[13:23:19] [PASSED] Shared buffer object
[13:23:19] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[13:23:19] [PASSED] ttm_bo_validate_move_fence_signaled
[13:23:19] ========= ttm_bo_validate_move_fence_not_signaled  =========
[13:23:19] [PASSED] Waits for GPU
[13:23:19] [PASSED] Tries to lock straight away
[13:23:19] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[13:23:19] [PASSED] ttm_bo_validate_swapout
[13:23:19] [PASSED] ttm_bo_validate_happy_evict
[13:23:19] [PASSED] ttm_bo_validate_all_pinned_evict
[13:23:19] [PASSED] ttm_bo_validate_allowed_only_evict
[13:23:19] [PASSED] ttm_bo_validate_deleted_evict
[13:23:19] [PASSED] ttm_bo_validate_busy_domain_evict
[13:23:19] [PASSED] ttm_bo_validate_evict_gutting
[13:23:19] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[13:23:19] ================= [PASSED] ttm_bo_validate =================
[13:23:19] ============================================================
[13:23:19] Testing complete. Ran 102 tests: passed: 102
[13:23:19] Elapsed time: 10.027s total, 1.714s configuring, 7.696s building, 0.530s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 25+ messages in thread

* ✓ Xe.CI.Full: success for Revert patch to reject HBR3 for all eDP panels
  2025-06-20 12:44 [PATCH 0/2] Revert patch to reject HBR3 for all eDP panels Ankit Nautiyal
                   ` (2 preceding siblings ...)
  2025-06-20 13:23 ` ✓ CI.KUnit: success for Revert patch to reject HBR3 for all eDP panels Patchwork
@ 2025-06-20 23:47 ` Patchwork
  2025-06-24  8:43 ` ✓ CI.KUnit: success for Revert patch to reject HBR3 for all eDP panels (rev2) Patchwork
                   ` (2 subsequent siblings)
  6 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2025-06-20 23:47 UTC (permalink / raw)
  To: Ankit Nautiyal; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 59255 bytes --]

== Series Details ==

Series: Revert patch to reject HBR3 for all eDP panels
URL   : https://patchwork.freedesktop.org/series/150568/
State : success

== Summary ==

CI Bug Log - changes from xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968_FULL -> xe-pw-150568v1_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-150568v1_FULL:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@xe_compute_preempt@compute-preempt-many-vram-evict@engine-drm_xe_engine_class_compute}:
    - shard-bmg:          [PASS][1] -> [ABORT][2] +1 other test abort
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-bmg-3/igt@xe_compute_preempt@compute-preempt-many-vram-evict@engine-drm_xe_engine_class_compute.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-3/igt@xe_compute_preempt@compute-preempt-many-vram-evict@engine-drm_xe_engine_class_compute.html

  
Known issues
------------

  Here are the changes found in xe-pw-150568v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
    - shard-adlp:         [PASS][3] -> [FAIL][4] ([Intel XE#3908]) +1 other test fail
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-adlp-8/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-adlp-6/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-lnl:          NOTRUN -> [SKIP][5] ([Intel XE#3658])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-lnl-3/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_fb@x-tiled-8bpp-rotate-270:
    - shard-dg2-set2:     NOTRUN -> [SKIP][6] ([Intel XE#316]) +5 other tests skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-434/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-adlp:         [PASS][7] -> [DMESG-FAIL][8] ([Intel XE#4543]) +1 other test dmesg-fail
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-adlp-4/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-adlp-8/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@y-tiled-8bpp-rotate-90:
    - shard-lnl:          NOTRUN -> [SKIP][9] ([Intel XE#1124])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-lnl-3/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-dg2-set2:     NOTRUN -> [SKIP][10] ([Intel XE#1124]) +11 other tests skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-434/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#1124]) +2 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-4/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-addfb:
    - shard-dg2-set2:     NOTRUN -> [SKIP][12] ([Intel XE#619])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-435/igt@kms_big_fb@yf-tiled-addfb.html

  * igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p:
    - shard-bmg:          [PASS][13] -> [SKIP][14] ([Intel XE#2314] / [Intel XE#2894])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-bmg-1/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html

  * igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p:
    - shard-dg2-set2:     NOTRUN -> [SKIP][15] ([Intel XE#2191])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-435/igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p.html

  * igt@kms_bw@linear-tiling-3-displays-2160x1440p:
    - shard-dg2-set2:     NOTRUN -> [SKIP][16] ([Intel XE#367]) +1 other test skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-434/igt@kms_bw@linear-tiling-3-displays-2160x1440p.html

  * igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#2887]) +3 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-3/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [SKIP][18] ([Intel XE#787]) +118 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-435/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-6.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#3432])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-3/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs.html

  * igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs@pipe-d-dp-4:
    - shard-dg2-set2:     NOTRUN -> [SKIP][20] ([Intel XE#455] / [Intel XE#787]) +31 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-435/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs@pipe-d-dp-4.html

  * igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs:
    - shard-dg2-set2:     NOTRUN -> [SKIP][21] ([Intel XE#2907]) +1 other test skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs.html

  * igt@kms_cdclk@plane-scaling@pipe-b-dp-4:
    - shard-dg2-set2:     NOTRUN -> [SKIP][22] ([Intel XE#4416]) +3 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-435/igt@kms_cdclk@plane-scaling@pipe-b-dp-4.html

  * igt@kms_chamelium_color@ctm-limited-range:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#2325])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-3/igt@kms_chamelium_color@ctm-limited-range.html

  * igt@kms_chamelium_color@degamma:
    - shard-dg2-set2:     NOTRUN -> [SKIP][24] ([Intel XE#306])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-434/igt@kms_chamelium_color@degamma.html

  * igt@kms_chamelium_edid@dp-edid-change-during-suspend:
    - shard-dg2-set2:     NOTRUN -> [SKIP][25] ([Intel XE#373]) +9 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@kms_chamelium_edid@dp-edid-change-during-suspend.html

  * igt@kms_chamelium_hpd@hdmi-hpd-after-hibernate:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#2252]) +1 other test skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-4/igt@kms_chamelium_hpd@hdmi-hpd-after-hibernate.html

  * igt@kms_content_protection@atomic:
    - shard-dg2-set2:     NOTRUN -> [FAIL][27] ([Intel XE#1178]) +1 other test fail
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-436/igt@kms_content_protection@atomic.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-dg2-set2:     NOTRUN -> [SKIP][28] ([Intel XE#307])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-435/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_content_protection@uevent@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][29] ([Intel XE#1188])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-4/igt@kms_content_protection@uevent@pipe-a-dp-2.html

  * igt@kms_cursor_crc@cursor-offscreen-512x512:
    - shard-dg2-set2:     NOTRUN -> [SKIP][30] ([Intel XE#308]) +1 other test skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-435/igt@kms_cursor_crc@cursor-offscreen-512x512.html

  * igt@kms_cursor_crc@cursor-random-256x85:
    - shard-lnl:          NOTRUN -> [SKIP][31] ([Intel XE#1424])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-lnl-3/igt@kms_cursor_crc@cursor-random-256x85.html

  * igt@kms_cursor_crc@cursor-sliding-64x21:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#2320])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-3/igt@kms_cursor_crc@cursor-sliding-64x21.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-legacy:
    - shard-bmg:          [PASS][33] -> [SKIP][34] ([Intel XE#2291]) +1 other test skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-bmg-4/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-5/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc:
    - shard-bmg:          [PASS][35] -> [SKIP][36] ([Intel XE#1340])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-bmg-1/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-6/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html

  * igt@kms_dp_link_training@non-uhbr-sst:
    - shard-bmg:          [PASS][37] -> [SKIP][38] ([Intel XE#4354])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-bmg-7/igt@kms_dp_link_training@non-uhbr-sst.html
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-6/igt@kms_dp_link_training@non-uhbr-sst.html

  * igt@kms_dp_link_training@uhbr-sst:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#4354])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-3/igt@kms_dp_link_training@uhbr-sst.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats:
    - shard-dg2-set2:     NOTRUN -> [SKIP][40] ([Intel XE#4422]) +1 other test skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-436/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html

  * igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible:
    - shard-bmg:          [PASS][41] -> [SKIP][42] ([Intel XE#2316]) +5 other tests skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-bmg-1/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html

  * igt@kms_flip@absolute-wf_vblank-interruptible@d-hdmi-a6:
    - shard-dg2-set2:     NOTRUN -> [INCOMPLETE][43] ([Intel XE#2049]) +1 other test incomplete
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@kms_flip@absolute-wf_vblank-interruptible@d-hdmi-a6.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-dg2-set2:     [PASS][44] -> [INCOMPLETE][45] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-434/igt@kms_flip@flip-vs-suspend-interruptible.html
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-436/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_flip@wf_vblank-ts-check:
    - shard-lnl:          [PASS][46] -> [FAIL][47] ([Intel XE#3149] / [Intel XE#886])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-lnl-7/igt@kms_flip@wf_vblank-ts-check.html
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-lnl-6/igt@kms_flip@wf_vblank-ts-check.html

  * igt@kms_flip@wf_vblank-ts-check@a-edp1:
    - shard-lnl:          [PASS][48] -> [FAIL][49] ([Intel XE#886]) +2 other tests fail
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-lnl-7/igt@kms_flip@wf_vblank-ts-check@a-edp1.html
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-lnl-6/igt@kms_flip@wf_vblank-ts-check@a-edp1.html

  * igt@kms_flip@wf_vblank-ts-check@a-hdmi-a1:
    - shard-adlp:         [PASS][50] -> [FAIL][51] ([Intel XE#886]) +2 other tests fail
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-adlp-9/igt@kms_flip@wf_vblank-ts-check@a-hdmi-a1.html
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-adlp-3/igt@kms_flip@wf_vblank-ts-check@a-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling:
    - shard-dg2-set2:     NOTRUN -> [SKIP][52] ([Intel XE#455]) +16 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-434/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-move:
    - shard-lnl:          NOTRUN -> [SKIP][53] ([Intel XE#651])
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-lnl-3/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#2311]) +5 other tests skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#4141]) +1 other test skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-1p-rte:
    - shard-adlp:         [PASS][56] -> [DMESG-WARN][57] ([Intel XE#2953] / [Intel XE#4173])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-adlp-9/igt@kms_frontbuffer_tracking@fbc-1p-rte.html
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-adlp-3/igt@kms_frontbuffer_tracking@fbc-1p-rte.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-render:
    - shard-dg2-set2:     NOTRUN -> [SKIP][58] ([Intel XE#651]) +26 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-434/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][59] ([Intel XE#653]) +29 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][60] ([Intel XE#656]) +2 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-lnl-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#2313]) +4 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc.html

  * igt@kms_hdmi_inject@inject-audio:
    - shard-lnl:          NOTRUN -> [SKIP][62] ([Intel XE#1470] / [Intel XE#2853])
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-lnl-3/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_hdr@static-toggle:
    - shard-bmg:          [PASS][63] -> [SKIP][64] ([Intel XE#1503])
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-bmg-1/igt@kms_hdr@static-toggle.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-6/igt@kms_hdr@static-toggle.html

  * igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
    - shard-dg2-set2:     NOTRUN -> [SKIP][65] ([Intel XE#2925])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-435/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-dg2-set2:     NOTRUN -> [SKIP][66] ([Intel XE#356])
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-436/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_plane_scaling@intel-max-src-size:
    - shard-lnl:          NOTRUN -> [SKIP][67] ([Intel XE#3307])
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-lnl-3/igt@kms_plane_scaling@intel-max-src-size.html

  * igt@kms_pm_dc@dc6-psr:
    - shard-lnl:          [PASS][68] -> [FAIL][69] ([Intel XE#718])
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-lnl-7/igt@kms_pm_dc@dc6-psr.html
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-lnl-6/igt@kms_pm_dc@dc6-psr.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][70] ([Intel XE#1129])
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-436/igt@kms_pm_dc@dc6-psr.html

  * igt@kms_pm_rpm@basic-pci-d3-state:
    - shard-dg2-set2:     [PASS][71] -> [FAIL][72] ([Intel XE#4741])
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-466/igt@kms_pm_rpm@basic-pci-d3-state.html
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-435/igt@kms_pm_rpm@basic-pci-d3-state.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf:
    - shard-dg2-set2:     NOTRUN -> [SKIP][73] ([Intel XE#1489]) +6 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-435/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-bmg:          NOTRUN -> [SKIP][74] ([Intel XE#1489])
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-3/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr@fbc-psr-cursor-render:
    - shard-bmg:          NOTRUN -> [SKIP][75] ([Intel XE#2234] / [Intel XE#2850])
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-3/igt@kms_psr@fbc-psr-cursor-render.html

  * igt@kms_psr@fbc-psr-sprite-plane-onoff:
    - shard-dg2-set2:     NOTRUN -> [SKIP][76] ([Intel XE#2850] / [Intel XE#929]) +13 other tests skip
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-436/igt@kms_psr@fbc-psr-sprite-plane-onoff.html

  * igt@kms_psr@fbc-psr2-sprite-blt:
    - shard-lnl:          NOTRUN -> [SKIP][77] ([Intel XE#1406])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-lnl-3/igt@kms_psr@fbc-psr2-sprite-blt.html

  * igt@kms_psr@fbc-psr2-sprite-blt@edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][78] ([Intel XE#4609])
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-lnl-3/igt@kms_psr@fbc-psr2-sprite-blt@edp-1.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
    - shard-bmg:          NOTRUN -> [SKIP][79] ([Intel XE#2330])
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-3/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@sprite-rotation-270:
    - shard-dg2-set2:     NOTRUN -> [SKIP][80] ([Intel XE#3414])
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-434/igt@kms_rotation_crc@sprite-rotation-270.html

  * igt@kms_setmode@invalid-clone-single-crtc-stealing:
    - shard-bmg:          [PASS][81] -> [SKIP][82] ([Intel XE#1435])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-bmg-4/igt@kms_setmode@invalid-clone-single-crtc-stealing.html
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-5/igt@kms_setmode@invalid-clone-single-crtc-stealing.html

  * igt@xe_compute_preempt@compute-preempt-many:
    - shard-dg2-set2:     NOTRUN -> [SKIP][83] ([Intel XE#1280] / [Intel XE#455]) +1 other test skip
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-436/igt@xe_compute_preempt@compute-preempt-many.html

  * igt@xe_copy_basic@mem-copy-linear-0x369:
    - shard-dg2-set2:     NOTRUN -> [SKIP][84] ([Intel XE#1123])
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-435/igt@xe_copy_basic@mem-copy-linear-0x369.html

  * igt@xe_copy_basic@mem-set-linear-0xfffe:
    - shard-dg2-set2:     NOTRUN -> [SKIP][85] ([Intel XE#1126]) +1 other test skip
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-435/igt@xe_copy_basic@mem-set-linear-0xfffe.html

  * igt@xe_create@create-big-vram:
    - shard-lnl:          NOTRUN -> [SKIP][86] ([Intel XE#1062])
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-lnl-3/igt@xe_create@create-big-vram.html

  * igt@xe_eu_stall@unprivileged-access:
    - shard-dg2-set2:     NOTRUN -> [SKIP][87] ([Intel XE#5308])
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-436/igt@xe_eu_stall@unprivileged-access.html

  * igt@xe_eudebug_online@interrupt-all-set-breakpoint:
    - shard-dg2-set2:     NOTRUN -> [SKIP][88] ([Intel XE#4837]) +9 other tests skip
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-434/igt@xe_eudebug_online@interrupt-all-set-breakpoint.html

  * igt@xe_eudebug_online@set-breakpoint-faultable:
    - shard-bmg:          NOTRUN -> [SKIP][89] ([Intel XE#4837]) +1 other test skip
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-3/igt@xe_eudebug_online@set-breakpoint-faultable.html

  * igt@xe_exec_basic@multigpu-once-basic:
    - shard-bmg:          NOTRUN -> [SKIP][90] ([Intel XE#2322])
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-3/igt@xe_exec_basic@multigpu-once-basic.html

  * igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-invalidate-race:
    - shard-dg2-set2:     NOTRUN -> [SKIP][91] ([Intel XE#288]) +22 other tests skip
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-436/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-invalidate-race.html

  * igt@xe_exec_mix_modes@exec-spinner-interrupted-lr:
    - shard-dg2-set2:     NOTRUN -> [SKIP][92] ([Intel XE#2360])
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-435/igt@xe_exec_mix_modes@exec-spinner-interrupted-lr.html

  * igt@xe_exec_system_allocator@process-many-large-mmap-huge-nomemset:
    - shard-bmg:          NOTRUN -> [SKIP][93] ([Intel XE#4943]) +5 other tests skip
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-4/igt@xe_exec_system_allocator@process-many-large-mmap-huge-nomemset.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-stride-new-race-nomemset:
    - shard-dg2-set2:     NOTRUN -> [SKIP][94] ([Intel XE#4915]) +227 other tests skip
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-436/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-new-race-nomemset.html

  * igt@xe_mmap@small-bar:
    - shard-dg2-set2:     NOTRUN -> [SKIP][95] ([Intel XE#512])
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-434/igt@xe_mmap@small-bar.html

  * igt@xe_module_load@force-load:
    - shard-dg2-set2:     NOTRUN -> [SKIP][96] ([Intel XE#378])
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-436/igt@xe_module_load@force-load.html

  * igt@xe_oa@disabled-read-error:
    - shard-dg2-set2:     NOTRUN -> [SKIP][97] ([Intel XE#2541] / [Intel XE#3573]) +2 other tests skip
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-434/igt@xe_oa@disabled-read-error.html

  * igt@xe_oa@syncs-syncobj-cfg:
    - shard-dg2-set2:     NOTRUN -> [SKIP][98] ([Intel XE#2541] / [Intel XE#3573] / [Intel XE#4501]) +1 other test skip
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-434/igt@xe_oa@syncs-syncobj-cfg.html

  * igt@xe_pm@d3cold-mocs:
    - shard-dg2-set2:     NOTRUN -> [SKIP][99] ([Intel XE#2284])
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-435/igt@xe_pm@d3cold-mocs.html

  * igt@xe_pm@s2idle-d3cold-basic-exec:
    - shard-dg2-set2:     NOTRUN -> [SKIP][100] ([Intel XE#2284] / [Intel XE#366]) +1 other test skip
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-436/igt@xe_pm@s2idle-d3cold-basic-exec.html

  * igt@xe_pm@s3-vm-bind-unbind-all:
    - shard-lnl:          NOTRUN -> [SKIP][101] ([Intel XE#584])
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-lnl-3/igt@xe_pm@s3-vm-bind-unbind-all.html

  * igt@xe_pm@vram-d3cold-threshold:
    - shard-dg2-set2:     NOTRUN -> [SKIP][102] ([Intel XE#579])
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@xe_pm@vram-d3cold-threshold.html

  * igt@xe_pxp@pxp-termination-key-update-post-rpm:
    - shard-dg2-set2:     NOTRUN -> [SKIP][103] ([Intel XE#4733]) +4 other tests skip
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-434/igt@xe_pxp@pxp-termination-key-update-post-rpm.html

  * igt@xe_query@multigpu-query-config:
    - shard-bmg:          NOTRUN -> [SKIP][104] ([Intel XE#944])
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-3/igt@xe_query@multigpu-query-config.html

  * igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz:
    - shard-dg2-set2:     NOTRUN -> [SKIP][105] ([Intel XE#944])
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-434/igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz.html

  * igt@xe_query@multigpu-query-pxp-status:
    - shard-lnl:          NOTRUN -> [SKIP][106] ([Intel XE#944])
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-lnl-3/igt@xe_query@multigpu-query-pxp-status.html

  * igt@xe_render_copy@render-stress-4-copies:
    - shard-dg2-set2:     NOTRUN -> [SKIP][107] ([Intel XE#4814]) +1 other test skip
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-435/igt@xe_render_copy@render-stress-4-copies.html

  
#### Possible fixes ####

  * igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1:
    - shard-adlp:         [FAIL][108] ([Intel XE#3908]) -> [PASS][109] +1 other test pass
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-adlp-6/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-adlp-8/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-dp-4:
    - shard-dg2-set2:     [INCOMPLETE][110] ([Intel XE#3862]) -> [PASS][111] +1 other test pass
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-434/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-dp-4.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-dp-4.html

  * igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
    - shard-dg2-set2:     [SKIP][112] ([Intel XE#4208] / [i915#2575]) -> [PASS][113] +5 other tests pass
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-435/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
    - shard-bmg:          [SKIP][114] ([Intel XE#2291]) -> [PASS][115] +6 other tests pass
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-bmg-5/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html

  * igt@kms_flip@2x-flip-vs-dpms-on-nop:
    - shard-bmg:          [SKIP][116] ([Intel XE#2316]) -> [PASS][117] +4 other tests pass
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-bmg-5/igt@kms_flip@2x-flip-vs-dpms-on-nop.html
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-2/igt@kms_flip@2x-flip-vs-dpms-on-nop.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank@c-edp1:
    - shard-lnl:          [FAIL][118] ([Intel XE#886]) -> [PASS][119] +1 other test pass
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-lnl-4/igt@kms_flip@flip-vs-absolute-wf_vblank@c-edp1.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-lnl-1/igt@kms_flip@flip-vs-absolute-wf_vblank@c-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank@c-dp4:
    - shard-dg2-set2:     [FAIL][120] ([Intel XE#301] / [Intel XE#3321]) -> [PASS][121]
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-436/igt@kms_flip@flip-vs-expired-vblank@c-dp4.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@kms_flip@flip-vs-expired-vblank@c-dp4.html

  * igt@kms_flip@flip-vs-suspend@d-hdmi-a1:
    - shard-adlp:         [DMESG-WARN][122] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][123] +14 other tests pass
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-adlp-3/igt@kms_flip@flip-vs-suspend@d-hdmi-a1.html
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-adlp-9/igt@kms_flip@flip-vs-suspend@d-hdmi-a1.html

  * igt@kms_flip@plain-flip-ts-check@a-hdmi-a3:
    - shard-bmg:          [FAIL][124] ([Intel XE#2882]) -> [PASS][125] +2 other tests pass
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-bmg-5/igt@kms_flip@plain-flip-ts-check@a-hdmi-a3.html
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-2/igt@kms_flip@plain-flip-ts-check@a-hdmi-a3.html

  * igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-to-y:
    - shard-adlp:         [DMESG-FAIL][126] ([Intel XE#4543]) -> [PASS][127] +1 other test pass
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-adlp-1/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-to-y.html
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-adlp-1/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-to-y.html

  * igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-to-y:
    - shard-adlp:         [FAIL][128] ([Intel XE#1874]) -> [PASS][129]
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-adlp-1/igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-to-y.html
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-adlp-1/igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-to-y.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          [SKIP][130] ([Intel XE#1503]) -> [PASS][131]
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-bmg-5/igt@kms_hdr@invalid-hdr.html
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-2/igt@kms_hdr@invalid-hdr.html

  * igt@kms_plane_multiple@2x-tiling-4:
    - shard-bmg:          [SKIP][132] ([Intel XE#4596]) -> [PASS][133]
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-4.html
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-8/igt@kms_plane_multiple@2x-tiling-4.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset:
    - shard-lnl:          [FAIL][134] ([Intel XE#5018]) -> [PASS][135]
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-lnl-2/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset.html
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-lnl-7/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset.html

  * igt@xe_module_load@load:
    - shard-dg2-set2:     ([PASS][136], [PASS][137], [PASS][138], [PASS][139], [PASS][140], [PASS][141], [PASS][142], [SKIP][143], [PASS][144], [PASS][145], [PASS][146], [PASS][147], [PASS][148], [PASS][149], [PASS][150], [PASS][151], [PASS][152], [PASS][153], [PASS][154]) ([Intel XE#378]) -> ([PASS][155], [PASS][156], [PASS][157], [PASS][158], [PASS][159], [PASS][160], [PASS][161], [PASS][162], [PASS][163], [PASS][164], [PASS][165], [PASS][166], [PASS][167], [PASS][168], [PASS][169], [PASS][170], [PASS][171], [PASS][172])
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-436/igt@xe_module_load@load.html
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-435/igt@xe_module_load@load.html
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-435/igt@xe_module_load@load.html
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-436/igt@xe_module_load@load.html
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-436/igt@xe_module_load@load.html
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-436/igt@xe_module_load@load.html
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-435/igt@xe_module_load@load.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-434/igt@xe_module_load@load.html
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-435/igt@xe_module_load@load.html
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-466/igt@xe_module_load@load.html
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-466/igt@xe_module_load@load.html
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-466/igt@xe_module_load@load.html
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-466/igt@xe_module_load@load.html
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-434/igt@xe_module_load@load.html
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-434/igt@xe_module_load@load.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-434/igt@xe_module_load@load.html
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-434/igt@xe_module_load@load.html
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-434/igt@xe_module_load@load.html
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-436/igt@xe_module_load@load.html
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-436/igt@xe_module_load@load.html
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-436/igt@xe_module_load@load.html
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@xe_module_load@load.html
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-434/igt@xe_module_load@load.html
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-434/igt@xe_module_load@load.html
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-434/igt@xe_module_load@load.html
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-434/igt@xe_module_load@load.html
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@xe_module_load@load.html
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@xe_module_load@load.html
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@xe_module_load@load.html
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@xe_module_load@load.html
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-435/igt@xe_module_load@load.html
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-436/igt@xe_module_load@load.html
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-436/igt@xe_module_load@load.html
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-435/igt@xe_module_load@load.html
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-435/igt@xe_module_load@load.html
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-435/igt@xe_module_load@load.html
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-435/igt@xe_module_load@load.html

  * igt@xe_module_load@many-reload:
    - shard-adlp:         [DMESG-WARN][173] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#5244]) -> [PASS][174]
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-adlp-3/igt@xe_module_load@many-reload.html
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-adlp-9/igt@xe_module_load@many-reload.html

  * igt@xe_oa@oa-exponents:
    - shard-lnl:          [TIMEOUT][175] -> [PASS][176]
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-lnl-6/igt@xe_oa@oa-exponents.html
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-lnl-8/igt@xe_oa@oa-exponents.html

  * igt@xe_vm@munmap-style-unbind-many-either-side-partial:
    - shard-dg2-set2:     [SKIP][177] ([Intel XE#4208]) -> [PASS][178] +15 other tests pass
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-435/igt@xe_vm@munmap-style-unbind-many-either-side-partial.html
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@xe_vm@munmap-style-unbind-many-either-side-partial.html

  
#### Warnings ####

  * igt@kms_big_fb@y-tiled-32bpp-rotate-90:
    - shard-dg2-set2:     [SKIP][179] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][180] ([Intel XE#1124])
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-435/igt@kms_big_fb@y-tiled-32bpp-rotate-90.html
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@kms_big_fb@y-tiled-32bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-dg2-set2:     [SKIP][181] ([Intel XE#4208]) -> [SKIP][182] ([Intel XE#1124])
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-435/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_ccs@bad-pixel-format-4-tiled-mtl-mc-ccs:
    - shard-dg2-set2:     [SKIP][183] ([Intel XE#4208]) -> [SKIP][184] ([Intel XE#455] / [Intel XE#787]) +1 other test skip
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-435/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-mc-ccs.html
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-mc-ccs.html

  * igt@kms_content_protection@srm:
    - shard-bmg:          [FAIL][185] ([Intel XE#1178]) -> [SKIP][186] ([Intel XE#2341]) +1 other test skip
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-bmg-1/igt@kms_content_protection@srm.html
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-6/igt@kms_content_protection@srm.html

  * igt@kms_content_protection@uevent:
    - shard-bmg:          [SKIP][187] ([Intel XE#2341]) -> [FAIL][188] ([Intel XE#1188])
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-bmg-5/igt@kms_content_protection@uevent.html
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-4/igt@kms_content_protection@uevent.html

  * igt@kms_dp_linktrain_fallback@dsc-fallback:
    - shard-dg2-set2:     [SKIP][189] ([Intel XE#4208]) -> [SKIP][190] ([Intel XE#4331])
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-435/igt@kms_dp_linktrain_fallback@dsc-fallback.html
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@kms_dp_linktrain_fallback@dsc-fallback.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render:
    - shard-bmg:          [SKIP][191] ([Intel XE#2311]) -> [SKIP][192] ([Intel XE#2312]) +10 other tests skip
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt:
    - shard-bmg:          [SKIP][193] ([Intel XE#2312]) -> [SKIP][194] ([Intel XE#2311]) +13 other tests skip
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-blt:
    - shard-dg2-set2:     [SKIP][195] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][196] ([Intel XE#651]) +1 other test skip
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-435/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-blt.html
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt:
    - shard-bmg:          [SKIP][197] ([Intel XE#2312]) -> [SKIP][198] ([Intel XE#4141]) +9 other tests skip
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render:
    - shard-bmg:          [SKIP][199] ([Intel XE#4141]) -> [SKIP][200] ([Intel XE#2312]) +5 other tests skip
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render.html
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-move:
    - shard-dg2-set2:     [SKIP][201] ([Intel XE#4208]) -> [SKIP][202] ([Intel XE#651]) +1 other test skip
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-move.html
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-move.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-render:
    - shard-dg2-set2:     [SKIP][203] ([Intel XE#4208]) -> [SKIP][204] ([Intel XE#653]) +1 other test skip
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-435/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-render.html
   [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen:
    - shard-bmg:          [SKIP][205] ([Intel XE#2312]) -> [SKIP][206] ([Intel XE#2313]) +14 other tests skip
   [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen.html
   [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][207] ([Intel XE#2313]) -> [SKIP][208] ([Intel XE#2312]) +12 other tests skip
   [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html
   [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-dg2-set2:     [SKIP][209] ([Intel XE#4208]) -> [SKIP][210] ([Intel XE#1489]) +1 other test skip
   [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-435/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf.html
   [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr@pr-sprite-plane-onoff:
    - shard-dg2-set2:     [SKIP][211] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][212] ([Intel XE#2850] / [Intel XE#929])
   [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-435/igt@kms_psr@pr-sprite-plane-onoff.html
   [212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@kms_psr@pr-sprite-plane-onoff.html

  * igt@kms_vrr@seamless-rr-switch-virtual:
    - shard-dg2-set2:     [SKIP][213] ([Intel XE#4208] / [i915#2575]) -> [SKIP][214] ([Intel XE#455])
   [213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-435/igt@kms_vrr@seamless-rr-switch-virtual.html
   [214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@kms_vrr@seamless-rr-switch-virtual.html

  * igt@xe_exec_fault_mode@twice-invalid-fault:
    - shard-dg2-set2:     [SKIP][215] ([Intel XE#4208]) -> [SKIP][216] ([Intel XE#288]) +2 other tests skip
   [215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-435/igt@xe_exec_fault_mode@twice-invalid-fault.html
   [216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@xe_exec_fault_mode@twice-invalid-fault.html

  * igt@xe_exec_system_allocator@threads-many-execqueues-mmap-remap-dontunmap-eocheck:
    - shard-dg2-set2:     [SKIP][217] ([Intel XE#4208]) -> [SKIP][218] ([Intel XE#4915]) +20 other tests skip
   [217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-435/igt@xe_exec_system_allocator@threads-many-execqueues-mmap-remap-dontunmap-eocheck.html
   [218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@xe_exec_system_allocator@threads-many-execqueues-mmap-remap-dontunmap-eocheck.html

  * igt@xe_oa@unprivileged-single-ctx-counters:
    - shard-dg2-set2:     [SKIP][219] ([Intel XE#4208]) -> [SKIP][220] ([Intel XE#2541] / [Intel XE#3573]) +1 other test skip
   [219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-435/igt@xe_oa@unprivileged-single-ctx-counters.html
   [220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@xe_oa@unprivileged-single-ctx-counters.html

  * igt@xe_query@multigpu-query-engines:
    - shard-dg2-set2:     [SKIP][221] ([Intel XE#4208]) -> [SKIP][222] ([Intel XE#944]) +1 other test skip
   [221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-435/igt@xe_query@multigpu-query-engines.html
   [222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@xe_query@multigpu-query-engines.html

  * igt@xe_sriov_auto_provisioning@selfconfig-reprovision-reduce-numvfs:
    - shard-dg2-set2:     [SKIP][223] ([Intel XE#4208]) -> [SKIP][224] ([Intel XE#4130])
   [223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968/shard-dg2-435/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-reduce-numvfs.html
   [224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/shard-dg2-466/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-reduce-numvfs.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1062]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1062
  [Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1126
  [Intel XE#1129]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1129
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
  [Intel XE#1280]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1280
  [Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1470]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1470
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1874
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2351
  [Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
  [Intel XE#2541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2541
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2853]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2853
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#2882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2882
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
  [Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925
  [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
  [Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
  [Intel XE#3307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3307
  [Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/356
  [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
  [Intel XE#3658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3658
  [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
  [Intel XE#3862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3862
  [Intel XE#3908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3908
  [Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
  [Intel XE#4208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4208
  [Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
  [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
  [Intel XE#4416]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4416
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4501
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4741]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4741
  [Intel XE#4814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4814
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5018]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5018
  [Intel XE#512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/512
  [Intel XE#5244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5244
  [Intel XE#5301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5301
  [Intel XE#5308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5308
  [Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579
  [Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
  [Intel XE#619]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/619
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/886
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575


Build changes
-------------

  * Linux: xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968 -> xe-pw-150568v1

  IGT_8418: 8418
  xe-3282-1b4be188ae14a43b901f3005075fab3a22f77968: 1b4be188ae14a43b901f3005075fab3a22f77968
  xe-pw-150568v1: 150568v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v1/index.html

[-- Attachment #2: Type: text/html, Size: 68742 bytes --]

^ permalink raw reply	[flat|nested] 25+ messages in thread

* ✓ CI.KUnit: success for Revert patch to reject HBR3 for all eDP panels (rev2)
  2025-06-20 12:44 [PATCH 0/2] Revert patch to reject HBR3 for all eDP panels Ankit Nautiyal
                   ` (3 preceding siblings ...)
  2025-06-20 23:47 ` ✓ Xe.CI.Full: " Patchwork
@ 2025-06-24  8:43 ` Patchwork
  2025-06-24  9:50 ` ✓ Xe.CI.BAT: " Patchwork
  2025-06-24 16:20 ` ✓ Xe.CI.Full: " Patchwork
  6 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2025-06-24  8:43 UTC (permalink / raw)
  To: Nautiyal, Ankit K; +Cc: intel-xe

== Series Details ==

Series: Revert patch to reject HBR3 for all eDP panels (rev2)
URL   : https://patchwork.freedesktop.org/series/150568/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[08:42:11] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:42:15] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:42:42] Starting KUnit Kernel (1/1)...
[08:42:42] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:42:42] ================== guc_buf (11 subtests) ===================
[08:42:42] [PASSED] test_smallest
[08:42:42] [PASSED] test_largest
[08:42:42] [PASSED] test_granular
[08:42:42] [PASSED] test_unique
[08:42:42] [PASSED] test_overlap
[08:42:42] [PASSED] test_reusable
[08:42:42] [PASSED] test_too_big
[08:42:42] [PASSED] test_flush
[08:42:42] [PASSED] test_lookup
[08:42:42] [PASSED] test_data
[08:42:42] [PASSED] test_class
[08:42:42] ===================== [PASSED] guc_buf =====================
[08:42:42] =================== guc_dbm (7 subtests) ===================
[08:42:42] [PASSED] test_empty
[08:42:42] [PASSED] test_default
[08:42:42] ======================== test_size  ========================
[08:42:42] [PASSED] 4
[08:42:42] [PASSED] 8
[08:42:42] [PASSED] 32
[08:42:42] [PASSED] 256
[08:42:42] ==================== [PASSED] test_size ====================
[08:42:42] ======================= test_reuse  ========================
[08:42:42] [PASSED] 4
[08:42:42] [PASSED] 8
[08:42:42] [PASSED] 32
[08:42:42] [PASSED] 256
[08:42:42] =================== [PASSED] test_reuse ====================
[08:42:42] =================== test_range_overlap  ====================
[08:42:42] [PASSED] 4
[08:42:42] [PASSED] 8
[08:42:42] [PASSED] 32
[08:42:42] [PASSED] 256
[08:42:42] =============== [PASSED] test_range_overlap ================
[08:42:42] =================== test_range_compact  ====================
[08:42:42] [PASSED] 4
[08:42:42] [PASSED] 8
[08:42:42] [PASSED] 32
[08:42:42] [PASSED] 256
[08:42:42] =============== [PASSED] test_range_compact ================
[08:42:42] ==================== test_range_spare  =====================
[08:42:42] [PASSED] 4
[08:42:42] [PASSED] 8
[08:42:42] [PASSED] 32
[08:42:42] [PASSED] 256
[08:42:42] ================ [PASSED] test_range_spare =================
[08:42:42] ===================== [PASSED] guc_dbm =====================
[08:42:42] =================== guc_idm (6 subtests) ===================
[08:42:42] [PASSED] bad_init
[08:42:42] [PASSED] no_init
[08:42:42] [PASSED] init_fini
[08:42:42] [PASSED] check_used
[08:42:42] [PASSED] check_quota
[08:42:42] [PASSED] check_all
[08:42:42] ===================== [PASSED] guc_idm =====================
[08:42:42] ================== no_relay (3 subtests) ===================
[08:42:42] [PASSED] xe_drops_guc2pf_if_not_ready
[08:42:42] [PASSED] xe_drops_guc2vf_if_not_ready
[08:42:42] [PASSED] xe_rejects_send_if_not_ready
[08:42:42] ==================== [PASSED] no_relay =====================
[08:42:42] ================== pf_relay (14 subtests) ==================
[08:42:42] [PASSED] pf_rejects_guc2pf_too_short
[08:42:42] [PASSED] pf_rejects_guc2pf_too_long
[08:42:42] [PASSED] pf_rejects_guc2pf_no_payload
[08:42:42] [PASSED] pf_fails_no_payload
[08:42:42] [PASSED] pf_fails_bad_origin
[08:42:42] [PASSED] pf_fails_bad_type
[08:42:42] [PASSED] pf_txn_reports_error
[08:42:42] [PASSED] pf_txn_sends_pf2guc
[08:42:42] [PASSED] pf_sends_pf2guc
[08:42:42] [SKIPPED] pf_loopback_nop
[08:42:42] [SKIPPED] pf_loopback_echo
[08:42:42] [SKIPPED] pf_loopback_fail
[08:42:42] [SKIPPED] pf_loopback_busy
[08:42:42] [SKIPPED] pf_loopback_retry
[08:42:42] ==================== [PASSED] pf_relay =====================
[08:42:42] ================== vf_relay (3 subtests) ===================
[08:42:42] [PASSED] vf_rejects_guc2vf_too_short
[08:42:42] [PASSED] vf_rejects_guc2vf_too_long
[08:42:42] [PASSED] vf_rejects_guc2vf_no_payload
[08:42:42] ==================== [PASSED] vf_relay =====================
[08:42:42] ================= pf_service (11 subtests) =================
[08:42:42] [PASSED] pf_negotiate_any
[08:42:42] [PASSED] pf_negotiate_base_match
[08:42:42] [PASSED] pf_negotiate_base_newer
[08:42:42] [PASSED] pf_negotiate_base_next
[08:42:42] [SKIPPED] pf_negotiate_base_older
[08:42:42] [PASSED] pf_negotiate_base_prev
[08:42:42] [PASSED] pf_negotiate_latest_match
[08:42:42] [PASSED] pf_negotiate_latest_newer
[08:42:42] [PASSED] pf_negotiate_latest_next
[08:42:42] [SKIPPED] pf_negotiate_latest_older
[08:42:42] [SKIPPED] pf_negotiate_latest_prev
[08:42:42] =================== [PASSED] pf_service ====================
[08:42:42] ===================== lmtt (1 subtest) =====================
[08:42:42] ======================== test_ops  =========================
[08:42:42] [PASSED] 2-level
[08:42:42] [PASSED] multi-level
[08:42:42] ==================== [PASSED] test_ops =====================
[08:42:42] ====================== [PASSED] lmtt =======================
[08:42:42] =================== xe_mocs (2 subtests) ===================
[08:42:42] ================ xe_live_mocs_kernel_kunit  ================
[08:42:42] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[08:42:42] ================ xe_live_mocs_reset_kunit  =================
[08:42:42] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[08:42:42] ==================== [SKIPPED] xe_mocs =====================
[08:42:42] ================= xe_migrate (2 subtests) ==================
[08:42:42] ================= xe_migrate_sanity_kunit  =================
[08:42:42] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[08:42:42] ================== xe_validate_ccs_kunit  ==================
[08:42:42] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[08:42:42] =================== [SKIPPED] xe_migrate ===================
[08:42:42] ================== xe_dma_buf (1 subtest) ==================
[08:42:42] ==================== xe_dma_buf_kunit  =====================
[08:42:42] ================ [SKIPPED] xe_dma_buf_kunit ================
[08:42:42] =================== [SKIPPED] xe_dma_buf ===================
[08:42:42] ================= xe_bo_shrink (1 subtest) =================
[08:42:42] =================== xe_bo_shrink_kunit  ====================
[08:42:42] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[08:42:42] ================== [SKIPPED] xe_bo_shrink ==================
[08:42:42] ==================== xe_bo (2 subtests) ====================
[08:42:42] ================== xe_ccs_migrate_kunit  ===================
[08:42:42] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[08:42:42] ==================== xe_bo_evict_kunit  ====================
[08:42:42] =============== [SKIPPED] xe_bo_evict_kunit ================
[08:42:42] ===================== [SKIPPED] xe_bo ======================
[08:42:42] ==================== args (11 subtests) ====================
[08:42:42] [PASSED] count_args_test
[08:42:42] [PASSED] call_args_example
[08:42:42] [PASSED] call_args_test
[08:42:42] [PASSED] drop_first_arg_example
[08:42:42] [PASSED] drop_first_arg_test
[08:42:42] [PASSED] first_arg_example
[08:42:42] [PASSED] first_arg_test
[08:42:42] [PASSED] last_arg_example
[08:42:42] [PASSED] last_arg_test
[08:42:42] [PASSED] pick_arg_example
[08:42:42] [PASSED] sep_comma_example
[08:42:42] ====================== [PASSED] args =======================
[08:42:42] =================== xe_pci (2 subtests) ====================
[08:42:42] ==================== check_graphics_ip  ====================
[08:42:42] [PASSED] 12.70 Xe_LPG
[08:42:42] [PASSED] 12.71 Xe_LPG
[08:42:42] [PASSED] 12.74 Xe_LPG+
[08:42:42] [PASSED] 20.01 Xe2_HPG
[08:42:42] [PASSED] 20.02 Xe2_HPG
[08:42:42] [PASSED] 20.04 Xe2_LPG
[08:42:42] [PASSED] 30.00 Xe3_LPG
[08:42:42] [PASSED] 30.01 Xe3_LPG
[08:42:42] [PASSED] 30.03 Xe3_LPG
[08:42:42] ================ [PASSED] check_graphics_ip ================
[08:42:42] ===================== check_media_ip  ======================
[08:42:42] [PASSED] 13.00 Xe_LPM+
[08:42:42] [PASSED] 13.01 Xe2_HPM
[08:42:42] [PASSED] 20.00 Xe2_LPM
[08:42:42] [PASSED] 30.00 Xe3_LPM
[08:42:42] [PASSED] 30.02 Xe3_LPM
stty: 'standard input': Inappropriate ioctl for device
[08:42:42] ================= [PASSED] check_media_ip ==================
[08:42:42] ===================== [PASSED] xe_pci ======================
[08:42:42] =================== xe_rtp (2 subtests) ====================
[08:42:42] =============== xe_rtp_process_to_sr_tests  ================
[08:42:42] [PASSED] coalesce-same-reg
[08:42:42] [PASSED] no-match-no-add
[08:42:42] [PASSED] match-or
[08:42:42] [PASSED] match-or-xfail
[08:42:42] [PASSED] no-match-no-add-multiple-rules
[08:42:42] [PASSED] two-regs-two-entries
[08:42:42] [PASSED] clr-one-set-other
[08:42:42] [PASSED] set-field
[08:42:42] [PASSED] conflict-duplicate
[08:42:42] [PASSED] conflict-not-disjoint
[08:42:42] [PASSED] conflict-reg-type
[08:42:42] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[08:42:42] ================== xe_rtp_process_tests  ===================
[08:42:42] [PASSED] active1
[08:42:42] [PASSED] active2
[08:42:42] [PASSED] active-inactive
[08:42:42] [PASSED] inactive-active
[08:42:42] [PASSED] inactive-1st_or_active-inactive
[08:42:42] [PASSED] inactive-2nd_or_active-inactive
[08:42:42] [PASSED] inactive-last_or_active-inactive
[08:42:42] [PASSED] inactive-no_or_active-inactive
[08:42:42] ============== [PASSED] xe_rtp_process_tests ===============
[08:42:42] ===================== [PASSED] xe_rtp ======================
[08:42:42] ==================== xe_wa (1 subtest) =====================
[08:42:42] ======================== xe_wa_gt  =========================
[08:42:42] [PASSED] TIGERLAKE (B0)
[08:42:42] [PASSED] DG1 (A0)
[08:42:42] [PASSED] DG1 (B0)
[08:42:42] [PASSED] ALDERLAKE_S (A0)
[08:42:42] [PASSED] ALDERLAKE_S (B0)
[08:42:42] [PASSED] ALDERLAKE_S (C0)
[08:42:42] [PASSED] ALDERLAKE_S (D0)
[08:42:42] [PASSED] ALDERLAKE_P (A0)
[08:42:42] [PASSED] ALDERLAKE_P (B0)
[08:42:42] [PASSED] ALDERLAKE_P (C0)
[08:42:42] [PASSED] ALDERLAKE_S_RPLS (D0)
[08:42:42] [PASSED] ALDERLAKE_P_RPLU (E0)
[08:42:42] [PASSED] DG2_G10 (C0)
[08:42:42] [PASSED] DG2_G11 (B1)
[08:42:42] [PASSED] DG2_G12 (A1)
[08:42:42] [PASSED] METEORLAKE (g:A0, m:A0)
[08:42:42] [PASSED] METEORLAKE (g:A0, m:A0)
[08:42:42] [PASSED] METEORLAKE (g:A0, m:A0)
[08:42:42] [PASSED] LUNARLAKE (g:A0, m:A0)
[08:42:42] [PASSED] LUNARLAKE (g:B0, m:A0)
[08:42:42] [PASSED] BATTLEMAGE (g:A0, m:A1)
[08:42:42] ==================== [PASSED] xe_wa_gt =====================
[08:42:42] ====================== [PASSED] xe_wa ======================
[08:42:42] ============================================================
[08:42:42] Testing complete. Ran 145 tests: passed: 129, skipped: 16
[08:42:42] Elapsed time: 31.270s total, 4.151s configuring, 26.803s building, 0.295s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[08:42:43] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:42:44] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:43:06] Starting KUnit Kernel (1/1)...
[08:43:06] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:43:06] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[08:43:06] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[08:43:06] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[08:43:06] =========== drm_validate_clone_mode (2 subtests) ===========
[08:43:06] ============== drm_test_check_in_clone_mode  ===============
[08:43:06] [PASSED] in_clone_mode
[08:43:06] [PASSED] not_in_clone_mode
[08:43:06] ========== [PASSED] drm_test_check_in_clone_mode ===========
[08:43:06] =============== drm_test_check_valid_clones  ===============
[08:43:06] [PASSED] not_in_clone_mode
[08:43:06] [PASSED] valid_clone
[08:43:06] [PASSED] invalid_clone
[08:43:06] =========== [PASSED] drm_test_check_valid_clones ===========
[08:43:06] ============= [PASSED] drm_validate_clone_mode =============
[08:43:06] ============= drm_validate_modeset (1 subtest) =============
[08:43:06] [PASSED] drm_test_check_connector_changed_modeset
[08:43:06] ============== [PASSED] drm_validate_modeset ===============
[08:43:06] ====== drm_test_bridge_get_current_state (2 subtests) ======
[08:43:06] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[08:43:06] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[08:43:06] ======== [PASSED] drm_test_bridge_get_current_state ========
[08:43:06] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[08:43:06] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[08:43:06] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[08:43:06] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[08:43:06] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[08:43:06] ============== drm_bridge_alloc (2 subtests) ===============
[08:43:06] [PASSED] drm_test_drm_bridge_alloc_basic
[08:43:06] [PASSED] drm_test_drm_bridge_alloc_get_put
[08:43:06] ================ [PASSED] drm_bridge_alloc =================
[08:43:06] ================== drm_buddy (7 subtests) ==================
[08:43:06] [PASSED] drm_test_buddy_alloc_limit
[08:43:06] [PASSED] drm_test_buddy_alloc_optimistic
[08:43:06] [PASSED] drm_test_buddy_alloc_pessimistic
[08:43:06] [PASSED] drm_test_buddy_alloc_pathological
[08:43:06] [PASSED] drm_test_buddy_alloc_contiguous
[08:43:06] [PASSED] drm_test_buddy_alloc_clear
[08:43:06] [PASSED] drm_test_buddy_alloc_range_bias
[08:43:06] ==================== [PASSED] drm_buddy ====================
[08:43:06] ============= drm_cmdline_parser (40 subtests) =============
[08:43:06] [PASSED] drm_test_cmdline_force_d_only
[08:43:06] [PASSED] drm_test_cmdline_force_D_only_dvi
[08:43:06] [PASSED] drm_test_cmdline_force_D_only_hdmi
[08:43:06] [PASSED] drm_test_cmdline_force_D_only_not_digital
[08:43:06] [PASSED] drm_test_cmdline_force_e_only
[08:43:06] [PASSED] drm_test_cmdline_res
[08:43:06] [PASSED] drm_test_cmdline_res_vesa
[08:43:06] [PASSED] drm_test_cmdline_res_vesa_rblank
[08:43:06] [PASSED] drm_test_cmdline_res_rblank
[08:43:06] [PASSED] drm_test_cmdline_res_bpp
[08:43:06] [PASSED] drm_test_cmdline_res_refresh
[08:43:06] [PASSED] drm_test_cmdline_res_bpp_refresh
[08:43:06] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[08:43:06] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[08:43:06] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[08:43:06] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[08:43:06] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[08:43:06] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[08:43:06] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[08:43:06] [PASSED] drm_test_cmdline_res_margins_force_on
[08:43:06] [PASSED] drm_test_cmdline_res_vesa_margins
[08:43:06] [PASSED] drm_test_cmdline_name
[08:43:06] [PASSED] drm_test_cmdline_name_bpp
[08:43:06] [PASSED] drm_test_cmdline_name_option
[08:43:06] [PASSED] drm_test_cmdline_name_bpp_option
[08:43:06] [PASSED] drm_test_cmdline_rotate_0
[08:43:06] [PASSED] drm_test_cmdline_rotate_90
[08:43:06] [PASSED] drm_test_cmdline_rotate_180
[08:43:06] [PASSED] drm_test_cmdline_rotate_270
[08:43:06] [PASSED] drm_test_cmdline_hmirror
[08:43:06] [PASSED] drm_test_cmdline_vmirror
[08:43:06] [PASSED] drm_test_cmdline_margin_options
[08:43:06] [PASSED] drm_test_cmdline_multiple_options
[08:43:06] [PASSED] drm_test_cmdline_bpp_extra_and_option
[08:43:06] [PASSED] drm_test_cmdline_extra_and_option
[08:43:06] [PASSED] drm_test_cmdline_freestanding_options
[08:43:06] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[08:43:06] [PASSED] drm_test_cmdline_panel_orientation
[08:43:06] ================ drm_test_cmdline_invalid  =================
[08:43:06] [PASSED] margin_only
[08:43:06] [PASSED] interlace_only
[08:43:06] [PASSED] res_missing_x
[08:43:06] [PASSED] res_missing_y
[08:43:06] [PASSED] res_bad_y
[08:43:06] [PASSED] res_missing_y_bpp
[08:43:06] [PASSED] res_bad_bpp
[08:43:06] [PASSED] res_bad_refresh
[08:43:06] [PASSED] res_bpp_refresh_force_on_off
[08:43:06] [PASSED] res_invalid_mode
[08:43:06] [PASSED] res_bpp_wrong_place_mode
[08:43:06] [PASSED] name_bpp_refresh
[08:43:06] [PASSED] name_refresh
[08:43:06] [PASSED] name_refresh_wrong_mode
[08:43:06] [PASSED] name_refresh_invalid_mode
[08:43:06] [PASSED] rotate_multiple
[08:43:06] [PASSED] rotate_invalid_val
[08:43:06] [PASSED] rotate_truncated
[08:43:06] [PASSED] invalid_option
[08:43:06] [PASSED] invalid_tv_option
[08:43:06] [PASSED] truncated_tv_option
[08:43:06] ============ [PASSED] drm_test_cmdline_invalid =============
[08:43:06] =============== drm_test_cmdline_tv_options  ===============
[08:43:06] [PASSED] NTSC
[08:43:06] [PASSED] NTSC_443
[08:43:06] [PASSED] NTSC_J
[08:43:06] [PASSED] PAL
[08:43:06] [PASSED] PAL_M
[08:43:06] [PASSED] PAL_N
[08:43:06] [PASSED] SECAM
[08:43:06] [PASSED] MONO_525
[08:43:06] [PASSED] MONO_625
[08:43:06] =========== [PASSED] drm_test_cmdline_tv_options ===========
[08:43:06] =============== [PASSED] drm_cmdline_parser ================
[08:43:06] ========== drmm_connector_hdmi_init (20 subtests) ==========
[08:43:06] [PASSED] drm_test_connector_hdmi_init_valid
[08:43:06] [PASSED] drm_test_connector_hdmi_init_bpc_8
[08:43:06] [PASSED] drm_test_connector_hdmi_init_bpc_10
[08:43:06] [PASSED] drm_test_connector_hdmi_init_bpc_12
[08:43:06] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[08:43:06] [PASSED] drm_test_connector_hdmi_init_bpc_null
[08:43:06] [PASSED] drm_test_connector_hdmi_init_formats_empty
[08:43:06] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[08:43:06] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[08:43:06] [PASSED] supported_formats=0x9 yuv420_allowed=1
[08:43:06] [PASSED] supported_formats=0x9 yuv420_allowed=0
[08:43:06] [PASSED] supported_formats=0x3 yuv420_allowed=1
[08:43:06] [PASSED] supported_formats=0x3 yuv420_allowed=0
[08:43:06] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[08:43:06] [PASSED] drm_test_connector_hdmi_init_null_ddc
[08:43:06] [PASSED] drm_test_connector_hdmi_init_null_product
[08:43:06] [PASSED] drm_test_connector_hdmi_init_null_vendor
[08:43:06] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[08:43:06] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[08:43:06] [PASSED] drm_test_connector_hdmi_init_product_valid
[08:43:06] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[08:43:06] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[08:43:06] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[08:43:06] ========= drm_test_connector_hdmi_init_type_valid  =========
[08:43:06] [PASSED] HDMI-A
[08:43:06] [PASSED] HDMI-B
[08:43:06] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[08:43:06] ======== drm_test_connector_hdmi_init_type_invalid  ========
[08:43:06] [PASSED] Unknown
[08:43:06] [PASSED] VGA
[08:43:06] [PASSED] DVI-I
[08:43:06] [PASSED] DVI-D
[08:43:06] [PASSED] DVI-A
[08:43:06] [PASSED] Composite
[08:43:06] [PASSED] SVIDEO
[08:43:06] [PASSED] LVDS
[08:43:06] [PASSED] Component
[08:43:06] [PASSED] DIN
[08:43:06] [PASSED] DP
[08:43:06] [PASSED] TV
[08:43:06] [PASSED] eDP
[08:43:06] [PASSED] Virtual
[08:43:06] [PASSED] DSI
[08:43:06] [PASSED] DPI
[08:43:06] [PASSED] Writeback
[08:43:06] [PASSED] SPI
[08:43:06] [PASSED] USB
[08:43:06] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[08:43:06] ============ [PASSED] drmm_connector_hdmi_init =============
[08:43:06] ============= drmm_connector_init (3 subtests) =============
[08:43:06] [PASSED] drm_test_drmm_connector_init
[08:43:06] [PASSED] drm_test_drmm_connector_init_null_ddc
[08:43:06] ========= drm_test_drmm_connector_init_type_valid  =========
[08:43:06] [PASSED] Unknown
[08:43:06] [PASSED] VGA
[08:43:06] [PASSED] DVI-I
[08:43:06] [PASSED] DVI-D
[08:43:06] [PASSED] DVI-A
[08:43:06] [PASSED] Composite
[08:43:06] [PASSED] SVIDEO
[08:43:06] [PASSED] LVDS
[08:43:06] [PASSED] Component
[08:43:06] [PASSED] DIN
[08:43:06] [PASSED] DP
[08:43:06] [PASSED] HDMI-A
[08:43:06] [PASSED] HDMI-B
[08:43:06] [PASSED] TV
[08:43:06] [PASSED] eDP
[08:43:06] [PASSED] Virtual
[08:43:06] [PASSED] DSI
[08:43:06] [PASSED] DPI
[08:43:06] [PASSED] Writeback
[08:43:06] [PASSED] SPI
[08:43:06] [PASSED] USB
[08:43:06] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[08:43:06] =============== [PASSED] drmm_connector_init ===============
[08:43:06] ========= drm_connector_dynamic_init (6 subtests) ==========
[08:43:06] [PASSED] drm_test_drm_connector_dynamic_init
[08:43:06] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[08:43:06] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[08:43:06] [PASSED] drm_test_drm_connector_dynamic_init_properties
[08:43:06] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[08:43:06] [PASSED] Unknown
[08:43:06] [PASSED] VGA
[08:43:06] [PASSED] DVI-I
[08:43:06] [PASSED] DVI-D
[08:43:06] [PASSED] DVI-A
[08:43:06] [PASSED] Composite
[08:43:06] [PASSED] SVIDEO
[08:43:06] [PASSED] LVDS
[08:43:06] [PASSED] Component
[08:43:06] [PASSED] DIN
[08:43:06] [PASSED] DP
[08:43:06] [PASSED] HDMI-A
[08:43:06] [PASSED] HDMI-B
[08:43:06] [PASSED] TV
[08:43:06] [PASSED] eDP
[08:43:06] [PASSED] Virtual
[08:43:06] [PASSED] DSI
[08:43:06] [PASSED] DPI
[08:43:06] [PASSED] Writeback
[08:43:06] [PASSED] SPI
[08:43:06] [PASSED] USB
[08:43:06] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[08:43:06] ======== drm_test_drm_connector_dynamic_init_name  =========
[08:43:06] [PASSED] Unknown
[08:43:06] [PASSED] VGA
[08:43:06] [PASSED] DVI-I
[08:43:06] [PASSED] DVI-D
[08:43:06] [PASSED] DVI-A
[08:43:06] [PASSED] Composite
[08:43:06] [PASSED] SVIDEO
[08:43:06] [PASSED] LVDS
[08:43:06] [PASSED] Component
[08:43:06] [PASSED] DIN
[08:43:06] [PASSED] DP
[08:43:06] [PASSED] HDMI-A
[08:43:06] [PASSED] HDMI-B
[08:43:06] [PASSED] TV
[08:43:06] [PASSED] eDP
[08:43:06] [PASSED] Virtual
[08:43:06] [PASSED] DSI
[08:43:06] [PASSED] DPI
[08:43:06] [PASSED] Writeback
[08:43:06] [PASSED] SPI
[08:43:06] [PASSED] USB
[08:43:06] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[08:43:06] =========== [PASSED] drm_connector_dynamic_init ============
[08:43:06] ==== drm_connector_dynamic_register_early (4 subtests) =====
[08:43:06] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[08:43:06] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[08:43:06] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[08:43:06] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[08:43:06] ====== [PASSED] drm_connector_dynamic_register_early =======
[08:43:06] ======= drm_connector_dynamic_register (7 subtests) ========
[08:43:06] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[08:43:06] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[08:43:06] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[08:43:06] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[08:43:06] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[08:43:06] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[08:43:06] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[08:43:06] ========= [PASSED] drm_connector_dynamic_register ==========
[08:43:06] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[08:43:06] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[08:43:06] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[08:43:06] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[08:43:06] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[08:43:06] ========== drm_test_get_tv_mode_from_name_valid  ===========
[08:43:06] [PASSED] NTSC
[08:43:06] [PASSED] NTSC-443
[08:43:06] [PASSED] NTSC-J
[08:43:06] [PASSED] PAL
[08:43:06] [PASSED] PAL-M
[08:43:06] [PASSED] PAL-N
[08:43:06] [PASSED] SECAM
[08:43:06] [PASSED] Mono
[08:43:06] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[08:43:06] [PASSED] drm_test_get_tv_mode_from_name_truncated
[08:43:06] ============ [PASSED] drm_get_tv_mode_from_name ============
[08:43:06] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[08:43:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[08:43:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[08:43:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[08:43:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[08:43:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[08:43:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[08:43:06] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[08:43:06] [PASSED] VIC 96
[08:43:06] [PASSED] VIC 97
[08:43:06] [PASSED] VIC 101
[08:43:06] [PASSED] VIC 102
[08:43:06] [PASSED] VIC 106
[08:43:06] [PASSED] VIC 107
[08:43:06] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[08:43:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[08:43:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[08:43:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[08:43:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[08:43:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[08:43:06] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[08:43:06] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[08:43:06] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[08:43:06] [PASSED] Automatic
[08:43:06] [PASSED] Full
[08:43:06] [PASSED] Limited 16:235
[08:43:06] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[08:43:06] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[08:43:06] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[08:43:06] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[08:43:06] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[08:43:06] [PASSED] RGB
[08:43:06] [PASSED] YUV 4:2:0
[08:43:06] [PASSED] YUV 4:2:2
[08:43:06] [PASSED] YUV 4:4:4
[08:43:06] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[08:43:06] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[08:43:06] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[08:43:06] ============= drm_damage_helper (21 subtests) ==============
[08:43:06] [PASSED] drm_test_damage_iter_no_damage
[08:43:06] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[08:43:06] [PASSED] drm_test_damage_iter_no_damage_src_moved
[08:43:06] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[08:43:06] [PASSED] drm_test_damage_iter_no_damage_not_visible
[08:43:06] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[08:43:06] [PASSED] drm_test_damage_iter_no_damage_no_fb
[08:43:06] [PASSED] drm_test_damage_iter_simple_damage
[08:43:06] [PASSED] drm_test_damage_iter_single_damage
[08:43:06] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[08:43:06] [PASSED] drm_test_damage_iter_single_damage_outside_src
[08:43:06] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[08:43:06] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[08:43:06] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[08:43:06] [PASSED] drm_test_damage_iter_single_damage_src_moved
[08:43:06] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[08:43:06] [PASSED] drm_test_damage_iter_damage
[08:43:06] [PASSED] drm_test_damage_iter_damage_one_intersect
[08:43:06] [PASSED] drm_test_damage_iter_damage_one_outside
[08:43:06] [PASSED] drm_test_damage_iter_damage_src_moved
[08:43:06] [PASSED] drm_test_damage_iter_damage_not_visible
[08:43:06] ================ [PASSED] drm_damage_helper ================
[08:43:06] ============== drm_dp_mst_helper (3 subtests) ==============
[08:43:06] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[08:43:06] [PASSED] Clock 154000 BPP 30 DSC disabled
[08:43:06] [PASSED] Clock 234000 BPP 30 DSC disabled
[08:43:06] [PASSED] Clock 297000 BPP 24 DSC disabled
[08:43:06] [PASSED] Clock 332880 BPP 24 DSC enabled
[08:43:06] [PASSED] Clock 324540 BPP 24 DSC enabled
[08:43:06] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[08:43:06] ============== drm_test_dp_mst_calc_pbn_div  ===============
[08:43:06] [PASSED] Link rate 2000000 lane count 4
[08:43:06] [PASSED] Link rate 2000000 lane count 2
[08:43:06] [PASSED] Link rate 2000000 lane count 1
[08:43:06] [PASSED] Link rate 1350000 lane count 4
[08:43:06] [PASSED] Link rate 1350000 lane count 2
[08:43:06] [PASSED] Link rate 1350000 lane count 1
[08:43:06] [PASSED] Link rate 1000000 lane count 4
[08:43:06] [PASSED] Link rate 1000000 lane count 2
[08:43:06] [PASSED] Link rate 1000000 lane count 1
[08:43:06] [PASSED] Link rate 810000 lane count 4
[08:43:06] [PASSED] Link rate 810000 lane count 2
[08:43:06] [PASSED] Link rate 810000 lane count 1
[08:43:06] [PASSED] Link rate 540000 lane count 4
[08:43:06] [PASSED] Link rate 540000 lane count 2
[08:43:06] [PASSED] Link rate 540000 lane count 1
[08:43:06] [PASSED] Link rate 270000 lane count 4
[08:43:06] [PASSED] Link rate 270000 lane count 2
[08:43:06] [PASSED] Link rate 270000 lane count 1
[08:43:06] [PASSED] Link rate 162000 lane count 4
[08:43:06] [PASSED] Link rate 162000 lane count 2
[08:43:06] [PASSED] Link rate 162000 lane count 1
[08:43:06] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[08:43:06] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[08:43:06] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[08:43:06] [PASSED] DP_POWER_UP_PHY with port number
[08:43:06] [PASSED] DP_POWER_DOWN_PHY with port number
[08:43:06] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[08:43:06] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[08:43:06] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[08:43:06] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[08:43:06] [PASSED] DP_QUERY_PAYLOAD with port number
[08:43:06] [PASSED] DP_QUERY_PAYLOAD with VCPI
[08:43:06] [PASSED] DP_REMOTE_DPCD_READ with port number
[08:43:06] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[08:43:06] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[08:43:06] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[08:43:06] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[08:43:06] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[08:43:06] [PASSED] DP_REMOTE_I2C_READ with port number
[08:43:06] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[08:43:06] [PASSED] DP_REMOTE_I2C_READ with transactions array
[08:43:06] [PASSED] DP_REMOTE_I2C_WRITE with port number
[08:43:06] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[08:43:06] [PASSED] DP_REMOTE_I2C_WRITE with data array
[08:43:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[08:43:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[08:43:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[08:43:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[08:43:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[08:43:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[08:43:06] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[08:43:06] ================ [PASSED] drm_dp_mst_helper ================
[08:43:06] ================== drm_exec (7 subtests) ===================
[08:43:06] [PASSED] sanitycheck
[08:43:06] [PASSED] test_lock
[08:43:06] [PASSED] test_lock_unlock
[08:43:06] [PASSED] test_duplicates
[08:43:06] [PASSED] test_prepare
[08:43:06] [PASSED] test_prepare_array
[08:43:06] [PASSED] test_multiple_loops
[08:43:06] ==================== [PASSED] drm_exec =====================
[08:43:06] =========== drm_format_helper_test (17 subtests) ===========
[08:43:06] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[08:43:06] [PASSED] single_pixel_source_buffer
[08:43:06] [PASSED] single_pixel_clip_rectangle
[08:43:06] [PASSED] well_known_colors
[08:43:06] [PASSED] destination_pitch
[08:43:06] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[08:43:06] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[08:43:06] [PASSED] single_pixel_source_buffer
[08:43:06] [PASSED] single_pixel_clip_rectangle
[08:43:06] [PASSED] well_known_colors
[08:43:06] [PASSED] destination_pitch
[08:43:06] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[08:43:06] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[08:43:06] [PASSED] single_pixel_source_buffer
[08:43:06] [PASSED] single_pixel_clip_rectangle
[08:43:06] [PASSED] well_known_colors
[08:43:06] [PASSED] destination_pitch
[08:43:06] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[08:43:06] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[08:43:06] [PASSED] single_pixel_source_buffer
[08:43:06] [PASSED] single_pixel_clip_rectangle
[08:43:06] [PASSED] well_known_colors
[08:43:06] [PASSED] destination_pitch
[08:43:06] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[08:43:06] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[08:43:06] [PASSED] single_pixel_source_buffer
[08:43:06] [PASSED] single_pixel_clip_rectangle
[08:43:06] [PASSED] well_known_colors
[08:43:06] [PASSED] destination_pitch
[08:43:06] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[08:43:06] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[08:43:06] [PASSED] single_pixel_source_buffer
[08:43:06] [PASSED] single_pixel_clip_rectangle
[08:43:06] [PASSED] well_known_colors
[08:43:06] [PASSED] destination_pitch
[08:43:06] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[08:43:06] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[08:43:06] [PASSED] single_pixel_source_buffer
[08:43:06] [PASSED] single_pixel_clip_rectangle
[08:43:06] [PASSED] well_known_colors
[08:43:06] [PASSED] destination_pitch
[08:43:06] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[08:43:06] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[08:43:06] [PASSED] single_pixel_source_buffer
[08:43:06] [PASSED] single_pixel_clip_rectangle
[08:43:06] [PASSED] well_known_colors
[08:43:06] [PASSED] destination_pitch
[08:43:06] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[08:43:06] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[08:43:06] [PASSED] single_pixel_source_buffer
[08:43:06] [PASSED] single_pixel_clip_rectangle
[08:43:06] [PASSED] well_known_colors
[08:43:06] [PASSED] destination_pitch
[08:43:06] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[08:43:06] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[08:43:06] [PASSED] single_pixel_source_buffer
[08:43:06] [PASSED] single_pixel_clip_rectangle
[08:43:06] [PASSED] well_known_colors
[08:43:06] [PASSED] destination_pitch
[08:43:06] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[08:43:06] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[08:43:06] [PASSED] single_pixel_source_buffer
[08:43:06] [PASSED] single_pixel_clip_rectangle
[08:43:06] [PASSED] well_known_colors
[08:43:06] [PASSED] destination_pitch
[08:43:06] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[08:43:06] ============== drm_test_fb_xrgb8888_to_mono  ===============
[08:43:06] [PASSED] single_pixel_source_buffer
[08:43:06] [PASSED] single_pixel_clip_rectangle
[08:43:06] [PASSED] well_known_colors
[08:43:06] [PASSED] destination_pitch
[08:43:06] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[08:43:06] ==================== drm_test_fb_swab  =====================
[08:43:06] [PASSED] single_pixel_source_buffer
[08:43:06] [PASSED] single_pixel_clip_rectangle
[08:43:06] [PASSED] well_known_colors
[08:43:06] [PASSED] destination_pitch
[08:43:06] ================ [PASSED] drm_test_fb_swab =================
[08:43:06] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[08:43:06] [PASSED] single_pixel_source_buffer
[08:43:06] [PASSED] single_pixel_clip_rectangle
[08:43:06] [PASSED] well_known_colors
[08:43:06] [PASSED] destination_pitch
[08:43:06] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[08:43:06] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[08:43:06] [PASSED] single_pixel_source_buffer
[08:43:06] [PASSED] single_pixel_clip_rectangle
[08:43:06] [PASSED] well_known_colors
[08:43:06] [PASSED] destination_pitch
[08:43:06] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[08:43:06] ================= drm_test_fb_clip_offset  =================
[08:43:06] [PASSED] pass through
[08:43:06] [PASSED] horizontal offset
[08:43:06] [PASSED] vertical offset
[08:43:06] [PASSED] horizontal and vertical offset
[08:43:06] [PASSED] horizontal offset (custom pitch)
[08:43:06] [PASSED] vertical offset (custom pitch)
[08:43:06] [PASSED] horizontal and vertical offset (custom pitch)
[08:43:06] ============= [PASSED] drm_test_fb_clip_offset =============
[08:43:06] =================== drm_test_fb_memcpy  ====================
[08:43:06] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[08:43:06] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[08:43:06] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[08:43:06] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[08:43:06] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[08:43:06] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[08:43:06] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[08:43:06] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[08:43:06] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[08:43:06] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[08:43:06] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[08:43:06] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[08:43:06] =============== [PASSED] drm_test_fb_memcpy ================
[08:43:06] ============= [PASSED] drm_format_helper_test ==============
[08:43:06] ================= drm_format (18 subtests) =================
[08:43:06] [PASSED] drm_test_format_block_width_invalid
[08:43:06] [PASSED] drm_test_format_block_width_one_plane
[08:43:06] [PASSED] drm_test_format_block_width_two_plane
[08:43:06] [PASSED] drm_test_format_block_width_three_plane
[08:43:06] [PASSED] drm_test_format_block_width_tiled
[08:43:06] [PASSED] drm_test_format_block_height_invalid
[08:43:06] [PASSED] drm_test_format_block_height_one_plane
[08:43:06] [PASSED] drm_test_format_block_height_two_plane
[08:43:06] [PASSED] drm_test_format_block_height_three_plane
[08:43:06] [PASSED] drm_test_format_block_height_tiled
[08:43:06] [PASSED] drm_test_format_min_pitch_invalid
[08:43:06] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[08:43:06] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[08:43:06] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[08:43:06] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[08:43:06] [PASSED] drm_test_format_min_pitch_two_plane
[08:43:06] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[08:43:06] [PASSED] drm_test_format_min_pitch_tiled
[08:43:06] =================== [PASSED] drm_format ====================
[08:43:06] ============== drm_framebuffer (10 subtests) ===============
[08:43:06] ========== drm_test_framebuffer_check_src_coords  ==========
[08:43:06] [PASSED] Success: source fits into fb
[08:43:06] [PASSED] Fail: overflowing fb with x-axis coordinate
[08:43:06] [PASSED] Fail: overflowing fb with y-axis coordinate
[08:43:06] [PASSED] Fail: overflowing fb with source width
[08:43:06] [PASSED] Fail: overflowing fb with source height
[08:43:06] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[08:43:06] [PASSED] drm_test_framebuffer_cleanup
[08:43:06] =============== drm_test_framebuffer_create  ===============
[08:43:06] [PASSED] ABGR8888 normal sizes
[08:43:06] [PASSED] ABGR8888 max sizes
[08:43:06] [PASSED] ABGR8888 pitch greater than min required
[08:43:06] [PASSED] ABGR8888 pitch less than min required
[08:43:06] [PASSED] ABGR8888 Invalid width
[08:43:06] [PASSED] ABGR8888 Invalid buffer handle
[08:43:06] [PASSED] No pixel format
[08:43:06] [PASSED] ABGR8888 Width 0
[08:43:06] [PASSED] ABGR8888 Height 0
[08:43:06] [PASSED] ABGR8888 Out of bound height * pitch combination
[08:43:06] [PASSED] ABGR8888 Large buffer offset
[08:43:06] [PASSED] ABGR8888 Buffer offset for inexistent plane
[08:43:06] [PASSED] ABGR8888 Invalid flag
[08:43:06] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[08:43:06] [PASSED] ABGR8888 Valid buffer modifier
[08:43:06] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[08:43:06] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[08:43:06] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[08:43:06] [PASSED] NV12 Normal sizes
[08:43:06] [PASSED] NV12 Max sizes
[08:43:06] [PASSED] NV12 Invalid pitch
[08:43:06] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[08:43:06] [PASSED] NV12 different  modifier per-plane
[08:43:06] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[08:43:06] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[08:43:06] [PASSED] NV12 Modifier for inexistent plane
[08:43:06] [PASSED] NV12 Handle for inexistent plane
[08:43:06] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[08:43:06] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[08:43:06] [PASSED] YVU420 Normal sizes
[08:43:06] [PASSED] YVU420 Max sizes
[08:43:06] [PASSED] YVU420 Invalid pitch
[08:43:06] [PASSED] YVU420 Different pitches
[08:43:06] [PASSED] YVU420 Different buffer offsets/pitches
[08:43:06] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[08:43:06] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[08:43:06] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[08:43:06] [PASSED] YVU420 Valid modifier
[08:43:06] [PASSED] YVU420 Different modifiers per plane
[08:43:06] [PASSED] YVU420 Modifier for inexistent plane
[08:43:06] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[08:43:06] [PASSED] X0L2 Normal sizes
[08:43:06] [PASSED] X0L2 Max sizes
[08:43:06] [PASSED] X0L2 Invalid pitch
[08:43:06] [PASSED] X0L2 Pitch greater than minimum required
[08:43:06] [PASSED] X0L2 Handle for inexistent plane
[08:43:06] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[08:43:06] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[08:43:06] [PASSED] X0L2 Valid modifier
[08:43:06] [PASSED] X0L2 Modifier for inexistent plane
[08:43:06] =========== [PASSED] drm_test_framebuffer_create ===========
[08:43:06] [PASSED] drm_test_framebuffer_free
[08:43:06] [PASSED] drm_test_framebuffer_init
[08:43:06] [PASSED] drm_test_framebuffer_init_bad_format
[08:43:06] [PASSED] drm_test_framebuffer_init_dev_mismatch
[08:43:06] [PASSED] drm_test_framebuffer_lookup
[08:43:06] [PASSED] drm_test_framebuffer_lookup_inexistent
[08:43:06] [PASSED] drm_test_framebuffer_modifiers_not_supported
[08:43:06] ================= [PASSED] drm_framebuffer =================
[08:43:06] ================ drm_gem_shmem (8 subtests) ================
[08:43:06] [PASSED] drm_gem_shmem_test_obj_create
[08:43:06] [PASSED] drm_gem_shmem_test_obj_create_private
[08:43:06] [PASSED] drm_gem_shmem_test_pin_pages
[08:43:06] [PASSED] drm_gem_shmem_test_vmap
[08:43:06] [PASSED] drm_gem_shmem_test_get_pages_sgt
[08:43:06] [PASSED] drm_gem_shmem_test_get_sg_table
[08:43:06] [PASSED] drm_gem_shmem_test_madvise
[08:43:06] [PASSED] drm_gem_shmem_test_purge
[08:43:06] ================== [PASSED] drm_gem_shmem ==================
[08:43:06] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[08:43:06] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[08:43:06] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[08:43:06] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[08:43:06] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[08:43:06] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[08:43:06] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[08:43:06] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[08:43:06] [PASSED] Automatic
[08:43:06] [PASSED] Full
[08:43:06] [PASSED] Limited 16:235
[08:43:06] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[08:43:06] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[08:43:06] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[08:43:06] [PASSED] drm_test_check_disable_connector
[08:43:06] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[08:43:06] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[08:43:06] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[08:43:06] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[08:43:06] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[08:43:06] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[08:43:06] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[08:43:06] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[08:43:06] [PASSED] drm_test_check_output_bpc_dvi
[08:43:06] [PASSED] drm_test_check_output_bpc_format_vic_1
[08:43:06] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[08:43:06] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[08:43:06] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[08:43:06] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[08:43:06] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[08:43:06] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[08:43:06] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[08:43:06] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[08:43:06] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[08:43:06] [PASSED] drm_test_check_broadcast_rgb_value
[08:43:06] [PASSED] drm_test_check_bpc_8_value
[08:43:06] [PASSED] drm_test_check_bpc_10_value
[08:43:06] [PASSED] drm_test_check_bpc_12_value
[08:43:06] [PASSED] drm_test_check_format_value
[08:43:06] [PASSED] drm_test_check_tmds_char_value
[08:43:06] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[08:43:06] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[08:43:06] [PASSED] drm_test_check_mode_valid
[08:43:06] [PASSED] drm_test_check_mode_valid_reject
[08:43:06] [PASSED] drm_test_check_mode_valid_reject_rate
[08:43:06] [PASSED] drm_test_check_mode_valid_reject_max_clock
[08:43:06] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[08:43:06] ================= drm_managed (2 subtests) =================
[08:43:06] [PASSED] drm_test_managed_release_action
[08:43:06] [PASSED] drm_test_managed_run_action
[08:43:06] =================== [PASSED] drm_managed ===================
[08:43:06] =================== drm_mm (6 subtests) ====================
[08:43:06] [PASSED] drm_test_mm_init
[08:43:06] [PASSED] drm_test_mm_debug
[08:43:06] [PASSED] drm_test_mm_align32
[08:43:06] [PASSED] drm_test_mm_align64
[08:43:06] [PASSED] drm_test_mm_lowest
[08:43:06] [PASSED] drm_test_mm_highest
[08:43:06] ===================== [PASSED] drm_mm ======================
[08:43:06] ============= drm_modes_analog_tv (5 subtests) =============
[08:43:06] [PASSED] drm_test_modes_analog_tv_mono_576i
[08:43:06] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[08:43:06] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[08:43:06] [PASSED] drm_test_modes_analog_tv_pal_576i
[08:43:06] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[08:43:06] =============== [PASSED] drm_modes_analog_tv ===============
[08:43:06] ============== drm_plane_helper (2 subtests) ===============
[08:43:06] =============== drm_test_check_plane_state  ================
[08:43:06] [PASSED] clipping_simple
[08:43:06] [PASSED] clipping_rotate_reflect
[08:43:06] [PASSED] positioning_simple
[08:43:06] [PASSED] upscaling
[08:43:06] [PASSED] downscaling
[08:43:06] [PASSED] rounding1
[08:43:06] [PASSED] rounding2
[08:43:06] [PASSED] rounding3
[08:43:06] [PASSED] rounding4
[08:43:06] =========== [PASSED] drm_test_check_plane_state ============
[08:43:06] =========== drm_test_check_invalid_plane_state  ============
[08:43:06] [PASSED] positioning_invalid
[08:43:06] [PASSED] upscaling_invalid
[08:43:06] [PASSED] downscaling_invalid
[08:43:06] ======= [PASSED] drm_test_check_invalid_plane_state ========
[08:43:06] ================ [PASSED] drm_plane_helper =================
[08:43:06] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[08:43:06] ====== drm_test_connector_helper_tv_get_modes_check  =======
[08:43:06] [PASSED] None
[08:43:06] [PASSED] PAL
[08:43:06] [PASSED] NTSC
[08:43:06] [PASSED] Both, NTSC Default
[08:43:06] [PASSED] Both, PAL Default
[08:43:06] [PASSED] Both, NTSC Default, with PAL on command-line
[08:43:06] [PASSED] Both, PAL Default, with NTSC on command-line
[08:43:06] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[08:43:06] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[08:43:06] ================== drm_rect (9 subtests) ===================
[08:43:06] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[08:43:06] [PASSED] drm_test_rect_clip_scaled_not_clipped
[08:43:06] [PASSED] drm_test_rect_clip_scaled_clipped
[08:43:06] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[08:43:06] ================= drm_test_rect_intersect  =================
[08:43:06] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[08:43:06] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[08:43:06] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[08:43:06] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[08:43:06] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[08:43:06] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[08:43:06] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[08:43:06] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[08:43:06] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[08:43:06] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[08:43:06] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[08:43:06] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[08:43:06] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[08:43:06] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[08:43:06] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[08:43:06] ============= [PASSED] drm_test_rect_intersect =============
[08:43:06] ================ drm_test_rect_calc_hscale  ================
[08:43:06] [PASSED] normal use
[08:43:06] [PASSED] out of max range
[08:43:06] [PASSED] out of min range
[08:43:06] [PASSED] zero dst
[08:43:06] [PASSED] negative src
[08:43:06] [PASSED] negative dst
[08:43:06] ============ [PASSED] drm_test_rect_calc_hscale ============
[08:43:06] ================ drm_test_rect_calc_vscale  ================
[08:43:06] [PASSED] normal use
[08:43:06] [PASSED] out of max range
[08:43:06] [PASSED] out of min range
[08:43:06] [PASSED] zero dst
[08:43:06] [PASSED] negative src
[08:43:06] [PASSED] negative dst
[08:43:06] ============ [PASSED] drm_test_rect_calc_vscale ============
[08:43:06] ================== drm_test_rect_rotate  ===================
[08:43:06] [PASSED] reflect-x
[08:43:06] [PASSED] reflect-y
[08:43:06] [PASSED] rotate-0
[08:43:06] [PASSED] rotate-90
[08:43:06] [PASSED] rotate-180
[08:43:06] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[08:43:06] ============== [PASSED] drm_test_rect_rotate ===============
[08:43:06] ================ drm_test_rect_rotate_inv  =================
[08:43:06] [PASSED] reflect-x
[08:43:06] [PASSED] reflect-y
[08:43:06] [PASSED] rotate-0
[08:43:06] [PASSED] rotate-90
[08:43:06] [PASSED] rotate-180
[08:43:06] [PASSED] rotate-270
[08:43:06] ============ [PASSED] drm_test_rect_rotate_inv =============
[08:43:06] ==================== [PASSED] drm_rect =====================
[08:43:06] ============ drm_sysfb_modeset_test (1 subtest) ============
[08:43:06] ============ drm_test_sysfb_build_fourcc_list  =============
[08:43:06] [PASSED] no native formats
[08:43:06] [PASSED] XRGB8888 as native format
[08:43:06] [PASSED] remove duplicates
[08:43:06] [PASSED] convert alpha formats
[08:43:06] [PASSED] random formats
[08:43:06] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[08:43:06] ============= [PASSED] drm_sysfb_modeset_test ==============
[08:43:06] ============================================================
[08:43:06] Testing complete. Ran 616 tests: passed: 616
[08:43:06] Elapsed time: 23.508s total, 1.658s configuring, 21.683s building, 0.147s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[08:43:06] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:43:08] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:43:16] Starting KUnit Kernel (1/1)...
[08:43:16] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:43:16] ================= ttm_device (5 subtests) ==================
[08:43:16] [PASSED] ttm_device_init_basic
[08:43:16] [PASSED] ttm_device_init_multiple
[08:43:16] [PASSED] ttm_device_fini_basic
[08:43:16] [PASSED] ttm_device_init_no_vma_man
[08:43:16] ================== ttm_device_init_pools  ==================
[08:43:16] [PASSED] No DMA allocations, no DMA32 required
[08:43:16] [PASSED] DMA allocations, DMA32 required
[08:43:16] [PASSED] No DMA allocations, DMA32 required
[08:43:16] [PASSED] DMA allocations, no DMA32 required
[08:43:16] ============== [PASSED] ttm_device_init_pools ==============
[08:43:16] =================== [PASSED] ttm_device ====================
[08:43:16] ================== ttm_pool (8 subtests) ===================
[08:43:16] ================== ttm_pool_alloc_basic  ===================
[08:43:16] [PASSED] One page
[08:43:16] [PASSED] More than one page
[08:43:16] [PASSED] Above the allocation limit
[08:43:16] [PASSED] One page, with coherent DMA mappings enabled
[08:43:16] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[08:43:16] ============== [PASSED] ttm_pool_alloc_basic ===============
[08:43:16] ============== ttm_pool_alloc_basic_dma_addr  ==============
[08:43:16] [PASSED] One page
[08:43:16] [PASSED] More than one page
[08:43:16] [PASSED] Above the allocation limit
[08:43:16] [PASSED] One page, with coherent DMA mappings enabled
[08:43:16] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[08:43:16] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[08:43:16] [PASSED] ttm_pool_alloc_order_caching_match
[08:43:16] [PASSED] ttm_pool_alloc_caching_mismatch
[08:43:16] [PASSED] ttm_pool_alloc_order_mismatch
[08:43:16] [PASSED] ttm_pool_free_dma_alloc
[08:43:16] [PASSED] ttm_pool_free_no_dma_alloc
[08:43:16] [PASSED] ttm_pool_fini_basic
[08:43:16] ==================== [PASSED] ttm_pool =====================
[08:43:16] ================ ttm_resource (8 subtests) =================
[08:43:16] ================= ttm_resource_init_basic  =================
[08:43:16] [PASSED] Init resource in TTM_PL_SYSTEM
[08:43:16] [PASSED] Init resource in TTM_PL_VRAM
[08:43:16] [PASSED] Init resource in a private placement
[08:43:16] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[08:43:16] ============= [PASSED] ttm_resource_init_basic =============
[08:43:16] [PASSED] ttm_resource_init_pinned
[08:43:16] [PASSED] ttm_resource_fini_basic
[08:43:16] [PASSED] ttm_resource_manager_init_basic
[08:43:16] [PASSED] ttm_resource_manager_usage_basic
[08:43:16] [PASSED] ttm_resource_manager_set_used_basic
[08:43:16] [PASSED] ttm_sys_man_alloc_basic
[08:43:16] [PASSED] ttm_sys_man_free_basic
[08:43:16] ================== [PASSED] ttm_resource ===================
[08:43:16] =================== ttm_tt (15 subtests) ===================
[08:43:16] ==================== ttm_tt_init_basic  ====================
[08:43:16] [PASSED] Page-aligned size
[08:43:16] [PASSED] Extra pages requested
[08:43:16] ================ [PASSED] ttm_tt_init_basic ================
[08:43:16] [PASSED] ttm_tt_init_misaligned
[08:43:16] [PASSED] ttm_tt_fini_basic
[08:43:16] [PASSED] ttm_tt_fini_sg
[08:43:16] [PASSED] ttm_tt_fini_shmem
[08:43:16] [PASSED] ttm_tt_create_basic
[08:43:16] [PASSED] ttm_tt_create_invalid_bo_type
[08:43:16] [PASSED] ttm_tt_create_ttm_exists
[08:43:16] [PASSED] ttm_tt_create_failed
[08:43:16] [PASSED] ttm_tt_destroy_basic
[08:43:16] [PASSED] ttm_tt_populate_null_ttm
[08:43:16] [PASSED] ttm_tt_populate_populated_ttm
[08:43:16] [PASSED] ttm_tt_unpopulate_basic
[08:43:16] [PASSED] ttm_tt_unpopulate_empty_ttm
[08:43:16] [PASSED] ttm_tt_swapin_basic
[08:43:16] ===================== [PASSED] ttm_tt ======================
[08:43:16] =================== ttm_bo (14 subtests) ===================
[08:43:16] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[08:43:16] [PASSED] Cannot be interrupted and sleeps
[08:43:16] [PASSED] Cannot be interrupted, locks straight away
[08:43:16] [PASSED] Can be interrupted, sleeps
[08:43:16] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[08:43:16] [PASSED] ttm_bo_reserve_locked_no_sleep
[08:43:16] [PASSED] ttm_bo_reserve_no_wait_ticket
[08:43:16] [PASSED] ttm_bo_reserve_double_resv
[08:43:16] [PASSED] ttm_bo_reserve_interrupted
[08:43:16] [PASSED] ttm_bo_reserve_deadlock
[08:43:16] [PASSED] ttm_bo_unreserve_basic
[08:43:16] [PASSED] ttm_bo_unreserve_pinned
[08:43:16] [PASSED] ttm_bo_unreserve_bulk
[08:43:16] [PASSED] ttm_bo_put_basic
[08:43:16] [PASSED] ttm_bo_put_shared_resv
[08:43:16] [PASSED] ttm_bo_pin_basic
[08:43:16] [PASSED] ttm_bo_pin_unpin_resource
[08:43:16] [PASSED] ttm_bo_multiple_pin_one_unpin
[08:43:16] ===================== [PASSED] ttm_bo ======================
[08:43:16] ============== ttm_bo_validate (22 subtests) ===============
[08:43:16] ============== ttm_bo_init_reserved_sys_man  ===============
[08:43:16] [PASSED] Buffer object for userspace
[08:43:16] [PASSED] Kernel buffer object
[08:43:16] [PASSED] Shared buffer object
[08:43:16] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[08:43:16] ============== ttm_bo_init_reserved_mock_man  ==============
[08:43:16] [PASSED] Buffer object for userspace
[08:43:16] [PASSED] Kernel buffer object
[08:43:16] [PASSED] Shared buffer object
[08:43:16] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[08:43:16] [PASSED] ttm_bo_init_reserved_resv
[08:43:16] ================== ttm_bo_validate_basic  ==================
[08:43:16] [PASSED] Buffer object for userspace
[08:43:16] [PASSED] Kernel buffer object
[08:43:16] [PASSED] Shared buffer object
[08:43:16] ============== [PASSED] ttm_bo_validate_basic ==============
[08:43:16] [PASSED] ttm_bo_validate_invalid_placement
[08:43:16] ============= ttm_bo_validate_same_placement  ==============
[08:43:16] [PASSED] System manager
[08:43:16] [PASSED] VRAM manager
[08:43:16] ========= [PASSED] ttm_bo_validate_same_placement ==========
[08:43:16] [PASSED] ttm_bo_validate_failed_alloc
[08:43:16] [PASSED] ttm_bo_validate_pinned
[08:43:16] [PASSED] ttm_bo_validate_busy_placement
[08:43:16] ================ ttm_bo_validate_multihop  =================
[08:43:16] [PASSED] Buffer object for userspace
[08:43:16] [PASSED] Kernel buffer object
[08:43:16] [PASSED] Shared buffer object
[08:43:16] ============ [PASSED] ttm_bo_validate_multihop =============
[08:43:16] ========== ttm_bo_validate_no_placement_signaled  ==========
[08:43:16] [PASSED] Buffer object in system domain, no page vector
[08:43:16] [PASSED] Buffer object in system domain with an existing page vector
[08:43:16] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[08:43:16] ======== ttm_bo_validate_no_placement_not_signaled  ========
[08:43:16] [PASSED] Buffer object for userspace
[08:43:16] [PASSED] Kernel buffer object
[08:43:16] [PASSED] Shared buffer object
[08:43:16] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[08:43:16] [PASSED] ttm_bo_validate_move_fence_signaled
[08:43:16] ========= ttm_bo_validate_move_fence_not_signaled  =========
[08:43:16] [PASSED] Waits for GPU
[08:43:16] [PASSED] Tries to lock straight away
[08:43:16] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[08:43:16] [PASSED] ttm_bo_validate_swapout
[08:43:16] [PASSED] ttm_bo_validate_happy_evict
[08:43:16] [PASSED] ttm_bo_validate_all_pinned_evict
[08:43:16] [PASSED] ttm_bo_validate_allowed_only_evict
[08:43:16] [PASSED] ttm_bo_validate_deleted_evict
[08:43:16] [PASSED] ttm_bo_validate_busy_domain_evict
[08:43:16] [PASSED] ttm_bo_validate_evict_gutting
[08:43:16] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[08:43:16] ================= [PASSED] ttm_bo_validate =================
[08:43:16] ============================================================
[08:43:16] Testing complete. Ran 102 tests: passed: 102
[08:43:16] Elapsed time: 10.109s total, 1.669s configuring, 7.823s building, 0.530s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 25+ messages in thread

* ✓ Xe.CI.BAT: success for Revert patch to reject HBR3 for all eDP panels (rev2)
  2025-06-20 12:44 [PATCH 0/2] Revert patch to reject HBR3 for all eDP panels Ankit Nautiyal
                   ` (4 preceding siblings ...)
  2025-06-24  8:43 ` ✓ CI.KUnit: success for Revert patch to reject HBR3 for all eDP panels (rev2) Patchwork
@ 2025-06-24  9:50 ` Patchwork
  2025-06-24 16:20 ` ✓ Xe.CI.Full: " Patchwork
  6 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2025-06-24  9:50 UTC (permalink / raw)
  To: Nautiyal, Ankit K; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 869 bytes --]

== Series Details ==

Series: Revert patch to reject HBR3 for all eDP panels (rev2)
URL   : https://patchwork.freedesktop.org/series/150568/
State : success

== Summary ==

CI Bug Log - changes from xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7_BAT -> xe-pw-150568v2_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (9 -> 8)
------------------------------

  Missing    (1): bat-adlp-vm 


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7 -> xe-pw-150568v2

  IGT_8423: 8423
  xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7: da56936fad6f5e1d5f0cef8b50277bfb071eefe7
  xe-pw-150568v2: 150568v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/index.html

[-- Attachment #2: Type: text/html, Size: 1417 bytes --]

^ permalink raw reply	[flat|nested] 25+ messages in thread

* ✓ Xe.CI.Full: success for Revert patch to reject HBR3 for all eDP panels (rev2)
  2025-06-20 12:44 [PATCH 0/2] Revert patch to reject HBR3 for all eDP panels Ankit Nautiyal
                   ` (5 preceding siblings ...)
  2025-06-24  9:50 ` ✓ Xe.CI.BAT: " Patchwork
@ 2025-06-24 16:20 ` Patchwork
  6 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2025-06-24 16:20 UTC (permalink / raw)
  To: Nautiyal, Ankit K; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 62144 bytes --]

== Series Details ==

Series: Revert patch to reject HBR3 for all eDP panels (rev2)
URL   : https://patchwork.freedesktop.org/series/150568/
State : success

== Summary ==

CI Bug Log - changes from xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7_FULL -> xe-pw-150568v2_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-150568v2_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@intel_hwmon@hwmon-write:
    - shard-bmg:          NOTRUN -> [FAIL][1] ([Intel XE#4665])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@intel_hwmon@hwmon-write.html

  * igt@kms_big_fb@4-tiled-64bpp-rotate-180:
    - shard-dg2-set2:     [PASS][2] -> [ABORT][3] ([Intel XE#3970])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-dg2-435/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-433/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-adlp:         NOTRUN -> [SKIP][4] ([Intel XE#1124]) +1 other test skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-9/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_big_fb@linear-32bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#2327]) +2 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_big_fb@linear-32bpp-rotate-90.html

  * igt@kms_big_fb@x-tiled-16bpp-rotate-270:
    - shard-dg2-set2:     NOTRUN -> [SKIP][6] ([Intel XE#316])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html
    - shard-adlp:         NOTRUN -> [SKIP][7] ([Intel XE#316])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-9/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-adlp:         [PASS][8] -> [DMESG-FAIL][9] ([Intel XE#4543])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-adlp-6/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-6/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#1124]) +4 other tests skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-6/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-dg2-set2:     NOTRUN -> [SKIP][11] ([Intel XE#1124]) +5 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
    - shard-lnl:          NOTRUN -> [SKIP][12] ([Intel XE#1124])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-lnl-1/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p:
    - shard-bmg:          [PASS][13] -> [SKIP][14] ([Intel XE#2314] / [Intel XE#2894])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-3/igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p.html
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p.html

  * igt@kms_bw@connected-linear-tiling-3-displays-1920x1080p:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#2314] / [Intel XE#2894])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@kms_bw@connected-linear-tiling-3-displays-1920x1080p.html

  * igt@kms_bw@linear-tiling-2-displays-2160x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#367]) +1 other test skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-6/igt@kms_bw@linear-tiling-2-displays-2160x1440p.html

  * igt@kms_bw@linear-tiling-3-displays-2560x1440p:
    - shard-dg2-set2:     NOTRUN -> [SKIP][17] ([Intel XE#367]) +1 other test skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-436/igt@kms_bw@linear-tiling-3-displays-2560x1440p.html

  * igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [SKIP][18] ([Intel XE#787]) +160 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-434/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-6.html

  * igt@kms_ccs@crc-primary-basic-yf-tiled-ccs@pipe-d-dp-2:
    - shard-dg2-set2:     NOTRUN -> [SKIP][19] ([Intel XE#455] / [Intel XE#787]) +26 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@kms_ccs@crc-primary-basic-yf-tiled-ccs@pipe-d-dp-2.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
    - shard-dg2-set2:     [PASS][20] -> [INCOMPLETE][21] ([Intel XE#3862]) +1 other test incomplete
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-dg2-436/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-435/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#2652] / [Intel XE#787]) +8 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#3432])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
    - shard-dg2-set2:     NOTRUN -> [SKIP][24] ([Intel XE#2907])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-436/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][25] ([Intel XE#787]) +5 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-9/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][26] ([Intel XE#455] / [Intel XE#787]) +3 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-9/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#2887]) +6 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-6/igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
    - shard-dg2-set2:     [PASS][28] -> [INCOMPLETE][29] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124]) +1 other test incomplete
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4:
    - shard-dg2-set2:     NOTRUN -> [INCOMPLETE][30] ([Intel XE#3124])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [DMESG-WARN][31] ([Intel XE#1727] / [Intel XE#3113])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6.html

  * igt@kms_cdclk@mode-transition:
    - shard-adlp:         NOTRUN -> [SKIP][32] ([Intel XE#4417] / [Intel XE#455])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-9/igt@kms_cdclk@mode-transition.html

  * igt@kms_cdclk@mode-transition-all-outputs:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#2724])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-6/igt@kms_cdclk@mode-transition-all-outputs.html

  * igt@kms_cdclk@mode-transition@pipe-a-dp-2:
    - shard-dg2-set2:     NOTRUN -> [SKIP][34] ([Intel XE#4417]) +3 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@kms_cdclk@mode-transition@pipe-a-dp-2.html

  * igt@kms_cdclk@mode-transition@pipe-a-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][35] ([Intel XE#4417]) +2 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-9/igt@kms_cdclk@mode-transition@pipe-a-hdmi-a-1.html

  * igt@kms_chamelium_color@ctm-limited-range:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#2325])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_chamelium_color@ctm-limited-range.html

  * igt@kms_chamelium_color@degamma:
    - shard-dg2-set2:     NOTRUN -> [SKIP][37] ([Intel XE#306])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@kms_chamelium_color@degamma.html

  * igt@kms_chamelium_frames@dp-crc-single:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#2252]) +8 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_chamelium_frames@dp-crc-single.html

  * igt@kms_chamelium_frames@vga-frame-dump:
    - shard-adlp:         NOTRUN -> [SKIP][39] ([Intel XE#373])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-9/igt@kms_chamelium_frames@vga-frame-dump.html

  * igt@kms_chamelium_hpd@vga-hpd-for-each-pipe:
    - shard-dg2-set2:     NOTRUN -> [SKIP][40] ([Intel XE#373]) +2 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-436/igt@kms_chamelium_hpd@vga-hpd-for-each-pipe.html

  * igt@kms_content_protection@legacy@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][41] ([Intel XE#1178])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_content_protection@legacy@pipe-a-dp-2.html

  * igt@kms_content_protection@srm:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#2341])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@kms_content_protection@srm.html

  * igt@kms_content_protection@uevent@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][43] ([Intel XE#1188])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_content_protection@uevent@pipe-a-dp-2.html

  * igt@kms_cursor_crc@cursor-onscreen-64x21:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#2320])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-6/igt@kms_cursor_crc@cursor-onscreen-64x21.html

  * igt@kms_cursor_crc@cursor-sliding-max-size:
    - shard-dg2-set2:     NOTRUN -> [SKIP][45] ([Intel XE#455]) +13 other tests skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-436/igt@kms_cursor_crc@cursor-sliding-max-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#2291])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
    - shard-adlp:         NOTRUN -> [SKIP][47] ([Intel XE#309])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-9/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size:
    - shard-bmg:          [PASS][48] -> [SKIP][49] ([Intel XE#2291]) +3 other tests skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-2/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html

  * igt@kms_cursor_legacy@forked-move@pipe-a:
    - shard-dg2-set2:     [PASS][50] -> [INCOMPLETE][51] ([Intel XE#3226]) +1 other test incomplete
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-dg2-435/igt@kms_cursor_legacy@forked-move@pipe-a.html
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-433/igt@kms_cursor_legacy@forked-move@pipe-a.html

  * igt@kms_dp_link_training@non-uhbr-sst:
    - shard-bmg:          [PASS][52] -> [SKIP][53] ([Intel XE#4354])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-2/igt@kms_dp_link_training@non-uhbr-sst.html
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@kms_dp_link_training@non-uhbr-sst.html

  * igt@kms_dsc@dsc-fractional-bpp-with-bpc:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#2244]) +1 other test skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-8/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#4422])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-dg2-set2:     NOTRUN -> [SKIP][56] ([Intel XE#776])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_feature_discovery@chamelium:
    - shard-bmg:          NOTRUN -> [SKIP][57] ([Intel XE#2372])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@kms_feature_discovery@chamelium.html

  * igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible:
    - shard-bmg:          NOTRUN -> [SKIP][58] ([Intel XE#2316]) +4 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html

  * igt@kms_flip@2x-flip-vs-expired-vblank:
    - shard-dg2-set2:     [PASS][59] -> [FAIL][60] ([Intel XE#301])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-dg2-432/igt@kms_flip@2x-flip-vs-expired-vblank.html
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-433/igt@kms_flip@2x-flip-vs-expired-vblank.html

  * igt@kms_flip@2x-flip-vs-modeset-vs-hang:
    - shard-adlp:         NOTRUN -> [SKIP][61] ([Intel XE#310])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-9/igt@kms_flip@2x-flip-vs-modeset-vs-hang.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible@cd-hdmi-a6-dp4:
    - shard-dg2-set2:     NOTRUN -> [INCOMPLETE][62] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-436/igt@kms_flip@2x-flip-vs-suspend-interruptible@cd-hdmi-a6-dp4.html

  * igt@kms_flip@2x-nonexisting-fb:
    - shard-bmg:          [PASS][63] -> [SKIP][64] ([Intel XE#2316]) +4 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-3/igt@kms_flip@2x-nonexisting-fb.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-6/igt@kms_flip@2x-nonexisting-fb.html

  * igt@kms_flip@flip-vs-expired-vblank@a-dp4:
    - shard-dg2-set2:     NOTRUN -> [FAIL][65] ([Intel XE#301] / [Intel XE#3321]) +2 other tests fail
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-434/igt@kms_flip@flip-vs-expired-vblank@a-dp4.html

  * igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a6:
    - shard-dg2-set2:     NOTRUN -> [FAIL][66] ([Intel XE#301]) +8 other tests fail
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-434/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a6.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-adlp:         [PASS][67] -> [DMESG-WARN][68] ([Intel XE#2953] / [Intel XE#4173]) +4 other tests dmesg-warn
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-adlp-4/igt@kms_flip@flip-vs-suspend-interruptible.html
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-3/igt@kms_flip@flip-vs-suspend-interruptible.html
    - shard-bmg:          NOTRUN -> [INCOMPLETE][69] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling:
    - shard-bmg:          NOTRUN -> [SKIP][70] ([Intel XE#2293] / [Intel XE#2380]) +1 other test skip
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
    - shard-adlp:         NOTRUN -> [SKIP][71] ([Intel XE#455]) +3 other tests skip
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-9/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-valid-mode:
    - shard-bmg:          NOTRUN -> [SKIP][72] ([Intel XE#2293]) +1 other test skip
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-8/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][73] ([Intel XE#4141]) +3 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-render:
    - shard-dg2-set2:     NOTRUN -> [SKIP][74] ([Intel XE#651]) +13 other tests skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-pri-indfb-multidraw:
    - shard-adlp:         NOTRUN -> [SKIP][75] ([Intel XE#656]) +3 other tests skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-9/igt@kms_frontbuffer_tracking@fbcdrrs-2p-pri-indfb-multidraw.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-shrfb-scaledprimary:
    - shard-bmg:          NOTRUN -> [SKIP][76] ([Intel XE#2311]) +12 other tests skip
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-shrfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y:
    - shard-dg2-set2:     NOTRUN -> [SKIP][77] ([Intel XE#658])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt:
    - shard-adlp:         NOTRUN -> [SKIP][78] ([Intel XE#653])
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-9/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-slowdraw:
    - shard-dg2-set2:     NOTRUN -> [SKIP][79] ([Intel XE#653]) +10 other tests skip
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcpsr-slowdraw.html

  * igt@kms_frontbuffer_tracking@plane-fbc-rte:
    - shard-bmg:          NOTRUN -> [SKIP][80] ([Intel XE#2350])
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-6/igt@kms_frontbuffer_tracking@plane-fbc-rte.html

  * igt@kms_frontbuffer_tracking@psr-1p-rte:
    - shard-bmg:          NOTRUN -> [SKIP][81] ([Intel XE#2313]) +10 other tests skip
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_frontbuffer_tracking@psr-1p-rte.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen:
    - shard-bmg:          NOTRUN -> [SKIP][82] ([Intel XE#2312]) +15 other tests skip
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          [PASS][83] -> [SKIP][84] ([Intel XE#1503])
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-6/igt@kms_hdr@invalid-hdr.html
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@kms_hdr@invalid-hdr.html

  * igt@kms_joiner@basic-big-joiner:
    - shard-dg2-set2:     NOTRUN -> [SKIP][85] ([Intel XE#346])
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@kms_joiner@basic-big-joiner.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-bmg:          [PASS][86] -> [SKIP][87] ([Intel XE#3012])
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-3/igt@kms_joiner@basic-force-big-joiner.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_joiner@basic-ultra-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][88] ([Intel XE#2927])
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_joiner@basic-ultra-joiner.html

  * igt@kms_panel_fitting@legacy:
    - shard-bmg:          NOTRUN -> [SKIP][89] ([Intel XE#2486])
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@kms_panel_fitting@legacy.html

  * igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64:
    - shard-dg2-set2:     NOTRUN -> [FAIL][90] ([Intel XE#616])
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-435/igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64.html

  * igt@kms_plane_multiple@2x-tiling-x:
    - shard-bmg:          NOTRUN -> [SKIP][91] ([Intel XE#4596])
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@kms_plane_multiple@2x-tiling-x.html

  * igt@kms_plane_multiple@tiling-y:
    - shard-dg2-set2:     NOTRUN -> [SKIP][92] ([Intel XE#5020])
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@kms_plane_multiple@tiling-y.html

  * igt@kms_pm_backlight@fade-with-dpms:
    - shard-bmg:          NOTRUN -> [SKIP][93] ([Intel XE#870]) +1 other test skip
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_pm_backlight@fade-with-dpms.html

  * igt@kms_pm_rpm@modeset-lpsp-stress:
    - shard-bmg:          NOTRUN -> [SKIP][94] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836])
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-6/igt@kms_pm_rpm@modeset-lpsp-stress.html

  * igt@kms_pm_rpm@system-suspend-modeset:
    - shard-adlp:         NOTRUN -> [DMESG-WARN][95] ([Intel XE#2953] / [Intel XE#4173])
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-9/igt@kms_pm_rpm@system-suspend-modeset.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area:
    - shard-bmg:          NOTRUN -> [SKIP][96] ([Intel XE#1489]) +5 other tests skip
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area:
    - shard-adlp:         NOTRUN -> [SKIP][97] ([Intel XE#1489]) +1 other test skip
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-9/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area.html

  * igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf:
    - shard-dg2-set2:     NOTRUN -> [SKIP][98] ([Intel XE#1489]) +3 other tests skip
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-adlp:         NOTRUN -> [SKIP][99] ([Intel XE#1122])
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-9/igt@kms_psr2_su@page_flip-xrgb8888.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][100] ([Intel XE#1122])
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@fbc-psr2-primary-render:
    - shard-dg2-set2:     NOTRUN -> [SKIP][101] ([Intel XE#2850] / [Intel XE#929]) +2 other tests skip
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@kms_psr@fbc-psr2-primary-render.html
    - shard-adlp:         NOTRUN -> [SKIP][102] ([Intel XE#2850] / [Intel XE#929])
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-9/igt@kms_psr@fbc-psr2-primary-render.html

  * igt@kms_psr@psr2-sprite-blt:
    - shard-bmg:          NOTRUN -> [SKIP][103] ([Intel XE#2234] / [Intel XE#2850]) +8 other tests skip
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_psr@psr2-sprite-blt.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
    - shard-adlp:         NOTRUN -> [SKIP][104] ([Intel XE#1127])
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-9/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][105] ([Intel XE#1127])
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
    - shard-dg2-set2:     NOTRUN -> [SKIP][106] ([Intel XE#3414])
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html

  * igt@kms_rotation_crc@sprite-rotation-90:
    - shard-bmg:          NOTRUN -> [SKIP][107] ([Intel XE#3414] / [Intel XE#3904])
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_rotation_crc@sprite-rotation-90.html

  * igt@kms_scaling_modes@scaling-mode-center:
    - shard-bmg:          NOTRUN -> [SKIP][108] ([Intel XE#2413]) +1 other test skip
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_scaling_modes@scaling-mode-center.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-adlp:         NOTRUN -> [SKIP][109] ([Intel XE#362])
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-9/igt@kms_tiled_display@basic-test-pattern.html
    - shard-dg2-set2:     NOTRUN -> [FAIL][110] ([Intel XE#1729])
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_vrr@flipline:
    - shard-bmg:          NOTRUN -> [SKIP][111] ([Intel XE#1499])
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_vrr@flipline.html

  * igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all:
    - shard-dg2-set2:     NOTRUN -> [SKIP][112] ([Intel XE#1091] / [Intel XE#2849])
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all.html

  * igt@xe_eu_stall@non-blocking-read:
    - shard-dg2-set2:     NOTRUN -> [SKIP][113] ([Intel XE#5308])
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@xe_eu_stall@non-blocking-read.html

  * igt@xe_eudebug@read-metadata:
    - shard-bmg:          NOTRUN -> [SKIP][114] ([Intel XE#4837]) +8 other tests skip
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@xe_eudebug@read-metadata.html

  * igt@xe_eudebug_online@reset-with-attention:
    - shard-adlp:         NOTRUN -> [SKIP][115] ([Intel XE#4837])
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-9/igt@xe_eudebug_online@reset-with-attention.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race:
    - shard-bmg:          NOTRUN -> [SKIP][116] ([Intel XE#2322]) +6 other tests skip
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race.html

  * igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind:
    - shard-dg2-set2:     NOTRUN -> [SKIP][117] ([Intel XE#1392])
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind.html
    - shard-adlp:         NOTRUN -> [SKIP][118] ([Intel XE#1392])
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-9/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind.html

  * igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate-race:
    - shard-dg2-set2:     [PASS][119] -> [SKIP][120] ([Intel XE#1392]) +7 other tests skip
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-dg2-433/igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate-race.html
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate-race.html

  * igt@xe_exec_fault_mode@many-execqueues-bindexecqueue:
    - shard-adlp:         NOTRUN -> [SKIP][121] ([Intel XE#288]) +4 other tests skip
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-9/igt@xe_exec_fault_mode@many-execqueues-bindexecqueue.html

  * igt@xe_exec_fault_mode@many-execqueues-userptr-invalidate-prefetch:
    - shard-dg2-set2:     NOTRUN -> [SKIP][122] ([Intel XE#288]) +15 other tests skip
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@xe_exec_fault_mode@many-execqueues-userptr-invalidate-prefetch.html

  * igt@xe_exec_sip_eudebug@breakpoint-writesip:
    - shard-dg2-set2:     NOTRUN -> [SKIP][123] ([Intel XE#4837]) +7 other tests skip
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@xe_exec_sip_eudebug@breakpoint-writesip.html

  * igt@xe_exec_system_allocator@many-large-mmap-huge-nomemset:
    - shard-bmg:          NOTRUN -> [SKIP][124] ([Intel XE#4943]) +17 other tests skip
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-6/igt@xe_exec_system_allocator@many-large-mmap-huge-nomemset.html

  * igt@xe_exec_system_allocator@once-large-mmap-free-huge-nomemset:
    - shard-lnl:          NOTRUN -> [SKIP][125] ([Intel XE#4943]) +1 other test skip
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-lnl-1/igt@xe_exec_system_allocator@once-large-mmap-free-huge-nomemset.html

  * igt@xe_exec_system_allocator@once-mmap-new-race:
    - shard-adlp:         NOTRUN -> [SKIP][126] ([Intel XE#4915]) +34 other tests skip
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-9/igt@xe_exec_system_allocator@once-mmap-new-race.html

  * igt@xe_exec_system_allocator@threads-many-large-execqueues-malloc-mlock-nomemset:
    - shard-dg2-set2:     NOTRUN -> [SKIP][127] ([Intel XE#4915]) +115 other tests skip
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@xe_exec_system_allocator@threads-many-large-execqueues-malloc-mlock-nomemset.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset:
    - shard-lnl:          [PASS][128] -> [FAIL][129] ([Intel XE#5018])
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-lnl-8/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset.html
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-lnl-8/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset.html

  * igt@xe_mmap@pci-membarrier-bad-pagesize:
    - shard-adlp:         NOTRUN -> [SKIP][130] ([Intel XE#5100])
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-9/igt@xe_mmap@pci-membarrier-bad-pagesize.html

  * igt@xe_mmap@small-bar:
    - shard-dg2-set2:     NOTRUN -> [SKIP][131] ([Intel XE#512])
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@xe_mmap@small-bar.html

  * igt@xe_module_load@load:
    - shard-bmg:          ([PASS][132], [PASS][133], [PASS][134], [PASS][135], [PASS][136], [PASS][137], [PASS][138], [PASS][139], [PASS][140], [PASS][141], [PASS][142], [PASS][143], [PASS][144], [PASS][145], [PASS][146], [PASS][147], [PASS][148], [PASS][149], [PASS][150], [PASS][151], [PASS][152], [PASS][153], [PASS][154]) -> ([PASS][155], [PASS][156], [PASS][157], [PASS][158], [PASS][159], [PASS][160], [PASS][161], [PASS][162], [PASS][163], [PASS][164], [PASS][165], [PASS][166], [PASS][167], [PASS][168], [PASS][169], [PASS][170], [PASS][171], [PASS][172], [PASS][173], [PASS][174], [PASS][175], [PASS][176], [SKIP][177], [PASS][178]) ([Intel XE#2457])
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-5/igt@xe_module_load@load.html
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-6/igt@xe_module_load@load.html
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-5/igt@xe_module_load@load.html
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-2/igt@xe_module_load@load.html
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-8/igt@xe_module_load@load.html
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-8/igt@xe_module_load@load.html
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-3/igt@xe_module_load@load.html
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-3/igt@xe_module_load@load.html
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-3/igt@xe_module_load@load.html
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-2/igt@xe_module_load@load.html
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-2/igt@xe_module_load@load.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-8/igt@xe_module_load@load.html
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-2/igt@xe_module_load@load.html
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-1/igt@xe_module_load@load.html
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-1/igt@xe_module_load@load.html
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-5/igt@xe_module_load@load.html
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-6/igt@xe_module_load@load.html
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-6/igt@xe_module_load@load.html
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-6/igt@xe_module_load@load.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-6/igt@xe_module_load@load.html
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-6/igt@xe_module_load@load.html
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-3/igt@xe_module_load@load.html
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-3/igt@xe_module_load@load.html
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-1/igt@xe_module_load@load.html
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-1/igt@xe_module_load@load.html
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-1/igt@xe_module_load@load.html
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-1/igt@xe_module_load@load.html
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-8/igt@xe_module_load@load.html
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@xe_module_load@load.html
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@xe_module_load@load.html
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@xe_module_load@load.html
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@xe_module_load@load.html
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@xe_module_load@load.html
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@xe_module_load@load.html
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@xe_module_load@load.html
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@xe_module_load@load.html
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-6/igt@xe_module_load@load.html
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@xe_module_load@load.html
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-8/igt@xe_module_load@load.html
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-8/igt@xe_module_load@load.html
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-6/igt@xe_module_load@load.html
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-6/igt@xe_module_load@load.html
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@xe_module_load@load.html
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@xe_module_load@load.html
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-8/igt@xe_module_load@load.html
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@xe_module_load@load.html
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-6/igt@xe_module_load@load.html

  * igt@xe_oa@closed-fd-and-unmapped-access:
    - shard-dg2-set2:     NOTRUN -> [SKIP][179] ([Intel XE#2541] / [Intel XE#3573]) +2 other tests skip
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-436/igt@xe_oa@closed-fd-and-unmapped-access.html

  * igt@xe_oa@short-reads:
    - shard-adlp:         NOTRUN -> [SKIP][180] ([Intel XE#2541] / [Intel XE#3573])
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-9/igt@xe_oa@short-reads.html

  * igt@xe_oa@syncs-ufence-wait:
    - shard-dg2-set2:     NOTRUN -> [SKIP][181] ([Intel XE#2541] / [Intel XE#3573] / [Intel XE#4501])
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-436/igt@xe_oa@syncs-ufence-wait.html

  * igt@xe_pat@pat-index-xelpg:
    - shard-bmg:          NOTRUN -> [SKIP][182] ([Intel XE#2236])
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-6/igt@xe_pat@pat-index-xelpg.html

  * igt@xe_pm@d3cold-basic:
    - shard-bmg:          NOTRUN -> [SKIP][183] ([Intel XE#2284]) +1 other test skip
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-8/igt@xe_pm@d3cold-basic.html

  * igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq:
    - shard-dg2-set2:     NOTRUN -> [SKIP][184] ([Intel XE#4733])
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-436/igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq.html

  * igt@xe_pxp@pxp-stale-bo-exec-post-termination-irq:
    - shard-bmg:          NOTRUN -> [SKIP][185] ([Intel XE#4733]) +1 other test skip
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-8/igt@xe_pxp@pxp-stale-bo-exec-post-termination-irq.html

  * igt@xe_query@multigpu-query-config:
    - shard-bmg:          NOTRUN -> [SKIP][186] ([Intel XE#944])
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@xe_query@multigpu-query-config.html

  * igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz:
    - shard-dg2-set2:     NOTRUN -> [SKIP][187] ([Intel XE#944])
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz.html

  * igt@xe_render_copy@render-stress-2-copies:
    - shard-dg2-set2:     NOTRUN -> [SKIP][188] ([Intel XE#4814])
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@xe_render_copy@render-stress-2-copies.html

  * igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs:
    - shard-bmg:          NOTRUN -> [SKIP][189] ([Intel XE#4130])
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs.html

  
#### Possible fixes ####

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-adlp:         [DMESG-FAIL][190] ([Intel XE#4543]) -> [PASS][191] +1 other test pass
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-adlp-2/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-4/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p:
    - shard-bmg:          [SKIP][192] ([Intel XE#2314] / [Intel XE#2894]) -> [PASS][193]
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-5/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic:
    - shard-bmg:          [SKIP][194] ([Intel XE#2291]) -> [PASS][195] +2 other tests pass
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-5/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html

  * igt@kms_flip@2x-plain-flip-interruptible:
    - shard-bmg:          [SKIP][196] ([Intel XE#2316]) -> [PASS][197] +4 other tests pass
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-5/igt@kms_flip@2x-plain-flip-interruptible.html
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_flip@2x-plain-flip-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-dg2-set2:     [INCOMPLETE][198] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][199] +1 other test pass
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-dg2-433/igt@kms_flip@flip-vs-suspend-interruptible.html
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-432/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_hdr@static-toggle-suspend:
    - shard-bmg:          [SKIP][200] ([Intel XE#1503]) -> [PASS][201]
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-6/igt@kms_hdr@static-toggle-suspend.html
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@kms_hdr@static-toggle-suspend.html

  * igt@kms_plane_multiple@2x-tiling-4:
    - shard-bmg:          [SKIP][202] ([Intel XE#4596]) -> [PASS][203]
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-5/igt@kms_plane_multiple@2x-tiling-4.html
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_plane_multiple@2x-tiling-4.html

  * igt@kms_vblank@ts-continuation-suspend:
    - shard-adlp:         [DMESG-WARN][204] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][205] +7 other tests pass
   [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-adlp-6/igt@kms_vblank@ts-continuation-suspend.html
   [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-adlp-6/igt@kms_vblank@ts-continuation-suspend.html

  * igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap:
    - shard-dg2-set2:     [SKIP][206] ([Intel XE#1392]) -> [PASS][207] +9 other tests pass
   [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html
   [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-434/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html

  * igt@xe_exec_reset@parallel-gt-reset:
    - shard-dg2-set2:     [DMESG-WARN][208] ([Intel XE#3876]) -> [PASS][209]
   [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-dg2-433/igt@xe_exec_reset@parallel-gt-reset.html
   [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-463/igt@xe_exec_reset@parallel-gt-reset.html

  * igt@xe_pm@s3-basic:
    - shard-bmg:          [INCOMPLETE][210] ([Intel XE#569]) -> [PASS][211]
   [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-6/igt@xe_pm@s3-basic.html
   [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@xe_pm@s3-basic.html

  * igt@xe_pm@s4-vm-bind-prefetch:
    - shard-bmg:          [ABORT][212] ([Intel XE#5255]) -> [PASS][213]
   [212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-6/igt@xe_pm@s4-vm-bind-prefetch.html
   [213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@xe_pm@s4-vm-bind-prefetch.html

  
#### Warnings ####

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
    - shard-dg2-set2:     [INCOMPLETE][214] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4345]) -> [INCOMPLETE][215] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124] / [Intel XE#4345])
   [214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
   [215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html

  * igt@kms_content_protection@legacy:
    - shard-bmg:          [SKIP][216] ([Intel XE#2341]) -> [FAIL][217] ([Intel XE#1178])
   [216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-5/igt@kms_content_protection@legacy.html
   [217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_content_protection@legacy.html

  * igt@kms_content_protection@uevent:
    - shard-bmg:          [SKIP][218] ([Intel XE#2341]) -> [FAIL][219] ([Intel XE#1188])
   [218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-6/igt@kms_content_protection@uevent.html
   [219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_content_protection@uevent.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt:
    - shard-bmg:          [SKIP][220] ([Intel XE#2312]) -> [SKIP][221] ([Intel XE#2311]) +9 other tests skip
   [220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
   [221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][222] ([Intel XE#2311]) -> [SKIP][223] ([Intel XE#2312]) +14 other tests skip
   [222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
   [223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt:
    - shard-bmg:          [SKIP][224] ([Intel XE#2312]) -> [SKIP][225] ([Intel XE#4141]) +4 other tests skip
   [224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt.html
   [225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt:
    - shard-bmg:          [SKIP][226] ([Intel XE#4141]) -> [SKIP][227] ([Intel XE#2312]) +8 other tests skip
   [226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html
   [227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt:
    - shard-bmg:          [SKIP][228] ([Intel XE#2313]) -> [SKIP][229] ([Intel XE#2312]) +19 other tests skip
   [228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html
   [229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt:
    - shard-bmg:          [SKIP][230] ([Intel XE#2312]) -> [SKIP][231] ([Intel XE#2313]) +10 other tests skip
   [230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html
   [231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-bmg:          [SKIP][232] ([Intel XE#4596]) -> [SKIP][233] ([Intel XE#5021])
   [232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-5/igt@kms_plane_multiple@2x-tiling-yf.html
   [233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-3/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          [SKIP][234] ([Intel XE#2426]) -> [SKIP][235] ([Intel XE#2509])
   [234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
  [Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2236]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2236
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
  [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2350]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2350
  [Intel XE#2372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2372
  [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
  [Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
  [Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
  [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
  [Intel XE#2541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2541
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
  [Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
  [Intel XE#2927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2927
  [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
  [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
  [Intel XE#3124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3124
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
  [Intel XE#3226]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3226
  [Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
  [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
  [Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#3862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3862
  [Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#3970]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3970
  [Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
  [Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
  [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
  [Intel XE#4417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4417
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4501
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4665
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4814
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5018]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5018
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5100]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5100
  [Intel XE#512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/512
  [Intel XE#5191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5191
  [Intel XE#5255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5255
  [Intel XE#5308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5308
  [Intel XE#569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/569
  [Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/658
  [Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7 -> xe-pw-150568v2

  IGT_8423: 8423
  xe-3296-da56936fad6f5e1d5f0cef8b50277bfb071eefe7: da56936fad6f5e1d5f0cef8b50277bfb071eefe7
  xe-pw-150568v2: 150568v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-150568v2/index.html

[-- Attachment #2: Type: text/html, Size: 72655 bytes --]

^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH 0/1] Revert patch to reject HBR3 for all eDP panels
@ 2025-07-10  5:20 Ankit Nautiyal
  2025-07-10  5:20 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
  0 siblings, 1 reply; 25+ messages in thread
From: Ankit Nautiyal @ 2025-07-10  5:20 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: ville.syrjala, jani.nikula, Ankit Nautiyal

Revert the existing patch that rejects HBR3 for all eDP panels that
do not support TPS4. With the patch reverted, the gitlab issue#5969 [1]
will get opened again. Add a quirk to limit the rate to HBR2 for the
device mentioned in [1] and close the issue.

This series is a continuation from [2], and [3].

[1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
[2] https://lore.kernel.org/all/1cd154a09823abf6d34221ae9e02f9cd342cc3a3@intel.com/
[3] https://lore.kernel.org/all/87y0uzh5tz.fsf@intel.com/

Rev2:
Instead of revert and add quirk, add a single patch that fixes the
commit. (Jani).

Rev3:
Instead of refining, just revert the patch for now and add quirk for the
ICL machine as a separate patch. (Ville)

Rev4:
Address review comments from Ville.

Ankit Nautiyal (2):
  Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
  drm/i915/dp: Add device specific quirk to limit eDP rate to HBR2

 drivers/gpu/drm/i915/display/intel_dp.c     | 30 ++++++++-------------
 drivers/gpu/drm/i915/display/intel_quirks.c |  9 +++++++
 drivers/gpu/drm/i915/display/intel_quirks.h |  1 +
 3 files changed, 21 insertions(+), 19 deletions(-)

-- 
2.45.2

^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
  2025-07-10  5:20 [PATCH 0/1] Revert patch to reject HBR3 for all eDP panels Ankit Nautiyal
@ 2025-07-10  5:20 ` Ankit Nautiyal
  0 siblings, 0 replies; 25+ messages in thread
From: Ankit Nautiyal @ 2025-07-10  5:20 UTC (permalink / raw)
  To: intel-gfx, intel-xe
  Cc: ville.syrjala, jani.nikula, Ankit Nautiyal, Jani Nikula

This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
Commit 584cf613c24a ("drm/i915/dp: Reject HBR3 when sink doesn't support
TPS4") introduced a blanket rejection of HBR3 link rate when the sink does
not support TPS4.

While this was intended to address instability observed on certain eDP
panels [1], there seem to be edp panels that do not follow the
specification. These eDP panels do not advertise TPS4 support, but require
HBR3 to operate at their fixed native resolution [2].

As a result, the change causes blank screens on such panels. Apparently,
Windows driver does not enforce this restriction, and the issue is not seen
there.

Therefore, revert the commit to restore functionality for such panels,
and align behaviour with Windows driver.

[1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
[2] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14517

v2: Update the commit message with better justification. (Ville)

Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14517
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
 1 file changed, 7 insertions(+), 42 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index f48912f308df..92abf819e60e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -173,28 +173,10 @@ int intel_dp_link_symbol_clock(int rate)
 
 static int max_dprx_rate(struct intel_dp *intel_dp)
 {
-	struct intel_display *display = to_intel_display(intel_dp);
-	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
-	int max_rate;
-
 	if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
-		max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
-	else
-		max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
+		return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
 
-	/*
-	 * Some broken eDP sinks illegally declare support for
-	 * HBR3 without TPS4, and are unable to produce a stable
-	 * output. Reject HBR3 when TPS4 is not available.
-	 */
-	if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
-		drm_dbg_kms(display->drm,
-			    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
-			    encoder->base.base.id, encoder->base.name);
-		max_rate = 540000;
-	}
-
-	return max_rate;
+	return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
 }
 
 static int max_dprx_lane_count(struct intel_dp *intel_dp)
@@ -4273,9 +4255,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
 static void
 intel_edp_set_sink_rates(struct intel_dp *intel_dp)
 {
-	struct intel_display *display = to_intel_display(intel_dp);
-	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
-
 	intel_dp->num_sink_rates = 0;
 
 	if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
@@ -4286,7 +4265,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
 				 sink_rates, sizeof(sink_rates));
 
 		for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
-			int rate;
+			int val = le16_to_cpu(sink_rates[i]);
+
+			if (val == 0)
+				break;
 
 			/* Value read multiplied by 200kHz gives the per-lane
 			 * link rate in kHz. The source rates are, however,
@@ -4294,24 +4276,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
 			 * back to symbols is
 			 * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
 			 */
-			rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
-
-			if (rate == 0)
-				break;
-
-			/*
-			 * Some broken eDP sinks illegally declare support for
-			 * HBR3 without TPS4, and are unable to produce a stable
-			 * output. Reject HBR3 when TPS4 is not available.
-			 */
-			if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
-				drm_dbg_kms(display->drm,
-					    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
-					    encoder->base.base.id, encoder->base.name);
-				break;
-			}
-
-			intel_dp->sink_rates[i] = rate;
+			intel_dp->sink_rates[i] = (val * 200) / 10;
 		}
 		intel_dp->num_sink_rates = i;
 	}
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 25+ messages in thread

* [PATCH 0/1] Revert patch to reject HBR3 for all eDP panels
@ 2025-07-09  5:51 Ankit Nautiyal
  2025-07-09  5:51 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
  0 siblings, 1 reply; 25+ messages in thread
From: Ankit Nautiyal @ 2025-07-09  5:51 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: ville.syrjala, jani.nikula, Ankit Nautiyal

Revert the existing patch that rejects HBR3 for all eDP panels that
do not support TPS4. With the patch reverted, the gitlab issue#5969 [1]
will get opened again. Add a quirk to limit the rate to HBR2 for the
device mentioned in [1] and close the issue.

This series is a continuation from [2], and [3].

[1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
[2] https://lore.kernel.org/all/1cd154a09823abf6d34221ae9e02f9cd342cc3a3@intel.com/
[3] https://lore.kernel.org/all/87y0uzh5tz.fsf@intel.com/

Rev2:
Instead of revert and add quirk, add a single patch that fixes the
commit. (Jani).

Rev3:
Instead of refining, just revert the patch for now and add quirk for the
ICL machine as a separate patch. (Ville)

Ankit Nautiyal (2):
  Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
  drm/i915/dp: Add device specific quirk to limit eDP rate to HBR2

 drivers/gpu/drm/i915/display/intel_dp.c     | 32 ++++++++-------------
 drivers/gpu/drm/i915/display/intel_quirks.c |  9 ++++++
 drivers/gpu/drm/i915/display/intel_quirks.h |  1 +
 3 files changed, 22 insertions(+), 20 deletions(-)

-- 
2.45.2

^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
  2025-07-09  5:51 [PATCH 0/1] Revert patch to reject HBR3 for all eDP panels Ankit Nautiyal
@ 2025-07-09  5:51 ` Ankit Nautiyal
  2025-07-09 18:04   ` Ville Syrjälä
  0 siblings, 1 reply; 25+ messages in thread
From: Ankit Nautiyal @ 2025-07-09  5:51 UTC (permalink / raw)
  To: intel-gfx, intel-xe
  Cc: ville.syrjala, jani.nikula, Ankit Nautiyal, Jani Nikula

This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
Commit 584cf613c24a ("drm/i915/dp: Reject HBR3 when sink doesn't support
TPS4") introduced a blanket rejection of HBR3 link rate when the sink does
not support TPS4. While this was intended to address instability observed
on certain eDP panels [1], the TPS4 requirement is only mandated for DPRX
and not for eDPRX.

This change inadvertently causes blank screens on some eDP panels that do
not advertise TPS4 support, and require HBR3 to operate at their fixed
native resolution [2].

Revert the commit to restore functionality for such panels.

[1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
[2] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14517

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14517
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
 1 file changed, 7 insertions(+), 42 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index f48912f308df..92abf819e60e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -173,28 +173,10 @@ int intel_dp_link_symbol_clock(int rate)
 
 static int max_dprx_rate(struct intel_dp *intel_dp)
 {
-	struct intel_display *display = to_intel_display(intel_dp);
-	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
-	int max_rate;
-
 	if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
-		max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
-	else
-		max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
+		return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
 
-	/*
-	 * Some broken eDP sinks illegally declare support for
-	 * HBR3 without TPS4, and are unable to produce a stable
-	 * output. Reject HBR3 when TPS4 is not available.
-	 */
-	if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
-		drm_dbg_kms(display->drm,
-			    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
-			    encoder->base.base.id, encoder->base.name);
-		max_rate = 540000;
-	}
-
-	return max_rate;
+	return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
 }
 
 static int max_dprx_lane_count(struct intel_dp *intel_dp)
@@ -4273,9 +4255,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
 static void
 intel_edp_set_sink_rates(struct intel_dp *intel_dp)
 {
-	struct intel_display *display = to_intel_display(intel_dp);
-	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
-
 	intel_dp->num_sink_rates = 0;
 
 	if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
@@ -4286,7 +4265,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
 				 sink_rates, sizeof(sink_rates));
 
 		for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
-			int rate;
+			int val = le16_to_cpu(sink_rates[i]);
+
+			if (val == 0)
+				break;
 
 			/* Value read multiplied by 200kHz gives the per-lane
 			 * link rate in kHz. The source rates are, however,
@@ -4294,24 +4276,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
 			 * back to symbols is
 			 * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
 			 */
-			rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
-
-			if (rate == 0)
-				break;
-
-			/*
-			 * Some broken eDP sinks illegally declare support for
-			 * HBR3 without TPS4, and are unable to produce a stable
-			 * output. Reject HBR3 when TPS4 is not available.
-			 */
-			if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
-				drm_dbg_kms(display->drm,
-					    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
-					    encoder->base.base.id, encoder->base.name);
-				break;
-			}
-
-			intel_dp->sink_rates[i] = rate;
+			intel_dp->sink_rates[i] = (val * 200) / 10;
 		}
 		intel_dp->num_sink_rates = i;
 	}
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 25+ messages in thread

* Re: [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
  2025-07-09  5:51 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
@ 2025-07-09 18:04   ` Ville Syrjälä
  2025-07-10  4:47     ` Nautiyal, Ankit K
  0 siblings, 1 reply; 25+ messages in thread
From: Ville Syrjälä @ 2025-07-09 18:04 UTC (permalink / raw)
  To: Ankit Nautiyal; +Cc: intel-gfx, intel-xe, jani.nikula, Jani Nikula

On Wed, Jul 09, 2025 at 11:21:42AM +0530, Ankit Nautiyal wrote:
> This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
> Commit 584cf613c24a ("drm/i915/dp: Reject HBR3 when sink doesn't support
> TPS4") introduced a blanket rejection of HBR3 link rate when the sink does
> not support TPS4. While this was intended to address instability observed
> on certain eDP panels [1], the TPS4 requirement is only mandated for DPRX
> and not for eDPRX.

That last claim is still not really supported by the spec AFAICS.

I think the best justification is that the Windows driver allows 
this.

> 
> This change inadvertently causes blank screens on some eDP panels that do
> not advertise TPS4 support, and require HBR3 to operate at their fixed
> native resolution [2].
> 
> Revert the commit to restore functionality for such panels.
> 
> [1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
> [2] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14517
> 
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14517
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Acked-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
>  1 file changed, 7 insertions(+), 42 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index f48912f308df..92abf819e60e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -173,28 +173,10 @@ int intel_dp_link_symbol_clock(int rate)
>  
>  static int max_dprx_rate(struct intel_dp *intel_dp)
>  {
> -	struct intel_display *display = to_intel_display(intel_dp);
> -	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> -	int max_rate;
> -
>  	if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
> -		max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
> -	else
> -		max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
> +		return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>  
> -	/*
> -	 * Some broken eDP sinks illegally declare support for
> -	 * HBR3 without TPS4, and are unable to produce a stable
> -	 * output. Reject HBR3 when TPS4 is not available.
> -	 */
> -	if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
> -		drm_dbg_kms(display->drm,
> -			    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
> -			    encoder->base.base.id, encoder->base.name);
> -		max_rate = 540000;
> -	}
> -
> -	return max_rate;
> +	return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
>  }
>  
>  static int max_dprx_lane_count(struct intel_dp *intel_dp)
> @@ -4273,9 +4255,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
>  static void
>  intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>  {
> -	struct intel_display *display = to_intel_display(intel_dp);
> -	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> -
>  	intel_dp->num_sink_rates = 0;
>  
>  	if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
> @@ -4286,7 +4265,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>  				 sink_rates, sizeof(sink_rates));
>  
>  		for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
> -			int rate;
> +			int val = le16_to_cpu(sink_rates[i]);
> +
> +			if (val == 0)
> +				break;
>  
>  			/* Value read multiplied by 200kHz gives the per-lane
>  			 * link rate in kHz. The source rates are, however,
> @@ -4294,24 +4276,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>  			 * back to symbols is
>  			 * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
>  			 */
> -			rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
> -
> -			if (rate == 0)
> -				break;
> -
> -			/*
> -			 * Some broken eDP sinks illegally declare support for
> -			 * HBR3 without TPS4, and are unable to produce a stable
> -			 * output. Reject HBR3 when TPS4 is not available.
> -			 */
> -			if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
> -				drm_dbg_kms(display->drm,
> -					    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
> -					    encoder->base.base.id, encoder->base.name);
> -				break;
> -			}
> -
> -			intel_dp->sink_rates[i] = rate;
> +			intel_dp->sink_rates[i] = (val * 200) / 10;
>  		}
>  		intel_dp->num_sink_rates = i;
>  	}
> -- 
> 2.45.2

-- 
Ville Syrjälä
Intel

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
  2025-07-09 18:04   ` Ville Syrjälä
@ 2025-07-10  4:47     ` Nautiyal, Ankit K
  0 siblings, 0 replies; 25+ messages in thread
From: Nautiyal, Ankit K @ 2025-07-10  4:47 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: intel-gfx, intel-xe, jani.nikula, Jani Nikula


On 7/9/2025 11:34 PM, Ville Syrjälä wrote:
> On Wed, Jul 09, 2025 at 11:21:42AM +0530, Ankit Nautiyal wrote:
>> This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
>> Commit 584cf613c24a ("drm/i915/dp: Reject HBR3 when sink doesn't support
>> TPS4") introduced a blanket rejection of HBR3 link rate when the sink does
>> not support TPS4. While this was intended to address instability observed
>> on certain eDP panels [1], the TPS4 requirement is only mandated for DPRX
>> and not for eDPRX.
> That last claim is still not really supported by the spec AFAICS.
>
> I think the best justification is that the Windows driver allows
> this.

Alright, I will update the commit message and send again.


Thanks & Regards,

Ankit

>
>> This change inadvertently causes blank screens on some eDP panels that do
>> not advertise TPS4 support, and require HBR3 to operate at their fixed
>> native resolution [2].
>>
>> Revert the commit to restore functionality for such panels.
>>
>> [1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
>> [2] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14517
>>
>> Cc: Jani Nikula <jani.nikula@linux.intel.com>
>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14517
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> Acked-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
>>   1 file changed, 7 insertions(+), 42 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index f48912f308df..92abf819e60e 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -173,28 +173,10 @@ int intel_dp_link_symbol_clock(int rate)
>>   
>>   static int max_dprx_rate(struct intel_dp *intel_dp)
>>   {
>> -	struct intel_display *display = to_intel_display(intel_dp);
>> -	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>> -	int max_rate;
>> -
>>   	if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
>> -		max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>> -	else
>> -		max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
>> +		return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>>   
>> -	/*
>> -	 * Some broken eDP sinks illegally declare support for
>> -	 * HBR3 without TPS4, and are unable to produce a stable
>> -	 * output. Reject HBR3 when TPS4 is not available.
>> -	 */
>> -	if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
>> -		drm_dbg_kms(display->drm,
>> -			    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
>> -			    encoder->base.base.id, encoder->base.name);
>> -		max_rate = 540000;
>> -	}
>> -
>> -	return max_rate;
>> +	return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
>>   }
>>   
>>   static int max_dprx_lane_count(struct intel_dp *intel_dp)
>> @@ -4273,9 +4255,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
>>   static void
>>   intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>>   {
>> -	struct intel_display *display = to_intel_display(intel_dp);
>> -	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>> -
>>   	intel_dp->num_sink_rates = 0;
>>   
>>   	if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
>> @@ -4286,7 +4265,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>>   				 sink_rates, sizeof(sink_rates));
>>   
>>   		for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
>> -			int rate;
>> +			int val = le16_to_cpu(sink_rates[i]);
>> +
>> +			if (val == 0)
>> +				break;
>>   
>>   			/* Value read multiplied by 200kHz gives the per-lane
>>   			 * link rate in kHz. The source rates are, however,
>> @@ -4294,24 +4276,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>>   			 * back to symbols is
>>   			 * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
>>   			 */
>> -			rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
>> -
>> -			if (rate == 0)
>> -				break;
>> -
>> -			/*
>> -			 * Some broken eDP sinks illegally declare support for
>> -			 * HBR3 without TPS4, and are unable to produce a stable
>> -			 * output. Reject HBR3 when TPS4 is not available.
>> -			 */
>> -			if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
>> -				drm_dbg_kms(display->drm,
>> -					    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
>> -					    encoder->base.base.id, encoder->base.name);
>> -				break;
>> -			}
>> -
>> -			intel_dp->sink_rates[i] = rate;
>> +			intel_dp->sink_rates[i] = (val * 200) / 10;
>>   		}
>>   		intel_dp->num_sink_rates = i;
>>   	}
>> -- 
>> 2.45.2

^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH 0/2] Add kernel param to limit the eDP rate to HBR2
@ 2025-06-10 10:04 Ankit Nautiyal
  2025-06-10 10:04 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
  0 siblings, 1 reply; 25+ messages in thread
From: Ankit Nautiyal @ 2025-06-10 10:04 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: ville.syrjala, jani.nikula

Revert the existing patch that rejects HBR3 for all eDP panels that
do not support TPS4. Add a patch to add a kernel parameter to limit
the rate to HBR2 for eDP panels that might be unstable with higher
rate.

Ankit Nautiyal (2):
  Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
  drm/i915/dp: Add kernel param to limit eDP rate to HBR2"

 .../drm/i915/display/intel_display_params.c   |  2 ++
 .../drm/i915/display/intel_display_params.h   |  1 +
 drivers/gpu/drm/i915/display/intel_dp.c       | 21 ++++++++++---------
 3 files changed, 14 insertions(+), 10 deletions(-)

-- 
2.45.2


^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
  2025-06-10 10:04 [PATCH 0/2] Add kernel param to limit the eDP rate to HBR2 Ankit Nautiyal
@ 2025-06-10 10:04 ` Ankit Nautiyal
  2025-06-10 12:15   ` Jani Nikula
  0 siblings, 1 reply; 25+ messages in thread
From: Ankit Nautiyal @ 2025-06-10 10:04 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: ville.syrjala, jani.nikula

This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
Commit 584cf613c24a ("drm/i915/dp: Reject HBR3 when sink doesn't support
TPS4") introduced a blanket rejection of HBR3 link rate when the sink does
not support TPS4. While this was intended to address instability observed
on certain eDP panels [1], the TPS4 requirement is only mandated for DPRX
and not for eDPRX.

This change inadvertently causes blank screens on some eDP panels that do
not advertise TPS4 support, and require HBR3 to operate at their fixed
native resolution.

Revert the commit to restore functionality for such panels.

[1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
 1 file changed, 7 insertions(+), 42 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 208a953b04a2..2a0b76ae33cd 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -174,28 +174,10 @@ int intel_dp_link_symbol_clock(int rate)
 
 static int max_dprx_rate(struct intel_dp *intel_dp)
 {
-	struct intel_display *display = to_intel_display(intel_dp);
-	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
-	int max_rate;
-
 	if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
-		max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
-	else
-		max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
+		return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
 
-	/*
-	 * Some broken eDP sinks illegally declare support for
-	 * HBR3 without TPS4, and are unable to produce a stable
-	 * output. Reject HBR3 when TPS4 is not available.
-	 */
-	if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
-		drm_dbg_kms(display->drm,
-			    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
-			    encoder->base.base.id, encoder->base.name);
-		max_rate = 540000;
-	}
-
-	return max_rate;
+	return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
 }
 
 static int max_dprx_lane_count(struct intel_dp *intel_dp)
@@ -4271,9 +4253,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
 static void
 intel_edp_set_sink_rates(struct intel_dp *intel_dp)
 {
-	struct intel_display *display = to_intel_display(intel_dp);
-	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
-
 	intel_dp->num_sink_rates = 0;
 
 	if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
@@ -4284,7 +4263,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
 				 sink_rates, sizeof(sink_rates));
 
 		for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
-			int rate;
+			int val = le16_to_cpu(sink_rates[i]);
+
+			if (val == 0)
+				break;
 
 			/* Value read multiplied by 200kHz gives the per-lane
 			 * link rate in kHz. The source rates are, however,
@@ -4292,24 +4274,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
 			 * back to symbols is
 			 * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
 			 */
-			rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
-
-			if (rate == 0)
-				break;
-
-			/*
-			 * Some broken eDP sinks illegally declare support for
-			 * HBR3 without TPS4, and are unable to produce a stable
-			 * output. Reject HBR3 when TPS4 is not available.
-			 */
-			if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
-				drm_dbg_kms(display->drm,
-					    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
-					    encoder->base.base.id, encoder->base.name);
-				break;
-			}
-
-			intel_dp->sink_rates[i] = rate;
+			intel_dp->sink_rates[i] = (val * 200) / 10;
 		}
 		intel_dp->num_sink_rates = i;
 	}
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 25+ messages in thread

* Re: [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
  2025-06-10 10:04 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
@ 2025-06-10 12:15   ` Jani Nikula
  0 siblings, 0 replies; 25+ messages in thread
From: Jani Nikula @ 2025-06-10 12:15 UTC (permalink / raw)
  To: Ankit Nautiyal, intel-gfx, intel-xe; +Cc: ville.syrjala

On Tue, 10 Jun 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
> Commit 584cf613c24a ("drm/i915/dp: Reject HBR3 when sink doesn't support
> TPS4") introduced a blanket rejection of HBR3 link rate when the sink does
> not support TPS4. While this was intended to address instability observed
> on certain eDP panels [1], the TPS4 requirement is only mandated for DPRX
> and not for eDPRX.
>
> This change inadvertently causes blank screens on some eDP panels that do
> not advertise TPS4 support, and require HBR3 to operate at their fixed
> native resolution.
>
> Revert the commit to restore functionality for such panels.
>
> [1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

On the revert,

Acked-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
>  1 file changed, 7 insertions(+), 42 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 208a953b04a2..2a0b76ae33cd 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -174,28 +174,10 @@ int intel_dp_link_symbol_clock(int rate)
>  
>  static int max_dprx_rate(struct intel_dp *intel_dp)
>  {
> -	struct intel_display *display = to_intel_display(intel_dp);
> -	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> -	int max_rate;
> -
>  	if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
> -		max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
> -	else
> -		max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
> +		return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>  
> -	/*
> -	 * Some broken eDP sinks illegally declare support for
> -	 * HBR3 without TPS4, and are unable to produce a stable
> -	 * output. Reject HBR3 when TPS4 is not available.
> -	 */
> -	if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
> -		drm_dbg_kms(display->drm,
> -			    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
> -			    encoder->base.base.id, encoder->base.name);
> -		max_rate = 540000;
> -	}
> -
> -	return max_rate;
> +	return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
>  }
>  
>  static int max_dprx_lane_count(struct intel_dp *intel_dp)
> @@ -4271,9 +4253,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
>  static void
>  intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>  {
> -	struct intel_display *display = to_intel_display(intel_dp);
> -	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> -
>  	intel_dp->num_sink_rates = 0;
>  
>  	if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
> @@ -4284,7 +4263,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>  				 sink_rates, sizeof(sink_rates));
>  
>  		for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
> -			int rate;
> +			int val = le16_to_cpu(sink_rates[i]);
> +
> +			if (val == 0)
> +				break;
>  
>  			/* Value read multiplied by 200kHz gives the per-lane
>  			 * link rate in kHz. The source rates are, however,
> @@ -4292,24 +4274,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>  			 * back to symbols is
>  			 * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
>  			 */
> -			rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
> -
> -			if (rate == 0)
> -				break;
> -
> -			/*
> -			 * Some broken eDP sinks illegally declare support for
> -			 * HBR3 without TPS4, and are unable to produce a stable
> -			 * output. Reject HBR3 when TPS4 is not available.
> -			 */
> -			if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
> -				drm_dbg_kms(display->drm,
> -					    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
> -					    encoder->base.base.id, encoder->base.name);
> -				break;
> -			}
> -
> -			intel_dp->sink_rates[i] = rate;
> +			intel_dp->sink_rates[i] = (val * 200) / 10;
>  		}
>  		intel_dp->num_sink_rates = i;
>  	}

-- 
Jani Nikula, Intel

^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH 0/2] Add quirk for panels that support HBR3 without TPS4
@ 2025-05-14  8:43 Ankit Nautiyal
  2025-05-14  8:43 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
  0 siblings, 1 reply; 25+ messages in thread
From: Ankit Nautiyal @ 2025-05-14  8:43 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: ville.syrjala, jani.nikula, dri-devel

Revert the existing patch that rejects HBR3 for all eDP panels that
do not support TPS4. Add a patch to add a quirk for specific panels that
support HBR3 without TPS4 and are unstable with higher rate.
Reject HBR3 only for these panels.

Ankit Nautiyal (2):
  Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
  drm/dp: Add quirk for panel with HBR3 without TPS4

 drivers/gpu/drm/display/drm_dp_helper.c |  2 ++
 drivers/gpu/drm/i915/display/intel_dp.c | 43 +++++++++++++++++++------
 include/drm/display/drm_dp_helper.h     |  8 +++++
 3 files changed, 44 insertions(+), 9 deletions(-)

-- 
2.45.2


^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
  2025-05-14  8:43 [PATCH 0/2] Add quirk for panels that support HBR3 without TPS4 Ankit Nautiyal
@ 2025-05-14  8:43 ` Ankit Nautiyal
  2025-05-14 10:02   ` Jani Nikula
  0 siblings, 1 reply; 25+ messages in thread
From: Ankit Nautiyal @ 2025-05-14  8:43 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: ville.syrjala, jani.nikula, dri-devel

This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.

Some eDP panels support HBR3 but not TPS4 and rely on a fixed mode that
requires HBR3. After the original commit, these panels go blank due to
the rejection of HBR3.

To restore functionality for such panels, this commit reverts the change.

Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
 1 file changed, 7 insertions(+), 42 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 91a34d474463..97cf80372264 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -175,28 +175,10 @@ int intel_dp_link_symbol_clock(int rate)
 
 static int max_dprx_rate(struct intel_dp *intel_dp)
 {
-	struct intel_display *display = to_intel_display(intel_dp);
-	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
-	int max_rate;
-
 	if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
-		max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
-	else
-		max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
+		return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
 
-	/*
-	 * Some broken eDP sinks illegally declare support for
-	 * HBR3 without TPS4, and are unable to produce a stable
-	 * output. Reject HBR3 when TPS4 is not available.
-	 */
-	if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
-		drm_dbg_kms(display->drm,
-			    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
-			    encoder->base.base.id, encoder->base.name);
-		max_rate = 540000;
-	}
-
-	return max_rate;
+	return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
 }
 
 static int max_dprx_lane_count(struct intel_dp *intel_dp)
@@ -4272,9 +4254,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
 static void
 intel_edp_set_sink_rates(struct intel_dp *intel_dp)
 {
-	struct intel_display *display = to_intel_display(intel_dp);
-	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
-
 	intel_dp->num_sink_rates = 0;
 
 	if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
@@ -4285,7 +4264,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
 				 sink_rates, sizeof(sink_rates));
 
 		for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
-			int rate;
+			int val = le16_to_cpu(sink_rates[i]);
+
+			if (val == 0)
+				break;
 
 			/* Value read multiplied by 200kHz gives the per-lane
 			 * link rate in kHz. The source rates are, however,
@@ -4293,24 +4275,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
 			 * back to symbols is
 			 * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
 			 */
-			rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
-
-			if (rate == 0)
-				break;
-
-			/*
-			 * Some broken eDP sinks illegally declare support for
-			 * HBR3 without TPS4, and are unable to produce a stable
-			 * output. Reject HBR3 when TPS4 is not available.
-			 */
-			if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
-				drm_dbg_kms(display->drm,
-					    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
-					    encoder->base.base.id, encoder->base.name);
-				break;
-			}
-
-			intel_dp->sink_rates[i] = rate;
+			intel_dp->sink_rates[i] = (val * 200) / 10;
 		}
 		intel_dp->num_sink_rates = i;
 	}
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 25+ messages in thread

* Re: [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
  2025-05-14  8:43 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
@ 2025-05-14 10:02   ` Jani Nikula
  2025-05-14 10:47     ` Jani Nikula
  0 siblings, 1 reply; 25+ messages in thread
From: Jani Nikula @ 2025-05-14 10:02 UTC (permalink / raw)
  To: Ankit Nautiyal, intel-gfx, intel-xe; +Cc: ville.syrjala, dri-devel

On Wed, 14 May 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
>
> Some eDP panels support HBR3 but not TPS4 and rely on a fixed mode that
> requires HBR3. After the original commit, these panels go blank due to
> the rejection of HBR3.
>
> To restore functionality for such panels, this commit reverts the change.

Which panels? References? Bugs?

> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969

This is a reference to a bug that got closed by the commit being
reverted. This now breaks it again, can't use the Closes: tag here.

Since the original commit was backported to stable, I think we're
probably going to be screwed if we do the revert + fix in two
steps. Maybe we want a fix in one go, and backport that to stable. Idk.

BR,
Jani.


> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
>  1 file changed, 7 insertions(+), 42 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 91a34d474463..97cf80372264 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -175,28 +175,10 @@ int intel_dp_link_symbol_clock(int rate)
>  
>  static int max_dprx_rate(struct intel_dp *intel_dp)
>  {
> -	struct intel_display *display = to_intel_display(intel_dp);
> -	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> -	int max_rate;
> -
>  	if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
> -		max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
> -	else
> -		max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
> +		return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>  
> -	/*
> -	 * Some broken eDP sinks illegally declare support for
> -	 * HBR3 without TPS4, and are unable to produce a stable
> -	 * output. Reject HBR3 when TPS4 is not available.
> -	 */
> -	if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
> -		drm_dbg_kms(display->drm,
> -			    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
> -			    encoder->base.base.id, encoder->base.name);
> -		max_rate = 540000;
> -	}
> -
> -	return max_rate;
> +	return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
>  }
>  
>  static int max_dprx_lane_count(struct intel_dp *intel_dp)
> @@ -4272,9 +4254,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
>  static void
>  intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>  {
> -	struct intel_display *display = to_intel_display(intel_dp);
> -	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> -
>  	intel_dp->num_sink_rates = 0;
>  
>  	if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
> @@ -4285,7 +4264,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>  				 sink_rates, sizeof(sink_rates));
>  
>  		for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
> -			int rate;
> +			int val = le16_to_cpu(sink_rates[i]);
> +
> +			if (val == 0)
> +				break;
>  
>  			/* Value read multiplied by 200kHz gives the per-lane
>  			 * link rate in kHz. The source rates are, however,
> @@ -4293,24 +4275,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>  			 * back to symbols is
>  			 * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
>  			 */
> -			rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
> -
> -			if (rate == 0)
> -				break;
> -
> -			/*
> -			 * Some broken eDP sinks illegally declare support for
> -			 * HBR3 without TPS4, and are unable to produce a stable
> -			 * output. Reject HBR3 when TPS4 is not available.
> -			 */
> -			if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
> -				drm_dbg_kms(display->drm,
> -					    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
> -					    encoder->base.base.id, encoder->base.name);
> -				break;
> -			}
> -
> -			intel_dp->sink_rates[i] = rate;
> +			intel_dp->sink_rates[i] = (val * 200) / 10;
>  		}
>  		intel_dp->num_sink_rates = i;
>  	}

-- 
Jani Nikula, Intel

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
  2025-05-14 10:02   ` Jani Nikula
@ 2025-05-14 10:47     ` Jani Nikula
  2025-05-14 11:33       ` Nautiyal, Ankit K
  0 siblings, 1 reply; 25+ messages in thread
From: Jani Nikula @ 2025-05-14 10:47 UTC (permalink / raw)
  To: Ankit Nautiyal, intel-gfx, intel-xe; +Cc: ville.syrjala, dri-devel

On Wed, 14 May 2025, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> On Wed, 14 May 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>> This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
>>
>> Some eDP panels support HBR3 but not TPS4 and rely on a fixed mode that
>> requires HBR3. After the original commit, these panels go blank due to
>> the rejection of HBR3.
>>
>> To restore functionality for such panels, this commit reverts the change.
>
> Which panels? References? Bugs?

Regardless, on another reading of the specs, I think the commit being
reverted was misguided. TPS4 seems to be required for HBR3 on DPRX, but
not eDPRX.


BR,
Jani.

>
>> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
>
> This is a reference to a bug that got closed by the commit being
> reverted. This now breaks it again, can't use the Closes: tag here.
>
> Since the original commit was backported to stable, I think we're
> probably going to be screwed if we do the revert + fix in two
> steps. Maybe we want a fix in one go, and backport that to stable. Idk.
>
> BR,
> Jani.
>
>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
>>  1 file changed, 7 insertions(+), 42 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index 91a34d474463..97cf80372264 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -175,28 +175,10 @@ int intel_dp_link_symbol_clock(int rate)
>>  
>>  static int max_dprx_rate(struct intel_dp *intel_dp)
>>  {
>> -	struct intel_display *display = to_intel_display(intel_dp);
>> -	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>> -	int max_rate;
>> -
>>  	if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
>> -		max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>> -	else
>> -		max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
>> +		return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>>  
>> -	/*
>> -	 * Some broken eDP sinks illegally declare support for
>> -	 * HBR3 without TPS4, and are unable to produce a stable
>> -	 * output. Reject HBR3 when TPS4 is not available.
>> -	 */
>> -	if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
>> -		drm_dbg_kms(display->drm,
>> -			    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
>> -			    encoder->base.base.id, encoder->base.name);
>> -		max_rate = 540000;
>> -	}
>> -
>> -	return max_rate;
>> +	return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
>>  }
>>  
>>  static int max_dprx_lane_count(struct intel_dp *intel_dp)
>> @@ -4272,9 +4254,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
>>  static void
>>  intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>>  {
>> -	struct intel_display *display = to_intel_display(intel_dp);
>> -	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>> -
>>  	intel_dp->num_sink_rates = 0;
>>  
>>  	if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
>> @@ -4285,7 +4264,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>>  				 sink_rates, sizeof(sink_rates));
>>  
>>  		for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
>> -			int rate;
>> +			int val = le16_to_cpu(sink_rates[i]);
>> +
>> +			if (val == 0)
>> +				break;
>>  
>>  			/* Value read multiplied by 200kHz gives the per-lane
>>  			 * link rate in kHz. The source rates are, however,
>> @@ -4293,24 +4275,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>>  			 * back to symbols is
>>  			 * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
>>  			 */
>> -			rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
>> -
>> -			if (rate == 0)
>> -				break;
>> -
>> -			/*
>> -			 * Some broken eDP sinks illegally declare support for
>> -			 * HBR3 without TPS4, and are unable to produce a stable
>> -			 * output. Reject HBR3 when TPS4 is not available.
>> -			 */
>> -			if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
>> -				drm_dbg_kms(display->drm,
>> -					    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
>> -					    encoder->base.base.id, encoder->base.name);
>> -				break;
>> -			}
>> -
>> -			intel_dp->sink_rates[i] = rate;
>> +			intel_dp->sink_rates[i] = (val * 200) / 10;
>>  		}
>>  		intel_dp->num_sink_rates = i;
>>  	}

-- 
Jani Nikula, Intel

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
  2025-05-14 10:47     ` Jani Nikula
@ 2025-05-14 11:33       ` Nautiyal, Ankit K
  0 siblings, 0 replies; 25+ messages in thread
From: Nautiyal, Ankit K @ 2025-05-14 11:33 UTC (permalink / raw)
  To: Jani Nikula, intel-gfx, intel-xe; +Cc: ville.syrjala, dri-devel


On 5/14/2025 4:17 PM, Jani Nikula wrote:
> On Wed, 14 May 2025, Jani Nikula <jani.nikula@linux.intel.com> wrote:
>> On Wed, 14 May 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>>> This reverts commit 584cf613c24a4250d9be4819efc841aa2624d5b6.
>>>
>>> Some eDP panels support HBR3 but not TPS4 and rely on a fixed mode that
>>> requires HBR3. After the original commit, these panels go blank due to
>>> the rejection of HBR3.
>>>
>>> To restore functionality for such panels, this commit reverts the change.
>> Which panels? References? Bugs?
> Regardless, on another reading of the specs, I think the commit being
> reverted was misguided. TPS4 seems to be required for HBR3 on DPRX, but
> not eDPRX.

Yeah TPS4_Supported bit seems to be not defined for eDP.

For the gitlab issue 5969 [1], the rejecting of HBR3 rate avoided the 
10bpc which I guess is not supported for the panel mentioned in the issue.

 From logs, the VBT had capped the bpp to 18, but GOP used 24 bpp. Edid 
advertised support for 36 bpp.

Without the commit, 30 bpp gets picked up and the issue was seen.

With the commit (After rejecting HBR3) 24 bpp was used and the issue was 
resolved.

I am wondering if we should limit bpp or the rate for the panel 
mentioned in gitlab issue 5969[1].

Also should this be an i915 specific quirk? Or something like quirk 
introduced in patch#2 [2] of the series?

[1] https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969

[2] https://patchwork.freedesktop.org/patch/653510/?series=149005&rev=1

Regards,

Ankit

>
>
> BR,
> Jani.
>
>>> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969
>> This is a reference to a bug that got closed by the commit being
>> reverted. This now breaks it again, can't use the Closes: tag here.
>>
>> Since the original commit was backported to stable, I think we're
>> probably going to be screwed if we do the revert + fix in two
>> steps. Maybe we want a fix in one go, and backport that to stable. Idk.
>>
>> BR,
>> Jani.
>>
>>
>>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>>> ---
>>>   drivers/gpu/drm/i915/display/intel_dp.c | 49 ++++---------------------
>>>   1 file changed, 7 insertions(+), 42 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>>> index 91a34d474463..97cf80372264 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>>> @@ -175,28 +175,10 @@ int intel_dp_link_symbol_clock(int rate)
>>>   
>>>   static int max_dprx_rate(struct intel_dp *intel_dp)
>>>   {
>>> -	struct intel_display *display = to_intel_display(intel_dp);
>>> -	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>>> -	int max_rate;
>>> -
>>>   	if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
>>> -		max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>>> -	else
>>> -		max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
>>> +		return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
>>>   
>>> -	/*
>>> -	 * Some broken eDP sinks illegally declare support for
>>> -	 * HBR3 without TPS4, and are unable to produce a stable
>>> -	 * output. Reject HBR3 when TPS4 is not available.
>>> -	 */
>>> -	if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
>>> -		drm_dbg_kms(display->drm,
>>> -			    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
>>> -			    encoder->base.base.id, encoder->base.name);
>>> -		max_rate = 540000;
>>> -	}
>>> -
>>> -	return max_rate;
>>> +	return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
>>>   }
>>>   
>>>   static int max_dprx_lane_count(struct intel_dp *intel_dp)
>>> @@ -4272,9 +4254,6 @@ static void intel_edp_mso_init(struct intel_dp *intel_dp)
>>>   static void
>>>   intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>>>   {
>>> -	struct intel_display *display = to_intel_display(intel_dp);
>>> -	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>>> -
>>>   	intel_dp->num_sink_rates = 0;
>>>   
>>>   	if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
>>> @@ -4285,7 +4264,10 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>>>   				 sink_rates, sizeof(sink_rates));
>>>   
>>>   		for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
>>> -			int rate;
>>> +			int val = le16_to_cpu(sink_rates[i]);
>>> +
>>> +			if (val == 0)
>>> +				break;
>>>   
>>>   			/* Value read multiplied by 200kHz gives the per-lane
>>>   			 * link rate in kHz. The source rates are, however,
>>> @@ -4293,24 +4275,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp)
>>>   			 * back to symbols is
>>>   			 * (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
>>>   			 */
>>> -			rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
>>> -
>>> -			if (rate == 0)
>>> -				break;
>>> -
>>> -			/*
>>> -			 * Some broken eDP sinks illegally declare support for
>>> -			 * HBR3 without TPS4, and are unable to produce a stable
>>> -			 * output. Reject HBR3 when TPS4 is not available.
>>> -			 */
>>> -			if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
>>> -				drm_dbg_kms(display->drm,
>>> -					    "[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
>>> -					    encoder->base.base.id, encoder->base.name);
>>> -				break;
>>> -			}
>>> -
>>> -			intel_dp->sink_rates[i] = rate;
>>> +			intel_dp->sink_rates[i] = (val * 200) / 10;
>>>   		}
>>>   		intel_dp->num_sink_rates = i;
>>>   	}

^ permalink raw reply	[flat|nested] 25+ messages in thread

end of thread, other threads:[~2025-07-10  5:31 UTC | newest]

Thread overview: 25+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-06-20 12:44 [PATCH 0/2] Revert patch to reject HBR3 for all eDP panels Ankit Nautiyal
2025-06-20 12:44 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
2025-06-23 14:42   ` Ville Syrjälä
2025-06-24  4:40     ` Nautiyal, Ankit K
2025-06-24 16:49       ` Ville Syrjälä
2025-06-25  8:18         ` Jani Nikula
2025-06-26 11:31           ` Ville Syrjälä
2025-06-20 12:44 ` [PATCH 2/2] drm/i915/dp: Add device specific quirk to limit eDP rate to HBR2 Ankit Nautiyal
2025-06-23  9:59   ` Jani Nikula
2025-06-24  7:32     ` Nautiyal, Ankit K
2025-06-20 13:23 ` ✓ CI.KUnit: success for Revert patch to reject HBR3 for all eDP panels Patchwork
2025-06-20 23:47 ` ✓ Xe.CI.Full: " Patchwork
2025-06-24  8:43 ` ✓ CI.KUnit: success for Revert patch to reject HBR3 for all eDP panels (rev2) Patchwork
2025-06-24  9:50 ` ✓ Xe.CI.BAT: " Patchwork
2025-06-24 16:20 ` ✓ Xe.CI.Full: " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2025-07-10  5:20 [PATCH 0/1] Revert patch to reject HBR3 for all eDP panels Ankit Nautiyal
2025-07-10  5:20 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
2025-07-09  5:51 [PATCH 0/1] Revert patch to reject HBR3 for all eDP panels Ankit Nautiyal
2025-07-09  5:51 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
2025-07-09 18:04   ` Ville Syrjälä
2025-07-10  4:47     ` Nautiyal, Ankit K
2025-06-10 10:04 [PATCH 0/2] Add kernel param to limit the eDP rate to HBR2 Ankit Nautiyal
2025-06-10 10:04 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
2025-06-10 12:15   ` Jani Nikula
2025-05-14  8:43 [PATCH 0/2] Add quirk for panels that support HBR3 without TPS4 Ankit Nautiyal
2025-05-14  8:43 ` [PATCH 1/2] Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4" Ankit Nautiyal
2025-05-14 10:02   ` Jani Nikula
2025-05-14 10:47     ` Jani Nikula
2025-05-14 11:33       ` Nautiyal, Ankit K

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