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From: Matthew Brost <matthew.brost@intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: <intel-xe@lists.freedesktop.org>,
	Tvrtko Ursulin <tvrtko.ursulin@igalia.com>,
	Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Subject: Re: [PATCH 5/7] drm/xe/lrc: Remove leftover TODO
Date: Mon, 7 Jul 2025 22:08:33 -0700	[thread overview]
Message-ID: <aGyn0RFgRICZAeM8@lstrano-desk.jf.intel.com> (raw)
In-Reply-To: <20250703-lrc-refactors-v1-5-6aa22f174041@intel.com>

On Thu, Jul 03, 2025 at 03:41:14PM -0700, Lucas De Marchi wrote:
> There isn't anything to set for CTX_TIMESTAMP handling in the empty
> LRC, that is set on every LRC init since it should always start from 0
> rather than the value saved in the image after first submission.
> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_lrc.c | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
> index 75f4678cb090a..2c735b3679f86 100644
> --- a/drivers/gpu/drm/xe/xe_lrc.c
> +++ b/drivers/gpu/drm/xe/xe_lrc.c
> @@ -603,8 +603,6 @@ static void set_context_control(u32 *regs, struct xe_hw_engine *hwe)
>  	if (xe_gt_has_indirect_ring_state(hwe->gt))
>  		regs[CTX_CONTEXT_CONTROL] |=
>  			_MASKED_BIT_ENABLE(CTX_CTRL_INDIRECT_RING_STATE_ENABLE);
> -
> -	/* TODO: Timestamp */

While we are here, we can also remove this one:

1066         /*
1067          * FIXME: Perma-pinning LRC as we don't yet support moving GGTT address
1068          * via VM bind calls.
1069          */

This was from very early in Xe when we thought we'd maybe not pin kernel
BOs, I don't think we'd ever not pin them. Also the comment actually
doesn't make sense either, as GGTT mapping have nothing to do with VM
bind.

Anyways this patch LGTM:
Reviewed-by: Matthew Brost <matthew.brost@intel.com> 

>  }
>  
>  static void set_memory_based_intr(u32 *regs, struct xe_hw_engine *hwe)
> 
> -- 
> 2.49.0
> 

  reply	other threads:[~2025-07-08  5:07 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-03 22:41 [PATCH 0/7] drm/xe: LRC refactors Lucas De Marchi
2025-07-03 22:41 ` [PATCH 1/7] drm/xe/lrc: Reduce scope of empty lrc data Lucas De Marchi
2025-07-04 10:07   ` Tvrtko Ursulin
2025-07-08  5:01   ` Matthew Brost
2025-07-03 22:41 ` [PATCH 2/7] drm/xe: Count dwords before allocating Lucas De Marchi
2025-07-04 10:20   ` Tvrtko Ursulin
2025-07-07  3:30     ` Lucas De Marchi
2025-07-07 23:09       ` Lucas De Marchi
2025-07-03 22:41 ` [PATCH 3/7] drm/xe/gt: Extract emit_job_sync() Lucas De Marchi
2025-07-04 10:35   ` Tvrtko Ursulin
2025-07-08  0:59     ` Lucas De Marchi
2025-07-03 22:41 ` [PATCH 4/7] drm/xe/lrc: Add table with LRC layout Lucas De Marchi
2025-07-04 10:41   ` Tvrtko Ursulin
2025-07-08  1:02     ` Lucas De Marchi
2025-07-03 22:41 ` [PATCH 5/7] drm/xe/lrc: Remove leftover TODO Lucas De Marchi
2025-07-08  5:08   ` Matthew Brost [this message]
2025-07-08 12:46     ` Lucas De Marchi
2025-07-09 19:37   ` Summers, Stuart
2025-07-09 21:24     ` Lucas De Marchi
2025-07-09 21:44       ` Summers, Stuart
2025-07-03 22:41 ` [PATCH 6/7] drm/xe/gt: Drop third submission for default context Lucas De Marchi
2025-07-04 11:21   ` Tvrtko Ursulin
2025-07-08  2:55     ` Lucas De Marchi
2025-07-08  4:59       ` Matthew Brost
2025-07-08  5:05         ` Matthew Brost
2025-07-09  7:34         ` Tvrtko Ursulin
2025-07-03 22:41 ` [PATCH 7/7] drm/xe: Waste fewer instructions in emit_wa_job() Lucas De Marchi
2025-07-08  7:54   ` Matthew Brost
2025-07-03 22:49 ` ✗ CI.checkpatch: warning for drm/xe: LRC refactors Patchwork
2025-07-03 22:50 ` ✓ CI.KUnit: success " Patchwork
2025-07-03 23:26 ` ✓ Xe.CI.BAT: " Patchwork
2025-07-05 17:33 ` ✗ Xe.CI.Full: failure " Patchwork

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