[PATCH v2 0/2] Enable_psr kernel parameter changes

[PATCH v2 0/2] Enable_psr kernel parameter changes

[Jouni Högander]

Currently disabling PSR2 via enable_psr module parameter causes Panel
Replay being disabled as well. This patch changes this by still allowing
Panel Replay even if PSR2 is disabled.

After this patch enable_psr module parameter values are:

-1 = PSR1 : yes, PSR2 = yes, Panel Replay : yes
 0 = PSR1 : no,  PSR2 = no,  Panel Replay : no
 1 = PSR1 : yes, PSR2 = no,  Panel Replay : yes
 2 = PSR1 : yes, PSR2 = yes, Panel Replay : no
 3 = PSR1 : yes, PSR2 = no,  Panel Replay : no

I.e. values different than -1 and 0 are handled as bitmasks where BIT0
disables PSR2 and BIT1 disables Panel Replay. Enable_psr parameter
doesn't impact Early Transport anymore.

v2:
  - make it more clear that enable_psr is bitmask for disabling different
    PSR modes

Jouni Högander (2):
  drm/i915/psr: Do not disable Early Transport when enable_psr is set
  drm/i915/psr: Do not disable Panel Replay if PSR2 is disabled

 .../drm/i915/display/intel_display_params.c   |  6 ++--
 drivers/gpu/drm/i915/display/intel_psr.c      | 35 +++++++++----------
 2 files changed, 20 insertions(+), 21 deletions(-)

-- 
2.43.0

[PATCH v2 1/2] drm/i915/psr: Do not disable Early Transport when enable_psr is set

[Jouni Högander]

Current approach is that Early Transport is disabled in case enable_psr
module parameter is set. Let's ignore enable_psr parameter when choosing if
Early Transport can be used.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 13 +------------
 1 file changed, 1 insertion(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index ae9053919211..a2b5688f0c82 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -265,16 +265,6 @@ static bool psr2_global_enabled(struct intel_dp *intel_dp)
 	}
 }
 
-static bool psr2_su_region_et_global_enabled(struct intel_dp *intel_dp)
-{
-	struct intel_display *display = to_intel_display(intel_dp);
-
-	if (display->params.enable_psr != -1)
-		return false;
-
-	return true;
-}
-
 static bool panel_replay_global_enabled(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
@@ -742,8 +732,7 @@ static bool psr2_su_region_et_valid(struct intel_dp *intel_dp, bool panel_replay
 	return panel_replay ?
 		intel_dp->pr_dpcd[INTEL_PR_DPCD_INDEX(DP_PANEL_REPLAY_CAP_SUPPORT)] &
 		DP_PANEL_REPLAY_EARLY_TRANSPORT_SUPPORT :
-		intel_dp->psr_dpcd[0] == DP_PSR2_WITH_Y_COORD_ET_SUPPORTED &&
-		psr2_su_region_et_global_enabled(intel_dp);
+		intel_dp->psr_dpcd[0] == DP_PSR2_WITH_Y_COORD_ET_SUPPORTED;
 }
 
 static void _panel_replay_enable_sink(struct intel_dp *intel_dp,
-- 
2.43.0

[PATCH v2 2/2] drm/i915/psr: Do not disable Panel Replay if PSR2 is disabled

[Jouni Högander]

Currently disabling PSR2 via enable_psr module parameter causes Panel
Replay being disabled as well. This patch changes this by still allowing
Panel Replay even if PSR2 is disabled.

After this patch enable_psr module parameter values are:

-1 = PSR1 : yes, PSR2 = yes, Panel Replay : yes
 0 = PSR1 : no,  PSR2 = no,  Panel Replay : no
 1 = PSR1 : yes, PSR2 = no,  Panel Replay : yes
 2 = PSR1 : yes, PSR2 = yes, Panel Replay : no
 3 = PSR1 : yes, PSR2 = no,  Panel Replay : no

I.e. values different than -1 and 0 are handled as bitmasks where BIT0
disables PSR2 and BIT1 disables Panel Replay.

v2:
  - make it more clear that enable_psr is bitmask for disabling different
    PSR modes

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 .../drm/i915/display/intel_display_params.c   |  6 ++---
 drivers/gpu/drm/i915/display/intel_psr.c      | 22 ++++++++++++++-----
 2 files changed, 19 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 75316247ee8a..195af19ece5f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -116,9 +116,9 @@ intel_display_param_named_unsafe(enable_fbc, int, 0400,
 	"(default: -1 (use per-chip default))");
 
 intel_display_param_named_unsafe(enable_psr, int, 0400,
-	"Enable PSR "
-	"(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
-	"Default: -1 (use per-chip default)");
+	"Enable PSR (0=disabled, 1=disable PSR2 (BIT0), 2=disable Panel Replay (BIT1))."
+	"Values different from 0 and -1 are handled as bitmask to disable different PSR modes."
+	"E.g. value 3 disables both PSR2 and Panel Replay. Default: -1 (use per-chip default)");
 
 intel_display_param_named(psr_safest_params, bool, 0400,
 	"Replace PSR VBT parameters by the safest and not optimal ones. This "
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index a2b5688f0c82..959b868672d0 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -254,13 +254,16 @@ static bool psr2_global_enabled(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
 
+	return display->params.enable_psr == -1 ||
+		!(display->params.enable_psr & 0x1);
+}
+
+static bool sel_update_global_enabled(struct intel_dp *intel_dp)
+{
 	switch (intel_dp->psr.debug & I915_PSR_DEBUG_MODE_MASK) {
-	case I915_PSR_DEBUG_DISABLE:
 	case I915_PSR_DEBUG_FORCE_PSR1:
 		return false;
 	default:
-		if (display->params.enable_psr == 1)
-			return false;
 		return true;
 	}
 }
@@ -269,7 +272,8 @@ static bool panel_replay_global_enabled(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
 
-	if ((display->params.enable_psr != -1) ||
+	if ((display->params.enable_psr != -1 &&
+	     display->params.enable_psr & 0x2) ||
 	    (intel_dp->psr.debug & I915_PSR_DEBUG_PANEL_REPLAY_DISABLE))
 		return false;
 	return true;
@@ -1415,6 +1419,12 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 	if (!intel_dp->psr.sink_psr2_support)
 		return false;
 
+	if (!psr2_global_enabled(intel_dp)) {
+		drm_dbg_kms(display->drm,
+			    "PSR2 disabled by flag\n");
+		return false;
+	}
+
 	/* JSL and EHL only supports eDP 1.3 */
 	if (display->platform.jasperlake || display->platform.elkhartlake) {
 		drm_dbg_kms(display->drm, "PSR2 not supported by phy\n");
@@ -1517,7 +1527,7 @@ static bool intel_sel_update_config_valid(struct intel_dp *intel_dp,
 		goto unsupported;
 	}
 
-	if (!psr2_global_enabled(intel_dp)) {
+	if (!sel_update_global_enabled(intel_dp)) {
 		drm_dbg_kms(display->drm,
 			    "Selective update disabled by flag\n");
 		goto unsupported;
@@ -1664,7 +1674,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
 	u8 active_pipes = 0;
 
 	if (!psr_global_enabled(intel_dp)) {
-		drm_dbg_kms(display->drm, "PSR disabled by flag\n");
+		drm_dbg_kms(display->drm, "PSR/Panel Replay disabled by flag\n");
 		return;
 	}
 
-- 
2.43.0

✓ CI.KUnit: success for Enable_psr kernel parameter changes (rev2)

[Patchwork]

== Series Details ==

Series: Enable_psr kernel parameter changes (rev2)
URL   : https://patchwork.freedesktop.org/series/151261/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[08:03:45] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:03:49] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:04:16] Starting KUnit Kernel (1/1)...
[08:04:16] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:04:16] ================== guc_buf (11 subtests) ===================
[08:04:16] [PASSED] test_smallest
[08:04:16] [PASSED] test_largest
[08:04:16] [PASSED] test_granular
[08:04:16] [PASSED] test_unique
[08:04:16] [PASSED] test_overlap
[08:04:16] [PASSED] test_reusable
[08:04:16] [PASSED] test_too_big
[08:04:16] [PASSED] test_flush
[08:04:16] [PASSED] test_lookup
[08:04:16] [PASSED] test_data
[08:04:16] [PASSED] test_class
[08:04:16] ===================== [PASSED] guc_buf =====================
[08:04:16] =================== guc_dbm (7 subtests) ===================
[08:04:16] [PASSED] test_empty
[08:04:16] [PASSED] test_default
[08:04:16] ======================== test_size  ========================
[08:04:16] [PASSED] 4
[08:04:16] [PASSED] 8
[08:04:16] [PASSED] 32
[08:04:16] [PASSED] 256
[08:04:16] ==================== [PASSED] test_size ====================
[08:04:16] ======================= test_reuse  ========================
[08:04:16] [PASSED] 4
[08:04:16] [PASSED] 8
[08:04:16] [PASSED] 32
[08:04:16] [PASSED] 256
[08:04:16] =================== [PASSED] test_reuse ====================
[08:04:16] =================== test_range_overlap  ====================
[08:04:16] [PASSED] 4
[08:04:16] [PASSED] 8
[08:04:16] [PASSED] 32
[08:04:16] [PASSED] 256
[08:04:16] =============== [PASSED] test_range_overlap ================
[08:04:16] =================== test_range_compact  ====================
[08:04:16] [PASSED] 4
[08:04:16] [PASSED] 8
[08:04:16] [PASSED] 32
[08:04:16] [PASSED] 256
[08:04:16] =============== [PASSED] test_range_compact ================
[08:04:16] ==================== test_range_spare  =====================
[08:04:16] [PASSED] 4
[08:04:16] [PASSED] 8
[08:04:16] [PASSED] 32
[08:04:16] [PASSED] 256
[08:04:16] ================ [PASSED] test_range_spare =================
[08:04:16] ===================== [PASSED] guc_dbm =====================
[08:04:16] =================== guc_idm (6 subtests) ===================
[08:04:16] [PASSED] bad_init
[08:04:16] [PASSED] no_init
[08:04:16] [PASSED] init_fini
[08:04:16] [PASSED] check_used
[08:04:16] [PASSED] check_quota
[08:04:16] [PASSED] check_all
[08:04:16] ===================== [PASSED] guc_idm =====================
[08:04:16] ================== no_relay (3 subtests) ===================
[08:04:16] [PASSED] xe_drops_guc2pf_if_not_ready
[08:04:16] [PASSED] xe_drops_guc2vf_if_not_ready
[08:04:16] [PASSED] xe_rejects_send_if_not_ready
[08:04:16] ==================== [PASSED] no_relay =====================
[08:04:16] ================== pf_relay (14 subtests) ==================
[08:04:16] [PASSED] pf_rejects_guc2pf_too_short
[08:04:16] [PASSED] pf_rejects_guc2pf_too_long
[08:04:16] [PASSED] pf_rejects_guc2pf_no_payload
[08:04:16] [PASSED] pf_fails_no_payload
[08:04:16] [PASSED] pf_fails_bad_origin
[08:04:16] [PASSED] pf_fails_bad_type
[08:04:16] [PASSED] pf_txn_reports_error
[08:04:16] [PASSED] pf_txn_sends_pf2guc
[08:04:16] [PASSED] pf_sends_pf2guc
[08:04:16] [SKIPPED] pf_loopback_nop
[08:04:16] [SKIPPED] pf_loopback_echo
[08:04:16] [SKIPPED] pf_loopback_fail
[08:04:16] [SKIPPED] pf_loopback_busy
[08:04:16] [SKIPPED] pf_loopback_retry
[08:04:16] ==================== [PASSED] pf_relay =====================
[08:04:16] ================== vf_relay (3 subtests) ===================
[08:04:16] [PASSED] vf_rejects_guc2vf_too_short
[08:04:16] [PASSED] vf_rejects_guc2vf_too_long
[08:04:16] [PASSED] vf_rejects_guc2vf_no_payload
[08:04:16] ==================== [PASSED] vf_relay =====================
[08:04:16] ================= pf_service (11 subtests) =================
[08:04:16] [PASSED] pf_negotiate_any
[08:04:16] [PASSED] pf_negotiate_base_match
[08:04:16] [PASSED] pf_negotiate_base_newer
[08:04:16] [PASSED] pf_negotiate_base_next
[08:04:16] [SKIPPED] pf_negotiate_base_older
[08:04:16] [PASSED] pf_negotiate_base_prev
[08:04:16] [PASSED] pf_negotiate_latest_match
[08:04:16] [PASSED] pf_negotiate_latest_newer
[08:04:16] [PASSED] pf_negotiate_latest_next
[08:04:16] [SKIPPED] pf_negotiate_latest_older
[08:04:16] [SKIPPED] pf_negotiate_latest_prev
[08:04:16] =================== [PASSED] pf_service ====================
[08:04:16] ===================== lmtt (1 subtest) =====================
[08:04:16] ======================== test_ops  =========================
[08:04:16] [PASSED] 2-level
[08:04:16] [PASSED] multi-level
[08:04:16] ==================== [PASSED] test_ops =====================
[08:04:16] ====================== [PASSED] lmtt =======================
[08:04:16] =================== xe_mocs (2 subtests) ===================
[08:04:16] ================ xe_live_mocs_kernel_kunit  ================
[08:04:16] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[08:04:16] ================ xe_live_mocs_reset_kunit  =================
[08:04:16] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[08:04:16] ==================== [SKIPPED] xe_mocs =====================
[08:04:16] ================= xe_migrate (2 subtests) ==================
[08:04:16] ================= xe_migrate_sanity_kunit  =================
[08:04:16] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[08:04:16] ================== xe_validate_ccs_kunit  ==================
[08:04:16] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[08:04:16] =================== [SKIPPED] xe_migrate ===================
[08:04:16] ================== xe_dma_buf (1 subtest) ==================
[08:04:16] ==================== xe_dma_buf_kunit  =====================
[08:04:16] ================ [SKIPPED] xe_dma_buf_kunit ================
[08:04:16] =================== [SKIPPED] xe_dma_buf ===================
[08:04:16] ================= xe_bo_shrink (1 subtest) =================
[08:04:16] =================== xe_bo_shrink_kunit  ====================
[08:04:16] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[08:04:16] ================== [SKIPPED] xe_bo_shrink ==================
[08:04:16] ==================== xe_bo (2 subtests) ====================
[08:04:16] ================== xe_ccs_migrate_kunit  ===================
[08:04:16] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[08:04:16] ==================== xe_bo_evict_kunit  ====================
[08:04:16] =============== [SKIPPED] xe_bo_evict_kunit ================
[08:04:16] ===================== [SKIPPED] xe_bo ======================
[08:04:16] ==================== args (11 subtests) ====================
[08:04:16] [PASSED] count_args_test
[08:04:16] [PASSED] call_args_example
[08:04:16] [PASSED] call_args_test
[08:04:16] [PASSED] drop_first_arg_example
[08:04:16] [PASSED] drop_first_arg_test
[08:04:16] [PASSED] first_arg_example
[08:04:16] [PASSED] first_arg_test
[08:04:16] [PASSED] last_arg_example
[08:04:16] [PASSED] last_arg_test
[08:04:16] [PASSED] pick_arg_example
[08:04:16] [PASSED] sep_comma_example
[08:04:16] ====================== [PASSED] args =======================
[08:04:16] =================== xe_pci (3 subtests) ====================
[08:04:16] ==================== check_graphics_ip  ====================
[08:04:16] [PASSED] 12.70 Xe_LPG
[08:04:16] [PASSED] 12.71 Xe_LPG
[08:04:16] [PASSED] 12.74 Xe_LPG+
[08:04:16] [PASSED] 20.01 Xe2_HPG
[08:04:16] [PASSED] 20.02 Xe2_HPG
[08:04:16] [PASSED] 20.04 Xe2_LPG
[08:04:16] [PASSED] 30.00 Xe3_LPG
[08:04:16] [PASSED] 30.01 Xe3_LPG
[08:04:16] [PASSED] 30.03 Xe3_LPG
[08:04:16] ================ [PASSED] check_graphics_ip ================
[08:04:16] ===================== check_media_ip  ======================
[08:04:16] [PASSED] 13.00 Xe_LPM+
[08:04:16] [PASSED] 13.01 Xe2_HPM
[08:04:16] [PASSED] 20.00 Xe2_LPM
[08:04:16] [PASSED] 30.00 Xe3_LPM
[08:04:16] [PASSED] 30.02 Xe3_LPM
[08:04:16] ================= [PASSED] check_media_ip ==================
[08:04:16] ================= check_platform_gt_count  =================
[08:04:16] [PASSED] 0x9A60 (TIGERLAKE)
[08:04:16] [PASSED] 0x9A68 (TIGERLAKE)
[08:04:16] [PASSED] 0x9A70 (TIGERLAKE)
[08:04:16] [PASSED] 0x9A40 (TIGERLAKE)
[08:04:16] [PASSED] 0x9A49 (TIGERLAKE)
[08:04:16] [PASSED] 0x9A59 (TIGERLAKE)
[08:04:16] [PASSED] 0x9A78 (TIGERLAKE)
[08:04:16] [PASSED] 0x9AC0 (TIGERLAKE)
[08:04:16] [PASSED] 0x9AC9 (TIGERLAKE)
[08:04:16] [PASSED] 0x9AD9 (TIGERLAKE)
[08:04:16] [PASSED] 0x9AF8 (TIGERLAKE)
[08:04:16] [PASSED] 0x4C80 (ROCKETLAKE)
[08:04:16] [PASSED] 0x4C8A (ROCKETLAKE)
[08:04:16] [PASSED] 0x4C8B (ROCKETLAKE)
[08:04:16] [PASSED] 0x4C8C (ROCKETLAKE)
[08:04:16] [PASSED] 0x4C90 (ROCKETLAKE)
[08:04:16] [PASSED] 0x4C9A (ROCKETLAKE)
[08:04:16] [PASSED] 0x4680 (ALDERLAKE_S)
[08:04:16] [PASSED] 0x4682 (ALDERLAKE_S)
[08:04:16] [PASSED] 0x4688 (ALDERLAKE_S)
[08:04:16] [PASSED] 0x468A (ALDERLAKE_S)
[08:04:16] [PASSED] 0x468B (ALDERLAKE_S)
[08:04:16] [PASSED] 0x4690 (ALDERLAKE_S)
[08:04:16] [PASSED] 0x4692 (ALDERLAKE_S)
[08:04:16] [PASSED] 0x4693 (ALDERLAKE_S)
[08:04:16] [PASSED] 0x46A0 (ALDERLAKE_P)
[08:04:16] [PASSED] 0x46A1 (ALDERLAKE_P)
[08:04:16] [PASSED] 0x46A2 (ALDERLAKE_P)
[08:04:16] [PASSED] 0x46A3 (ALDERLAKE_P)
[08:04:16] [PASSED] 0x46A6 (ALDERLAKE_P)
[08:04:16] [PASSED] 0x46A8 (ALDERLAKE_P)
[08:04:16] [PASSED] 0x46AA (ALDERLAKE_P)
[08:04:16] [PASSED] 0x462A (ALDERLAKE_P)
[08:04:16] [PASSED] 0x4626 (ALDERLAKE_P)
[08:04:16] [PASSED] 0x4628 (ALDERLAKE_P)
[08:04:16] [PASSED] 0x46B0 (ALDERLAKE_P)
[08:04:16] [PASSED] 0x46B1 (ALDERLAKE_P)
[08:04:16] [PASSED] 0x46B2 (ALDERLAKE_P)
[08:04:16] [PASSED] 0x46B3 (ALDERLAKE_P)
[08:04:16] [PASSED] 0x46C0 (ALDERLAKE_P)
[08:04:16] [PASSED] 0x46C1 (ALDERLAKE_P)
[08:04:16] [PASSED] 0x46C2 (ALDERLAKE_P)
[08:04:16] [PASSED] 0x46C3 (ALDERLAKE_P)
[08:04:16] [PASSED] 0x46D0 (ALDERLAKE_N)
[08:04:16] [PASSED] 0x46D1 (ALDERLAKE_N)
[08:04:16] [PASSED] 0x46D2 (ALDERLAKE_N)
[08:04:16] [PASSED] 0x46D3 (ALDERLAKE_N)
[08:04:16] [PASSED] 0x46D4 (ALDERLAKE_N)
[08:04:16] [PASSED] 0xA721 (ALDERLAKE_P)
[08:04:16] [PASSED] 0xA7A1 (ALDERLAKE_P)
[08:04:16] [PASSED] 0xA7A9 (ALDERLAKE_P)
[08:04:16] [PASSED] 0xA7AC (ALDERLAKE_P)
[08:04:16] [PASSED] 0xA7AD (ALDERLAKE_P)
[08:04:16] [PASSED] 0xA720 (ALDERLAKE_P)
[08:04:16] [PASSED] 0xA7A0 (ALDERLAKE_P)
[08:04:16] [PASSED] 0xA7A8 (ALDERLAKE_P)
[08:04:16] [PASSED] 0xA7AA (ALDERLAKE_P)
[08:04:16] [PASSED] 0xA7AB (ALDERLAKE_P)
[08:04:16] [PASSED] 0xA780 (ALDERLAKE_S)
[08:04:16] [PASSED] 0xA781 (ALDERLAKE_S)
[08:04:16] [PASSED] 0xA782 (ALDERLAKE_S)
[08:04:16] [PASSED] 0xA783 (ALDERLAKE_S)
[08:04:16] [PASSED] 0xA788 (ALDERLAKE_S)
[08:04:16] [PASSED] 0xA789 (ALDERLAKE_S)
[08:04:16] [PASSED] 0xA78A (ALDERLAKE_S)
[08:04:16] [PASSED] 0xA78B (ALDERLAKE_S)
[08:04:16] [PASSED] 0x4905 (DG1)
[08:04:16] [PASSED] 0x4906 (DG1)
[08:04:16] [PASSED] 0x4907 (DG1)
[08:04:16] [PASSED] 0x4908 (DG1)
[08:04:16] [PASSED] 0x4909 (DG1)
[08:04:16] [PASSED] 0x56C0 (DG2)
[08:04:16] [PASSED] 0x56C2 (DG2)
[08:04:16] [PASSED] 0x56C1 (DG2)
[08:04:16] [PASSED] 0x7D51 (METEORLAKE)
[08:04:16] [PASSED] 0x7DD1 (METEORLAKE)
[08:04:16] [PASSED] 0x7D41 (METEORLAKE)
[08:04:16] [PASSED] 0x7D67 (METEORLAKE)
[08:04:16] [PASSED] 0xB640 (METEORLAKE)
[08:04:16] [PASSED] 0x56A0 (DG2)
[08:04:16] [PASSED] 0x56A1 (DG2)
[08:04:16] [PASSED] 0x56A2 (DG2)
[08:04:16] [PASSED] 0x56BE (DG2)
[08:04:16] [PASSED] 0x56BF (DG2)
[08:04:16] [PASSED] 0x5690 (DG2)
[08:04:16] [PASSED] 0x5691 (DG2)
[08:04:16] [PASSED] 0x5692 (DG2)
[08:04:16] [PASSED] 0x56A5 (DG2)
[08:04:16] [PASSED] 0x56A6 (DG2)
[08:04:16] [PASSED] 0x56B0 (DG2)
[08:04:16] [PASSED] 0x56B1 (DG2)
[08:04:16] [PASSED] 0x56BA (DG2)
[08:04:16] [PASSED] 0x56BB (DG2)
[08:04:16] [PASSED] 0x56BC (DG2)
[08:04:16] [PASSED] 0x56BD (DG2)
[08:04:16] [PASSED] 0x5693 (DG2)
[08:04:16] [PASSED] 0x5694 (DG2)
[08:04:16] [PASSED] 0x5695 (DG2)
[08:04:16] [PASSED] 0x56A3 (DG2)
[08:04:16] [PASSED] 0x56A4 (DG2)
[08:04:16] [PASSED] 0x56B2 (DG2)
[08:04:16] [PASSED] 0x56B3 (DG2)
[08:04:16] [PASSED] 0x5696 (DG2)
[08:04:16] [PASSED] 0x5697 (DG2)
[08:04:16] [PASSED] 0xB69 (PVC)
[08:04:16] [PASSED] 0xB6E (PVC)
[08:04:16] [PASSED] 0xBD4 (PVC)
[08:04:16] [PASSED] 0xBD5 (PVC)
[08:04:16] [PASSED] 0xBD6 (PVC)
[08:04:16] [PASSED] 0xBD7 (PVC)
[08:04:16] [PASSED] 0xBD8 (PVC)
[08:04:16] [PASSED] 0xBD9 (PVC)
[08:04:16] [PASSED] 0xBDA (PVC)
[08:04:16] [PASSED] 0xBDB (PVC)
[08:04:16] [PASSED] 0xBE0 (PVC)
[08:04:16] [PASSED] 0xBE1 (PVC)
[08:04:16] [PASSED] 0xBE5 (PVC)
[08:04:16] [PASSED] 0x7D40 (METEORLAKE)
[08:04:16] [PASSED] 0x7D45 (METEORLAKE)
[08:04:16] [PASSED] 0x7D55 (METEORLAKE)
[08:04:16] [PASSED] 0x7D60 (METEORLAKE)
[08:04:16] [PASSED] 0x7DD5 (METEORLAKE)
[08:04:16] [PASSED] 0x6420 (LUNARLAKE)
[08:04:16] [PASSED] 0x64A0 (LUNARLAKE)
[08:04:16] [PASSED] 0x64B0 (LUNARLAKE)
[08:04:16] [PASSED] 0xE202 (BATTLEMAGE)
[08:04:16] [PASSED] 0xE209 (BATTLEMAGE)
[08:04:16] [PASSED] 0xE20B (BATTLEMAGE)
[08:04:16] [PASSED] 0xE20C (BATTLEMAGE)
[08:04:16] [PASSED] 0xE20D (BATTLEMAGE)
[08:04:16] [PASSED] 0xE210 (BATTLEMAGE)
[08:04:16] [PASSED] 0xE211 (BATTLEMAGE)
[08:04:16] [PASSED] 0xE212 (BATTLEMAGE)
[08:04:16] [PASSED] 0xE216 (BATTLEMAGE)
[08:04:16] [PASSED] 0xE220 (BATTLEMAGE)
[08:04:16] [PASSED] 0xE221 (BATTLEMAGE)
[08:04:16] [PASSED] 0xE222 (BATTLEMAGE)
[08:04:16] [PASSED] 0xE223 (BATTLEMAGE)
[08:04:16] [PASSED] 0xB080 (PANTHERLAKE)
[08:04:16] [PASSED] 0xB081 (PANTHERLAKE)
[08:04:16] [PASSED] 0xB082 (PANTHERLAKE)
[08:04:16] [PASSED] 0xB083 (PANTHERLAKE)
[08:04:16] [PASSED] 0xB084 (PANTHERLAKE)
[08:04:16] [PASSED] 0xB085 (PANTHERLAKE)
[08:04:16] [PASSED] 0xB086 (PANTHERLAKE)
[08:04:16] [PASSED] 0xB087 (PANTHERLAKE)
[08:04:16] [PASSED] 0xB08F (PANTHERLAKE)
[08:04:16] [PASSED] 0xB090 (PANTHERLAKE)
[08:04:16] [PASSED] 0xB0A0 (PANTHERLAKE)
[08:04:16] [PASSED] 0xB0B0 (PANTHERLAKE)
[08:04:16] [PASSED] 0xFD80 (PANTHERLAKE)
[08:04:16] [PASSED] 0xFD81 (PANTHERLAKE)
[08:04:16] ============= [PASSED] check_platform_gt_count =============
[08:04:16] ===================== [PASSED] xe_pci ======================
[08:04:16] =================== xe_rtp (2 subtests) ====================
[08:04:16] =============== xe_rtp_process_to_sr_tests  ================
[08:04:16] [PASSED] coalesce-same-reg
[08:04:16] [PASSED] no-match-no-add
[08:04:16] [PASSED] match-or
[08:04:16] [PASSED] match-or-xfail
[08:04:16] [PASSED] no-match-no-add-multiple-rules
[08:04:16] [PASSED] two-regs-two-entries
[08:04:16] [PASSED] clr-one-set-other
[08:04:16] [PASSED] set-field
[08:04:16] [PASSED] conflict-duplicate
[08:04:16] [PASSED] conflict-not-disjoint
[08:04:16] [PASSED] conflict-reg-type
[08:04:16] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[08:04:16] ================== xe_rtp_process_tests  ===================
[08:04:16] [PASSED] active1
[08:04:16] [PASSED] active2
[08:04:16] [PASSED] active-inactive
[08:04:16] [PASSED] inactive-active
[08:04:16] [PASSED] inactive-1st_or_active-inactive
[08:04:16] [PASSED] inactive-2nd_or_active-inactive
[08:04:16] [PASSED] inactive-last_or_active-inactive
[08:04:16] [PASSED] inactive-no_or_active-inactive
[08:04:16] ============== [PASSED] xe_rtp_process_tests ===============
[08:04:16] ===================== [PASSED] xe_rtp ======================
[08:04:16] ==================== xe_wa (1 subtest) =====================
[08:04:16] ======================== xe_wa_gt  =========================
[08:04:16] [PASSED] TIGERLAKE (B0)
[08:04:16] [PASSED] DG1 (A0)
[08:04:16] [PASSED] DG1 (B0)
[08:04:16] [PASSED] ALDERLAKE_S (A0)
[08:04:16] [PASSED] ALDERLAKE_S (B0)
[08:04:16] [PASSED] ALDERLAKE_S (C0)
[08:04:16] [PASSED] ALDERLAKE_S (D0)
[08:04:16] [PASSED] ALDERLAKE_P (A0)
[08:04:16] [PASSED] ALDERLAKE_P (B0)
[08:04:16] [PASSED] ALDERLAKE_P (C0)
[08:04:16] [PASSED] ALDERLAKE_S_RPLS (D0)
[08:04:16] [PASSED] ALDERLAKE_P_RPLU (E0)
[08:04:16] [PASSED] DG2_G10 (C0)
[08:04:16] [PASSED] DG2_G11 (B1)
[08:04:16] [PASSED] DG2_G12 (A1)
[08:04:16] [PASSED] METEORLAKE (g:A0, m:A0)
[08:04:16] [PASSED] METEORLAKE (g:A0, m:A0)
[08:04:16] [PASSED] METEORLAKE (g:A0, m:A0)
[08:04:16] [PASSED] LUNARLAKE (g:A0, m:A0)
[08:04:16] [PASSED] LUNARLAKE (g:B0, m:A0)
stty: 'standard input': Inappropriate ioctl for device
[08:04:16] [PASSED] BATTLEMAGE (g:A0, m:A1)
[08:04:16] ==================== [PASSED] xe_wa_gt =====================
[08:04:16] ====================== [PASSED] xe_wa ======================
[08:04:16] ============================================================
[08:04:16] Testing complete. Ran 297 tests: passed: 281, skipped: 16
[08:04:17] Elapsed time: 31.208s total, 4.138s configuring, 26.751s building, 0.304s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[08:04:17] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:04:18] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:04:40] Starting KUnit Kernel (1/1)...
[08:04:40] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:04:40] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[08:04:40] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[08:04:40] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[08:04:40] =========== drm_validate_clone_mode (2 subtests) ===========
[08:04:40] ============== drm_test_check_in_clone_mode  ===============
[08:04:40] [PASSED] in_clone_mode
[08:04:40] [PASSED] not_in_clone_mode
[08:04:40] ========== [PASSED] drm_test_check_in_clone_mode ===========
[08:04:40] =============== drm_test_check_valid_clones  ===============
[08:04:40] [PASSED] not_in_clone_mode
[08:04:40] [PASSED] valid_clone
[08:04:40] [PASSED] invalid_clone
[08:04:40] =========== [PASSED] drm_test_check_valid_clones ===========
[08:04:40] ============= [PASSED] drm_validate_clone_mode =============
[08:04:40] ============= drm_validate_modeset (1 subtest) =============
[08:04:40] [PASSED] drm_test_check_connector_changed_modeset
[08:04:40] ============== [PASSED] drm_validate_modeset ===============
[08:04:40] ====== drm_test_bridge_get_current_state (2 subtests) ======
[08:04:40] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[08:04:40] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[08:04:40] ======== [PASSED] drm_test_bridge_get_current_state ========
[08:04:40] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[08:04:40] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[08:04:40] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[08:04:40] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[08:04:40] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[08:04:40] ============== drm_bridge_alloc (2 subtests) ===============
[08:04:40] [PASSED] drm_test_drm_bridge_alloc_basic
[08:04:40] [PASSED] drm_test_drm_bridge_alloc_get_put
[08:04:40] ================ [PASSED] drm_bridge_alloc =================
[08:04:40] ================== drm_buddy (7 subtests) ==================
[08:04:40] [PASSED] drm_test_buddy_alloc_limit
[08:04:40] [PASSED] drm_test_buddy_alloc_optimistic
[08:04:40] [PASSED] drm_test_buddy_alloc_pessimistic
[08:04:40] [PASSED] drm_test_buddy_alloc_pathological
[08:04:40] [PASSED] drm_test_buddy_alloc_contiguous
[08:04:40] [PASSED] drm_test_buddy_alloc_clear
[08:04:40] [PASSED] drm_test_buddy_alloc_range_bias
[08:04:40] ==================== [PASSED] drm_buddy ====================
[08:04:40] ============= drm_cmdline_parser (40 subtests) =============
[08:04:40] [PASSED] drm_test_cmdline_force_d_only
[08:04:40] [PASSED] drm_test_cmdline_force_D_only_dvi
[08:04:40] [PASSED] drm_test_cmdline_force_D_only_hdmi
[08:04:40] [PASSED] drm_test_cmdline_force_D_only_not_digital
[08:04:40] [PASSED] drm_test_cmdline_force_e_only
[08:04:40] [PASSED] drm_test_cmdline_res
[08:04:40] [PASSED] drm_test_cmdline_res_vesa
[08:04:40] [PASSED] drm_test_cmdline_res_vesa_rblank
[08:04:40] [PASSED] drm_test_cmdline_res_rblank
[08:04:40] [PASSED] drm_test_cmdline_res_bpp
[08:04:40] [PASSED] drm_test_cmdline_res_refresh
[08:04:40] [PASSED] drm_test_cmdline_res_bpp_refresh
[08:04:40] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[08:04:40] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[08:04:40] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[08:04:40] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[08:04:40] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[08:04:40] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[08:04:40] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[08:04:40] [PASSED] drm_test_cmdline_res_margins_force_on
[08:04:40] [PASSED] drm_test_cmdline_res_vesa_margins
[08:04:40] [PASSED] drm_test_cmdline_name
[08:04:40] [PASSED] drm_test_cmdline_name_bpp
[08:04:40] [PASSED] drm_test_cmdline_name_option
[08:04:40] [PASSED] drm_test_cmdline_name_bpp_option
[08:04:40] [PASSED] drm_test_cmdline_rotate_0
[08:04:40] [PASSED] drm_test_cmdline_rotate_90
[08:04:40] [PASSED] drm_test_cmdline_rotate_180
[08:04:40] [PASSED] drm_test_cmdline_rotate_270
[08:04:40] [PASSED] drm_test_cmdline_hmirror
[08:04:40] [PASSED] drm_test_cmdline_vmirror
[08:04:40] [PASSED] drm_test_cmdline_margin_options
[08:04:40] [PASSED] drm_test_cmdline_multiple_options
[08:04:40] [PASSED] drm_test_cmdline_bpp_extra_and_option
[08:04:40] [PASSED] drm_test_cmdline_extra_and_option
[08:04:40] [PASSED] drm_test_cmdline_freestanding_options
[08:04:40] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[08:04:40] [PASSED] drm_test_cmdline_panel_orientation
[08:04:40] ================ drm_test_cmdline_invalid  =================
[08:04:40] [PASSED] margin_only
[08:04:40] [PASSED] interlace_only
[08:04:40] [PASSED] res_missing_x
[08:04:40] [PASSED] res_missing_y
[08:04:40] [PASSED] res_bad_y
[08:04:40] [PASSED] res_missing_y_bpp
[08:04:40] [PASSED] res_bad_bpp
[08:04:40] [PASSED] res_bad_refresh
[08:04:40] [PASSED] res_bpp_refresh_force_on_off
[08:04:40] [PASSED] res_invalid_mode
[08:04:40] [PASSED] res_bpp_wrong_place_mode
[08:04:40] [PASSED] name_bpp_refresh
[08:04:40] [PASSED] name_refresh
[08:04:40] [PASSED] name_refresh_wrong_mode
[08:04:40] [PASSED] name_refresh_invalid_mode
[08:04:40] [PASSED] rotate_multiple
[08:04:40] [PASSED] rotate_invalid_val
[08:04:40] [PASSED] rotate_truncated
[08:04:40] [PASSED] invalid_option
[08:04:40] [PASSED] invalid_tv_option
[08:04:40] [PASSED] truncated_tv_option
[08:04:40] ============ [PASSED] drm_test_cmdline_invalid =============
[08:04:40] =============== drm_test_cmdline_tv_options  ===============
[08:04:40] [PASSED] NTSC
[08:04:40] [PASSED] NTSC_443
[08:04:40] [PASSED] NTSC_J
[08:04:40] [PASSED] PAL
[08:04:40] [PASSED] PAL_M
[08:04:40] [PASSED] PAL_N
[08:04:40] [PASSED] SECAM
[08:04:40] [PASSED] MONO_525
[08:04:40] [PASSED] MONO_625
[08:04:40] =========== [PASSED] drm_test_cmdline_tv_options ===========
[08:04:40] =============== [PASSED] drm_cmdline_parser ================
[08:04:40] ========== drmm_connector_hdmi_init (20 subtests) ==========
[08:04:40] [PASSED] drm_test_connector_hdmi_init_valid
[08:04:40] [PASSED] drm_test_connector_hdmi_init_bpc_8
[08:04:40] [PASSED] drm_test_connector_hdmi_init_bpc_10
[08:04:40] [PASSED] drm_test_connector_hdmi_init_bpc_12
[08:04:40] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[08:04:40] [PASSED] drm_test_connector_hdmi_init_bpc_null
[08:04:40] [PASSED] drm_test_connector_hdmi_init_formats_empty
[08:04:40] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[08:04:40] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[08:04:40] [PASSED] supported_formats=0x9 yuv420_allowed=1
[08:04:40] [PASSED] supported_formats=0x9 yuv420_allowed=0
[08:04:40] [PASSED] supported_formats=0x3 yuv420_allowed=1
[08:04:40] [PASSED] supported_formats=0x3 yuv420_allowed=0
[08:04:40] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[08:04:40] [PASSED] drm_test_connector_hdmi_init_null_ddc
[08:04:40] [PASSED] drm_test_connector_hdmi_init_null_product
[08:04:40] [PASSED] drm_test_connector_hdmi_init_null_vendor
[08:04:40] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[08:04:40] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[08:04:40] [PASSED] drm_test_connector_hdmi_init_product_valid
[08:04:40] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[08:04:40] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[08:04:40] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[08:04:40] ========= drm_test_connector_hdmi_init_type_valid  =========
[08:04:40] [PASSED] HDMI-A
[08:04:40] [PASSED] HDMI-B
[08:04:40] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[08:04:40] ======== drm_test_connector_hdmi_init_type_invalid  ========
[08:04:40] [PASSED] Unknown
[08:04:40] [PASSED] VGA
[08:04:40] [PASSED] DVI-I
[08:04:40] [PASSED] DVI-D
[08:04:40] [PASSED] DVI-A
[08:04:40] [PASSED] Composite
[08:04:40] [PASSED] SVIDEO
[08:04:40] [PASSED] LVDS
[08:04:40] [PASSED] Component
[08:04:40] [PASSED] DIN
[08:04:40] [PASSED] DP
[08:04:40] [PASSED] TV
[08:04:40] [PASSED] eDP
[08:04:40] [PASSED] Virtual
[08:04:40] [PASSED] DSI
[08:04:40] [PASSED] DPI
[08:04:40] [PASSED] Writeback
[08:04:40] [PASSED] SPI
[08:04:40] [PASSED] USB
[08:04:40] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[08:04:40] ============ [PASSED] drmm_connector_hdmi_init =============
[08:04:40] ============= drmm_connector_init (3 subtests) =============
[08:04:40] [PASSED] drm_test_drmm_connector_init
[08:04:40] [PASSED] drm_test_drmm_connector_init_null_ddc
[08:04:40] ========= drm_test_drmm_connector_init_type_valid  =========
[08:04:40] [PASSED] Unknown
[08:04:40] [PASSED] VGA
[08:04:40] [PASSED] DVI-I
[08:04:40] [PASSED] DVI-D
[08:04:40] [PASSED] DVI-A
[08:04:40] [PASSED] Composite
[08:04:40] [PASSED] SVIDEO
[08:04:40] [PASSED] LVDS
[08:04:40] [PASSED] Component
[08:04:40] [PASSED] DIN
[08:04:40] [PASSED] DP
[08:04:40] [PASSED] HDMI-A
[08:04:40] [PASSED] HDMI-B
[08:04:40] [PASSED] TV
[08:04:40] [PASSED] eDP
[08:04:40] [PASSED] Virtual
[08:04:40] [PASSED] DSI
[08:04:40] [PASSED] DPI
[08:04:40] [PASSED] Writeback
[08:04:40] [PASSED] SPI
[08:04:40] [PASSED] USB
[08:04:40] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[08:04:40] =============== [PASSED] drmm_connector_init ===============
[08:04:40] ========= drm_connector_dynamic_init (6 subtests) ==========
[08:04:40] [PASSED] drm_test_drm_connector_dynamic_init
[08:04:40] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[08:04:40] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[08:04:40] [PASSED] drm_test_drm_connector_dynamic_init_properties
[08:04:40] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[08:04:40] [PASSED] Unknown
[08:04:40] [PASSED] VGA
[08:04:40] [PASSED] DVI-I
[08:04:40] [PASSED] DVI-D
[08:04:40] [PASSED] DVI-A
[08:04:40] [PASSED] Composite
[08:04:40] [PASSED] SVIDEO
[08:04:40] [PASSED] LVDS
[08:04:40] [PASSED] Component
[08:04:40] [PASSED] DIN
[08:04:40] [PASSED] DP
[08:04:40] [PASSED] HDMI-A
[08:04:40] [PASSED] HDMI-B
[08:04:40] [PASSED] TV
[08:04:40] [PASSED] eDP
[08:04:40] [PASSED] Virtual
[08:04:40] [PASSED] DSI
[08:04:40] [PASSED] DPI
[08:04:40] [PASSED] Writeback
[08:04:40] [PASSED] SPI
[08:04:40] [PASSED] USB
[08:04:40] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[08:04:40] ======== drm_test_drm_connector_dynamic_init_name  =========
[08:04:40] [PASSED] Unknown
[08:04:40] [PASSED] VGA
[08:04:40] [PASSED] DVI-I
[08:04:40] [PASSED] DVI-D
[08:04:40] [PASSED] DVI-A
[08:04:40] [PASSED] Composite
[08:04:40] [PASSED] SVIDEO
[08:04:40] [PASSED] LVDS
[08:04:40] [PASSED] Component
[08:04:40] [PASSED] DIN
[08:04:40] [PASSED] DP
[08:04:40] [PASSED] HDMI-A
[08:04:40] [PASSED] HDMI-B
[08:04:40] [PASSED] TV
[08:04:40] [PASSED] eDP
[08:04:40] [PASSED] Virtual
[08:04:40] [PASSED] DSI
[08:04:40] [PASSED] DPI
[08:04:40] [PASSED] Writeback
[08:04:40] [PASSED] SPI
[08:04:40] [PASSED] USB
[08:04:40] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[08:04:40] =========== [PASSED] drm_connector_dynamic_init ============
[08:04:40] ==== drm_connector_dynamic_register_early (4 subtests) =====
[08:04:40] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[08:04:40] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[08:04:40] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[08:04:40] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[08:04:40] ====== [PASSED] drm_connector_dynamic_register_early =======
[08:04:40] ======= drm_connector_dynamic_register (7 subtests) ========
[08:04:40] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[08:04:40] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[08:04:40] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[08:04:40] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[08:04:40] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[08:04:40] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[08:04:40] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[08:04:40] ========= [PASSED] drm_connector_dynamic_register ==========
[08:04:40] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[08:04:40] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[08:04:40] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[08:04:40] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[08:04:40] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[08:04:40] ========== drm_test_get_tv_mode_from_name_valid  ===========
[08:04:40] [PASSED] NTSC
[08:04:40] [PASSED] NTSC-443
[08:04:40] [PASSED] NTSC-J
[08:04:40] [PASSED] PAL
[08:04:40] [PASSED] PAL-M
[08:04:40] [PASSED] PAL-N
[08:04:40] [PASSED] SECAM
[08:04:40] [PASSED] Mono
[08:04:40] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[08:04:40] [PASSED] drm_test_get_tv_mode_from_name_truncated
[08:04:40] ============ [PASSED] drm_get_tv_mode_from_name ============
[08:04:40] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[08:04:40] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[08:04:40] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[08:04:40] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[08:04:40] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[08:04:40] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[08:04:40] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[08:04:40] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[08:04:40] [PASSED] VIC 96
[08:04:40] [PASSED] VIC 97
[08:04:40] [PASSED] VIC 101
[08:04:40] [PASSED] VIC 102
[08:04:40] [PASSED] VIC 106
[08:04:40] [PASSED] VIC 107
[08:04:40] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[08:04:40] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[08:04:40] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[08:04:40] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[08:04:40] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[08:04:40] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[08:04:40] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[08:04:40] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[08:04:40] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[08:04:40] [PASSED] Automatic
[08:04:40] [PASSED] Full
[08:04:40] [PASSED] Limited 16:235
[08:04:40] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[08:04:40] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[08:04:40] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[08:04:40] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[08:04:40] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[08:04:40] [PASSED] RGB
[08:04:40] [PASSED] YUV 4:2:0
[08:04:40] [PASSED] YUV 4:2:2
[08:04:40] [PASSED] YUV 4:4:4
[08:04:40] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[08:04:40] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[08:04:40] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[08:04:40] ============= drm_damage_helper (21 subtests) ==============
[08:04:40] [PASSED] drm_test_damage_iter_no_damage
[08:04:40] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[08:04:40] [PASSED] drm_test_damage_iter_no_damage_src_moved
[08:04:40] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[08:04:40] [PASSED] drm_test_damage_iter_no_damage_not_visible
[08:04:40] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[08:04:40] [PASSED] drm_test_damage_iter_no_damage_no_fb
[08:04:40] [PASSED] drm_test_damage_iter_simple_damage
[08:04:40] [PASSED] drm_test_damage_iter_single_damage
[08:04:40] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[08:04:40] [PASSED] drm_test_damage_iter_single_damage_outside_src
[08:04:40] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[08:04:40] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[08:04:40] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[08:04:40] [PASSED] drm_test_damage_iter_single_damage_src_moved
[08:04:40] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[08:04:40] [PASSED] drm_test_damage_iter_damage
[08:04:40] [PASSED] drm_test_damage_iter_damage_one_intersect
[08:04:40] [PASSED] drm_test_damage_iter_damage_one_outside
[08:04:40] [PASSED] drm_test_damage_iter_damage_src_moved
[08:04:40] [PASSED] drm_test_damage_iter_damage_not_visible
[08:04:40] ================ [PASSED] drm_damage_helper ================
[08:04:40] ============== drm_dp_mst_helper (3 subtests) ==============
[08:04:40] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[08:04:40] [PASSED] Clock 154000 BPP 30 DSC disabled
[08:04:40] [PASSED] Clock 234000 BPP 30 DSC disabled
[08:04:40] [PASSED] Clock 297000 BPP 24 DSC disabled
[08:04:40] [PASSED] Clock 332880 BPP 24 DSC enabled
[08:04:40] [PASSED] Clock 324540 BPP 24 DSC enabled
[08:04:40] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[08:04:40] ============== drm_test_dp_mst_calc_pbn_div  ===============
[08:04:40] [PASSED] Link rate 2000000 lane count 4
[08:04:40] [PASSED] Link rate 2000000 lane count 2
[08:04:40] [PASSED] Link rate 2000000 lane count 1
[08:04:40] [PASSED] Link rate 1350000 lane count 4
[08:04:40] [PASSED] Link rate 1350000 lane count 2
[08:04:40] [PASSED] Link rate 1350000 lane count 1
[08:04:40] [PASSED] Link rate 1000000 lane count 4
[08:04:40] [PASSED] Link rate 1000000 lane count 2
[08:04:40] [PASSED] Link rate 1000000 lane count 1
[08:04:40] [PASSED] Link rate 810000 lane count 4
[08:04:40] [PASSED] Link rate 810000 lane count 2
[08:04:40] [PASSED] Link rate 810000 lane count 1
[08:04:40] [PASSED] Link rate 540000 lane count 4
[08:04:40] [PASSED] Link rate 540000 lane count 2
[08:04:40] [PASSED] Link rate 540000 lane count 1
[08:04:40] [PASSED] Link rate 270000 lane count 4
[08:04:40] [PASSED] Link rate 270000 lane count 2
[08:04:40] [PASSED] Link rate 270000 lane count 1
[08:04:40] [PASSED] Link rate 162000 lane count 4
[08:04:40] [PASSED] Link rate 162000 lane count 2
[08:04:40] [PASSED] Link rate 162000 lane count 1
[08:04:40] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[08:04:40] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[08:04:40] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[08:04:40] [PASSED] DP_POWER_UP_PHY with port number
[08:04:40] [PASSED] DP_POWER_DOWN_PHY with port number
[08:04:40] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[08:04:40] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[08:04:40] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[08:04:40] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[08:04:40] [PASSED] DP_QUERY_PAYLOAD with port number
[08:04:40] [PASSED] DP_QUERY_PAYLOAD with VCPI
[08:04:40] [PASSED] DP_REMOTE_DPCD_READ with port number
[08:04:40] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[08:04:40] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[08:04:40] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[08:04:40] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[08:04:40] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[08:04:40] [PASSED] DP_REMOTE_I2C_READ with port number
[08:04:40] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[08:04:40] [PASSED] DP_REMOTE_I2C_READ with transactions array
[08:04:40] [PASSED] DP_REMOTE_I2C_WRITE with port number
[08:04:40] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[08:04:40] [PASSED] DP_REMOTE_I2C_WRITE with data array
[08:04:40] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[08:04:40] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[08:04:40] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[08:04:40] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[08:04:40] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[08:04:40] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[08:04:40] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[08:04:40] ================ [PASSED] drm_dp_mst_helper ================
[08:04:40] ================== drm_exec (7 subtests) ===================
[08:04:40] [PASSED] sanitycheck
[08:04:40] [PASSED] test_lock
[08:04:40] [PASSED] test_lock_unlock
[08:04:40] [PASSED] test_duplicates
[08:04:40] [PASSED] test_prepare
[08:04:40] [PASSED] test_prepare_array
[08:04:40] [PASSED] test_multiple_loops
[08:04:40] ==================== [PASSED] drm_exec =====================
[08:04:40] =========== drm_format_helper_test (17 subtests) ===========
[08:04:40] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[08:04:40] [PASSED] single_pixel_source_buffer
[08:04:40] [PASSED] single_pixel_clip_rectangle
[08:04:40] [PASSED] well_known_colors
[08:04:40] [PASSED] destination_pitch
[08:04:40] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[08:04:40] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[08:04:40] [PASSED] single_pixel_source_buffer
[08:04:40] [PASSED] single_pixel_clip_rectangle
[08:04:40] [PASSED] well_known_colors
[08:04:40] [PASSED] destination_pitch
[08:04:40] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[08:04:40] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[08:04:40] [PASSED] single_pixel_source_buffer
[08:04:40] [PASSED] single_pixel_clip_rectangle
[08:04:40] [PASSED] well_known_colors
[08:04:40] [PASSED] destination_pitch
[08:04:40] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[08:04:40] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[08:04:40] [PASSED] single_pixel_source_buffer
[08:04:40] [PASSED] single_pixel_clip_rectangle
[08:04:40] [PASSED] well_known_colors
[08:04:40] [PASSED] destination_pitch
[08:04:40] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[08:04:40] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[08:04:40] [PASSED] single_pixel_source_buffer
[08:04:40] [PASSED] single_pixel_clip_rectangle
[08:04:40] [PASSED] well_known_colors
[08:04:40] [PASSED] destination_pitch
[08:04:40] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[08:04:40] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[08:04:40] [PASSED] single_pixel_source_buffer
[08:04:40] [PASSED] single_pixel_clip_rectangle
[08:04:40] [PASSED] well_known_colors
[08:04:40] [PASSED] destination_pitch
[08:04:40] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[08:04:40] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[08:04:40] [PASSED] single_pixel_source_buffer
[08:04:40] [PASSED] single_pixel_clip_rectangle
[08:04:40] [PASSED] well_known_colors
[08:04:40] [PASSED] destination_pitch
[08:04:40] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[08:04:40] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[08:04:40] [PASSED] single_pixel_source_buffer
[08:04:40] [PASSED] single_pixel_clip_rectangle
[08:04:40] [PASSED] well_known_colors
[08:04:40] [PASSED] destination_pitch
[08:04:40] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[08:04:40] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[08:04:40] [PASSED] single_pixel_source_buffer
[08:04:40] [PASSED] single_pixel_clip_rectangle
[08:04:40] [PASSED] well_known_colors
[08:04:40] [PASSED] destination_pitch
[08:04:40] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[08:04:40] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[08:04:40] [PASSED] single_pixel_source_buffer
[08:04:40] [PASSED] single_pixel_clip_rectangle
[08:04:40] [PASSED] well_known_colors
[08:04:40] [PASSED] destination_pitch
[08:04:40] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[08:04:40] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[08:04:40] [PASSED] single_pixel_source_buffer
[08:04:40] [PASSED] single_pixel_clip_rectangle
[08:04:40] [PASSED] well_known_colors
[08:04:40] [PASSED] destination_pitch
[08:04:40] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[08:04:40] ============== drm_test_fb_xrgb8888_to_mono  ===============
[08:04:40] [PASSED] single_pixel_source_buffer
[08:04:40] [PASSED] single_pixel_clip_rectangle
[08:04:40] [PASSED] well_known_colors
[08:04:40] [PASSED] destination_pitch
[08:04:40] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[08:04:40] ==================== drm_test_fb_swab  =====================
[08:04:40] [PASSED] single_pixel_source_buffer
[08:04:40] [PASSED] single_pixel_clip_rectangle
[08:04:40] [PASSED] well_known_colors
[08:04:40] [PASSED] destination_pitch
[08:04:40] ================ [PASSED] drm_test_fb_swab =================
[08:04:40] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[08:04:40] [PASSED] single_pixel_source_buffer
[08:04:40] [PASSED] single_pixel_clip_rectangle
[08:04:40] [PASSED] well_known_colors
[08:04:40] [PASSED] destination_pitch
[08:04:40] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[08:04:40] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[08:04:40] [PASSED] single_pixel_source_buffer
[08:04:40] [PASSED] single_pixel_clip_rectangle
[08:04:40] [PASSED] well_known_colors
[08:04:40] [PASSED] destination_pitch
[08:04:40] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[08:04:40] ================= drm_test_fb_clip_offset  =================
[08:04:40] [PASSED] pass through
[08:04:40] [PASSED] horizontal offset
[08:04:40] [PASSED] vertical offset
[08:04:40] [PASSED] horizontal and vertical offset
[08:04:40] [PASSED] horizontal offset (custom pitch)
[08:04:40] [PASSED] vertical offset (custom pitch)
[08:04:40] [PASSED] horizontal and vertical offset (custom pitch)
[08:04:40] ============= [PASSED] drm_test_fb_clip_offset =============
[08:04:40] =================== drm_test_fb_memcpy  ====================
[08:04:40] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[08:04:40] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[08:04:40] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[08:04:40] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[08:04:40] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[08:04:40] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[08:04:40] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[08:04:40] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[08:04:40] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[08:04:40] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[08:04:40] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[08:04:40] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[08:04:40] =============== [PASSED] drm_test_fb_memcpy ================
[08:04:40] ============= [PASSED] drm_format_helper_test ==============
[08:04:40] ================= drm_format (18 subtests) =================
[08:04:40] [PASSED] drm_test_format_block_width_invalid
[08:04:40] [PASSED] drm_test_format_block_width_one_plane
[08:04:40] [PASSED] drm_test_format_block_width_two_plane
[08:04:40] [PASSED] drm_test_format_block_width_three_plane
[08:04:40] [PASSED] drm_test_format_block_width_tiled
[08:04:40] [PASSED] drm_test_format_block_height_invalid
[08:04:40] [PASSED] drm_test_format_block_height_one_plane
[08:04:40] [PASSED] drm_test_format_block_height_two_plane
[08:04:40] [PASSED] drm_test_format_block_height_three_plane
[08:04:40] [PASSED] drm_test_format_block_height_tiled
[08:04:40] [PASSED] drm_test_format_min_pitch_invalid
[08:04:40] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[08:04:40] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[08:04:40] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[08:04:40] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[08:04:40] [PASSED] drm_test_format_min_pitch_two_plane
[08:04:40] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[08:04:40] [PASSED] drm_test_format_min_pitch_tiled
[08:04:40] =================== [PASSED] drm_format ====================
[08:04:40] ============== drm_framebuffer (10 subtests) ===============
[08:04:40] ========== drm_test_framebuffer_check_src_coords  ==========
[08:04:40] [PASSED] Success: source fits into fb
[08:04:40] [PASSED] Fail: overflowing fb with x-axis coordinate
[08:04:40] [PASSED] Fail: overflowing fb with y-axis coordinate
[08:04:40] [PASSED] Fail: overflowing fb with source width
[08:04:40] [PASSED] Fail: overflowing fb with source height
[08:04:40] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[08:04:40] [PASSED] drm_test_framebuffer_cleanup
[08:04:40] =============== drm_test_framebuffer_create  ===============
[08:04:40] [PASSED] ABGR8888 normal sizes
[08:04:40] [PASSED] ABGR8888 max sizes
[08:04:40] [PASSED] ABGR8888 pitch greater than min required
[08:04:40] [PASSED] ABGR8888 pitch less than min required
[08:04:40] [PASSED] ABGR8888 Invalid width
[08:04:40] [PASSED] ABGR8888 Invalid buffer handle
[08:04:40] [PASSED] No pixel format
[08:04:40] [PASSED] ABGR8888 Width 0
[08:04:40] [PASSED] ABGR8888 Height 0
[08:04:40] [PASSED] ABGR8888 Out of bound height * pitch combination
[08:04:40] [PASSED] ABGR8888 Large buffer offset
[08:04:40] [PASSED] ABGR8888 Buffer offset for inexistent plane
[08:04:40] [PASSED] ABGR8888 Invalid flag
[08:04:40] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[08:04:40] [PASSED] ABGR8888 Valid buffer modifier
[08:04:40] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[08:04:40] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[08:04:40] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[08:04:40] [PASSED] NV12 Normal sizes
[08:04:40] [PASSED] NV12 Max sizes
[08:04:40] [PASSED] NV12 Invalid pitch
[08:04:40] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[08:04:40] [PASSED] NV12 different  modifier per-plane
[08:04:40] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[08:04:40] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[08:04:40] [PASSED] NV12 Modifier for inexistent plane
[08:04:40] [PASSED] NV12 Handle for inexistent plane
[08:04:40] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[08:04:40] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[08:04:40] [PASSED] YVU420 Normal sizes
[08:04:40] [PASSED] YVU420 Max sizes
[08:04:40] [PASSED] YVU420 Invalid pitch
[08:04:40] [PASSED] YVU420 Different pitches
[08:04:40] [PASSED] YVU420 Different buffer offsets/pitches
[08:04:40] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[08:04:40] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[08:04:40] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[08:04:40] [PASSED] YVU420 Valid modifier
[08:04:40] [PASSED] YVU420 Different modifiers per plane
[08:04:40] [PASSED] YVU420 Modifier for inexistent plane
[08:04:40] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[08:04:40] [PASSED] X0L2 Normal sizes
[08:04:40] [PASSED] X0L2 Max sizes
[08:04:40] [PASSED] X0L2 Invalid pitch
[08:04:40] [PASSED] X0L2 Pitch greater than minimum required
[08:04:40] [PASSED] X0L2 Handle for inexistent plane
[08:04:40] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[08:04:40] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[08:04:40] [PASSED] X0L2 Valid modifier
[08:04:40] [PASSED] X0L2 Modifier for inexistent plane
[08:04:40] =========== [PASSED] drm_test_framebuffer_create ===========
[08:04:40] [PASSED] drm_test_framebuffer_free
[08:04:40] [PASSED] drm_test_framebuffer_init
[08:04:40] [PASSED] drm_test_framebuffer_init_bad_format
[08:04:40] [PASSED] drm_test_framebuffer_init_dev_mismatch
[08:04:40] [PASSED] drm_test_framebuffer_lookup
[08:04:40] [PASSED] drm_test_framebuffer_lookup_inexistent
[08:04:40] [PASSED] drm_test_framebuffer_modifiers_not_supported
[08:04:40] ================= [PASSED] drm_framebuffer =================
[08:04:40] ================ drm_gem_shmem (8 subtests) ================
[08:04:40] [PASSED] drm_gem_shmem_test_obj_create
[08:04:40] [PASSED] drm_gem_shmem_test_obj_create_private
[08:04:40] [PASSED] drm_gem_shmem_test_pin_pages
[08:04:40] [PASSED] drm_gem_shmem_test_vmap
[08:04:40] [PASSED] drm_gem_shmem_test_get_pages_sgt
[08:04:40] [PASSED] drm_gem_shmem_test_get_sg_table
[08:04:40] [PASSED] drm_gem_shmem_test_madvise
[08:04:40] [PASSED] drm_gem_shmem_test_purge
[08:04:40] ================== [PASSED] drm_gem_shmem ==================
[08:04:40] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[08:04:40] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[08:04:40] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[08:04:40] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[08:04:40] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[08:04:40] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[08:04:40] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[08:04:40] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[08:04:40] [PASSED] Automatic
[08:04:40] [PASSED] Full
[08:04:40] [PASSED] Limited 16:235
[08:04:40] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[08:04:40] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[08:04:40] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[08:04:40] [PASSED] drm_test_check_disable_connector
[08:04:40] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[08:04:40] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[08:04:40] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[08:04:40] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[08:04:40] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[08:04:40] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[08:04:40] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[08:04:40] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[08:04:40] [PASSED] drm_test_check_output_bpc_dvi
[08:04:40] [PASSED] drm_test_check_output_bpc_format_vic_1
[08:04:40] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[08:04:40] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[08:04:40] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[08:04:40] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[08:04:40] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[08:04:40] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[08:04:40] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[08:04:40] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[08:04:40] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[08:04:40] [PASSED] drm_test_check_broadcast_rgb_value
[08:04:40] [PASSED] drm_test_check_bpc_8_value
[08:04:40] [PASSED] drm_test_check_bpc_10_value
[08:04:40] [PASSED] drm_test_check_bpc_12_value
[08:04:40] [PASSED] drm_test_check_format_value
[08:04:40] [PASSED] drm_test_check_tmds_char_value
[08:04:40] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[08:04:40] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[08:04:40] [PASSED] drm_test_check_mode_valid
[08:04:40] [PASSED] drm_test_check_mode_valid_reject
[08:04:40] [PASSED] drm_test_check_mode_valid_reject_rate
[08:04:40] [PASSED] drm_test_check_mode_valid_reject_max_clock
[08:04:40] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[08:04:40] ================= drm_managed (2 subtests) =================
[08:04:40] [PASSED] drm_test_managed_release_action
[08:04:40] [PASSED] drm_test_managed_run_action
[08:04:40] =================== [PASSED] drm_managed ===================
[08:04:40] =================== drm_mm (6 subtests) ====================
[08:04:40] [PASSED] drm_test_mm_init
[08:04:40] [PASSED] drm_test_mm_debug
[08:04:40] [PASSED] drm_test_mm_align32
[08:04:40] [PASSED] drm_test_mm_align64
[08:04:40] [PASSED] drm_test_mm_lowest
[08:04:40] [PASSED] drm_test_mm_highest
[08:04:40] ===================== [PASSED] drm_mm ======================
[08:04:40] ============= drm_modes_analog_tv (5 subtests) =============
[08:04:40] [PASSED] drm_test_modes_analog_tv_mono_576i
[08:04:40] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[08:04:40] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[08:04:40] [PASSED] drm_test_modes_analog_tv_pal_576i
[08:04:40] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[08:04:40] =============== [PASSED] drm_modes_analog_tv ===============
[08:04:40] ============== drm_plane_helper (2 subtests) ===============
[08:04:40] =============== drm_test_check_plane_state  ================
[08:04:40] [PASSED] clipping_simple
[08:04:40] [PASSED] clipping_rotate_reflect
[08:04:40] [PASSED] positioning_simple
[08:04:40] [PASSED] upscaling
[08:04:40] [PASSED] downscaling
[08:04:40] [PASSED] rounding1
[08:04:40] [PASSED] rounding2
[08:04:40] [PASSED] rounding3
[08:04:40] [PASSED] rounding4
[08:04:40] =========== [PASSED] drm_test_check_plane_state ============
[08:04:40] =========== drm_test_check_invalid_plane_state  ============
[08:04:40] [PASSED] positioning_invalid
[08:04:40] [PASSED] upscaling_invalid
[08:04:40] [PASSED] downscaling_invalid
[08:04:40] ======= [PASSED] drm_test_check_invalid_plane_state ========
[08:04:40] ================ [PASSED] drm_plane_helper =================
[08:04:40] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[08:04:40] ====== drm_test_connector_helper_tv_get_modes_check  =======
[08:04:40] [PASSED] None
[08:04:40] [PASSED] PAL
[08:04:40] [PASSED] NTSC
[08:04:40] [PASSED] Both, NTSC Default
[08:04:40] [PASSED] Both, PAL Default
[08:04:40] [PASSED] Both, NTSC Default, with PAL on command-line
[08:04:40] [PASSED] Both, PAL Default, with NTSC on command-line
[08:04:40] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[08:04:40] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[08:04:40] ================== drm_rect (9 subtests) ===================
[08:04:40] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[08:04:40] [PASSED] drm_test_rect_clip_scaled_not_clipped
[08:04:40] [PASSED] drm_test_rect_clip_scaled_clipped
[08:04:40] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[08:04:40] ================= drm_test_rect_intersect  =================
[08:04:40] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[08:04:40] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[08:04:40] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[08:04:40] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[08:04:40] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[08:04:40] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[08:04:40] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[08:04:40] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[08:04:40] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[08:04:40] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[08:04:40] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[08:04:40] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[08:04:40] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[08:04:40] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[08:04:40] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[08:04:40] ============= [PASSED] drm_test_rect_intersect =============
[08:04:40] ================ drm_test_rect_calc_hscale  ================
[08:04:40] [PASSED] normal use
[08:04:40] [PASSED] out of max range
[08:04:40] [PASSED] out of min range
[08:04:40] [PASSED] zero dst
[08:04:40] [PASSED] negative src
[08:04:40] [PASSED] negative dst
[08:04:40] ============ [PASSED] drm_test_rect_calc_hscale ============
[08:04:40] ================ drm_test_rect_calc_vscale  ================
[08:04:40] [PASSED] normal use
[08:04:40] [PASSED] out of max range
[08:04:40] [PASSED] out of min range
[08:04:40] [PASSED] zero dst
[08:04:40] [PASSED] negative src
[08:04:40] [PASSED] negative dst
[08:04:40] ============ [PASSED] drm_test_rect_calc_vscale ============
[08:04:40] ================== drm_test_rect_rotate  ===================
[08:04:40] [PASSED] reflect-x
[08:04:40] [PASSED] reflect-y
[08:04:40] [PASSED] rotate-0
[08:04:40] [PASSED] rotate-90
[08:04:40] [PASSED] rotate-180
[08:04:40] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[08:04:40] ============== [PASSED] drm_test_rect_rotate ===============
[08:04:40] ================ drm_test_rect_rotate_inv  =================
[08:04:40] [PASSED] reflect-x
[08:04:40] [PASSED] reflect-y
[08:04:40] [PASSED] rotate-0
[08:04:40] [PASSED] rotate-90
[08:04:40] [PASSED] rotate-180
[08:04:40] [PASSED] rotate-270
[08:04:40] ============ [PASSED] drm_test_rect_rotate_inv =============
[08:04:40] ==================== [PASSED] drm_rect =====================
[08:04:40] ============ drm_sysfb_modeset_test (1 subtest) ============
[08:04:40] ============ drm_test_sysfb_build_fourcc_list  =============
[08:04:40] [PASSED] no native formats
[08:04:40] [PASSED] XRGB8888 as native format
[08:04:40] [PASSED] remove duplicates
[08:04:40] [PASSED] convert alpha formats
[08:04:40] [PASSED] random formats
[08:04:40] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[08:04:40] ============= [PASSED] drm_sysfb_modeset_test ==============
[08:04:40] ============================================================
[08:04:40] Testing complete. Ran 616 tests: passed: 616
[08:04:40] Elapsed time: 23.723s total, 1.678s configuring, 21.878s building, 0.134s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[08:04:40] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:04:42] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:04:50] Starting KUnit Kernel (1/1)...
[08:04:50] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:04:50] ================= ttm_device (5 subtests) ==================
[08:04:50] [PASSED] ttm_device_init_basic
[08:04:50] [PASSED] ttm_device_init_multiple
[08:04:50] [PASSED] ttm_device_fini_basic
[08:04:50] [PASSED] ttm_device_init_no_vma_man
[08:04:50] ================== ttm_device_init_pools  ==================
[08:04:50] [PASSED] No DMA allocations, no DMA32 required
[08:04:50] [PASSED] DMA allocations, DMA32 required
[08:04:50] [PASSED] No DMA allocations, DMA32 required
[08:04:50] [PASSED] DMA allocations, no DMA32 required
[08:04:50] ============== [PASSED] ttm_device_init_pools ==============
[08:04:50] =================== [PASSED] ttm_device ====================
[08:04:50] ================== ttm_pool (8 subtests) ===================
[08:04:50] ================== ttm_pool_alloc_basic  ===================
[08:04:50] [PASSED] One page
[08:04:50] [PASSED] More than one page
[08:04:50] [PASSED] Above the allocation limit
[08:04:50] [PASSED] One page, with coherent DMA mappings enabled
[08:04:50] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[08:04:50] ============== [PASSED] ttm_pool_alloc_basic ===============
[08:04:50] ============== ttm_pool_alloc_basic_dma_addr  ==============
[08:04:50] [PASSED] One page
[08:04:50] [PASSED] More than one page
[08:04:50] [PASSED] Above the allocation limit
[08:04:50] [PASSED] One page, with coherent DMA mappings enabled
[08:04:50] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[08:04:50] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[08:04:50] [PASSED] ttm_pool_alloc_order_caching_match
[08:04:50] [PASSED] ttm_pool_alloc_caching_mismatch
[08:04:50] [PASSED] ttm_pool_alloc_order_mismatch
[08:04:50] [PASSED] ttm_pool_free_dma_alloc
[08:04:50] [PASSED] ttm_pool_free_no_dma_alloc
[08:04:50] [PASSED] ttm_pool_fini_basic
[08:04:50] ==================== [PASSED] ttm_pool =====================
[08:04:50] ================ ttm_resource (8 subtests) =================
[08:04:50] ================= ttm_resource_init_basic  =================
[08:04:50] [PASSED] Init resource in TTM_PL_SYSTEM
[08:04:50] [PASSED] Init resource in TTM_PL_VRAM
[08:04:50] [PASSED] Init resource in a private placement
[08:04:50] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[08:04:50] ============= [PASSED] ttm_resource_init_basic =============
[08:04:50] [PASSED] ttm_resource_init_pinned
[08:04:50] [PASSED] ttm_resource_fini_basic
[08:04:50] [PASSED] ttm_resource_manager_init_basic
[08:04:50] [PASSED] ttm_resource_manager_usage_basic
[08:04:50] [PASSED] ttm_resource_manager_set_used_basic
[08:04:50] [PASSED] ttm_sys_man_alloc_basic
[08:04:50] [PASSED] ttm_sys_man_free_basic
[08:04:50] ================== [PASSED] ttm_resource ===================
[08:04:50] =================== ttm_tt (15 subtests) ===================
[08:04:50] ==================== ttm_tt_init_basic  ====================
[08:04:50] [PASSED] Page-aligned size
[08:04:50] [PASSED] Extra pages requested
[08:04:50] ================ [PASSED] ttm_tt_init_basic ================
[08:04:50] [PASSED] ttm_tt_init_misaligned
[08:04:50] [PASSED] ttm_tt_fini_basic
[08:04:50] [PASSED] ttm_tt_fini_sg
[08:04:50] [PASSED] ttm_tt_fini_shmem
[08:04:50] [PASSED] ttm_tt_create_basic
[08:04:50] [PASSED] ttm_tt_create_invalid_bo_type
[08:04:50] [PASSED] ttm_tt_create_ttm_exists
[08:04:50] [PASSED] ttm_tt_create_failed
[08:04:50] [PASSED] ttm_tt_destroy_basic
[08:04:50] [PASSED] ttm_tt_populate_null_ttm
[08:04:50] [PASSED] ttm_tt_populate_populated_ttm
[08:04:50] [PASSED] ttm_tt_unpopulate_basic
[08:04:50] [PASSED] ttm_tt_unpopulate_empty_ttm
[08:04:50] [PASSED] ttm_tt_swapin_basic
[08:04:50] ===================== [PASSED] ttm_tt ======================
[08:04:50] =================== ttm_bo (14 subtests) ===================
[08:04:50] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[08:04:50] [PASSED] Cannot be interrupted and sleeps
[08:04:50] [PASSED] Cannot be interrupted, locks straight away
[08:04:50] [PASSED] Can be interrupted, sleeps
[08:04:50] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[08:04:50] [PASSED] ttm_bo_reserve_locked_no_sleep
[08:04:50] [PASSED] ttm_bo_reserve_no_wait_ticket
[08:04:50] [PASSED] ttm_bo_reserve_double_resv
[08:04:50] [PASSED] ttm_bo_reserve_interrupted
[08:04:50] [PASSED] ttm_bo_reserve_deadlock
[08:04:50] [PASSED] ttm_bo_unreserve_basic
[08:04:50] [PASSED] ttm_bo_unreserve_pinned
[08:04:50] [PASSED] ttm_bo_unreserve_bulk
[08:04:50] [PASSED] ttm_bo_put_basic
[08:04:50] [PASSED] ttm_bo_put_shared_resv
[08:04:50] [PASSED] ttm_bo_pin_basic
[08:04:50] [PASSED] ttm_bo_pin_unpin_resource
[08:04:50] [PASSED] ttm_bo_multiple_pin_one_unpin
[08:04:50] ===================== [PASSED] ttm_bo ======================
[08:04:50] ============== ttm_bo_validate (22 subtests) ===============
[08:04:50] ============== ttm_bo_init_reserved_sys_man  ===============
[08:04:50] [PASSED] Buffer object for userspace
[08:04:50] [PASSED] Kernel buffer object
[08:04:50] [PASSED] Shared buffer object
[08:04:50] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[08:04:50] ============== ttm_bo_init_reserved_mock_man  ==============
[08:04:50] [PASSED] Buffer object for userspace
[08:04:50] [PASSED] Kernel buffer object
[08:04:50] [PASSED] Shared buffer object
[08:04:50] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[08:04:50] [PASSED] ttm_bo_init_reserved_resv
[08:04:50] ================== ttm_bo_validate_basic  ==================
[08:04:50] [PASSED] Buffer object for userspace
[08:04:50] [PASSED] Kernel buffer object
[08:04:50] [PASSED] Shared buffer object
[08:04:50] ============== [PASSED] ttm_bo_validate_basic ==============
[08:04:50] [PASSED] ttm_bo_validate_invalid_placement
[08:04:50] ============= ttm_bo_validate_same_placement  ==============
[08:04:50] [PASSED] System manager
[08:04:50] [PASSED] VRAM manager
[08:04:50] ========= [PASSED] ttm_bo_validate_same_placement ==========
[08:04:50] [PASSED] ttm_bo_validate_failed_alloc
[08:04:50] [PASSED] ttm_bo_validate_pinned
[08:04:50] [PASSED] ttm_bo_validate_busy_placement
[08:04:50] ================ ttm_bo_validate_multihop  =================
[08:04:50] [PASSED] Buffer object for userspace
[08:04:50] [PASSED] Kernel buffer object
[08:04:50] [PASSED] Shared buffer object
[08:04:50] ============ [PASSED] ttm_bo_validate_multihop =============
[08:04:50] ========== ttm_bo_validate_no_placement_signaled  ==========
[08:04:50] [PASSED] Buffer object in system domain, no page vector
[08:04:50] [PASSED] Buffer object in system domain with an existing page vector
[08:04:50] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[08:04:50] ======== ttm_bo_validate_no_placement_not_signaled  ========
[08:04:50] [PASSED] Buffer object for userspace
[08:04:50] [PASSED] Kernel buffer object
[08:04:50] [PASSED] Shared buffer object
[08:04:50] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[08:04:50] [PASSED] ttm_bo_validate_move_fence_signaled
[08:04:50] ========= ttm_bo_validate_move_fence_not_signaled  =========
[08:04:50] [PASSED] Waits for GPU
[08:04:50] [PASSED] Tries to lock straight away
[08:04:50] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[08:04:50] [PASSED] ttm_bo_validate_swapout
[08:04:50] [PASSED] ttm_bo_validate_happy_evict
[08:04:50] [PASSED] ttm_bo_validate_all_pinned_evict
[08:04:50] [PASSED] ttm_bo_validate_allowed_only_evict
[08:04:50] [PASSED] ttm_bo_validate_deleted_evict
[08:04:50] [PASSED] ttm_bo_validate_busy_domain_evict
[08:04:50] [PASSED] ttm_bo_validate_evict_gutting
[08:04:50] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[08:04:50] ================= [PASSED] ttm_bo_validate =================
[08:04:50] ============================================================
[08:04:50] Testing complete. Ran 102 tests: passed: 102
[08:04:50] Elapsed time: 10.030s total, 1.607s configuring, 7.806s building, 0.527s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for Enable_psr kernel parameter changes (rev2)

[Patchwork]

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== Series Details ==

Series: Enable_psr kernel parameter changes (rev2)
URL   : https://patchwork.freedesktop.org/series/151261/
State : success

== Summary ==

CI Bug Log - changes from xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60_BAT -> xe-pw-151261v2_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (9 -> 8)
------------------------------

  Missing    (1): bat-adlp-vm 


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60 -> xe-pw-151261v2

  IGT_8447: 8447
  xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60: eebec4bb9f29656335ddfd06a1d02961715f0e60
  xe-pw-151261v2: 151261v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/index.html

[-- Attachment #2: Type: text/html, Size: 1406 bytes --]

✗ Xe.CI.Full: failure for Enable_psr kernel parameter changes (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 98160 bytes --]

== Series Details ==

Series: Enable_psr kernel parameter changes (rev2)
URL   : https://patchwork.freedesktop.org/series/151261/
State : failure

== Summary ==

CI Bug Log - changes from xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60_FULL -> xe-pw-151261v2_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-151261v2_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-151261v2_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-151261v2_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@xe_exec_compute_mode@many-execqueues-rebind:
    - shard-lnl:          [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-lnl-7/igt@xe_exec_compute_mode@many-execqueues-rebind.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-lnl-2/igt@xe_exec_compute_mode@many-execqueues-rebind.html

  
Known issues
------------

  Here are the changes found in xe-pw-151261v2_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@fbdev@read:
    - shard-dg2-set2:     [PASS][3] -> [SKIP][4] ([Intel XE#2134]) +1 other test skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-466/igt@fbdev@read.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@fbdev@read.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
    - shard-adlp:         [PASS][5] -> [DMESG-FAIL][6] ([Intel XE#4543]) +1 other test dmesg-fail
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-adlp-8/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-adlp-9/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#1124]) +3 other tests skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html

  * igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p:
    - shard-bmg:          [PASS][8] -> [SKIP][9] ([Intel XE#2314] / [Intel XE#2894])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-7/igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p.html
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p.html

  * igt@kms_bw@linear-tiling-4-displays-3840x2160p:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#367])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@kms_bw@linear-tiling-4-displays-3840x2160p.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs@pipe-b-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#2652] / [Intel XE#787]) +8 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-4/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs@pipe-b-dp-2.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [SKIP][12] ([Intel XE#787]) +181 other tests skip
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-435/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-6.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc@pipe-d-dp-4:
    - shard-dg2-set2:     NOTRUN -> [SKIP][13] ([Intel XE#455] / [Intel XE#787]) +25 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-466/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc@pipe-d-dp-4.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [INCOMPLETE][14] ([Intel XE#3862])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-434/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-6.html

  * igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#2887]) +1 other test skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4:
    - shard-dg2-set2:     NOTRUN -> [INCOMPLETE][16] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4.html

  * igt@kms_cdclk@mode-transition@pipe-d-dp-4:
    - shard-dg2-set2:     NOTRUN -> [SKIP][17] ([Intel XE#4417]) +3 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-466/igt@kms_cdclk@mode-transition@pipe-d-dp-4.html

  * igt@kms_cdclk@plane-scaling@pipe-b-dp-4:
    - shard-dg2-set2:     NOTRUN -> [SKIP][18] ([Intel XE#4416]) +3 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-433/igt@kms_cdclk@plane-scaling@pipe-b-dp-4.html

  * igt@kms_chamelium_audio@hdmi-audio-edid:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#2252]) +1 other test skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@kms_chamelium_audio@hdmi-audio-edid.html

  * igt@kms_content_protection@atomic-dpms@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][20] ([Intel XE#1178])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-4/igt@kms_content_protection@atomic-dpms@pipe-a-dp-2.html

  * igt@kms_content_protection@srm@pipe-a-dp-4:
    - shard-dg2-set2:     NOTRUN -> [FAIL][21] ([Intel XE#1178]) +2 other tests fail
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-434/igt@kms_content_protection@srm@pipe-a-dp-4.html

  * igt@kms_content_protection@uevent@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][22] ([Intel XE#1188])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-8/igt@kms_content_protection@uevent@pipe-a-dp-2.html

  * igt@kms_cursor_crc@cursor-dpms:
    - shard-adlp:         [PASS][23] -> [DMESG-WARN][24] ([Intel XE#2953] / [Intel XE#4173]) +1 other test dmesg-warn
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-adlp-1/igt@kms_cursor_crc@cursor-dpms.html
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-adlp-8/igt@kms_cursor_crc@cursor-dpms.html

  * igt@kms_cursor_crc@cursor-offscreen-512x170:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#2321])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@kms_cursor_crc@cursor-offscreen-512x170.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-legacy:
    - shard-bmg:          [PASS][26] -> [SKIP][27] ([Intel XE#2291]) +3 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-4/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#2291])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#2286])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html

  * igt@kms_display_modes@extended-mode-basic:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#4302])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@kms_display_modes@extended-mode-basic.html

  * igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#2316])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible:
    - shard-dg2-set2:     [PASS][32] -> [INCOMPLETE][33] ([Intel XE#2049] / [Intel XE#2597])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-463/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-432/igt@kms_flip@2x-flip-vs-suspend-interruptible.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible@bc-hdmi-a2-dp2:
    - shard-dg2-set2:     NOTRUN -> [INCOMPLETE][34] ([Intel XE#2049] / [Intel XE#2597])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-432/igt@kms_flip@2x-flip-vs-suspend-interruptible@bc-hdmi-a2-dp2.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible@cd-dp2-hdmi-a3:
    - shard-bmg:          [PASS][35] -> [INCOMPLETE][36] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-2/igt@kms_flip@2x-flip-vs-suspend-interruptible@cd-dp2-hdmi-a3.html
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-7/igt@kms_flip@2x-flip-vs-suspend-interruptible@cd-dp2-hdmi-a3.html

  * igt@kms_flip@2x-plain-flip:
    - shard-bmg:          [PASS][37] -> [SKIP][38] ([Intel XE#2316]) +2 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-4/igt@kms_flip@2x-plain-flip.html
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@kms_flip@2x-plain-flip.html

  * igt@kms_flip@2x-wf_vblank-ts-check:
    - shard-bmg:          [PASS][39] -> [FAIL][40] ([Intel XE#5352]) +1 other test fail
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-3/igt@kms_flip@2x-wf_vblank-ts-check.html
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-1/igt@kms_flip@2x-wf_vblank-ts-check.html

  * igt@kms_flip@dpms-off-confusion:
    - shard-dg2-set2:     NOTRUN -> [SKIP][41] ([Intel XE#4208] / [i915#2575]) +21 other tests skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-436/igt@kms_flip@dpms-off-confusion.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-lnl:          [PASS][42] -> [FAIL][43] ([Intel XE#301]) +1 other test fail
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-suspend@d-hdmi-a1:
    - shard-adlp:         [PASS][44] -> [DMESG-WARN][45] ([Intel XE#4543]) +7 other tests dmesg-warn
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-adlp-6/igt@kms_flip@flip-vs-suspend@d-hdmi-a1.html
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-adlp-8/igt@kms_flip@flip-vs-suspend@d-hdmi-a1.html

  * igt@kms_flip@wf_vblank-ts-check-interruptible@a-hdmi-a6:
    - shard-dg2-set2:     [PASS][46] -> [INCOMPLETE][47] ([Intel XE#2049]) +1 other test incomplete
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-435/igt@kms_flip@wf_vblank-ts-check-interruptible@a-hdmi-a6.html
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-463/igt@kms_flip@wf_vblank-ts-check-interruptible@a-hdmi-a6.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#2293] / [Intel XE#2380])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling@pipe-a-valid-mode:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#2293])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode:
    - shard-dg2-set2:     NOTRUN -> [SKIP][50] ([Intel XE#455]) +5 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-466/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#2311]) +1 other test skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-indfb-plflip-blt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][52] ([Intel XE#2351] / [Intel XE#4208]) +6 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-436/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-msflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#2312]) +5 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move:
    - shard-dg2-set2:     [PASS][54] -> [SKIP][55] ([Intel XE#2351] / [Intel XE#4208]) +11 other tests skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-434/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move.html
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-436/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw:
    - shard-bmg:          NOTRUN -> [SKIP][56] ([Intel XE#2313]) +3 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html

  * igt@kms_joiner@invalid-modeset-big-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][57] ([Intel XE#346])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@kms_joiner@invalid-modeset-big-joiner.html

  * igt@kms_plane_multiple@2x-tiling-4:
    - shard-bmg:          [PASS][58] -> [SKIP][59] ([Intel XE#4596])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-8/igt@kms_plane_multiple@2x-tiling-4.html
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@kms_plane_multiple@2x-tiling-4.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b:
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#2763]) +4 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b.html

  * igt@kms_pm_lpsp@kms-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#2499])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@kms_pm_lpsp@kms-lpsp.html

  * igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-sf:
    - shard-bmg:          NOTRUN -> [SKIP][62] ([Intel XE#1489]) +1 other test skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-sf.html

  * igt@kms_psr@fbc-psr2-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][63] ([Intel XE#2234] / [Intel XE#2850]) +1 other test skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@kms_psr@fbc-psr2-suspend.html

  * igt@kms_rotation_crc@sprite-rotation-180:
    - shard-dg2-set2:     [PASS][64] -> [SKIP][65] ([Intel XE#4208] / [i915#2575]) +89 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-435/igt@kms_rotation_crc@sprite-rotation-180.html
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_rotation_crc@sprite-rotation-180.html

  * igt@kms_setmode@clone-exclusive-crtc:
    - shard-bmg:          [PASS][66] -> [SKIP][67] ([Intel XE#1435]) +2 other tests skip
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-7/igt@kms_setmode@clone-exclusive-crtc.html
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-6/igt@kms_setmode@clone-exclusive-crtc.html

  * igt@xe_compute_preempt@compute-threadgroup-preempt@engine-drm_xe_engine_class_compute:
    - shard-dg2-set2:     NOTRUN -> [SKIP][68] ([Intel XE#1280] / [Intel XE#455])
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-435/igt@xe_compute_preempt@compute-threadgroup-preempt@engine-drm_xe_engine_class_compute.html

  * igt@xe_eudebug@discovery-empty:
    - shard-bmg:          NOTRUN -> [SKIP][69] ([Intel XE#4837]) +1 other test skip
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@xe_eudebug@discovery-empty.html

  * igt@xe_exec_balancer@twice-virtual-basic:
    - shard-dg2-set2:     [PASS][70] -> [SKIP][71] ([Intel XE#4208]) +188 other tests skip
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-434/igt@xe_exec_balancer@twice-virtual-basic.html
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-436/igt@xe_exec_balancer@twice-virtual-basic.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][72] ([Intel XE#2322]) +2 other tests skip
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate.html

  * igt@xe_exec_basic@multigpu-no-exec-null-defer-bind:
    - shard-dg2-set2:     [PASS][73] -> [SKIP][74] ([Intel XE#1392]) +4 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-463/igt@xe_exec_basic@multigpu-no-exec-null-defer-bind.html
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-null-defer-bind.html

  * igt@xe_exec_system_allocator@many-execqueues-mmap-new-huge:
    - shard-dg2-set2:     NOTRUN -> [SKIP][75] ([Intel XE#4208]) +127 other tests skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-436/igt@xe_exec_system_allocator@many-execqueues-mmap-new-huge.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset:
    - shard-lnl:          [PASS][76] -> [FAIL][77] ([Intel XE#5018]) +1 other test fail
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-lnl-5/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset.html
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-lnl-2/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-mmap-new-huge:
    - shard-bmg:          NOTRUN -> [SKIP][78] ([Intel XE#4943]) +6 other tests skip
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@xe_exec_system_allocator@threads-shared-vm-many-mmap-new-huge.html

  * igt@xe_module_load@reload-no-display:
    - shard-dg2-set2:     [PASS][79] -> [FAIL][80] ([Intel XE#4208])
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-463/igt@xe_module_load@reload-no-display.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@xe_module_load@reload-no-display.html

  * igt@xe_peer2peer@read:
    - shard-bmg:          NOTRUN -> [SKIP][81] ([Intel XE#2427])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@xe_peer2peer@read.html

  * igt@xe_pm@s4-exec-after:
    - shard-bmg:          [PASS][82] -> [ABORT][83] ([Intel XE#5255])
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-4/igt@xe_pm@s4-exec-after.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-6/igt@xe_pm@s4-exec-after.html

  * igt@xe_pmu@gt-frequency:
    - shard-dg2-set2:     [PASS][84] -> [FAIL][85] ([Intel XE#4819]) +1 other test fail
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-434/igt@xe_pmu@gt-frequency.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-434/igt@xe_pmu@gt-frequency.html

  
#### Possible fixes ####

  * igt@core_setmaster@master-drop-set-user:
    - shard-dg2-set2:     [FAIL][86] ([Intel XE#4208]) -> [PASS][87] +1 other test pass
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@core_setmaster@master-drop-set-user.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-434/igt@core_setmaster@master-drop-set-user.html

  * igt@fbdev@info:
    - shard-dg2-set2:     [SKIP][88] ([Intel XE#2134]) -> [PASS][89] +1 other test pass
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@fbdev@info.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-435/igt@fbdev@info.html

  * igt@intel_sysfs_debugfs@xe-base:
    - shard-dg2-set2:     [SKIP][90] ([Intel XE#4208] / [Intel XE#4618]) -> [PASS][91] +2 other tests pass
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@intel_sysfs_debugfs@xe-base.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-434/igt@intel_sysfs_debugfs@xe-base.html

  * igt@kms_atomic_transition@modeset-transition-nonblocking-fencing:
    - shard-dg2-set2:     [SKIP][92] ([Intel XE#4208] / [i915#2575]) -> [PASS][93] +118 other tests pass
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@kms_atomic_transition@modeset-transition-nonblocking-fencing.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-433/igt@kms_atomic_transition@modeset-transition-nonblocking-fencing.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
    - shard-adlp:         [FAIL][94] ([Intel XE#3908]) -> [PASS][95] +1 other test pass
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-adlp-1/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-adlp-8/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
    - shard-bmg:          [SKIP][96] ([Intel XE#2291]) -> [PASS][97] +9 other tests pass
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-5/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-1/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-bmg:          [FAIL][98] ([Intel XE#1475]) -> [PASS][99]
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc:
    - shard-bmg:          [SKIP][100] ([Intel XE#1340]) -> [PASS][101]
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-6/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-8/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html

  * igt@kms_dp_linktrain_fallback@dp-fallback:
    - shard-bmg:          [SKIP][102] ([Intel XE#4294]) -> [PASS][103]
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-6/igt@kms_dp_linktrain_fallback@dp-fallback.html
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-4/igt@kms_dp_linktrain_fallback@dp-fallback.html

  * igt@kms_flip@2x-flip-vs-dpms-on-nop:
    - shard-bmg:          [SKIP][104] ([Intel XE#2316]) -> [PASS][105] +8 other tests pass
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-on-nop.html
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-4/igt@kms_flip@2x-flip-vs-dpms-on-nop.html

  * igt@kms_flip@basic-plain-flip@b-hdmi-a1:
    - shard-adlp:         [DMESG-WARN][106] ([Intel XE#4543]) -> [PASS][107] +2 other tests pass
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-adlp-2/igt@kms_flip@basic-plain-flip@b-hdmi-a1.html
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-adlp-3/igt@kms_flip@basic-plain-flip@b-hdmi-a1.html

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-lnl:          [FAIL][108] ([Intel XE#301]) -> [PASS][109] +1 other test pass
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-bmg:          [INCOMPLETE][110] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][111] +1 other test pass
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-2/igt@kms_flip@flip-vs-suspend.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling:
    - shard-dg2-set2:     [SKIP][112] ([Intel XE#4208]) -> [PASS][113] +236 other tests pass
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling.html
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-433/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling:
    - shard-dg2-set2:     [SKIP][114] ([Intel XE#2351] / [Intel XE#4208]) -> [PASS][115] +8 other tests pass
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling.html
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-434/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling.html

  * igt@kms_hdr@static-swap:
    - shard-bmg:          [SKIP][116] ([Intel XE#1503]) -> [PASS][117] +2 other tests pass
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-6/igt@kms_hdr@static-swap.html
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-8/igt@kms_hdr@static-swap.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-bmg:          [SKIP][118] ([Intel XE#3012]) -> [PASS][119]
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-6/igt@kms_joiner@basic-force-big-joiner.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-4/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_plane_scaling@2x-scaler-multi-pipe:
    - shard-bmg:          [SKIP][120] ([Intel XE#2571]) -> [PASS][121]
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-5/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-1/igt@kms_plane_scaling@2x-scaler-multi-pipe.html

  * igt@kms_vblank@ts-continuation-suspend:
    - shard-adlp:         [DMESG-WARN][122] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][123] +2 other tests pass
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-adlp-6/igt@kms_vblank@ts-continuation-suspend.html
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-adlp-2/igt@kms_vblank@ts-continuation-suspend.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr:
    - shard-dg2-set2:     [SKIP][124] ([Intel XE#1392]) -> [PASS][125] +2 other tests pass
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-463/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html

  * igt@xe_exec_reset@gt-reset-stress:
    - shard-adlp:         [DMESG-WARN][126] ([Intel XE#4812]) -> [PASS][127]
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-adlp-4/igt@xe_exec_reset@gt-reset-stress.html
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-adlp-1/igt@xe_exec_reset@gt-reset-stress.html

  * igt@xe_exec_threads@threads-hang-rebind-err:
    - shard-dg2-set2:     [DMESG-WARN][128] ([Intel XE#3876]) -> [PASS][129]
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-433/igt@xe_exec_threads@threads-hang-rebind-err.html
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-466/igt@xe_exec_threads@threads-hang-rebind-err.html

  * igt@xe_pmu@gt-frequency:
    - shard-lnl:          [FAIL][130] ([Intel XE#5166]) -> [PASS][131] +1 other test pass
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-lnl-5/igt@xe_pmu@gt-frequency.html
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-lnl-3/igt@xe_pmu@gt-frequency.html

  
#### Warnings ####

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - shard-dg2-set2:     [SKIP][132] ([Intel XE#623]) -> [SKIP][133] ([Intel XE#4208] / [i915#2575])
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-463/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_async_flips@invalid-async-flip-atomic:
    - shard-dg2-set2:     [SKIP][134] ([Intel XE#3768]) -> [SKIP][135] ([Intel XE#4208] / [i915#2575])
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-434/igt@kms_async_flips@invalid-async-flip-atomic.html
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-436/igt@kms_async_flips@invalid-async-flip-atomic.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-dg2-set2:     [SKIP][136] ([Intel XE#4208] / [i915#2575]) -> [SKIP][137] ([Intel XE#455]) +6 other tests skip
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-433/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_big_fb@4-tiled-64bpp-rotate-270:
    - shard-dg2-set2:     [SKIP][138] ([Intel XE#316]) -> [SKIP][139] ([Intel XE#2351] / [Intel XE#4208]) +1 other test skip
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-466/igt@kms_big_fb@4-tiled-64bpp-rotate-270.html
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_big_fb@4-tiled-64bpp-rotate-270.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-270:
    - shard-dg2-set2:     [SKIP][140] ([Intel XE#4208]) -> [SKIP][141] ([Intel XE#316]) +3 other tests skip
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@kms_big_fb@4-tiled-8bpp-rotate-270.html
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-435/igt@kms_big_fb@4-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-90:
    - shard-dg2-set2:     [SKIP][142] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][143] ([Intel XE#316]) +1 other test skip
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-466/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@x-tiled-16bpp-rotate-270:
    - shard-dg2-set2:     [SKIP][144] ([Intel XE#316]) -> [SKIP][145] ([Intel XE#4208])
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-435/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-180:
    - shard-dg2-set2:     [SKIP][146] ([Intel XE#4208]) -> [SKIP][147] ([Intel XE#1124]) +5 other tests skip
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-435/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html

  * igt@kms_big_fb@y-tiled-64bpp-rotate-270:
    - shard-dg2-set2:     [SKIP][148] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][149] ([Intel XE#1124]) +5 other tests skip
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-433/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-addfb-size-offset-overflow:
    - shard-dg2-set2:     [SKIP][150] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][151] ([Intel XE#607])
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-434/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html

  * igt@kms_big_fb@y-tiled-addfb-size-overflow:
    - shard-dg2-set2:     [SKIP][152] ([Intel XE#610]) -> [SKIP][153] ([Intel XE#4208])
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-463/igt@kms_big_fb@y-tiled-addfb-size-overflow.html
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_big_fb@y-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-dg2-set2:     [SKIP][154] ([Intel XE#1124]) -> [SKIP][155] ([Intel XE#2351] / [Intel XE#4208]) +2 other tests skip
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-463/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@yf-tiled-32bpp-rotate-180:
    - shard-dg2-set2:     [SKIP][156] ([Intel XE#1124]) -> [SKIP][157] ([Intel XE#4208]) +7 other tests skip
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-463/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html

  * igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p:
    - shard-dg2-set2:     [SKIP][158] ([Intel XE#2191]) -> [SKIP][159] ([Intel XE#4208] / [i915#2575]) +1 other test skip
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-434/igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p.html
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-436/igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p.html

  * igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p:
    - shard-dg2-set2:     [SKIP][160] ([Intel XE#4208] / [i915#2575]) -> [SKIP][161] ([Intel XE#2191]) +1 other test skip
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p.html
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-435/igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p.html

  * igt@kms_bw@linear-tiling-3-displays-2160x1440p:
    - shard-dg2-set2:     [SKIP][162] ([Intel XE#4208] / [i915#2575]) -> [SKIP][163] ([Intel XE#367])
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@kms_bw@linear-tiling-3-displays-2160x1440p.html
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-466/igt@kms_bw@linear-tiling-3-displays-2160x1440p.html

  * igt@kms_bw@linear-tiling-4-displays-2560x1440p:
    - shard-dg2-set2:     [SKIP][164] ([Intel XE#367]) -> [SKIP][165] ([Intel XE#4208] / [i915#2575]) +2 other tests skip
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-435/igt@kms_bw@linear-tiling-4-displays-2560x1440p.html
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_bw@linear-tiling-4-displays-2560x1440p.html

  * igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs:
    - shard-dg2-set2:     [SKIP][166] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][167] ([Intel XE#455] / [Intel XE#787]) +5 other tests skip
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs.html
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-434/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs.html

  * igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs:
    - shard-dg2-set2:     [SKIP][168] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][169] ([Intel XE#2351] / [Intel XE#4208]) +3 other tests skip
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-435/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs.html
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs:
    - shard-dg2-set2:     [SKIP][170] ([Intel XE#4208]) -> [SKIP][171] ([Intel XE#455] / [Intel XE#787]) +12 other tests skip
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs.html
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-433/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-mc-ccs:
    - shard-dg2-set2:     [SKIP][172] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][173] ([Intel XE#4208]) +7 other tests skip
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-463/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-mc-ccs.html
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-mc-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
    - shard-dg2-set2:     [SKIP][174] ([Intel XE#4208]) -> [INCOMPLETE][175] ([Intel XE#3862])
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-434/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
    - shard-dg2-set2:     [SKIP][176] ([Intel XE#2907]) -> [SKIP][177] ([Intel XE#4208]) +1 other test skip
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-466/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
    - shard-dg2-set2:     [SKIP][178] ([Intel XE#4208]) -> [SKIP][179] ([Intel XE#2907]) +1 other test skip
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-434/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
    - shard-dg2-set2:     [SKIP][180] ([Intel XE#4208]) -> [INCOMPLETE][181] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522])
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html

  * igt@kms_chamelium_color@ctm-red-to-blue:
    - shard-dg2-set2:     [SKIP][182] ([Intel XE#306]) -> [SKIP][183] ([Intel XE#4208] / [i915#2575]) +2 other tests skip
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-435/igt@kms_chamelium_color@ctm-red-to-blue.html
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_chamelium_color@ctm-red-to-blue.html

  * igt@kms_chamelium_color@gamma:
    - shard-dg2-set2:     [SKIP][184] ([Intel XE#4208] / [i915#2575]) -> [SKIP][185] ([Intel XE#306]) +2 other tests skip
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@kms_chamelium_color@gamma.html
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-434/igt@kms_chamelium_color@gamma.html

  * igt@kms_chamelium_edid@dp-edid-change-during-suspend:
    - shard-dg2-set2:     [SKIP][186] ([Intel XE#373]) -> [SKIP][187] ([Intel XE#4208] / [i915#2575]) +8 other tests skip
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-434/igt@kms_chamelium_edid@dp-edid-change-during-suspend.html
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-436/igt@kms_chamelium_edid@dp-edid-change-during-suspend.html

  * igt@kms_chamelium_hpd@vga-hpd:
    - shard-dg2-set2:     [SKIP][188] ([Intel XE#4208] / [i915#2575]) -> [SKIP][189] ([Intel XE#373]) +9 other tests skip
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@kms_chamelium_hpd@vga-hpd.html
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-435/igt@kms_chamelium_hpd@vga-hpd.html

  * igt@kms_content_protection@atomic-dpms:
    - shard-dg2-set2:     [SKIP][190] ([Intel XE#4208] / [i915#2575]) -> [FAIL][191] ([Intel XE#1178]) +1 other test fail
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@kms_content_protection@atomic-dpms.html
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-466/igt@kms_content_protection@atomic-dpms.html
    - shard-bmg:          [SKIP][192] ([Intel XE#2341]) -> [FAIL][193] ([Intel XE#1178])
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-6/igt@kms_content_protection@atomic-dpms.html
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-4/igt@kms_content_protection@atomic-dpms.html

  * igt@kms_content_protection@dp-mst-lic-type-1:
    - shard-dg2-set2:     [SKIP][194] ([Intel XE#4208] / [i915#2575]) -> [SKIP][195] ([Intel XE#307])
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@kms_content_protection@dp-mst-lic-type-1.html
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-433/igt@kms_content_protection@dp-mst-lic-type-1.html

  * igt@kms_content_protection@srm:
    - shard-bmg:          [FAIL][196] ([Intel XE#1178]) -> [SKIP][197] ([Intel XE#2341])
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-7/igt@kms_content_protection@srm.html
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-6/igt@kms_content_protection@srm.html

  * igt@kms_content_protection@uevent:
    - shard-bmg:          [SKIP][198] ([Intel XE#2341]) -> [FAIL][199] ([Intel XE#1188])
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-6/igt@kms_content_protection@uevent.html
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-8/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-dg2-set2:     [SKIP][200] ([Intel XE#4208] / [i915#2575]) -> [SKIP][201] ([Intel XE#308])
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@kms_cursor_crc@cursor-onscreen-512x512.html
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-435/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_cursor_crc@cursor-random-512x512:
    - shard-dg2-set2:     [SKIP][202] ([Intel XE#308]) -> [SKIP][203] ([Intel XE#4208] / [i915#2575])
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-435/igt@kms_cursor_crc@cursor-random-512x512.html
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_cursor_crc@cursor-random-512x512.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-bmg:          [FAIL][204] ([Intel XE#1475]) -> [FAIL][205] ([Intel XE#4633])
   [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-5/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_dp_link_training@uhbr-mst:
    - shard-dg2-set2:     [SKIP][206] ([Intel XE#4356]) -> [SKIP][207] ([Intel XE#4208])
   [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-466/igt@kms_dp_link_training@uhbr-mst.html
   [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_dp_link_training@uhbr-mst.html

  * igt@kms_dp_linktrain_fallback@dsc-fallback:
    - shard-dg2-set2:     [SKIP][208] ([Intel XE#4208]) -> [SKIP][209] ([Intel XE#4331])
   [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@kms_dp_linktrain_fallback@dsc-fallback.html
   [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-434/igt@kms_dp_linktrain_fallback@dsc-fallback.html

  * igt@kms_dsc@dsc-with-bpc-formats:
    - shard-dg2-set2:     [SKIP][210] ([Intel XE#455]) -> [SKIP][211] ([Intel XE#2351] / [Intel XE#4208]) +2 other tests skip
   [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-435/igt@kms_dsc@dsc-with-bpc-formats.html
   [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_dsc@dsc-with-bpc-formats.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats:
    - shard-dg2-set2:     [SKIP][212] ([Intel XE#4208]) -> [SKIP][213] ([Intel XE#4422])
   [212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html
   [213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-435/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests:
    - shard-dg2-set2:     [SKIP][214] ([Intel XE#4422]) -> [SKIP][215] ([Intel XE#4208])
   [214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-434/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html
   [215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-436/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-dg2-set2:     [SKIP][216] ([Intel XE#776]) -> [SKIP][217] ([Intel XE#4208])
   [216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-466/igt@kms_fbcon_fbt@psr-suspend.html
   [217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_feature_discovery@display-3x:
    - shard-dg2-set2:     [SKIP][218] ([Intel XE#703]) -> [SKIP][219] ([Intel XE#4208] / [i915#2575])
   [218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-435/igt@kms_feature_discovery@display-3x.html
   [219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_feature_discovery@display-3x.html

  * igt@kms_feature_discovery@display-4x:
    - shard-dg2-set2:     [SKIP][220] ([Intel XE#1138]) -> [SKIP][221] ([Intel XE#4208] / [i915#2575])
   [220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-434/igt@kms_feature_discovery@display-4x.html
   [221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-436/igt@kms_feature_discovery@display-4x.html

  * igt@kms_feature_discovery@psr1:
    - shard-dg2-set2:     [SKIP][222] ([Intel XE#4208] / [i915#2575]) -> [SKIP][223] ([Intel XE#1135])
   [222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@kms_feature_discovery@psr1.html
   [223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-435/igt@kms_feature_discovery@psr1.html

  * igt@kms_flip@flip-vs-rmfb-interruptible:
    - shard-adlp:         [DMESG-WARN][224] ([Intel XE#5208]) -> [DMESG-WARN][225] ([Intel XE#4543] / [Intel XE#5208])
   [224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-adlp-3/igt@kms_flip@flip-vs-rmfb-interruptible.html
   [225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-adlp-6/igt@kms_flip@flip-vs-rmfb-interruptible.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling:
    - shard-dg2-set2:     [SKIP][226] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][227] ([Intel XE#455])
   [226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling.html
   [227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-435/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling:
    - shard-dg2-set2:     [SKIP][228] ([Intel XE#455]) -> [SKIP][229] ([Intel XE#4208]) +1 other test skip
   [228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-435/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html
   [229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
    - shard-dg2-set2:     [SKIP][230] ([Intel XE#4208]) -> [SKIP][231] ([Intel XE#455]) +5 other tests skip
   [230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
   [231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-466/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-indfb-draw-mmap-wc:
    - shard-dg2-set2:     [SKIP][232] ([Intel XE#651]) -> [SKIP][233] ([Intel XE#4208]) +19 other tests skip
   [232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-434/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-indfb-draw-mmap-wc.html
   [233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-436/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render:
    - shard-bmg:          [SKIP][234] ([Intel XE#2311]) -> [SKIP][235] ([Intel XE#2312]) +13 other tests skip
   [234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render.html
   [235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@drrs-suspend:
    - shard-dg2-set2:     [SKIP][236] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][237] ([Intel XE#651]) +11 other tests skip
   [236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@kms_frontbuffer_tracking@drrs-suspend.html
   [237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-433/igt@kms_frontbuffer_tracking@drrs-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt:
    - shard-bmg:          [SKIP][238] ([Intel XE#5390]) -> [SKIP][239] ([Intel XE#2312]) +5 other tests skip
   [238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt.html
   [239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen:
    - shard-bmg:          [SKIP][240] ([Intel XE#2312]) -> [SKIP][241] ([Intel XE#5390]) +10 other tests skip
   [240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html
   [241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-y:
    - shard-dg2-set2:     [SKIP][242] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][243] ([Intel XE#658])
   [242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@kms_frontbuffer_tracking@fbc-tiling-y.html
   [243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-435/igt@kms_frontbuffer_tracking@fbc-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-render:
    - shard-dg2-set2:     [SKIP][244] ([Intel XE#4208]) -> [SKIP][245] ([Intel XE#651]) +23 other tests skip
   [244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-render.html
   [245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-433/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-blt:
    - shard-dg2-set2:     [SKIP][246] ([Intel XE#651]) -> [SKIP][247] ([Intel XE#2351] / [Intel XE#4208]) +10 other tests skip
   [246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-466/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-blt.html
   [247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][248] ([Intel XE#2312]) -> [SKIP][249] ([Intel XE#2311]) +20 other tests skip
   [248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html
   [249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt:
    - shard-dg2-set2:     [SKIP][250] ([Intel XE#4208]) -> [SKIP][251] ([Intel XE#653]) +24 other tests skip
   [250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html
   [251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-434/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
    - shard-bmg:          [SKIP][252] ([Intel XE#2312]) -> [SKIP][253] ([Intel XE#2313]) +21 other tests skip
   [252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
   [253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-3/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-dg2-set2:     [SKIP][254] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][255] ([Intel XE#653]) +11 other tests skip
   [254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc.html
   [255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-435/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt:
    - shard-dg2-set2:     [SKIP][256] ([Intel XE#653]) -> [SKIP][257] ([Intel XE#2351] / [Intel XE#4208]) +5 other tests skip
   [256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-463/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt.html
   [257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][258] ([Intel XE#2313]) -> [SKIP][259] ([Intel XE#2312]) +14 other tests skip
   [258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html
   [259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-slowdraw:
    - shard-dg2-set2:     [SKIP][260] ([Intel XE#653]) -> [SKIP][261] ([Intel XE#4208]) +25 other tests skip
   [260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-463/igt@kms_frontbuffer_tracking@psr-slowdraw.html
   [261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-slowdraw.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][262] ([Intel XE#3544]) -> [SKIP][263] ([Intel XE#3374] / [Intel XE#3544])
   [262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-bmg-1/igt@kms_hdr@brightness-with-hdr.html
   [263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-bmg-2/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_joiner@basic-force-ultra-joiner:
    - shard-dg2-set2:     [SKIP][264] ([Intel XE#4208]) -> [SKIP][265] ([Intel XE#2925]) +1 other test skip
   [264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@kms_joiner@basic-force-ultra-joiner.html
   [265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-434/igt@kms_joiner@basic-force-ultra-joiner.html

  * igt@kms_joiner@invalid-modeset-ultra-joiner:
    - shard-dg2-set2:     [SKIP][266] ([Intel XE#2927]) -> [SKIP][267] ([Intel XE#4208])
   [266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-435/igt@kms_joiner@invalid-modeset-ultra-joiner.html
   [267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_joiner@invalid-modeset-ultra-joiner.html

  * igt@kms_pipe_stress@stress-xrgb8888-ytiled:
    - shard-dg2-set2:     [SKIP][268] ([Intel XE#4208]) -> [SKIP][269] ([Intel XE#4359])
   [268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
   [269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-433/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html

  * igt@kms_plane_multiple@tiling-y:
    - shard-dg2-set2:     [SKIP][270] ([Intel XE#4208] / [i915#2575]) -> [SKIP][271] ([Intel XE#5020])
   [270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@kms_plane_multiple@tiling-y.html
   [271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-466/igt@kms_plane_multiple@tiling-y.html

  * igt@kms_pm_backlight@basic-brightness:
    - shard-dg2-set2:     [SKIP][272] ([Intel XE#4208]) -> [SKIP][273] ([Intel XE#870])
   [272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@kms_pm_backlight@basic-brightness.html
   [273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-433/igt@kms_pm_backlight@basic-brightness.html

  * igt@kms_pm_dc@dc6-psr:
    - shard-dg2-set2:     [SKIP][274] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][275] ([Intel XE#1129])
   [274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@kms_pm_dc@dc6-psr.html
   [275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-434/igt@kms_pm_dc@dc6-psr.html

  * igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf:
    - shard-dg2-set2:     [SKIP][276] ([Intel XE#1489]) -> [SKIP][277] ([Intel XE#4208]) +9 other tests skip
   [276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-466/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html
   [277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html

  * igt@kms_psr2_sf@pr-cursor-plane-update-sf:
    - shard-dg2-set2:     [SKIP][278] ([Intel XE#4208]) -> [SKIP][279] ([Intel XE#1489]) +9 other tests skip
   [278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@kms_psr2_sf@pr-cursor-plane-update-sf.html
   [279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-466/igt@kms_psr2_sf@pr-cursor-plane-update-sf.html

  * igt@kms_psr2_su@page_flip-nv12:
    - shard-dg2-set2:     [SKIP][280] ([Intel XE#1122]) -> [SKIP][281] ([Intel XE#4208])
   [280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-435/igt@kms_psr2_su@page_flip-nv12.html
   [281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_psr2_su@page_flip-nv12.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-dg2-set2:     [SKIP][282] ([Intel XE#4208]) -> [SKIP][283] ([Intel XE#1122])
   [282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@kms_psr2_su@page_flip-xrgb8888.html
   [283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-433/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@fbc-psr-no-drrs:
    - shard-dg2-set2:     [SKIP][284] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][285] ([Intel XE#2351] / [Intel XE#4208]) +2 other tests skip
   [284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-435/igt@kms_psr@fbc-psr-no-drrs.html
   [285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_psr@fbc-psr-no-drrs.html

  * igt@kms_psr@fbc-psr2-cursor-plane-onoff:
    - shard-dg2-set2:     [SKIP][286] ([Intel XE#4208]) -> [SKIP][287] ([Intel XE#2850] / [Intel XE#929]) +11 other tests skip
   [286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@kms_psr@fbc-psr2-cursor-plane-onoff.html
   [287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-433/igt@kms_psr@fbc-psr2-cursor-plane-onoff.html

  * igt@kms_psr@pr-dpms:
    - shard-dg2-set2:     [SKIP][288] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][289] ([Intel XE#2850] / [Intel XE#929]) +6 other tests skip
   [288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@kms_psr@pr-dpms.html
   [289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-434/igt@kms_psr@pr-dpms.html

  * igt@kms_psr@psr2-primary-render:
    - shard-dg2-set2:     [SKIP][290] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][291] ([Intel XE#4208]) +11 other tests skip
   [290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-466/igt@kms_psr@psr2-primary-render.html
   [291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_psr@psr2-primary-render.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-dg2-set2:     [SKIP][292] ([Intel XE#2939]) -> [SKIP][293] ([Intel XE#4208])
   [292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-435/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
   [293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
    - shard-dg2-set2:     [SKIP][294] ([Intel XE#4208] / [i915#2575]) -> [SKIP][295] ([Intel XE#1127])
   [294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
   [295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-433/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
    - shard-dg2-set2:     [SKIP][296] ([Intel XE#1127]) -> [SKIP][297] ([Intel XE#4208] / [i915#2575]) +1 other test skip
   [296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-435/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
   [297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-90:
    - shard-dg2-set2:     [SKIP][298] ([Intel XE#4208] / [i915#2575]) -> [SKIP][299] ([Intel XE#3414]) +4 other tests skip
   [298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html
   [299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-433/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-dg2-set2:     [FAIL][300] ([Intel XE#1729]) -> [SKIP][301] ([Intel XE#4208] / [i915#2575])
   [300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-435/igt@kms_tiled_display@basic-test-pattern.html
   [301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-dg2-set2:     [SKIP][302] ([Intel XE#1500]) -> [SKIP][303] ([Intel XE#4208] / [i915#2575])
   [302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-466/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@kms_vrr@flip-dpms:
    - shard-dg2-set2:     [SKIP][304] ([Intel XE#455]) -> [SKIP][305] ([Intel XE#4208] / [i915#2575]) +6 other tests skip
   [304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-434/igt@kms_vrr@flip-dpms.html
   [305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-436/igt@kms_vrr@flip-dpms.html

  * igt@kms_vrr@lobf:
    - shard-dg2-set2:     [SKIP][306] ([Intel XE#4208] / [i915#2575]) -> [SKIP][307] ([Intel XE#2168])
   [306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@kms_vrr@lobf.html
   [307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-433/igt@kms_vrr@lobf.html

  * igt@xe_compute_preempt@compute-preempt:
    - shard-dg2-set2:     [SKIP][308] ([Intel XE#1280] / [Intel XE#455]) -> [SKIP][309] ([Intel XE#4208])
   [308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-434/igt@xe_compute_preempt@compute-preempt.html
   [309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-436/igt@xe_compute_preempt@compute-preempt.html

  * igt@xe_compute_preempt@compute-threadgroup-preempt:
    - shard-dg2-set2:     [SKIP][310] ([Intel XE#4208]) -> [SKIP][311] ([Intel XE#1280] / [Intel XE#455])
   [310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@xe_compute_preempt@compute-threadgroup-preempt.html
   [311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-435/igt@xe_compute_preempt@compute-threadgroup-preempt.html

  * igt@xe_eu_stall@blocking-re-enable:
    - shard-dg2-set2:     [SKIP][312] ([Intel XE#5419]) -> [SKIP][313] ([Intel XE#4208]) +1 other test skip
   [312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-435/igt@xe_eu_stall@blocking-re-enable.html
   [313]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@xe_eu_stall@blocking-re-enable.html

  * igt@xe_eu_stall@blocking-read:
    - shard-dg2-set2:     [SKIP][314] ([Intel XE#4208]) -> [SKIP][315] ([Intel XE#5419]) +1 other test skip
   [314]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@xe_eu_stall@blocking-read.html
   [315]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-435/igt@xe_eu_stall@blocking-read.html

  * igt@xe_eudebug@vm-bind-clear-faultable:
    - shard-dg2-set2:     [SKIP][316] ([Intel XE#4208]) -> [SKIP][317] ([Intel XE#4837]) +15 other tests skip
   [316]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@xe_eudebug@vm-bind-clear-faultable.html
   [317]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-433/igt@xe_eudebug@vm-bind-clear-faultable.html

  * igt@xe_eudebug@vma-ufence-faultable:
    - shard-dg2-set2:     [SKIP][318] ([Intel XE#4837]) -> [SKIP][319] ([Intel XE#4208]) +12 other tests skip
   [318]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-466/igt@xe_eudebug@vma-ufence-faultable.html
   [319]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@xe_eudebug@vma-ufence-faultable.html

  * igt@xe_exec_fault_mode@once-rebind-prefetch:
    - shard-dg2-set2:     [SKIP][320] ([Intel XE#4208]) -> [SKIP][321] ([Intel XE#288]) +33 other tests skip
   [320]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@xe_exec_fault_mode@once-rebind-prefetch.html
   [321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-434/igt@xe_exec_fault_mode@once-rebind-prefetch.html

  * igt@xe_exec_fault_mode@twice-userptr-rebind-imm:
    - shard-dg2-set2:     [SKIP][322] ([Intel XE#288]) -> [SKIP][323] ([Intel XE#4208]) +25 other tests skip
   [322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-466/igt@xe_exec_fault_mode@twice-userptr-rebind-imm.html
   [323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@xe_exec_fault_mode@twice-userptr-rebind-imm.html

  * igt@xe_exec_system_allocator@threads-many-large-mmap-shared-remap-dontunmap-eocheck:
    - shard-dg2-set2:     [SKIP][324] ([Intel XE#4208]) -> [SKIP][325] ([Intel XE#4915]) +310 other tests skip
   [324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@xe_exec_system_allocator@threads-many-large-mmap-shared-remap-dontunmap-eocheck.html
   [325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-435/igt@xe_exec_system_allocator@threads-many-large-mmap-shared-remap-dontunmap-eocheck.html

  * igt@xe_exec_system_allocator@threads-many-stride-mmap-remap-eocheck:
    - shard-dg2-set2:     [SKIP][326] ([Intel XE#4915]) -> [SKIP][327] ([Intel XE#4208]) +256 other tests skip
   [326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-434/igt@xe_exec_system_allocator@threads-many-stride-mmap-remap-eocheck.html
   [327]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-436/igt@xe_exec_system_allocator@threads-many-stride-mmap-remap-eocheck.html

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
    - shard-dg2-set2:     [ABORT][328] ([Intel XE#4917]) -> [SKIP][329] ([Intel XE#4208])
   [328]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-466/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
   [329]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-436/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html

  * igt@xe_huc_copy@huc_copy:
    - shard-dg2-set2:     [SKIP][330] ([Intel XE#4208]) -> [SKIP][331] ([Intel XE#255])
   [330]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@xe_huc_copy@huc_copy.html
   [331]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-435/igt@xe_huc_copy@huc_copy.html

  * igt@xe_oa@buffer-size:
    - shard-dg2-set2:     [SKIP][332] ([Intel XE#4501]) -> [SKIP][333] ([Intel XE#4208])
   [332]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-466/igt@xe_oa@buffer-size.html
   [333]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@xe_oa@buffer-size.html

  * igt@xe_oa@closed-fd-and-unmapped-access:
    - shard-dg2-set2:     [SKIP][334] ([Intel XE#2541] / [Intel XE#3573]) -> [SKIP][335] ([Intel XE#4208]) +2 other tests skip
   [334]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-435/igt@xe_oa@closed-fd-and-unmapped-access.html
   [335]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@xe_oa@closed-fd-and-unmapped-access.html

  * igt@xe_oa@mmio-triggered-reports-read:
    - shard-dg2-set2:     [SKIP][336] ([Intel XE#4208]) -> [SKIP][337] ([Intel XE#5103])
   [336]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@xe_oa@mmio-triggered-reports-read.html
   [337]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-433/igt@xe_oa@mmio-triggered-reports-read.html

  * igt@xe_oa@privileged-forked-access-vaddr:
    - shard-dg2-set2:     [SKIP][338] ([Intel XE#4208]) -> [SKIP][339] ([Intel XE#2541] / [Intel XE#3573]) +4 other tests skip
   [338]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@xe_oa@privileged-forked-access-vaddr.html
   [339]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-433/igt@xe_oa@privileged-forked-access-vaddr.html

  * igt@xe_oa@syncs-syncobj-wait:
    - shard-dg2-set2:     [SKIP][340] ([Intel XE#4208]) -> [SKIP][341] ([Intel XE#2541] / [Intel XE#3573] / [Intel XE#4501])
   [340]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@xe_oa@syncs-syncobj-wait.html
   [341]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-433/igt@xe_oa@syncs-syncobj-wait.html

  * igt@xe_oa@syncs-userptr-wait-cfg:
    - shard-dg2-set2:     [SKIP][342] ([Intel XE#2541] / [Intel XE#3573] / [Intel XE#4501]) -> [SKIP][343] ([Intel XE#4208]) +2 other tests skip
   [342]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-463/igt@xe_oa@syncs-userptr-wait-cfg.html
   [343]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@xe_oa@syncs-userptr-wait-cfg.html

  * igt@xe_pat@pat-index-xe2:
    - shard-dg2-set2:     [SKIP][344] ([Intel XE#4208]) -> [SKIP][345] ([Intel XE#977])
   [344]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@xe_pat@pat-index-xe2.html
   [345]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-466/igt@xe_pat@pat-index-xe2.html

  * igt@xe_pat@pat-index-xehpc:
    - shard-dg2-set2:     [SKIP][346] ([Intel XE#4208]) -> [SKIP][347] ([Intel XE#2838] / [Intel XE#979])
   [346]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@xe_pat@pat-index-xehpc.html
   [347]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-435/igt@xe_pat@pat-index-xehpc.html

  * igt@xe_peer2peer@write:
    - shard-dg2-set2:     [FAIL][348] ([Intel XE#1173]) -> [SKIP][349] ([Intel XE#1061] / [Intel XE#4208])
   [348]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-434/igt@xe_peer2peer@write.html
   [349]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-436/igt@xe_peer2peer@write.html

  * igt@xe_pm@s2idle-d3cold-basic-exec:
    - shard-dg2-set2:     [SKIP][350] ([Intel XE#4208]) -> [SKIP][351] ([Intel XE#2284] / [Intel XE#366]) +3 other tests skip
   [350]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@xe_pm@s2idle-d3cold-basic-exec.html
   [351]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-433/igt@xe_pm@s2idle-d3cold-basic-exec.html

  * igt@xe_pm@s3-d3cold-basic-exec:
    - shard-dg2-set2:     [SKIP][352] ([Intel XE#2284] / [Intel XE#366]) -> [SKIP][353] ([Intel XE#4208])
   [352]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-466/igt@xe_pm@s3-d3cold-basic-exec.html
   [353]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@xe_pm@s3-d3cold-basic-exec.html

  * igt@xe_pmu@fn-engine-activity-sched-if-idle:
    - shard-dg2-set2:     [SKIP][354] ([Intel XE#4208]) -> [SKIP][355] ([Intel XE#4650])
   [354]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@xe_pmu@fn-engine-activity-sched-if-idle.html
   [355]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-466/igt@xe_pmu@fn-engine-activity-sched-if-idle.html

  * igt@xe_pxp@display-pxp-fb:
    - shard-dg2-set2:     [SKIP][356] ([Intel XE#4733]) -> [SKIP][357] ([Intel XE#4208]) +1 other test skip
   [356]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-466/igt@xe_pxp@display-pxp-fb.html
   [357]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@xe_pxp@display-pxp-fb.html

  * igt@xe_pxp@pxp-termination-key-update-post-rpm:
    - shard-dg2-set2:     [SKIP][358] ([Intel XE#4208]) -> [SKIP][359] ([Intel XE#4733]) +2 other tests skip
   [358]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@xe_pxp@pxp-termination-key-update-post-rpm.html
   [359]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-466/igt@xe_pxp@pxp-termination-key-update-post-rpm.html

  * igt@xe_query@multigpu-query-oa-units:
    - shard-dg2-set2:     [SKIP][360] ([Intel XE#944]) -> [SKIP][361] ([Intel XE#4208]) +3 other tests skip
   [360]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-463/igt@xe_query@multigpu-query-oa-units.html
   [361]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@xe_query@multigpu-query-oa-units.html

  * igt@xe_query@multigpu-query-uc-fw-version-guc:
    - shard-dg2-set2:     [SKIP][362] ([Intel XE#4208]) -> [SKIP][363] ([Intel XE#944]) +2 other tests skip
   [362]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@xe_query@multigpu-query-uc-fw-version-guc.html
   [363]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-434/igt@xe_query@multigpu-query-uc-fw-version-guc.html

  * igt@xe_render_copy@render-stress-2-copies:
    - shard-dg2-set2:     [SKIP][364] ([Intel XE#4208]) -> [SKIP][365] ([Intel XE#4814])
   [364]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@xe_render_copy@render-stress-2-copies.html
   [365]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-435/igt@xe_render_copy@render-stress-2-copies.html

  * igt@xe_render_copy@render-stress-4-copies:
    - shard-dg2-set2:     [SKIP][366] ([Intel XE#4814]) -> [SKIP][367] ([Intel XE#4208]) +1 other test skip
   [366]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-466/igt@xe_render_copy@render-stress-4-copies.html
   [367]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-464/igt@xe_render_copy@render-stress-4-copies.html

  * igt@xe_spin_batch@spin-mem-copy:
    - shard-dg2-set2:     [SKIP][368] ([Intel XE#4208]) -> [SKIP][369] ([Intel XE#4821])
   [368]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-464/igt@xe_spin_batch@spin-mem-copy.html
   [369]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-434/igt@xe_spin_batch@spin-mem-copy.html

  * igt@xe_sriov_auto_provisioning@selfconfig-reprovision-reduce-numvfs:
    - shard-dg2-set2:     [SKIP][370] ([Intel XE#4208]) -> [SKIP][371] ([Intel XE#4130]) +1 other test skip
   [370]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-reduce-numvfs.html
   [371]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-435/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-reduce-numvfs.html

  * igt@xe_sriov_flr@flr-each-isolation:
    - shard-dg2-set2:     [SKIP][372] ([Intel XE#3342]) -> [SKIP][373] ([Intel XE#4208])
   [372]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-434/igt@xe_sriov_flr@flr-each-isolation.html
   [373]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-436/igt@xe_sriov_flr@flr-each-isolation.html

  * igt@xe_sriov_flr@flr-vf1-clear:
    - shard-dg2-set2:     [SKIP][374] ([Intel XE#4208]) -> [SKIP][375] ([Intel XE#3342])
   [374]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60/shard-dg2-436/igt@xe_sriov_flr@flr-vf1-clear.html
   [375]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/shard-dg2-433/igt@xe_sriov_flr@flr-vf1-clear.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1061
  [Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
  [Intel XE#1129]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1129
  [Intel XE#1135]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1135
  [Intel XE#1138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1138
  [Intel XE#1173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1173
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
  [Intel XE#1280]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1280
  [Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1475]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1475
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1500]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1500
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
  [Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
  [Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
  [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
  [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2351
  [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
  [Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
  [Intel XE#2499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2499
  [Intel XE#2541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2541
  [Intel XE#255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/255
  [Intel XE#2571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2571
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
  [Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925
  [Intel XE#2927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2927
  [Intel XE#2939]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2939
  [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
  [Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
  [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
  [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
  [Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
  [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#3768]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3768
  [Intel XE#3862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3862
  [Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876
  [Intel XE#3908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3908
  [Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
  [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
  [Intel XE#4208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4208
  [Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
  [Intel XE#4294]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4294
  [Intel XE#4302]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4302
  [Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
  [Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
  [Intel XE#4356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4356
  [Intel XE#4359]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4359
  [Intel XE#4416]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4416
  [Intel XE#4417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4417
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4501
  [Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4618]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4618
  [Intel XE#4633]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4633
  [Intel XE#4650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4650
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4812]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4812
  [Intel XE#4814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4814
  [Intel XE#4819]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4819
  [Intel XE#4821]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4821
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
  [Intel XE#4917]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4917
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5018]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5018
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#5103]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5103
  [Intel XE#5166]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5166
  [Intel XE#5208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5208
  [Intel XE#5255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5255
  [Intel XE#5300]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5300
  [Intel XE#5352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5352
  [Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
  [Intel XE#5419]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5419
  [Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
  [Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
  [Intel XE#623]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/623
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
  [Intel XE#658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/658
  [Intel XE#703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/703
  [Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
  [Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
  [i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575


Build changes
-------------

  * Linux: xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60 -> xe-pw-151261v2

  IGT_8447: 8447
  xe-3378-eebec4bb9f29656335ddfd06a1d02961715f0e60: eebec4bb9f29656335ddfd06a1d02961715f0e60
  xe-pw-151261v2: 151261v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151261v2/index.html

[-- Attachment #2: Type: text/html, Size: 122983 bytes --]

Re: [PATCH v2 1/2] drm/i915/psr: Do not disable Early Transport when enable_psr is set

[Rodrigo Vivi]

On Wed, Jul 09, 2025 at 10:57:57AM +0300, Jouni Högander wrote:
> Current approach is that Early Transport is disabled in case enable_psr
> module parameter is set. Let's ignore enable_psr parameter when choosing if
> Early Transport can be used.
> 
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 13 +------------
>  1 file changed, 1 insertion(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index ae9053919211..a2b5688f0c82 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -265,16 +265,6 @@ static bool psr2_global_enabled(struct intel_dp *intel_dp)
>  	}
>  }
>  
> -static bool psr2_su_region_et_global_enabled(struct intel_dp *intel_dp)
> -{
> -	struct intel_display *display = to_intel_display(intel_dp);
> -
> -	if (display->params.enable_psr != -1)
> -		return false;
> -
> -	return true;
> -}
> -
>  static bool panel_replay_global_enabled(struct intel_dp *intel_dp)
>  {
>  	struct intel_display *display = to_intel_display(intel_dp);
> @@ -742,8 +732,7 @@ static bool psr2_su_region_et_valid(struct intel_dp *intel_dp, bool panel_replay
>  	return panel_replay ?
>  		intel_dp->pr_dpcd[INTEL_PR_DPCD_INDEX(DP_PANEL_REPLAY_CAP_SUPPORT)] &
>  		DP_PANEL_REPLAY_EARLY_TRANSPORT_SUPPORT :
> -		intel_dp->psr_dpcd[0] == DP_PSR2_WITH_Y_COORD_ET_SUPPORTED &&
> -		psr2_su_region_et_global_enabled(intel_dp);
> +		intel_dp->psr_dpcd[0] == DP_PSR2_WITH_Y_COORD_ET_SUPPORTED;
>  }
>  
>  static void _panel_replay_enable_sink(struct intel_dp *intel_dp,
> -- 
> 2.43.0
> 

Re: [PATCH v2 2/2] drm/i915/psr: Do not disable Panel Replay if PSR2 is disabled

[Rodrigo Vivi]

On Wed, Jul 09, 2025 at 10:57:58AM +0300, Jouni Högander wrote:
> Currently disabling PSR2 via enable_psr module parameter causes Panel
> Replay being disabled as well. This patch changes this by still allowing
> Panel Replay even if PSR2 is disabled.
> 
> After this patch enable_psr module parameter values are:
> 
> -1 = PSR1 : yes, PSR2 = yes, Panel Replay : yes
>  0 = PSR1 : no,  PSR2 = no,  Panel Replay : no
>  1 = PSR1 : yes, PSR2 = no,  Panel Replay : yes
>  2 = PSR1 : yes, PSR2 = yes, Panel Replay : no
>  3 = PSR1 : yes, PSR2 = no,  Panel Replay : no
> 
> I.e. values different than -1 and 0 are handled as bitmasks where BIT0
> disables PSR2 and BIT1 disables Panel Replay.
> 
> v2:
>   - make it more clear that enable_psr is bitmask for disabling different
>     PSR modes
> 
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  .../drm/i915/display/intel_display_params.c   |  6 ++---
>  drivers/gpu/drm/i915/display/intel_psr.c      | 22 ++++++++++++++-----
>  2 files changed, 19 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 75316247ee8a..195af19ece5f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -116,9 +116,9 @@ intel_display_param_named_unsafe(enable_fbc, int, 0400,
>  	"(default: -1 (use per-chip default))");
>  
>  intel_display_param_named_unsafe(enable_psr, int, 0400,
> -	"Enable PSR "
> -	"(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
> -	"Default: -1 (use per-chip default)");
> +	"Enable PSR (0=disabled, 1=disable PSR2 (BIT0), 2=disable Panel Replay (BIT1))."
> +	"Values different from 0 and -1 are handled as bitmask to disable different PSR modes."
> +	"E.g. value 3 disables both PSR2 and Panel Replay. Default: -1 (use per-chip default)");
>  
>  intel_display_param_named(psr_safest_params, bool, 0400,
>  	"Replace PSR VBT parameters by the safest and not optimal ones. This "
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index a2b5688f0c82..959b868672d0 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -254,13 +254,16 @@ static bool psr2_global_enabled(struct intel_dp *intel_dp)
>  {
>  	struct intel_display *display = to_intel_display(intel_dp);
>  
> +	return display->params.enable_psr == -1 ||
> +		!(display->params.enable_psr & 0x1);
> +}
> +
> +static bool sel_update_global_enabled(struct intel_dp *intel_dp)
> +{
>  	switch (intel_dp->psr.debug & I915_PSR_DEBUG_MODE_MASK) {
> -	case I915_PSR_DEBUG_DISABLE:
>  	case I915_PSR_DEBUG_FORCE_PSR1:
>  		return false;
>  	default:
> -		if (display->params.enable_psr == 1)
> -			return false;
>  		return true;
>  	}
>  }
> @@ -269,7 +272,8 @@ static bool panel_replay_global_enabled(struct intel_dp *intel_dp)
>  {
>  	struct intel_display *display = to_intel_display(intel_dp);
>  
> -	if ((display->params.enable_psr != -1) ||
> +	if ((display->params.enable_psr != -1 &&
> +	     display->params.enable_psr & 0x2) ||

I believe we should probably define the bits

#define PSR_PARAM_DISABLE_PSR2		BIT(0)
#define PSR_PARAM_DISABLE_PANEL_REPLAY	BIT(1)

likely here in this .c file itself, not needed to be along with the param
but up to you, if you believe it makes more sense and gets clear there...

>  	    (intel_dp->psr.debug & I915_PSR_DEBUG_PANEL_REPLAY_DISABLE))
>  		return false;
>  	return true;
> @@ -1415,6 +1419,12 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
>  	if (!intel_dp->psr.sink_psr2_support)
>  		return false;
>  
> +	if (!psr2_global_enabled(intel_dp)) {
> +		drm_dbg_kms(display->drm,
> +			    "PSR2 disabled by flag\n");
> +		return false;
> +	}
> +
>  	/* JSL and EHL only supports eDP 1.3 */
>  	if (display->platform.jasperlake || display->platform.elkhartlake) {
>  		drm_dbg_kms(display->drm, "PSR2 not supported by phy\n");
> @@ -1517,7 +1527,7 @@ static bool intel_sel_update_config_valid(struct intel_dp *intel_dp,
>  		goto unsupported;
>  	}
>  
> -	if (!psr2_global_enabled(intel_dp)) {
> +	if (!sel_update_global_enabled(intel_dp)) {
>  		drm_dbg_kms(display->drm,
>  			    "Selective update disabled by flag\n");
>  		goto unsupported;
> @@ -1664,7 +1674,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
>  	u8 active_pipes = 0;
>  
>  	if (!psr_global_enabled(intel_dp)) {
> -		drm_dbg_kms(display->drm, "PSR disabled by flag\n");
> +		drm_dbg_kms(display->drm, "PSR/Panel Replay disabled by flag\n");
>  		return;
>  	}
>  
> -- 
> 2.43.0
> 

Re: [PATCH v2 2/2] drm/i915/psr: Do not disable Panel Replay if PSR2 is disabled

[Ville Syrjälä]

On Wed, Jul 09, 2025 at 10:57:58AM +0300, Jouni Högander wrote:
> Currently disabling PSR2 via enable_psr module parameter causes Panel
> Replay being disabled as well. This patch changes this by still allowing
> Panel Replay even if PSR2 is disabled.
> 
> After this patch enable_psr module parameter values are:
> 
> -1 = PSR1 : yes, PSR2 = yes, Panel Replay : yes
>  0 = PSR1 : no,  PSR2 = no,  Panel Replay : no
>  1 = PSR1 : yes, PSR2 = no,  Panel Replay : yes
>  2 = PSR1 : yes, PSR2 = yes, Panel Replay : no
>  3 = PSR1 : yes, PSR2 = no,  Panel Replay : no
> 
> I.e. values different than -1 and 0 are handled as bitmasks where BIT0
> disables PSR2 and BIT1 disables Panel Replay.
> 
> v2:
>   - make it more clear that enable_psr is bitmask for disabling different
>     PSR modes
> 
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  .../drm/i915/display/intel_display_params.c   |  6 ++---
>  drivers/gpu/drm/i915/display/intel_psr.c      | 22 ++++++++++++++-----
>  2 files changed, 19 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 75316247ee8a..195af19ece5f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -116,9 +116,9 @@ intel_display_param_named_unsafe(enable_fbc, int, 0400,
>  	"(default: -1 (use per-chip default))");
>  
>  intel_display_param_named_unsafe(enable_psr, int, 0400,
> -	"Enable PSR "
> -	"(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
> -	"Default: -1 (use per-chip default)");
> +	"Enable PSR (0=disabled, 1=disable PSR2 (BIT0), 2=disable Panel Replay (BIT1))."
> +	"Values different from 0 and -1 are handled as bitmask to disable different PSR modes."
> +	"E.g. value 3 disables both PSR2 and Panel Replay. Default: -1 (use per-chip default)");

This thing is very unintuitive. Why don't we just get replace it
with a new disable_psr modparam that is clearly just a bitmask of
what to disable?

>  
>  intel_display_param_named(psr_safest_params, bool, 0400,
>  	"Replace PSR VBT parameters by the safest and not optimal ones. This "
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index a2b5688f0c82..959b868672d0 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -254,13 +254,16 @@ static bool psr2_global_enabled(struct intel_dp *intel_dp)
>  {
>  	struct intel_display *display = to_intel_display(intel_dp);
>  
> +	return display->params.enable_psr == -1 ||
> +		!(display->params.enable_psr & 0x1);
> +}
> +
> +static bool sel_update_global_enabled(struct intel_dp *intel_dp)
> +{
>  	switch (intel_dp->psr.debug & I915_PSR_DEBUG_MODE_MASK) {
> -	case I915_PSR_DEBUG_DISABLE:
>  	case I915_PSR_DEBUG_FORCE_PSR1:
>  		return false;
>  	default:
> -		if (display->params.enable_psr == 1)
> -			return false;
>  		return true;
>  	}
>  }
> @@ -269,7 +272,8 @@ static bool panel_replay_global_enabled(struct intel_dp *intel_dp)
>  {
>  	struct intel_display *display = to_intel_display(intel_dp);
>  
> -	if ((display->params.enable_psr != -1) ||
> +	if ((display->params.enable_psr != -1 &&
> +	     display->params.enable_psr & 0x2) ||
>  	    (intel_dp->psr.debug & I915_PSR_DEBUG_PANEL_REPLAY_DISABLE))
>  		return false;
>  	return true;
> @@ -1415,6 +1419,12 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
>  	if (!intel_dp->psr.sink_psr2_support)
>  		return false;
>  
> +	if (!psr2_global_enabled(intel_dp)) {
> +		drm_dbg_kms(display->drm,
> +			    "PSR2 disabled by flag\n");
> +		return false;
> +	}
> +
>  	/* JSL and EHL only supports eDP 1.3 */
>  	if (display->platform.jasperlake || display->platform.elkhartlake) {
>  		drm_dbg_kms(display->drm, "PSR2 not supported by phy\n");
> @@ -1517,7 +1527,7 @@ static bool intel_sel_update_config_valid(struct intel_dp *intel_dp,
>  		goto unsupported;
>  	}
>  
> -	if (!psr2_global_enabled(intel_dp)) {
> +	if (!sel_update_global_enabled(intel_dp)) {
>  		drm_dbg_kms(display->drm,
>  			    "Selective update disabled by flag\n");
>  		goto unsupported;
> @@ -1664,7 +1674,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
>  	u8 active_pipes = 0;
>  
>  	if (!psr_global_enabled(intel_dp)) {
> -		drm_dbg_kms(display->drm, "PSR disabled by flag\n");
> +		drm_dbg_kms(display->drm, "PSR/Panel Replay disabled by flag\n");
>  		return;
>  	}
>  
> -- 
> 2.43.0

-- 
Ville Syrjälä
Intel

Re: [PATCH v2 2/2] drm/i915/psr: Do not disable Panel Replay if PSR2 is disabled

[Hogander, Jouni]

On Wed, 2025-07-09 at 20:03 +0300, Ville Syrjälä wrote:
> On Wed, Jul 09, 2025 at 10:57:58AM +0300, Jouni Högander wrote:
> > Currently disabling PSR2 via enable_psr module parameter causes
> > Panel
> > Replay being disabled as well. This patch changes this by still
> > allowing
> > Panel Replay even if PSR2 is disabled.
> > 
> > After this patch enable_psr module parameter values are:
> > 
> > -1 = PSR1 : yes, PSR2 = yes, Panel Replay : yes
> >  0 = PSR1 : no,  PSR2 = no,  Panel Replay : no
> >  1 = PSR1 : yes, PSR2 = no,  Panel Replay : yes
> >  2 = PSR1 : yes, PSR2 = yes, Panel Replay : no
> >  3 = PSR1 : yes, PSR2 = no,  Panel Replay : no
> > 
> > I.e. values different than -1 and 0 are handled as bitmasks where
> > BIT0
> > disables PSR2 and BIT1 disables Panel Replay.
> > 
> > v2:
> >   - make it more clear that enable_psr is bitmask for disabling
> > different
> >     PSR modes
> > 
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> >  .../drm/i915/display/intel_display_params.c   |  6 ++---
> >  drivers/gpu/drm/i915/display/intel_psr.c      | 22 ++++++++++++++-
> > ----
> >  2 files changed, 19 insertions(+), 9 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> > b/drivers/gpu/drm/i915/display/intel_display_params.c
> > index 75316247ee8a..195af19ece5f 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> > @@ -116,9 +116,9 @@ intel_display_param_named_unsafe(enable_fbc,
> > int, 0400,
> >  	"(default: -1 (use per-chip default))");
> >  
> >  intel_display_param_named_unsafe(enable_psr, int, 0400,
> > -	"Enable PSR "
> > -	"(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
> > -	"Default: -1 (use per-chip default)");
> > +	"Enable PSR (0=disabled, 1=disable PSR2 (BIT0), 2=disable
> > Panel Replay (BIT1))."
> > +	"Values different from 0 and -1 are handled as bitmask to
> > disable different PSR modes."
> > +	"E.g. value 3 disables both PSR2 and Panel Replay.
> > Default: -1 (use per-chip default)");
> 
> This thing is very unintuitive. Why don't we just get replace it
> with a new disable_psr modparam that is clearly just a bitmask of
> what to disable?

I was thinkinig we should keep it backward compatible. I know this
parameter is in use.

BR,

Jouni Högander

> >  
> >  intel_display_param_named(psr_safest_params, bool, 0400,
> >  	"Replace PSR VBT parameters by the safest and not optimal
> > ones. This "
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index a2b5688f0c82..959b868672d0 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -254,13 +254,16 @@ static bool psr2_global_enabled(struct
> > intel_dp *intel_dp)
> >  {
> >  	struct intel_display *display =
> > to_intel_display(intel_dp);
> >  
> > +	return display->params.enable_psr == -1 ||
> > +		!(display->params.enable_psr & 0x1);
> > +}
> > +
> > +static bool sel_update_global_enabled(struct intel_dp *intel_dp)
> > +{
> >  	switch (intel_dp->psr.debug & I915_PSR_DEBUG_MODE_MASK) {
> > -	case I915_PSR_DEBUG_DISABLE:
> >  	case I915_PSR_DEBUG_FORCE_PSR1:
> >  		return false;
> >  	default:
> > -		if (display->params.enable_psr == 1)
> > -			return false;
> >  		return true;
> >  	}
> >  }
> > @@ -269,7 +272,8 @@ static bool panel_replay_global_enabled(struct
> > intel_dp *intel_dp)
> >  {
> >  	struct intel_display *display =
> > to_intel_display(intel_dp);
> >  
> > -	if ((display->params.enable_psr != -1) ||
> > +	if ((display->params.enable_psr != -1 &&
> > +	     display->params.enable_psr & 0x2) ||
> >  	    (intel_dp->psr.debug &
> > I915_PSR_DEBUG_PANEL_REPLAY_DISABLE))
> >  		return false;
> >  	return true;
> > @@ -1415,6 +1419,12 @@ static bool intel_psr2_config_valid(struct
> > intel_dp *intel_dp,
> >  	if (!intel_dp->psr.sink_psr2_support)
> >  		return false;
> >  
> > +	if (!psr2_global_enabled(intel_dp)) {
> > +		drm_dbg_kms(display->drm,
> > +			    "PSR2 disabled by flag\n");
> > +		return false;
> > +	}
> > +
> >  	/* JSL and EHL only supports eDP 1.3 */
> >  	if (display->platform.jasperlake || display-
> > >platform.elkhartlake) {
> >  		drm_dbg_kms(display->drm, "PSR2 not supported by
> > phy\n");
> > @@ -1517,7 +1527,7 @@ static bool
> > intel_sel_update_config_valid(struct intel_dp *intel_dp,
> >  		goto unsupported;
> >  	}
> >  
> > -	if (!psr2_global_enabled(intel_dp)) {
> > +	if (!sel_update_global_enabled(intel_dp)) {
> >  		drm_dbg_kms(display->drm,
> >  			    "Selective update disabled by
> > flag\n");
> >  		goto unsupported;
> > @@ -1664,7 +1674,7 @@ void intel_psr_compute_config(struct intel_dp
> > *intel_dp,
> >  	u8 active_pipes = 0;
> >  
> >  	if (!psr_global_enabled(intel_dp)) {
> > -		drm_dbg_kms(display->drm, "PSR disabled by
> > flag\n");
> > +		drm_dbg_kms(display->drm, "PSR/Panel Replay
> > disabled by flag\n");
> >  		return;
> >  	}
> >  
> > -- 
> > 2.43.0
> 

Re: [PATCH v2 2/2] drm/i915/psr: Do not disable Panel Replay if PSR2 is disabled

[Rodrigo Vivi]

On Wed, Jul 09, 2025 at 06:11:17PM +0000, Hogander, Jouni wrote:
> On Wed, 2025-07-09 at 20:03 +0300, Ville Syrjälä wrote:
> > On Wed, Jul 09, 2025 at 10:57:58AM +0300, Jouni Högander wrote:
> > > Currently disabling PSR2 via enable_psr module parameter causes
> > > Panel
> > > Replay being disabled as well. This patch changes this by still
> > > allowing
> > > Panel Replay even if PSR2 is disabled.
> > > 
> > > After this patch enable_psr module parameter values are:
> > > 
> > > -1 = PSR1 : yes, PSR2 = yes, Panel Replay : yes
> > >  0 = PSR1 : no,  PSR2 = no,  Panel Replay : no
> > >  1 = PSR1 : yes, PSR2 = no,  Panel Replay : yes
> > >  2 = PSR1 : yes, PSR2 = yes, Panel Replay : no
> > >  3 = PSR1 : yes, PSR2 = no,  Panel Replay : no
> > > 
> > > I.e. values different than -1 and 0 are handled as bitmasks where
> > > BIT0
> > > disables PSR2 and BIT1 disables Panel Replay.
> > > 
> > > v2:
> > >   - make it more clear that enable_psr is bitmask for disabling
> > > different
> > >     PSR modes
> > > 
> > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > ---
> > >  .../drm/i915/display/intel_display_params.c   |  6 ++---
> > >  drivers/gpu/drm/i915/display/intel_psr.c      | 22 ++++++++++++++-
> > > ----
> > >  2 files changed, 19 insertions(+), 9 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> > > b/drivers/gpu/drm/i915/display/intel_display_params.c
> > > index 75316247ee8a..195af19ece5f 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> > > @@ -116,9 +116,9 @@ intel_display_param_named_unsafe(enable_fbc,
> > > int, 0400,
> > >  	"(default: -1 (use per-chip default))");
> > >  
> > >  intel_display_param_named_unsafe(enable_psr, int, 0400,
> > > -	"Enable PSR "
> > > -	"(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
> > > -	"Default: -1 (use per-chip default)");
> > > +	"Enable PSR (0=disabled, 1=disable PSR2 (BIT0), 2=disable
> > > Panel Replay (BIT1))."
> > > +	"Values different from 0 and -1 are handled as bitmask to
> > > disable different PSR modes."
> > > +	"E.g. value 3 disables both PSR2 and Panel Replay.
> > > Default: -1 (use per-chip default)");
> > 
> > This thing is very unintuitive. Why don't we just get replace it
> > with a new disable_psr modparam that is clearly just a bitmask of
> > what to disable?
> 
> I was thinkinig we should keep it backward compatible. I know this
> parameter is in use.

I agree on keeping this backward compatible.

Also our experience with disable_power_well shows that negative
name in the parameter can be much more unintuitive and confusing.

> 
> BR,
> 
> Jouni Högander
> 
> > >  
> > >  intel_display_param_named(psr_safest_params, bool, 0400,
> > >  	"Replace PSR VBT parameters by the safest and not optimal
> > > ones. This "
> > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > index a2b5688f0c82..959b868672d0 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > @@ -254,13 +254,16 @@ static bool psr2_global_enabled(struct
> > > intel_dp *intel_dp)
> > >  {
> > >  	struct intel_display *display =
> > > to_intel_display(intel_dp);
> > >  
> > > +	return display->params.enable_psr == -1 ||
> > > +		!(display->params.enable_psr & 0x1);
> > > +}
> > > +
> > > +static bool sel_update_global_enabled(struct intel_dp *intel_dp)
> > > +{
> > >  	switch (intel_dp->psr.debug & I915_PSR_DEBUG_MODE_MASK) {
> > > -	case I915_PSR_DEBUG_DISABLE:
> > >  	case I915_PSR_DEBUG_FORCE_PSR1:
> > >  		return false;
> > >  	default:
> > > -		if (display->params.enable_psr == 1)
> > > -			return false;
> > >  		return true;
> > >  	}
> > >  }
> > > @@ -269,7 +272,8 @@ static bool panel_replay_global_enabled(struct
> > > intel_dp *intel_dp)
> > >  {
> > >  	struct intel_display *display =
> > > to_intel_display(intel_dp);
> > >  
> > > -	if ((display->params.enable_psr != -1) ||
> > > +	if ((display->params.enable_psr != -1 &&
> > > +	     display->params.enable_psr & 0x2) ||
> > >  	    (intel_dp->psr.debug &
> > > I915_PSR_DEBUG_PANEL_REPLAY_DISABLE))
> > >  		return false;
> > >  	return true;
> > > @@ -1415,6 +1419,12 @@ static bool intel_psr2_config_valid(struct
> > > intel_dp *intel_dp,
> > >  	if (!intel_dp->psr.sink_psr2_support)
> > >  		return false;
> > >  
> > > +	if (!psr2_global_enabled(intel_dp)) {
> > > +		drm_dbg_kms(display->drm,
> > > +			    "PSR2 disabled by flag\n");
> > > +		return false;
> > > +	}
> > > +
> > >  	/* JSL and EHL only supports eDP 1.3 */
> > >  	if (display->platform.jasperlake || display-
> > > >platform.elkhartlake) {
> > >  		drm_dbg_kms(display->drm, "PSR2 not supported by
> > > phy\n");
> > > @@ -1517,7 +1527,7 @@ static bool
> > > intel_sel_update_config_valid(struct intel_dp *intel_dp,
> > >  		goto unsupported;
> > >  	}
> > >  
> > > -	if (!psr2_global_enabled(intel_dp)) {
> > > +	if (!sel_update_global_enabled(intel_dp)) {
> > >  		drm_dbg_kms(display->drm,
> > >  			    "Selective update disabled by
> > > flag\n");
> > >  		goto unsupported;
> > > @@ -1664,7 +1674,7 @@ void intel_psr_compute_config(struct intel_dp
> > > *intel_dp,
> > >  	u8 active_pipes = 0;
> > >  
> > >  	if (!psr_global_enabled(intel_dp)) {
> > > -		drm_dbg_kms(display->drm, "PSR disabled by
> > > flag\n");
> > > +		drm_dbg_kms(display->drm, "PSR/Panel Replay
> > > disabled by flag\n");
> > >  		return;
> > >  	}
> > >  
> > > -- 
> > > 2.43.0
> > 
> 

Re: [PATCH v2 2/2] drm/i915/psr: Do not disable Panel Replay if PSR2 is disabled

[Hogander, Jouni]

On Wed, 2025-07-09 at 09:27 -0400, Rodrigo Vivi wrote:
> On Wed, Jul 09, 2025 at 10:57:58AM +0300, Jouni Högander wrote:
> > Currently disabling PSR2 via enable_psr module parameter causes
> > Panel
> > Replay being disabled as well. This patch changes this by still
> > allowing
> > Panel Replay even if PSR2 is disabled.
> > 
> > After this patch enable_psr module parameter values are:
> > 
> > -1 = PSR1 : yes, PSR2 = yes, Panel Replay : yes
> >  0 = PSR1 : no,  PSR2 = no,  Panel Replay : no
> >  1 = PSR1 : yes, PSR2 = no,  Panel Replay : yes
> >  2 = PSR1 : yes, PSR2 = yes, Panel Replay : no
> >  3 = PSR1 : yes, PSR2 = no,  Panel Replay : no
> > 
> > I.e. values different than -1 and 0 are handled as bitmasks where
> > BIT0
> > disables PSR2 and BIT1 disables Panel Replay.
> > 
> > v2:
> >   - make it more clear that enable_psr is bitmask for disabling
> > different
> >     PSR modes
> > 
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> >  .../drm/i915/display/intel_display_params.c   |  6 ++---
> >  drivers/gpu/drm/i915/display/intel_psr.c      | 22 ++++++++++++++-
> > ----
> >  2 files changed, 19 insertions(+), 9 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> > b/drivers/gpu/drm/i915/display/intel_display_params.c
> > index 75316247ee8a..195af19ece5f 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> > @@ -116,9 +116,9 @@ intel_display_param_named_unsafe(enable_fbc,
> > int, 0400,
> >  	"(default: -1 (use per-chip default))");
> >  
> >  intel_display_param_named_unsafe(enable_psr, int, 0400,
> > -	"Enable PSR "
> > -	"(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
> > -	"Default: -1 (use per-chip default)");
> > +	"Enable PSR (0=disabled, 1=disable PSR2 (BIT0), 2=disable
> > Panel Replay (BIT1))."
> > +	"Values different from 0 and -1 are handled as bitmask to
> > disable different PSR modes."
> > +	"E.g. value 3 disables both PSR2 and Panel Replay.
> > Default: -1 (use per-chip default)");
> >  
> >  intel_display_param_named(psr_safest_params, bool, 0400,
> >  	"Replace PSR VBT parameters by the safest and not optimal
> > ones. This "
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index a2b5688f0c82..959b868672d0 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -254,13 +254,16 @@ static bool psr2_global_enabled(struct
> > intel_dp *intel_dp)
> >  {
> >  	struct intel_display *display =
> > to_intel_display(intel_dp);
> >  
> > +	return display->params.enable_psr == -1 ||
> > +		!(display->params.enable_psr & 0x1);
> > +}
> > +
> > +static bool sel_update_global_enabled(struct intel_dp *intel_dp)
> > +{
> >  	switch (intel_dp->psr.debug & I915_PSR_DEBUG_MODE_MASK) {
> > -	case I915_PSR_DEBUG_DISABLE:
> >  	case I915_PSR_DEBUG_FORCE_PSR1:
> >  		return false;
> >  	default:
> > -		if (display->params.enable_psr == 1)
> > -			return false;
> >  		return true;
> >  	}
> >  }
> > @@ -269,7 +272,8 @@ static bool panel_replay_global_enabled(struct
> > intel_dp *intel_dp)
> >  {
> >  	struct intel_display *display =
> > to_intel_display(intel_dp);
> >  
> > -	if ((display->params.enable_psr != -1) ||
> > +	if ((display->params.enable_psr != -1 &&
> > +	     display->params.enable_psr & 0x2) ||
> 
> I believe we should probably define the bits
> 
> #define PSR_PARAM_DISABLE_PSR2		BIT(0)
> #define PSR_PARAM_DISABLE_PANEL_REPLAY	BIT(1)
> 
> likely here in this .c file itself, not needed to be along with the
> param
> but up to you, if you believe it makes more sense and gets clear
> there...

I have done this change in version 3.

BR,

Jouni Högander

> 
> >  	    (intel_dp->psr.debug &
> > I915_PSR_DEBUG_PANEL_REPLAY_DISABLE))
> >  		return false;
> >  	return true;
> > @@ -1415,6 +1419,12 @@ static bool intel_psr2_config_valid(struct
> > intel_dp *intel_dp,
> >  	if (!intel_dp->psr.sink_psr2_support)
> >  		return false;
> >  
> > +	if (!psr2_global_enabled(intel_dp)) {
> > +		drm_dbg_kms(display->drm,
> > +			    "PSR2 disabled by flag\n");
> > +		return false;
> > +	}
> > +
> >  	/* JSL and EHL only supports eDP 1.3 */
> >  	if (display->platform.jasperlake || display-
> > >platform.elkhartlake) {
> >  		drm_dbg_kms(display->drm, "PSR2 not supported by
> > phy\n");
> > @@ -1517,7 +1527,7 @@ static bool
> > intel_sel_update_config_valid(struct intel_dp *intel_dp,
> >  		goto unsupported;
> >  	}
> >  
> > -	if (!psr2_global_enabled(intel_dp)) {
> > +	if (!sel_update_global_enabled(intel_dp)) {
> >  		drm_dbg_kms(display->drm,
> >  			    "Selective update disabled by
> > flag\n");
> >  		goto unsupported;
> > @@ -1664,7 +1674,7 @@ void intel_psr_compute_config(struct intel_dp
> > *intel_dp,
> >  	u8 active_pipes = 0;
> >  
> >  	if (!psr_global_enabled(intel_dp)) {
> > -		drm_dbg_kms(display->drm, "PSR disabled by
> > flag\n");
> > +		drm_dbg_kms(display->drm, "PSR/Panel Replay
> > disabled by flag\n");
> >  		return;
> >  	}
> >  
> > -- 
> > 2.43.0
> > 

Re: [PATCH v2 2/2] drm/i915/psr: Do not disable Panel Replay if PSR2 is disabled

[Ville Syrjälä]

On Thu, Jul 10, 2025 at 11:42:52AM -0400, Rodrigo Vivi wrote:
> On Wed, Jul 09, 2025 at 06:11:17PM +0000, Hogander, Jouni wrote:
> > On Wed, 2025-07-09 at 20:03 +0300, Ville Syrjälä wrote:
> > > On Wed, Jul 09, 2025 at 10:57:58AM +0300, Jouni Högander wrote:
> > > > Currently disabling PSR2 via enable_psr module parameter causes
> > > > Panel
> > > > Replay being disabled as well. This patch changes this by still
> > > > allowing
> > > > Panel Replay even if PSR2 is disabled.
> > > > 
> > > > After this patch enable_psr module parameter values are:
> > > > 
> > > > -1 = PSR1 : yes, PSR2 = yes, Panel Replay : yes
> > > >  0 = PSR1 : no,  PSR2 = no,  Panel Replay : no
> > > >  1 = PSR1 : yes, PSR2 = no,  Panel Replay : yes
> > > >  2 = PSR1 : yes, PSR2 = yes, Panel Replay : no
> > > >  3 = PSR1 : yes, PSR2 = no,  Panel Replay : no
> > > > 
> > > > I.e. values different than -1 and 0 are handled as bitmasks where
> > > > BIT0
> > > > disables PSR2 and BIT1 disables Panel Replay.
> > > > 
> > > > v2:
> > > >   - make it more clear that enable_psr is bitmask for disabling
> > > > different
> > > >     PSR modes
> > > > 
> > > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > > ---
> > > >  .../drm/i915/display/intel_display_params.c   |  6 ++---
> > > >  drivers/gpu/drm/i915/display/intel_psr.c      | 22 ++++++++++++++-
> > > > ----
> > > >  2 files changed, 19 insertions(+), 9 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > b/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > index 75316247ee8a..195af19ece5f 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > @@ -116,9 +116,9 @@ intel_display_param_named_unsafe(enable_fbc,
> > > > int, 0400,
> > > >  	"(default: -1 (use per-chip default))");
> > > >  
> > > >  intel_display_param_named_unsafe(enable_psr, int, 0400,
> > > > -	"Enable PSR "
> > > > -	"(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
> > > > -	"Default: -1 (use per-chip default)");
> > > > +	"Enable PSR (0=disabled, 1=disable PSR2 (BIT0), 2=disable
> > > > Panel Replay (BIT1))."
> > > > +	"Values different from 0 and -1 are handled as bitmask to
> > > > disable different PSR modes."
> > > > +	"E.g. value 3 disables both PSR2 and Panel Replay.
> > > > Default: -1 (use per-chip default)");
> > > 
> > > This thing is very unintuitive. Why don't we just get replace it
> > > with a new disable_psr modparam that is clearly just a bitmask of
> > > what to disable?
> > 
> > I was thinkinig we should keep it backward compatible. I know this
> > parameter is in use.
> 
> I agree on keeping this backward compatible.

IMO it's an unusable mess so I wouldn't bother trying to preserve it.
The only value that seems to make any sense currently is =0. If I
need to use any other value I always give up immediately and just
hack the code instead.

If we keep calling it 'enable_psr' then it should clearly be a
bitmask of things to *enable*, not things to *disable*.

> 
> Also our experience with disable_power_well shows that negative
> name in the parameter can be much more unintuitive and confusing.

That one is rather different because it doesn't "disable power wells"
but rather it "disables power well disabling". But yes, it is a very
poor name as well.

Calling it "enable_power_wells" wouldn't really help though.
It should perhaps be something more like 'dont_disable_power_wells'
or 'keep_power_wells_on'.

-- 
Ville Syrjälä
Intel

Re: [PATCH v2 2/2] drm/i915/psr: Do not disable Panel Replay if PSR2 is disabled

[Rodrigo Vivi]

On Thu, Jul 10, 2025 at 11:09:42PM +0300, Ville Syrjälä wrote:
> On Thu, Jul 10, 2025 at 11:42:52AM -0400, Rodrigo Vivi wrote:
> > On Wed, Jul 09, 2025 at 06:11:17PM +0000, Hogander, Jouni wrote:
> > > On Wed, 2025-07-09 at 20:03 +0300, Ville Syrjälä wrote:
> > > > On Wed, Jul 09, 2025 at 10:57:58AM +0300, Jouni Högander wrote:
> > > > > Currently disabling PSR2 via enable_psr module parameter causes
> > > > > Panel
> > > > > Replay being disabled as well. This patch changes this by still
> > > > > allowing
> > > > > Panel Replay even if PSR2 is disabled.
> > > > > 
> > > > > After this patch enable_psr module parameter values are:
> > > > > 
> > > > > -1 = PSR1 : yes, PSR2 = yes, Panel Replay : yes
> > > > >  0 = PSR1 : no,  PSR2 = no,  Panel Replay : no
> > > > >  1 = PSR1 : yes, PSR2 = no,  Panel Replay : yes
> > > > >  2 = PSR1 : yes, PSR2 = yes, Panel Replay : no
> > > > >  3 = PSR1 : yes, PSR2 = no,  Panel Replay : no
> > > > > 
> > > > > I.e. values different than -1 and 0 are handled as bitmasks where
> > > > > BIT0
> > > > > disables PSR2 and BIT1 disables Panel Replay.
> > > > > 
> > > > > v2:
> > > > >   - make it more clear that enable_psr is bitmask for disabling
> > > > > different
> > > > >     PSR modes
> > > > > 
> > > > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > > > ---
> > > > >  .../drm/i915/display/intel_display_params.c   |  6 ++---
> > > > >  drivers/gpu/drm/i915/display/intel_psr.c      | 22 ++++++++++++++-
> > > > > ----
> > > > >  2 files changed, 19 insertions(+), 9 deletions(-)
> > > > > 
> > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > b/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > index 75316247ee8a..195af19ece5f 100644
> > > > > --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > @@ -116,9 +116,9 @@ intel_display_param_named_unsafe(enable_fbc,
> > > > > int, 0400,
> > > > >  	"(default: -1 (use per-chip default))");
> > > > >  
> > > > >  intel_display_param_named_unsafe(enable_psr, int, 0400,
> > > > > -	"Enable PSR "
> > > > > -	"(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
> > > > > -	"Default: -1 (use per-chip default)");
> > > > > +	"Enable PSR (0=disabled, 1=disable PSR2 (BIT0), 2=disable
> > > > > Panel Replay (BIT1))."
> > > > > +	"Values different from 0 and -1 are handled as bitmask to
> > > > > disable different PSR modes."
> > > > > +	"E.g. value 3 disables both PSR2 and Panel Replay.
> > > > > Default: -1 (use per-chip default)");
> > > > 
> > > > This thing is very unintuitive. Why don't we just get replace it
> > > > with a new disable_psr modparam that is clearly just a bitmask of
> > > > what to disable?
> > > 
> > > I was thinkinig we should keep it backward compatible. I know this
> > > parameter is in use.
> > 
> > I agree on keeping this backward compatible.
> 
> IMO it's an unusable mess so I wouldn't bother trying to preserve it.
> The only value that seems to make any sense currently is =0. 

fair enough. what about simply removing all the options entirely?
enable_psr=0 keeps disabling it, otherwise enabled it. And we reduce
all the knobs option. Afterall, this should be our end goal anyway.

> If I
> need to use any other value I always give up immediately and just
> hack the code instead.

Well, the param actually exists for us to request reporters to try
different config. The devs can always modify the code.

Question now is, are all these variants useful for collecting debug
information of some sort?

If so, as long as it is documented and we can ask different values,
we should be good.

> 
> If we keep calling it 'enable_psr' then it should clearly be a
> bitmask of things to *enable*, not things to *disable*.
> 
> > 
> > Also our experience with disable_power_well shows that negative
> > name in the parameter can be much more unintuitive and confusing.
> 
> That one is rather different because it doesn't "disable power wells"
> but rather it "disables power well disabling". But yes, it is a very
> poor name as well.
> 
> Calling it "enable_power_wells" wouldn't really help though.
> It should perhaps be something more like 'dont_disable_power_wells'
> or 'keep_power_wells_on'.

okay, fair enough, disable power well is another level of complication.

back to disable_psr idea:

disable_psr=0 == enable PSR? to me this is already uninituitive anyway.
disable_psr=1 == disable PSR1?
disable_psr=2 == disable PSR2? and keep only PSR=1?

I still don't see a clean obvious intuitive way of handling it.
Perhaps what I had suggested another day:

PSR1 = BIT0
PSR2 = BIT1 (PSR2 infers PSR1 enabled)
PANEL_REPLAY = BIT2 (also infers PSR1(and 2?) enabled)

(Peraps even bit3 for early transport?)

This is backwards compatible because

0 = disabled,
1 = up to psr1,
2 = up to psr2, (no panel replay)
3 = up to psr2, (same as 2)
4 = panel replay on
...

> 
> -- 
> Ville Syrjälä
> Intel

Re: [PATCH v2 2/2] drm/i915/psr: Do not disable Panel Replay if PSR2 is disabled

[Ville Syrjälä]

On Thu, Jul 10, 2025 at 05:27:13PM -0400, Rodrigo Vivi wrote:
> On Thu, Jul 10, 2025 at 11:09:42PM +0300, Ville Syrjälä wrote:
> > On Thu, Jul 10, 2025 at 11:42:52AM -0400, Rodrigo Vivi wrote:
> > > On Wed, Jul 09, 2025 at 06:11:17PM +0000, Hogander, Jouni wrote:
> > > > On Wed, 2025-07-09 at 20:03 +0300, Ville Syrjälä wrote:
> > > > > On Wed, Jul 09, 2025 at 10:57:58AM +0300, Jouni Högander wrote:
> > > > > > Currently disabling PSR2 via enable_psr module parameter causes
> > > > > > Panel
> > > > > > Replay being disabled as well. This patch changes this by still
> > > > > > allowing
> > > > > > Panel Replay even if PSR2 is disabled.
> > > > > > 
> > > > > > After this patch enable_psr module parameter values are:
> > > > > > 
> > > > > > -1 = PSR1 : yes, PSR2 = yes, Panel Replay : yes
> > > > > >  0 = PSR1 : no,  PSR2 = no,  Panel Replay : no
> > > > > >  1 = PSR1 : yes, PSR2 = no,  Panel Replay : yes
> > > > > >  2 = PSR1 : yes, PSR2 = yes, Panel Replay : no
> > > > > >  3 = PSR1 : yes, PSR2 = no,  Panel Replay : no
> > > > > > 
> > > > > > I.e. values different than -1 and 0 are handled as bitmasks where
> > > > > > BIT0
> > > > > > disables PSR2 and BIT1 disables Panel Replay.
> > > > > > 
> > > > > > v2:
> > > > > >   - make it more clear that enable_psr is bitmask for disabling
> > > > > > different
> > > > > >     PSR modes
> > > > > > 
> > > > > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > > > > ---
> > > > > >  .../drm/i915/display/intel_display_params.c   |  6 ++---
> > > > > >  drivers/gpu/drm/i915/display/intel_psr.c      | 22 ++++++++++++++-
> > > > > > ----
> > > > > >  2 files changed, 19 insertions(+), 9 deletions(-)
> > > > > > 
> > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > > b/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > > index 75316247ee8a..195af19ece5f 100644
> > > > > > --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > > @@ -116,9 +116,9 @@ intel_display_param_named_unsafe(enable_fbc,
> > > > > > int, 0400,
> > > > > >  	"(default: -1 (use per-chip default))");
> > > > > >  
> > > > > >  intel_display_param_named_unsafe(enable_psr, int, 0400,
> > > > > > -	"Enable PSR "
> > > > > > -	"(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
> > > > > > -	"Default: -1 (use per-chip default)");
> > > > > > +	"Enable PSR (0=disabled, 1=disable PSR2 (BIT0), 2=disable
> > > > > > Panel Replay (BIT1))."
> > > > > > +	"Values different from 0 and -1 are handled as bitmask to
> > > > > > disable different PSR modes."
> > > > > > +	"E.g. value 3 disables both PSR2 and Panel Replay.
> > > > > > Default: -1 (use per-chip default)");
> > > > > 
> > > > > This thing is very unintuitive. Why don't we just get replace it
> > > > > with a new disable_psr modparam that is clearly just a bitmask of
> > > > > what to disable?
> > > > 
> > > > I was thinkinig we should keep it backward compatible. I know this
> > > > parameter is in use.
> > > 
> > > I agree on keeping this backward compatible.
> > 
> > IMO it's an unusable mess so I wouldn't bother trying to preserve it.
> > The only value that seems to make any sense currently is =0. 
> 
> fair enough. what about simply removing all the options entirely?
> enable_psr=0 keeps disabling it, otherwise enabled it. And we reduce
> all the knobs option. Afterall, this should be our end goal anyway.
> 
> > If I
> > need to use any other value I always give up immediately and just
> > hack the code instead.
> 
> Well, the param actually exists for us to request reporters to try
> different config. The devs can always modify the code.
> 
> Question now is, are all these variants useful for collecting debug
> information of some sort?
> 
> If so, as long as it is documented and we can ask different values,
> we should be good.
> 
> > 
> > If we keep calling it 'enable_psr' then it should clearly be a
> > bitmask of things to *enable*, not things to *disable*.
> > 
> > > 
> > > Also our experience with disable_power_well shows that negative
> > > name in the parameter can be much more unintuitive and confusing.
> > 
> > That one is rather different because it doesn't "disable power wells"
> > but rather it "disables power well disabling". But yes, it is a very
> > poor name as well.
> > 
> > Calling it "enable_power_wells" wouldn't really help though.
> > It should perhaps be something more like 'dont_disable_power_wells'
> > or 'keep_power_wells_on'.
> 
> okay, fair enough, disable power well is another level of complication.
> 
> back to disable_psr idea:
> 
> disable_psr=0 == enable PSR? to me this is already uninituitive anyway.
> disable_psr=1 == disable PSR1?
> disable_psr=2 == disable PSR2? and keep only PSR=1?
> 
> I still don't see a clean obvious intuitive way of handling it.
> Perhaps what I had suggested another day:
> 
> PSR1 = BIT0
> PSR2 = BIT1 (PSR2 infers PSR1 enabled)
> PANEL_REPLAY = BIT2 (also infers PSR1(and 2?) enabled)

With a bitmask I don't think inferring anything is helpful.
If the corresponding bit isn't set then don't use that
mode, period.

Another option would to have a separate named parameter
for each mode. Would be easier to understand but dunno
if we really want to add that many modparams just for this.

> (Peraps even bit3 for early transport?)
> 
> This is backwards compatible because
> 
> 0 = disabled,
> 1 = up to psr1,
> 2 = up to psr2, (no panel replay)
> 3 = up to psr2, (same as 2)
> 4 = panel replay on
> ...
> 
> > 
> > -- 
> > Ville Syrjälä
> > Intel

-- 
Ville Syrjälä
Intel

Re: [PATCH v2 2/2] drm/i915/psr: Do not disable Panel Replay if PSR2 is disabled

[Hogander, Jouni]

On Thu, 2025-07-10 at 23:09 +0300, Ville Syrjälä wrote:
> On Thu, Jul 10, 2025 at 11:42:52AM -0400, Rodrigo Vivi wrote:
> > On Wed, Jul 09, 2025 at 06:11:17PM +0000, Hogander, Jouni wrote:
> > > On Wed, 2025-07-09 at 20:03 +0300, Ville Syrjälä wrote:
> > > > On Wed, Jul 09, 2025 at 10:57:58AM +0300, Jouni Högander wrote:
> > > > > Currently disabling PSR2 via enable_psr module parameter
> > > > > causes
> > > > > Panel
> > > > > Replay being disabled as well. This patch changes this by
> > > > > still
> > > > > allowing
> > > > > Panel Replay even if PSR2 is disabled.
> > > > > 
> > > > > After this patch enable_psr module parameter values are:
> > > > > 
> > > > > -1 = PSR1 : yes, PSR2 = yes, Panel Replay : yes
> > > > >  0 = PSR1 : no,  PSR2 = no,  Panel Replay : no
> > > > >  1 = PSR1 : yes, PSR2 = no,  Panel Replay : yes
> > > > >  2 = PSR1 : yes, PSR2 = yes, Panel Replay : no
> > > > >  3 = PSR1 : yes, PSR2 = no,  Panel Replay : no
> > > > > 
> > > > > I.e. values different than -1 and 0 are handled as bitmasks
> > > > > where
> > > > > BIT0
> > > > > disables PSR2 and BIT1 disables Panel Replay.
> > > > > 
> > > > > v2:
> > > > >   - make it more clear that enable_psr is bitmask for
> > > > > disabling
> > > > > different
> > > > >     PSR modes
> > > > > 
> > > > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > > > ---
> > > > >  .../drm/i915/display/intel_display_params.c   |  6 ++---
> > > > >  drivers/gpu/drm/i915/display/intel_psr.c      | 22
> > > > > ++++++++++++++-
> > > > > ----
> > > > >  2 files changed, 19 insertions(+), 9 deletions(-)
> > > > > 
> > > > > diff --git
> > > > > a/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > b/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > index 75316247ee8a..195af19ece5f 100644
> > > > > --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > @@ -116,9 +116,9 @@
> > > > > intel_display_param_named_unsafe(enable_fbc,
> > > > > int, 0400,
> > > > >  	"(default: -1 (use per-chip default))");
> > > > >  
> > > > >  intel_display_param_named_unsafe(enable_psr, int, 0400,
> > > > > -	"Enable PSR "
> > > > > -	"(0=disabled, 1=enable up to PSR1, 2=enable up to
> > > > > PSR2) "
> > > > > -	"Default: -1 (use per-chip default)");
> > > > > +	"Enable PSR (0=disabled, 1=disable PSR2 (BIT0),
> > > > > 2=disable
> > > > > Panel Replay (BIT1))."
> > > > > +	"Values different from 0 and -1 are handled as
> > > > > bitmask to
> > > > > disable different PSR modes."
> > > > > +	"E.g. value 3 disables both PSR2 and Panel Replay.
> > > > > Default: -1 (use per-chip default)");
> > > > 
> > > > This thing is very unintuitive. Why don't we just get replace
> > > > it
> > > > with a new disable_psr modparam that is clearly just a bitmask
> > > > of
> > > > what to disable?
> > > 
> > > I was thinkinig we should keep it backward compatible. I know
> > > this
> > > parameter is in use.
> > 
> > I agree on keeping this backward compatible.
> 
> IMO it's an unusable mess so I wouldn't bother trying to preserve it.
> The only value that seems to make any sense currently is =0. If I
> need to use any other value I always give up immediately and just
> hack the code instead.

It's unintuitive but not unusable. I have instructed several times bug
reporter to set it to 0/1 to bisect if it's PSR2 problem. We have also
customers using this to disable PSR modes they don't want. As we have
provided this at some point I wouldn't drop it now.

> 
> If we keep calling it 'enable_psr' then it should clearly be a
> bitmask of things to *enable*, not things to *disable*.

Ok, it seems I need inverse the logic to enable rather than disable. I
will do that.

BR,

Jouni Högander

> 
> > 
> > Also our experience with disable_power_well shows that negative
> > name in the parameter can be much more unintuitive and confusing.
> 
> That one is rather different because it doesn't "disable power wells"
> but rather it "disables power well disabling". But yes, it is a very
> poor name as well.
> 
> Calling it "enable_power_wells" wouldn't really help though.
> It should perhaps be something more like 'dont_disable_power_wells'
> or 'keep_power_wells_on'.
> 

Re: [PATCH v2 2/2] drm/i915/psr: Do not disable Panel Replay if PSR2 is disabled

[Hogander, Jouni]

On Thu, 2025-07-10 at 17:27 -0400, Rodrigo Vivi wrote:
> On Thu, Jul 10, 2025 at 11:09:42PM +0300, Ville Syrjälä wrote:
> > On Thu, Jul 10, 2025 at 11:42:52AM -0400, Rodrigo Vivi wrote:
> > > On Wed, Jul 09, 2025 at 06:11:17PM +0000, Hogander, Jouni wrote:
> > > > On Wed, 2025-07-09 at 20:03 +0300, Ville Syrjälä wrote:
> > > > > On Wed, Jul 09, 2025 at 10:57:58AM +0300, Jouni Högander
> > > > > wrote:
> > > > > > Currently disabling PSR2 via enable_psr module parameter
> > > > > > causes
> > > > > > Panel
> > > > > > Replay being disabled as well. This patch changes this by
> > > > > > still
> > > > > > allowing
> > > > > > Panel Replay even if PSR2 is disabled.
> > > > > > 
> > > > > > After this patch enable_psr module parameter values are:
> > > > > > 
> > > > > > -1 = PSR1 : yes, PSR2 = yes, Panel Replay : yes
> > > > > >  0 = PSR1 : no,  PSR2 = no,  Panel Replay : no
> > > > > >  1 = PSR1 : yes, PSR2 = no,  Panel Replay : yes
> > > > > >  2 = PSR1 : yes, PSR2 = yes, Panel Replay : no
> > > > > >  3 = PSR1 : yes, PSR2 = no,  Panel Replay : no
> > > > > > 
> > > > > > I.e. values different than -1 and 0 are handled as bitmasks
> > > > > > where
> > > > > > BIT0
> > > > > > disables PSR2 and BIT1 disables Panel Replay.
> > > > > > 
> > > > > > v2:
> > > > > >   - make it more clear that enable_psr is bitmask for
> > > > > > disabling
> > > > > > different
> > > > > >     PSR modes
> > > > > > 
> > > > > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > > > > ---
> > > > > >  .../drm/i915/display/intel_display_params.c   |  6 ++---
> > > > > >  drivers/gpu/drm/i915/display/intel_psr.c      | 22
> > > > > > ++++++++++++++-
> > > > > > ----
> > > > > >  2 files changed, 19 insertions(+), 9 deletions(-)
> > > > > > 
> > > > > > diff --git
> > > > > > a/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > > b/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > > index 75316247ee8a..195af19ece5f 100644
> > > > > > --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > > @@ -116,9 +116,9 @@
> > > > > > intel_display_param_named_unsafe(enable_fbc,
> > > > > > int, 0400,
> > > > > >  	"(default: -1 (use per-chip default))");
> > > > > >  
> > > > > >  intel_display_param_named_unsafe(enable_psr, int, 0400,
> > > > > > -	"Enable PSR "
> > > > > > -	"(0=disabled, 1=enable up to PSR1, 2=enable up to
> > > > > > PSR2) "
> > > > > > -	"Default: -1 (use per-chip default)");
> > > > > > +	"Enable PSR (0=disabled, 1=disable PSR2 (BIT0),
> > > > > > 2=disable
> > > > > > Panel Replay (BIT1))."
> > > > > > +	"Values different from 0 and -1 are handled as
> > > > > > bitmask to
> > > > > > disable different PSR modes."
> > > > > > +	"E.g. value 3 disables both PSR2 and Panel Replay.
> > > > > > Default: -1 (use per-chip default)");
> > > > > 
> > > > > This thing is very unintuitive. Why don't we just get replace
> > > > > it
> > > > > with a new disable_psr modparam that is clearly just a
> > > > > bitmask of
> > > > > what to disable?
> > > > 
> > > > I was thinkinig we should keep it backward compatible. I know
> > > > this
> > > > parameter is in use.
> > > 
> > > I agree on keeping this backward compatible.
> > 
> > IMO it's an unusable mess so I wouldn't bother trying to preserve
> > it.
> > The only value that seems to make any sense currently is =0. 
> 
> fair enough. what about simply removing all the options entirely?
> enable_psr=0 keeps disabling it, otherwise enabled it. And we reduce
> all the knobs option. Afterall, this should be our end goal anyway.
> 
> > If I
> > need to use any other value I always give up immediately and just
> > hack the code instead.
> 
> Well, the param actually exists for us to request reporters to try
> different config. The devs can always modify the code.

No. This not just for us. This is currently used specifically to
disable PSR2 completely on certain setups.

> 
> Question now is, are all these variants useful for collecting debug
> information of some sort?
> 
> If so, as long as it is documented and we can ask different values,
> we should be good.

Yes, I agree on this. I know this is unintuitive, but when you know the
value to use you can achieve what you need.

> 
> > 
> > If we keep calling it 'enable_psr' then it should clearly be a
> > bitmask of things to *enable*, not things to *disable*.
> > 
> > > 
> > > Also our experience with disable_power_well shows that negative
> > > name in the parameter can be much more unintuitive and confusing.
> > 
> > That one is rather different because it doesn't "disable power
> > wells"
> > but rather it "disables power well disabling". But yes, it is a
> > very
> > poor name as well.
> > 
> > Calling it "enable_power_wells" wouldn't really help though.
> > It should perhaps be something more like 'dont_disable_power_wells'
> > or 'keep_power_wells_on'.
> 
> okay, fair enough, disable power well is another level of
> complication.
> 
> back to disable_psr idea:
> 
> disable_psr=0 == enable PSR? to me this is already uninituitive
> anyway.
> disable_psr=1 == disable PSR1?
> disable_psr=2 == disable PSR2? and keep only PSR=1?
> 
> I still don't see a clean obvious intuitive way of handling it.

If the parameter would be used only by us to bisect some PSR problem
this would be ok. Now as we already have lots of users having
*.enable_psr=1 fed by the booloader to kernel I wouldn't change it.

> Perhaps what I had suggested another day:
> 
> PSR1 = BIT0
> PSR2 = BIT1 (PSR2 infers PSR1 enabled)
> PANEL_REPLAY = BIT2 (also infers PSR1(and 2?) enabled)
> 
> (Peraps even bit3 for early transport?)
> 
> This is backwards compatible because
> 
> 0 = disabled,
> 1 = up to psr1,
> 2 = up to psr2, (no panel replay)
> 3 = up to psr2, (same as 2)
> 4 = panel replay on
> ...

BR,
Jouni Högander

> 
> > 
> > -- 
> > Ville Syrjälä
> > Intel

Re: [PATCH v2 2/2] drm/i915/psr: Do not disable Panel Replay if PSR2 is disabled

[Hogander, Jouni]

On Fri, 2025-07-11 at 02:11 +0300, Ville Syrjälä wrote:
> On Thu, Jul 10, 2025 at 05:27:13PM -0400, Rodrigo Vivi wrote:
> > On Thu, Jul 10, 2025 at 11:09:42PM +0300, Ville Syrjälä wrote:
> > > On Thu, Jul 10, 2025 at 11:42:52AM -0400, Rodrigo Vivi wrote:
> > > > On Wed, Jul 09, 2025 at 06:11:17PM +0000, Hogander, Jouni
> > > > wrote:
> > > > > On Wed, 2025-07-09 at 20:03 +0300, Ville Syrjälä wrote:
> > > > > > On Wed, Jul 09, 2025 at 10:57:58AM +0300, Jouni Högander
> > > > > > wrote:
> > > > > > > Currently disabling PSR2 via enable_psr module parameter
> > > > > > > causes
> > > > > > > Panel
> > > > > > > Replay being disabled as well. This patch changes this by
> > > > > > > still
> > > > > > > allowing
> > > > > > > Panel Replay even if PSR2 is disabled.
> > > > > > > 
> > > > > > > After this patch enable_psr module parameter values are:
> > > > > > > 
> > > > > > > -1 = PSR1 : yes, PSR2 = yes, Panel Replay : yes
> > > > > > >  0 = PSR1 : no,  PSR2 = no,  Panel Replay : no
> > > > > > >  1 = PSR1 : yes, PSR2 = no,  Panel Replay : yes
> > > > > > >  2 = PSR1 : yes, PSR2 = yes, Panel Replay : no
> > > > > > >  3 = PSR1 : yes, PSR2 = no,  Panel Replay : no
> > > > > > > 
> > > > > > > I.e. values different than -1 and 0 are handled as
> > > > > > > bitmasks where
> > > > > > > BIT0
> > > > > > > disables PSR2 and BIT1 disables Panel Replay.
> > > > > > > 
> > > > > > > v2:
> > > > > > >   - make it more clear that enable_psr is bitmask for
> > > > > > > disabling
> > > > > > > different
> > > > > > >     PSR modes
> > > > > > > 
> > > > > > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > > > > > ---
> > > > > > >  .../drm/i915/display/intel_display_params.c   |  6 ++---
> > > > > > >  drivers/gpu/drm/i915/display/intel_psr.c      | 22
> > > > > > > ++++++++++++++-
> > > > > > > ----
> > > > > > >  2 files changed, 19 insertions(+), 9 deletions(-)
> > > > > > > 
> > > > > > > diff --git
> > > > > > > a/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > > > b/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > > > index 75316247ee8a..195af19ece5f 100644
> > > > > > > --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > > > @@ -116,9 +116,9 @@
> > > > > > > intel_display_param_named_unsafe(enable_fbc,
> > > > > > > int, 0400,
> > > > > > >  	"(default: -1 (use per-chip default))");
> > > > > > >  
> > > > > > >  intel_display_param_named_unsafe(enable_psr, int, 0400,
> > > > > > > -	"Enable PSR "
> > > > > > > -	"(0=disabled, 1=enable up to PSR1, 2=enable up
> > > > > > > to PSR2) "
> > > > > > > -	"Default: -1 (use per-chip default)");
> > > > > > > +	"Enable PSR (0=disabled, 1=disable PSR2 (BIT0),
> > > > > > > 2=disable
> > > > > > > Panel Replay (BIT1))."
> > > > > > > +	"Values different from 0 and -1 are handled as
> > > > > > > bitmask to
> > > > > > > disable different PSR modes."
> > > > > > > +	"E.g. value 3 disables both PSR2 and Panel
> > > > > > > Replay.
> > > > > > > Default: -1 (use per-chip default)");
> > > > > > 
> > > > > > This thing is very unintuitive. Why don't we just get
> > > > > > replace it
> > > > > > with a new disable_psr modparam that is clearly just a
> > > > > > bitmask of
> > > > > > what to disable?
> > > > > 
> > > > > I was thinkinig we should keep it backward compatible. I know
> > > > > this
> > > > > parameter is in use.
> > > > 
> > > > I agree on keeping this backward compatible.
> > > 
> > > IMO it's an unusable mess so I wouldn't bother trying to preserve
> > > it.
> > > The only value that seems to make any sense currently is =0. 
> > 
> > fair enough. what about simply removing all the options entirely?
> > enable_psr=0 keeps disabling it, otherwise enabled it. And we
> > reduce
> > all the knobs option. Afterall, this should be our end goal anyway.
> > 
> > > If I
> > > need to use any other value I always give up immediately and just
> > > hack the code instead.
> > 
> > Well, the param actually exists for us to request reporters to try
> > different config. The devs can always modify the code.
> > 
> > Question now is, are all these variants useful for collecting debug
> > information of some sort?
> > 
> > If so, as long as it is documented and we can ask different values,
> > we should be good.
> > 
> > > 
> > > If we keep calling it 'enable_psr' then it should clearly be a
> > > bitmask of things to *enable*, not things to *disable*.
> > > 
> > > > 
> > > > Also our experience with disable_power_well shows that negative
> > > > name in the parameter can be much more unintuitive and
> > > > confusing.
> > > 
> > > That one is rather different because it doesn't "disable power
> > > wells"
> > > but rather it "disables power well disabling". But yes, it is a
> > > very
> > > poor name as well.
> > > 
> > > Calling it "enable_power_wells" wouldn't really help though.
> > > It should perhaps be something more like
> > > 'dont_disable_power_wells'
> > > or 'keep_power_wells_on'.
> > 
> > okay, fair enough, disable power well is another level of
> > complication.
> > 
> > back to disable_psr idea:
> > 
> > disable_psr=0 == enable PSR? to me this is already uninituitive
> > anyway.
> > disable_psr=1 == disable PSR1?
> > disable_psr=2 == disable PSR2? and keep only PSR=1?
> > 
> > I still don't see a clean obvious intuitive way of handling it.
> > Perhaps what I had suggested another day:
> > 
> > PSR1 = BIT0
> > PSR2 = BIT1 (PSR2 infers PSR1 enabled)
> > PANEL_REPLAY = BIT2 (also infers PSR1(and 2?) enabled)
> 
> With a bitmask I don't think inferring anything is helpful.
> If the corresponding bit isn't set then don't use that
> mode, period.
> 
> Another option would to have a separate named parameter
> for each mode. Would be easier to understand but dunno
> if we really want to add that many modparams just for this.

I'm now thinking adding enable_panel_replay would make most sense:

-1 : Enable chip default (Default)
 0 : Disable
 1 : Enable PR full frame update

Keep enable_psr as it is and remove all bindings to Panel Replay from
there. What do you think?

BR,

Jouni Högander

> 
> > (Peraps even bit3 for early transport?)
> > 
> > This is backwards compatible because
> > 
> > 0 = disabled,
> > 1 = up to psr1,
> > 2 = up to psr2, (no panel replay)
> > 3 = up to psr2, (same as 2)
> > 4 = panel replay on
> > ...
> > 
> > > 
> > > -- 
> > > Ville Syrjälä
> > > Intel
> 

Re: [PATCH v2 2/2] drm/i915/psr: Do not disable Panel Replay if PSR2 is disabled

[Rodrigo Vivi]

On Fri, Jul 11, 2025 at 10:33:58AM +0000, Hogander, Jouni wrote:
> On Fri, 2025-07-11 at 02:11 +0300, Ville Syrjälä wrote:
> > On Thu, Jul 10, 2025 at 05:27:13PM -0400, Rodrigo Vivi wrote:
> > > On Thu, Jul 10, 2025 at 11:09:42PM +0300, Ville Syrjälä wrote:
> > > > On Thu, Jul 10, 2025 at 11:42:52AM -0400, Rodrigo Vivi wrote:
> > > > > On Wed, Jul 09, 2025 at 06:11:17PM +0000, Hogander, Jouni
> > > > > wrote:
> > > > > > On Wed, 2025-07-09 at 20:03 +0300, Ville Syrjälä wrote:
> > > > > > > On Wed, Jul 09, 2025 at 10:57:58AM +0300, Jouni Högander
> > > > > > > wrote:
> > > > > > > > Currently disabling PSR2 via enable_psr module parameter
> > > > > > > > causes
> > > > > > > > Panel
> > > > > > > > Replay being disabled as well. This patch changes this by
> > > > > > > > still
> > > > > > > > allowing
> > > > > > > > Panel Replay even if PSR2 is disabled.
> > > > > > > > 
> > > > > > > > After this patch enable_psr module parameter values are:
> > > > > > > > 
> > > > > > > > -1 = PSR1 : yes, PSR2 = yes, Panel Replay : yes
> > > > > > > >  0 = PSR1 : no,  PSR2 = no,  Panel Replay : no
> > > > > > > >  1 = PSR1 : yes, PSR2 = no,  Panel Replay : yes
> > > > > > > >  2 = PSR1 : yes, PSR2 = yes, Panel Replay : no
> > > > > > > >  3 = PSR1 : yes, PSR2 = no,  Panel Replay : no
> > > > > > > > 
> > > > > > > > I.e. values different than -1 and 0 are handled as
> > > > > > > > bitmasks where
> > > > > > > > BIT0
> > > > > > > > disables PSR2 and BIT1 disables Panel Replay.
> > > > > > > > 
> > > > > > > > v2:
> > > > > > > >   - make it more clear that enable_psr is bitmask for
> > > > > > > > disabling
> > > > > > > > different
> > > > > > > >     PSR modes
> > > > > > > > 
> > > > > > > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > > > > > > ---
> > > > > > > >  .../drm/i915/display/intel_display_params.c   |  6 ++---
> > > > > > > >  drivers/gpu/drm/i915/display/intel_psr.c      | 22
> > > > > > > > ++++++++++++++-
> > > > > > > > ----
> > > > > > > >  2 files changed, 19 insertions(+), 9 deletions(-)
> > > > > > > > 
> > > > > > > > diff --git
> > > > > > > > a/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > > > > b/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > > > > index 75316247ee8a..195af19ece5f 100644
> > > > > > > > --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > > > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > > > > @@ -116,9 +116,9 @@
> > > > > > > > intel_display_param_named_unsafe(enable_fbc,
> > > > > > > > int, 0400,
> > > > > > > >  	"(default: -1 (use per-chip default))");
> > > > > > > >  
> > > > > > > >  intel_display_param_named_unsafe(enable_psr, int, 0400,
> > > > > > > > -	"Enable PSR "
> > > > > > > > -	"(0=disabled, 1=enable up to PSR1, 2=enable up
> > > > > > > > to PSR2) "
> > > > > > > > -	"Default: -1 (use per-chip default)");
> > > > > > > > +	"Enable PSR (0=disabled, 1=disable PSR2 (BIT0),
> > > > > > > > 2=disable
> > > > > > > > Panel Replay (BIT1))."
> > > > > > > > +	"Values different from 0 and -1 are handled as
> > > > > > > > bitmask to
> > > > > > > > disable different PSR modes."
> > > > > > > > +	"E.g. value 3 disables both PSR2 and Panel
> > > > > > > > Replay.
> > > > > > > > Default: -1 (use per-chip default)");
> > > > > > > 
> > > > > > > This thing is very unintuitive. Why don't we just get
> > > > > > > replace it
> > > > > > > with a new disable_psr modparam that is clearly just a
> > > > > > > bitmask of
> > > > > > > what to disable?
> > > > > > 
> > > > > > I was thinkinig we should keep it backward compatible. I know
> > > > > > this
> > > > > > parameter is in use.
> > > > > 
> > > > > I agree on keeping this backward compatible.
> > > > 
> > > > IMO it's an unusable mess so I wouldn't bother trying to preserve
> > > > it.
> > > > The only value that seems to make any sense currently is =0. 
> > > 
> > > fair enough. what about simply removing all the options entirely?
> > > enable_psr=0 keeps disabling it, otherwise enabled it. And we
> > > reduce
> > > all the knobs option. Afterall, this should be our end goal anyway.
> > > 
> > > > If I
> > > > need to use any other value I always give up immediately and just
> > > > hack the code instead.
> > > 
> > > Well, the param actually exists for us to request reporters to try
> > > different config. The devs can always modify the code.
> > > 
> > > Question now is, are all these variants useful for collecting debug
> > > information of some sort?
> > > 
> > > If so, as long as it is documented and we can ask different values,
> > > we should be good.
> > > 
> > > > 
> > > > If we keep calling it 'enable_psr' then it should clearly be a
> > > > bitmask of things to *enable*, not things to *disable*.
> > > > 
> > > > > 
> > > > > Also our experience with disable_power_well shows that negative
> > > > > name in the parameter can be much more unintuitive and
> > > > > confusing.
> > > > 
> > > > That one is rather different because it doesn't "disable power
> > > > wells"
> > > > but rather it "disables power well disabling". But yes, it is a
> > > > very
> > > > poor name as well.
> > > > 
> > > > Calling it "enable_power_wells" wouldn't really help though.
> > > > It should perhaps be something more like
> > > > 'dont_disable_power_wells'
> > > > or 'keep_power_wells_on'.
> > > 
> > > okay, fair enough, disable power well is another level of
> > > complication.
> > > 
> > > back to disable_psr idea:
> > > 
> > > disable_psr=0 == enable PSR? to me this is already uninituitive
> > > anyway.
> > > disable_psr=1 == disable PSR1?
> > > disable_psr=2 == disable PSR2? and keep only PSR=1?
> > > 
> > > I still don't see a clean obvious intuitive way of handling it.
> > > Perhaps what I had suggested another day:
> > > 
> > > PSR1 = BIT0
> > > PSR2 = BIT1 (PSR2 infers PSR1 enabled)
> > > PANEL_REPLAY = BIT2 (also infers PSR1(and 2?) enabled)
> > 
> > With a bitmask I don't think inferring anything is helpful.
> > If the corresponding bit isn't set then don't use that
> > mode, period.
> > 
> > Another option would to have a separate named parameter
> > for each mode. Would be easier to understand but dunno
> > if we really want to add that many modparams just for this.
> 
> I'm now thinking adding enable_panel_replay would make most sense:
> 
> -1 : Enable chip default (Default)
>  0 : Disable
>  1 : Enable PR full frame update
> 
> Keep enable_psr as it is and remove all bindings to Panel Replay from
> there. What do you think?

yeap, perhaps it is the easiest and more intuintive way...

> 
> BR,
> 
> Jouni Högander
> 
> > 
> > > (Peraps even bit3 for early transport?)
> > > 
> > > This is backwards compatible because
> > > 
> > > 0 = disabled,
> > > 1 = up to psr1,
> > > 2 = up to psr2, (no panel replay)
> > > 3 = up to psr2, (same as 2)
> > > 4 = panel replay on
> > > ...
> > > 
> > > > 
> > > > -- 
> > > > Ville Syrjälä
> > > > Intel
> > 
>