* [PATCH] drm/xe/pcode: Initialize data0 for pcode read routine
@ 2025-08-08 15:36 stuartsummers
2025-08-08 16:38 ` Cavitt, Jonathan
2025-08-10 9:26 ` Raag Jadav
0 siblings, 2 replies; 14+ messages in thread
From: stuartsummers @ 2025-08-08 15:36 UTC (permalink / raw)
Cc: intel-xe, raag.jadav, stuartsummers
There are two registered filled in when reading data from
pcode besides the mailbox itself. Currently we allow a NULL
value for the second of these two (data1) and assume the first
is defined. However many of the routines that are calling
this function assume that pcode will ignore the value being
passed in and so leave that first value (data0) defined but
uninitialized. To be safe, make sure this value is always
initialized to something (0 generally) in the event pcode
behavior changes and starts using this value.
Signed-off-by: stuartsummers <stuart.summers@intel.com>
---
drivers/gpu/drm/xe/xe_device_sysfs.c | 8 ++++----
drivers/gpu/drm/xe/xe_hwmon.c | 8 ++++----
drivers/gpu/drm/xe/xe_vram_freq.c | 4 ++--
3 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_device_sysfs.c b/drivers/gpu/drm/xe/xe_device_sysfs.c
index bd9015761aa0..6ee422594b56 100644
--- a/drivers/gpu/drm/xe/xe_device_sysfs.c
+++ b/drivers/gpu/drm/xe/xe_device_sysfs.c
@@ -76,7 +76,7 @@ lb_fan_control_version_show(struct device *dev, struct device_attribute *attr, c
{
struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
struct xe_tile *root = xe_device_get_root_tile(xe);
- u32 cap, ver_low = FAN_TABLE, ver_high = FAN_TABLE;
+ u32 cap = 0, ver_low = FAN_TABLE, ver_high = FAN_TABLE;
u16 major = 0, minor = 0, hotfix = 0, build = 0;
int ret;
@@ -115,7 +115,7 @@ lb_voltage_regulator_version_show(struct device *dev, struct device_attribute *a
{
struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
struct xe_tile *root = xe_device_get_root_tile(xe);
- u32 cap, ver_low = VR_CONFIG, ver_high = VR_CONFIG;
+ u32 cap = 0, ver_low = VR_CONFIG, ver_high = VR_CONFIG;
u16 major = 0, minor = 0, hotfix = 0, build = 0;
int ret;
@@ -153,7 +153,7 @@ static int late_bind_create_files(struct device *dev)
{
struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
struct xe_tile *root = xe_device_get_root_tile(xe);
- u32 cap;
+ u32 cap = 0;
int ret;
xe_pm_runtime_get(xe);
@@ -186,7 +186,7 @@ static void late_bind_remove_files(struct device *dev)
{
struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
struct xe_tile *root = xe_device_get_root_tile(xe);
- u32 cap;
+ u32 cap = 0;
int ret;
xe_pm_runtime_get(xe);
diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index f08fc4377d25..17a324e9de82 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -179,7 +179,7 @@ static int xe_hwmon_pcode_rmw_power_limit(const struct xe_hwmon *hwmon, u32 attr
u32 clr, u32 set)
{
struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
- u32 val0, val1;
+ u32 val0 = 0, val1 = 0;
int ret = 0;
ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_POWER_SETUP,
@@ -719,7 +719,7 @@ static int xe_hwmon_power_curr_crit_read(struct xe_hwmon *hwmon, int channel,
long *value, u32 scale_factor)
{
int ret;
- u32 uval;
+ u32 uval = 0;
mutex_lock(&hwmon->hwmon_lock);
@@ -889,7 +889,7 @@ xe_hwmon_power_write(struct xe_hwmon *hwmon, u32 attr, int channel, long val)
static umode_t
xe_hwmon_curr_is_visible(const struct xe_hwmon *hwmon, u32 attr, int channel)
{
- u32 uval;
+ u32 uval = 0;
/* hwmon sysfs attribute of current available only for package */
if (channel != CHANNEL_PKG)
@@ -991,7 +991,7 @@ xe_hwmon_energy_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
static umode_t
xe_hwmon_fan_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
{
- u32 uval;
+ u32 uval = 0;
if (!hwmon->xe->info.has_fan_control)
return 0;
diff --git a/drivers/gpu/drm/xe/xe_vram_freq.c b/drivers/gpu/drm/xe/xe_vram_freq.c
index b26e26d73dae..17bc84da4cdc 100644
--- a/drivers/gpu/drm/xe/xe_vram_freq.c
+++ b/drivers/gpu/drm/xe/xe_vram_freq.c
@@ -34,7 +34,7 @@ static ssize_t max_freq_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct xe_tile *tile = dev_to_tile(dev);
- u32 val, mbox;
+ u32 val = 0, mbox;
int err;
mbox = REG_FIELD_PREP(PCODE_MB_COMMAND, PCODE_FREQUENCY_CONFIG)
@@ -56,7 +56,7 @@ static ssize_t min_freq_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct xe_tile *tile = dev_to_tile(dev);
- u32 val, mbox;
+ u32 val = 0, mbox;
int err;
mbox = REG_FIELD_PREP(PCODE_MB_COMMAND, PCODE_FREQUENCY_CONFIG)
--
2.34.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* RE: [PATCH] drm/xe/pcode: Initialize data0 for pcode read routine
2025-08-08 15:36 stuartsummers
@ 2025-08-08 16:38 ` Cavitt, Jonathan
2025-08-08 17:01 ` Summers, Stuart
2025-08-10 9:26 ` Raag Jadav
1 sibling, 1 reply; 14+ messages in thread
From: Cavitt, Jonathan @ 2025-08-08 16:38 UTC (permalink / raw)
To: Summers, Stuart
Cc: intel-xe@lists.freedesktop.org, Jadav, Raag, Summers, Stuart,
Cavitt, Jonathan
-----Original Message-----
From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of stuartsummers
Sent: Friday, August 8, 2025 8:37 AM
Cc: intel-xe@lists.freedesktop.org; Jadav, Raag <raag.jadav@intel.com>; Summers, Stuart <stuart.summers@intel.com>
Subject: [PATCH] drm/xe/pcode: Initialize data0 for pcode read routine
>
> There are two registered filled in when reading data from
> pcode besides the mailbox itself. Currently we allow a NULL
> value for the second of these two (data1) and assume the first
> is defined. However many of the routines that are calling
> this function assume that pcode will ignore the value being
> passed in and so leave that first value (data0) defined but
> uninitialized. To be safe, make sure this value is always
> initialized to something (0 generally) in the event pcode
> behavior changes and starts using this value.
>
> Signed-off-by: stuartsummers <stuart.summers@intel.com>
s/registered/registers
Debatably, you should also add commas after 'Currently' and
'However', but that's just a semantic nit-pick, and is basically
just splitting hairs at that point. We're writing patches, after
all, not college papers...
---
Aside:
It looks like this patch is initializing some previously uninitialized variables to zero
as a guard against them not being set during xe_pcode_read. This is a necessary
fix in the event we have the xe info skip_pcode flag set (as that causes the pcode
reading function to return a success without actually doing anything). But in every
other case, I'm failing to see how the guards we currently have in place (namely,
checking the return value and aborting the function if the read fails) aren't sufficient
to prevent us from using an uninitialized variable in the case of a read failure. And
if it's to guard against a future where the read function needs extra data, I think I'd
rather we just create a new variable to store that extra data, rather than coopting
the data0 write location for that purpose.
Of course, the skip_pcode case is sufficient enough to warrant this change by itself,
so I'm not going to block this. The skip_pcode flag is set to TRUE by default for SRIOV
VF platforms, so I'm surprised breakages haven't been detected sooner given the
uninitialized variables are quite liable to contain garbage data under some (or most)
common kernel compiler configurations.
An explanation would be nice, but it's not necessary. I mostly give these asides
as proof that I actually read the patch, rather than as blocking queries, so you
can take my reviewed-by without any strings attached. The grammar fixes can
be applied at merge time.
Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
-Jonathan Cavitt
> ---
> drivers/gpu/drm/xe/xe_device_sysfs.c | 8 ++++----
> drivers/gpu/drm/xe/xe_hwmon.c | 8 ++++----
> drivers/gpu/drm/xe/xe_vram_freq.c | 4 ++--
> 3 files changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_device_sysfs.c b/drivers/gpu/drm/xe/xe_device_sysfs.c
> index bd9015761aa0..6ee422594b56 100644
> --- a/drivers/gpu/drm/xe/xe_device_sysfs.c
> +++ b/drivers/gpu/drm/xe/xe_device_sysfs.c
> @@ -76,7 +76,7 @@ lb_fan_control_version_show(struct device *dev, struct device_attribute *attr, c
> {
> struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
> struct xe_tile *root = xe_device_get_root_tile(xe);
> - u32 cap, ver_low = FAN_TABLE, ver_high = FAN_TABLE;
> + u32 cap = 0, ver_low = FAN_TABLE, ver_high = FAN_TABLE;
> u16 major = 0, minor = 0, hotfix = 0, build = 0;
> int ret;
>
> @@ -115,7 +115,7 @@ lb_voltage_regulator_version_show(struct device *dev, struct device_attribute *a
> {
> struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
> struct xe_tile *root = xe_device_get_root_tile(xe);
> - u32 cap, ver_low = VR_CONFIG, ver_high = VR_CONFIG;
> + u32 cap = 0, ver_low = VR_CONFIG, ver_high = VR_CONFIG;
> u16 major = 0, minor = 0, hotfix = 0, build = 0;
> int ret;
>
> @@ -153,7 +153,7 @@ static int late_bind_create_files(struct device *dev)
> {
> struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
> struct xe_tile *root = xe_device_get_root_tile(xe);
> - u32 cap;
> + u32 cap = 0;
> int ret;
>
> xe_pm_runtime_get(xe);
> @@ -186,7 +186,7 @@ static void late_bind_remove_files(struct device *dev)
> {
> struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
> struct xe_tile *root = xe_device_get_root_tile(xe);
> - u32 cap;
> + u32 cap = 0;
> int ret;
>
> xe_pm_runtime_get(xe);
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index f08fc4377d25..17a324e9de82 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -179,7 +179,7 @@ static int xe_hwmon_pcode_rmw_power_limit(const struct xe_hwmon *hwmon, u32 attr
> u32 clr, u32 set)
> {
> struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
> - u32 val0, val1;
> + u32 val0 = 0, val1 = 0;
> int ret = 0;
>
> ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_POWER_SETUP,
> @@ -719,7 +719,7 @@ static int xe_hwmon_power_curr_crit_read(struct xe_hwmon *hwmon, int channel,
> long *value, u32 scale_factor)
> {
> int ret;
> - u32 uval;
> + u32 uval = 0;
>
> mutex_lock(&hwmon->hwmon_lock);
>
> @@ -889,7 +889,7 @@ xe_hwmon_power_write(struct xe_hwmon *hwmon, u32 attr, int channel, long val)
> static umode_t
> xe_hwmon_curr_is_visible(const struct xe_hwmon *hwmon, u32 attr, int channel)
> {
> - u32 uval;
> + u32 uval = 0;
>
> /* hwmon sysfs attribute of current available only for package */
> if (channel != CHANNEL_PKG)
> @@ -991,7 +991,7 @@ xe_hwmon_energy_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
> static umode_t
> xe_hwmon_fan_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
> {
> - u32 uval;
> + u32 uval = 0;
>
> if (!hwmon->xe->info.has_fan_control)
> return 0;
> diff --git a/drivers/gpu/drm/xe/xe_vram_freq.c b/drivers/gpu/drm/xe/xe_vram_freq.c
> index b26e26d73dae..17bc84da4cdc 100644
> --- a/drivers/gpu/drm/xe/xe_vram_freq.c
> +++ b/drivers/gpu/drm/xe/xe_vram_freq.c
> @@ -34,7 +34,7 @@ static ssize_t max_freq_show(struct device *dev, struct device_attribute *attr,
> char *buf)
> {
> struct xe_tile *tile = dev_to_tile(dev);
> - u32 val, mbox;
> + u32 val = 0, mbox;
> int err;
>
> mbox = REG_FIELD_PREP(PCODE_MB_COMMAND, PCODE_FREQUENCY_CONFIG)
> @@ -56,7 +56,7 @@ static ssize_t min_freq_show(struct device *dev, struct device_attribute *attr,
> char *buf)
> {
> struct xe_tile *tile = dev_to_tile(dev);
> - u32 val, mbox;
> + u32 val = 0, mbox;
> int err;
>
> mbox = REG_FIELD_PREP(PCODE_MB_COMMAND, PCODE_FREQUENCY_CONFIG)
> --
> 2.34.1
>
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] drm/xe/pcode: Initialize data0 for pcode read routine
2025-08-08 16:38 ` Cavitt, Jonathan
@ 2025-08-08 17:01 ` Summers, Stuart
0 siblings, 0 replies; 14+ messages in thread
From: Summers, Stuart @ 2025-08-08 17:01 UTC (permalink / raw)
To: Cavitt, Jonathan; +Cc: intel-xe@lists.freedesktop.org, Jadav, Raag
On Fri, 2025-08-08 at 16:38 +0000, Cavitt, Jonathan wrote:
> -----Original Message-----
> From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of
> stuartsummers
> Sent: Friday, August 8, 2025 8:37 AM
> Cc: intel-xe@lists.freedesktop.org; Jadav, Raag
> <raag.jadav@intel.com>; Summers, Stuart <stuart.summers@intel.com>
> Subject: [PATCH] drm/xe/pcode: Initialize data0 for pcode read
> routine
> >
> > There are two registered filled in when reading data from
> > pcode besides the mailbox itself. Currently we allow a NULL
> > value for the second of these two (data1) and assume the first
> > is defined. However many of the routines that are calling
> > this function assume that pcode will ignore the value being
> > passed in and so leave that first value (data0) defined but
> > uninitialized. To be safe, make sure this value is always
> > initialized to something (0 generally) in the event pcode
> > behavior changes and starts using this value.
> >
> > Signed-off-by: stuartsummers <stuart.summers@intel.com>
>
> s/registered/registers
>
> Debatably, you should also add commas after 'Currently' and
> 'However', but that's just a semantic nit-pick, and is basically
> just splitting hairs at that point. We're writing patches, after
> all, not college papers...
>
> ---
>
> Aside:
> It looks like this patch is initializing some previously
> uninitialized variables to zero
> as a guard against them not being set during xe_pcode_read. This is
> a necessary
> fix in the event we have the xe info skip_pcode flag set (as that
> causes the pcode
> reading function to return a success without actually doing
> anything). But in every
> other case, I'm failing to see how the guards we currently have in
> place (namely,
> checking the return value and aborting the function if the read
> fails) aren't sufficient
> to prevent us from using an uninitialized variable in the case of a
> read failure. And
Thanks for the comment here Jonathan and the review!
You're refering to the pcode status check that returns one of the list
of errors if that shows up after the read/write? I guess what I'm
thinking there is having a known value is better than an unknown value
being sent down. It could also be that 0 (or any other number) is a
valid value and we get a successful status. At least with 0 (or some
other well-known value) we can have something consistent there.
Thanks,
Stuart
> if it's to guard against a future where the read function needs extra
> data, I think I'd
> rather we just create a new variable to store that extra data, rather
> than coopting
> the data0 write location for that purpose.
>
> Of course, the skip_pcode case is sufficient enough to warrant this
> change by itself,
> so I'm not going to block this. The skip_pcode flag is set to TRUE
> by default for SRIOV
> VF platforms, so I'm surprised breakages haven't been detected sooner
> given the
> uninitialized variables are quite liable to contain garbage data
> under some (or most)
> common kernel compiler configurations.
>
> An explanation would be nice, but it's not necessary. I mostly give
> these asides
> as proof that I actually read the patch, rather than as blocking
> queries, so you
> can take my reviewed-by without any strings attached. The grammar
> fixes can
> be applied at merge time.
>
> Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> -Jonathan Cavitt
>
> > ---
> > drivers/gpu/drm/xe/xe_device_sysfs.c | 8 ++++----
> > drivers/gpu/drm/xe/xe_hwmon.c | 8 ++++----
> > drivers/gpu/drm/xe/xe_vram_freq.c | 4 ++--
> > 3 files changed, 10 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_device_sysfs.c
> > b/drivers/gpu/drm/xe/xe_device_sysfs.c
> > index bd9015761aa0..6ee422594b56 100644
> > --- a/drivers/gpu/drm/xe/xe_device_sysfs.c
> > +++ b/drivers/gpu/drm/xe/xe_device_sysfs.c
> > @@ -76,7 +76,7 @@ lb_fan_control_version_show(struct device *dev,
> > struct device_attribute *attr, c
> > {
> > struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
> > struct xe_tile *root = xe_device_get_root_tile(xe);
> > - u32 cap, ver_low = FAN_TABLE, ver_high = FAN_TABLE;
> > + u32 cap = 0, ver_low = FAN_TABLE, ver_high = FAN_TABLE;
> > u16 major = 0, minor = 0, hotfix = 0, build = 0;
> > int ret;
> >
> > @@ -115,7 +115,7 @@ lb_voltage_regulator_version_show(struct device
> > *dev, struct device_attribute *a
> > {
> > struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
> > struct xe_tile *root = xe_device_get_root_tile(xe);
> > - u32 cap, ver_low = VR_CONFIG, ver_high = VR_CONFIG;
> > + u32 cap = 0, ver_low = VR_CONFIG, ver_high = VR_CONFIG;
> > u16 major = 0, minor = 0, hotfix = 0, build = 0;
> > int ret;
> >
> > @@ -153,7 +153,7 @@ static int late_bind_create_files(struct device
> > *dev)
> > {
> > struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
> > struct xe_tile *root = xe_device_get_root_tile(xe);
> > - u32 cap;
> > + u32 cap = 0;
> > int ret;
> >
> > xe_pm_runtime_get(xe);
> > @@ -186,7 +186,7 @@ static void late_bind_remove_files(struct
> > device *dev)
> > {
> > struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
> > struct xe_tile *root = xe_device_get_root_tile(xe);
> > - u32 cap;
> > + u32 cap = 0;
> > int ret;
> >
> > xe_pm_runtime_get(xe);
> > diff --git a/drivers/gpu/drm/xe/xe_hwmon.c
> > b/drivers/gpu/drm/xe/xe_hwmon.c
> > index f08fc4377d25..17a324e9de82 100644
> > --- a/drivers/gpu/drm/xe/xe_hwmon.c
> > +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> > @@ -179,7 +179,7 @@ static int xe_hwmon_pcode_rmw_power_limit(const
> > struct xe_hwmon *hwmon, u32 attr
> > u32 clr, u32 set)
> > {
> > struct xe_tile *root_tile = xe_device_get_root_tile(hwmon-
> > >xe);
> > - u32 val0, val1;
> > + u32 val0 = 0, val1 = 0;
> > int ret = 0;
> >
> > ret = xe_pcode_read(root_tile,
> > PCODE_MBOX(PCODE_POWER_SETUP,
> > @@ -719,7 +719,7 @@ static int xe_hwmon_power_curr_crit_read(struct
> > xe_hwmon *hwmon, int channel,
> > long *value, u32
> > scale_factor)
> > {
> > int ret;
> > - u32 uval;
> > + u32 uval = 0;
> >
> > mutex_lock(&hwmon->hwmon_lock);
> >
> > @@ -889,7 +889,7 @@ xe_hwmon_power_write(struct xe_hwmon *hwmon,
> > u32 attr, int channel, long val)
> > static umode_t
> > xe_hwmon_curr_is_visible(const struct xe_hwmon *hwmon, u32 attr,
> > int channel)
> > {
> > - u32 uval;
> > + u32 uval = 0;
> >
> > /* hwmon sysfs attribute of current available only for
> > package */
> > if (channel != CHANNEL_PKG)
> > @@ -991,7 +991,7 @@ xe_hwmon_energy_read(struct xe_hwmon *hwmon,
> > u32 attr, int channel, long *val)
> > static umode_t
> > xe_hwmon_fan_is_visible(struct xe_hwmon *hwmon, u32 attr, int
> > channel)
> > {
> > - u32 uval;
> > + u32 uval = 0;
> >
> > if (!hwmon->xe->info.has_fan_control)
> > return 0;
> > diff --git a/drivers/gpu/drm/xe/xe_vram_freq.c
> > b/drivers/gpu/drm/xe/xe_vram_freq.c
> > index b26e26d73dae..17bc84da4cdc 100644
> > --- a/drivers/gpu/drm/xe/xe_vram_freq.c
> > +++ b/drivers/gpu/drm/xe/xe_vram_freq.c
> > @@ -34,7 +34,7 @@ static ssize_t max_freq_show(struct device *dev,
> > struct device_attribute *attr,
> > char *buf)
> > {
> > struct xe_tile *tile = dev_to_tile(dev);
> > - u32 val, mbox;
> > + u32 val = 0, mbox;
> > int err;
> >
> > mbox = REG_FIELD_PREP(PCODE_MB_COMMAND,
> > PCODE_FREQUENCY_CONFIG)
> > @@ -56,7 +56,7 @@ static ssize_t min_freq_show(struct device *dev,
> > struct device_attribute *attr,
> > char *buf)
> > {
> > struct xe_tile *tile = dev_to_tile(dev);
> > - u32 val, mbox;
> > + u32 val = 0, mbox;
> > int err;
> >
> > mbox = REG_FIELD_PREP(PCODE_MB_COMMAND,
> > PCODE_FREQUENCY_CONFIG)
> > --
> > 2.34.1
> >
> >
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] drm/xe/pcode: Initialize data0 for pcode read routine
2025-08-08 15:36 stuartsummers
2025-08-08 16:38 ` Cavitt, Jonathan
@ 2025-08-10 9:26 ` Raag Jadav
2025-08-11 15:29 ` Summers, Stuart
1 sibling, 1 reply; 14+ messages in thread
From: Raag Jadav @ 2025-08-10 9:26 UTC (permalink / raw)
To: stuartsummers; +Cc: intel-xe
On Fri, Aug 08, 2025 at 03:36:56PM +0000, stuartsummers wrote:
> There are two registered filled in when reading data from
> pcode besides the mailbox itself. Currently we allow a NULL
> value for the second of these two (data1) and assume the first
> is defined. However many of the routines that are calling
> this function assume that pcode will ignore the value being
> passed in and so leave that first value (data0) defined but
> uninitialized. To be safe, make sure this value is always
> initialized to something (0 generally) in the event pcode
> behavior changes and starts using this value.
I'm not particularly against it but let's say if/when this happens,
can you guarantee the expected value to be 0?
Raag
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] drm/xe/pcode: Initialize data0 for pcode read routine
2025-08-10 9:26 ` Raag Jadav
@ 2025-08-11 15:29 ` Summers, Stuart
0 siblings, 0 replies; 14+ messages in thread
From: Summers, Stuart @ 2025-08-11 15:29 UTC (permalink / raw)
To: Jadav, Raag; +Cc: intel-xe@lists.freedesktop.org
On Sun, 2025-08-10 at 11:26 +0200, Raag Jadav wrote:
> On Fri, Aug 08, 2025 at 03:36:56PM +0000, stuartsummers wrote:
> > There are two registered filled in when reading data from
> > pcode besides the mailbox itself. Currently we allow a NULL
> > value for the second of these two (data1) and assume the first
> > is defined. However many of the routines that are calling
> > this function assume that pcode will ignore the value being
> > passed in and so leave that first value (data0) defined but
> > uninitialized. To be safe, make sure this value is always
> > initialized to something (0 generally) in the event pcode
> > behavior changes and starts using this value.
>
> I'm not particularly against it but let's say if/when this happens,
> can you guarantee the expected value to be 0?
You mean the expected response from pcode to be 0? I think the
expectation here will be command specific and most of the commands
impacted in this patch *should* be noop - i.e. the respective pcode
mbox command will likely not be using this. But given pcode is an
external interface not directly controlled by the driver, having some
well defined initial value IMO is safer. We don't need that to be 0
specifically, but I chose that here for consistency.
Thanks,
Stuart
>
> Raag
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH] drm/xe/pcode: Initialize data0 for pcode read routine
@ 2025-08-13 19:54 stuartsummers
2025-08-17 16:36 ` Rodrigo Vivi
0 siblings, 1 reply; 14+ messages in thread
From: stuartsummers @ 2025-08-13 19:54 UTC (permalink / raw)
Cc: intel-xe, raag.jadav, jonathan.cavitt, stuartsummers
There are two registers filled in when reading data from
pcode besides the mailbox itself. Currently, we allow a NULL
value for the second of these two (data1) and assume the first
is defined. However, many of the routines that are calling
this function assume that pcode will ignore the value being
passed in and so leave that first value (data0) defined but
uninitialized. To be safe, make sure this value is always
initialized to something (0 generally) in the event pcode
behavior changes and starts using this value.
Signed-off-by: stuartsummers <stuart.summers@intel.com>
Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
---
drivers/gpu/drm/xe/xe_device_sysfs.c | 8 ++++----
drivers/gpu/drm/xe/xe_hwmon.c | 8 ++++----
drivers/gpu/drm/xe/xe_vram_freq.c | 4 ++--
3 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_device_sysfs.c b/drivers/gpu/drm/xe/xe_device_sysfs.c
index bd9015761aa0..6ee422594b56 100644
--- a/drivers/gpu/drm/xe/xe_device_sysfs.c
+++ b/drivers/gpu/drm/xe/xe_device_sysfs.c
@@ -76,7 +76,7 @@ lb_fan_control_version_show(struct device *dev, struct device_attribute *attr, c
{
struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
struct xe_tile *root = xe_device_get_root_tile(xe);
- u32 cap, ver_low = FAN_TABLE, ver_high = FAN_TABLE;
+ u32 cap = 0, ver_low = FAN_TABLE, ver_high = FAN_TABLE;
u16 major = 0, minor = 0, hotfix = 0, build = 0;
int ret;
@@ -115,7 +115,7 @@ lb_voltage_regulator_version_show(struct device *dev, struct device_attribute *a
{
struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
struct xe_tile *root = xe_device_get_root_tile(xe);
- u32 cap, ver_low = VR_CONFIG, ver_high = VR_CONFIG;
+ u32 cap = 0, ver_low = VR_CONFIG, ver_high = VR_CONFIG;
u16 major = 0, minor = 0, hotfix = 0, build = 0;
int ret;
@@ -153,7 +153,7 @@ static int late_bind_create_files(struct device *dev)
{
struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
struct xe_tile *root = xe_device_get_root_tile(xe);
- u32 cap;
+ u32 cap = 0;
int ret;
xe_pm_runtime_get(xe);
@@ -186,7 +186,7 @@ static void late_bind_remove_files(struct device *dev)
{
struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
struct xe_tile *root = xe_device_get_root_tile(xe);
- u32 cap;
+ u32 cap = 0;
int ret;
xe_pm_runtime_get(xe);
diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index c17ed1ae8649..32a76ae6e9dc 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -179,7 +179,7 @@ static int xe_hwmon_pcode_rmw_power_limit(const struct xe_hwmon *hwmon, u32 attr
u32 clr, u32 set)
{
struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
- u32 val0, val1;
+ u32 val0 = 0, val1 = 0;
int ret = 0;
ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_POWER_SETUP,
@@ -734,7 +734,7 @@ static int xe_hwmon_power_curr_crit_read(struct xe_hwmon *hwmon, int channel,
long *value, u32 scale_factor)
{
int ret;
- u32 uval;
+ u32 uval = 0;
mutex_lock(&hwmon->hwmon_lock);
@@ -918,7 +918,7 @@ xe_hwmon_power_write(struct xe_hwmon *hwmon, u32 attr, int channel, long val)
static umode_t
xe_hwmon_curr_is_visible(const struct xe_hwmon *hwmon, u32 attr, int channel)
{
- u32 uval;
+ u32 uval = 0;
/* hwmon sysfs attribute of current available only for package */
if (channel != CHANNEL_PKG)
@@ -1020,7 +1020,7 @@ xe_hwmon_energy_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
static umode_t
xe_hwmon_fan_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
{
- u32 uval;
+ u32 uval = 0;
if (!hwmon->xe->info.has_fan_control)
return 0;
diff --git a/drivers/gpu/drm/xe/xe_vram_freq.c b/drivers/gpu/drm/xe/xe_vram_freq.c
index b26e26d73dae..17bc84da4cdc 100644
--- a/drivers/gpu/drm/xe/xe_vram_freq.c
+++ b/drivers/gpu/drm/xe/xe_vram_freq.c
@@ -34,7 +34,7 @@ static ssize_t max_freq_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct xe_tile *tile = dev_to_tile(dev);
- u32 val, mbox;
+ u32 val = 0, mbox;
int err;
mbox = REG_FIELD_PREP(PCODE_MB_COMMAND, PCODE_FREQUENCY_CONFIG)
@@ -56,7 +56,7 @@ static ssize_t min_freq_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct xe_tile *tile = dev_to_tile(dev);
- u32 val, mbox;
+ u32 val = 0, mbox;
int err;
mbox = REG_FIELD_PREP(PCODE_MB_COMMAND, PCODE_FREQUENCY_CONFIG)
--
2.34.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH] drm/xe/pcode: Initialize data0 for pcode read routine
2025-08-13 19:54 stuartsummers
@ 2025-08-17 16:36 ` Rodrigo Vivi
2025-08-19 14:40 ` Summers, Stuart
0 siblings, 1 reply; 14+ messages in thread
From: Rodrigo Vivi @ 2025-08-17 16:36 UTC (permalink / raw)
To: stuartsummers; +Cc: intel-xe, raag.jadav, jonathan.cavitt
On Wed, Aug 13, 2025 at 07:54:28PM +0000, stuartsummers wrote:
> There are two registers filled in when reading data from
> pcode besides the mailbox itself. Currently, we allow a NULL
> value for the second of these two (data1) and assume the first
> is defined. However, many of the routines that are calling
> this function assume that pcode will ignore the value being
> passed in and so leave that first value (data0) defined but
> uninitialized. To be safe, make sure this value is always
> initialized to something (0 generally) in the event pcode
> behavior changes and starts using this value.
>
> Signed-off-by: stuartsummers <stuart.summers@intel.com>
I was about to merge this, but I noticed your name seems odd.
(in both author and signed-off)
I mean, I could go ahead with this, but it is not like the
ones you used in the past:
Stuart Summers <stuart.summers@intel.com
so I'm wondering it is a missconfiguration with your git
and you might want to change... so, just let me know if I should
just move with this as is..
> Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> ---
> drivers/gpu/drm/xe/xe_device_sysfs.c | 8 ++++----
> drivers/gpu/drm/xe/xe_hwmon.c | 8 ++++----
> drivers/gpu/drm/xe/xe_vram_freq.c | 4 ++--
> 3 files changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_device_sysfs.c b/drivers/gpu/drm/xe/xe_device_sysfs.c
> index bd9015761aa0..6ee422594b56 100644
> --- a/drivers/gpu/drm/xe/xe_device_sysfs.c
> +++ b/drivers/gpu/drm/xe/xe_device_sysfs.c
> @@ -76,7 +76,7 @@ lb_fan_control_version_show(struct device *dev, struct device_attribute *attr, c
> {
> struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
> struct xe_tile *root = xe_device_get_root_tile(xe);
> - u32 cap, ver_low = FAN_TABLE, ver_high = FAN_TABLE;
> + u32 cap = 0, ver_low = FAN_TABLE, ver_high = FAN_TABLE;
> u16 major = 0, minor = 0, hotfix = 0, build = 0;
> int ret;
>
> @@ -115,7 +115,7 @@ lb_voltage_regulator_version_show(struct device *dev, struct device_attribute *a
> {
> struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
> struct xe_tile *root = xe_device_get_root_tile(xe);
> - u32 cap, ver_low = VR_CONFIG, ver_high = VR_CONFIG;
> + u32 cap = 0, ver_low = VR_CONFIG, ver_high = VR_CONFIG;
> u16 major = 0, minor = 0, hotfix = 0, build = 0;
> int ret;
>
> @@ -153,7 +153,7 @@ static int late_bind_create_files(struct device *dev)
> {
> struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
> struct xe_tile *root = xe_device_get_root_tile(xe);
> - u32 cap;
> + u32 cap = 0;
> int ret;
>
> xe_pm_runtime_get(xe);
> @@ -186,7 +186,7 @@ static void late_bind_remove_files(struct device *dev)
> {
> struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
> struct xe_tile *root = xe_device_get_root_tile(xe);
> - u32 cap;
> + u32 cap = 0;
> int ret;
>
> xe_pm_runtime_get(xe);
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index c17ed1ae8649..32a76ae6e9dc 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -179,7 +179,7 @@ static int xe_hwmon_pcode_rmw_power_limit(const struct xe_hwmon *hwmon, u32 attr
> u32 clr, u32 set)
> {
> struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
> - u32 val0, val1;
> + u32 val0 = 0, val1 = 0;
> int ret = 0;
>
> ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_POWER_SETUP,
> @@ -734,7 +734,7 @@ static int xe_hwmon_power_curr_crit_read(struct xe_hwmon *hwmon, int channel,
> long *value, u32 scale_factor)
> {
> int ret;
> - u32 uval;
> + u32 uval = 0;
>
> mutex_lock(&hwmon->hwmon_lock);
>
> @@ -918,7 +918,7 @@ xe_hwmon_power_write(struct xe_hwmon *hwmon, u32 attr, int channel, long val)
> static umode_t
> xe_hwmon_curr_is_visible(const struct xe_hwmon *hwmon, u32 attr, int channel)
> {
> - u32 uval;
> + u32 uval = 0;
>
> /* hwmon sysfs attribute of current available only for package */
> if (channel != CHANNEL_PKG)
> @@ -1020,7 +1020,7 @@ xe_hwmon_energy_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
> static umode_t
> xe_hwmon_fan_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
> {
> - u32 uval;
> + u32 uval = 0;
>
> if (!hwmon->xe->info.has_fan_control)
> return 0;
> diff --git a/drivers/gpu/drm/xe/xe_vram_freq.c b/drivers/gpu/drm/xe/xe_vram_freq.c
> index b26e26d73dae..17bc84da4cdc 100644
> --- a/drivers/gpu/drm/xe/xe_vram_freq.c
> +++ b/drivers/gpu/drm/xe/xe_vram_freq.c
> @@ -34,7 +34,7 @@ static ssize_t max_freq_show(struct device *dev, struct device_attribute *attr,
> char *buf)
> {
> struct xe_tile *tile = dev_to_tile(dev);
> - u32 val, mbox;
> + u32 val = 0, mbox;
> int err;
>
> mbox = REG_FIELD_PREP(PCODE_MB_COMMAND, PCODE_FREQUENCY_CONFIG)
> @@ -56,7 +56,7 @@ static ssize_t min_freq_show(struct device *dev, struct device_attribute *attr,
> char *buf)
> {
> struct xe_tile *tile = dev_to_tile(dev);
> - u32 val, mbox;
> + u32 val = 0, mbox;
> int err;
>
> mbox = REG_FIELD_PREP(PCODE_MB_COMMAND, PCODE_FREQUENCY_CONFIG)
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] drm/xe/pcode: Initialize data0 for pcode read routine
2025-08-17 16:36 ` Rodrigo Vivi
@ 2025-08-19 14:40 ` Summers, Stuart
0 siblings, 0 replies; 14+ messages in thread
From: Summers, Stuart @ 2025-08-19 14:40 UTC (permalink / raw)
To: Vivi, Rodrigo
Cc: intel-xe@lists.freedesktop.org, Jadav, Raag, Cavitt, Jonathan
On Sun, 2025-08-17 at 12:36 -0400, Rodrigo Vivi wrote:
> On Wed, Aug 13, 2025 at 07:54:28PM +0000, stuartsummers wrote:
> > There are two registers filled in when reading data from
> > pcode besides the mailbox itself. Currently, we allow a NULL
> > value for the second of these two (data1) and assume the first
> > is defined. However, many of the routines that are calling
> > this function assume that pcode will ignore the value being
> > passed in and so leave that first value (data0) defined but
> > uninitialized. To be safe, make sure this value is always
> > initialized to something (0 generally) in the event pcode
> > behavior changes and starts using this value.
> >
> > Signed-off-by: stuartsummers <stuart.summers@intel.com>
>
> I was about to merge this, but I noticed your name seems odd.
>
> (in both author and signed-off)
>
> I mean, I could go ahead with this, but it is not like the
> ones you used in the past:
> Stuart Summers <stuart.summers@intel.com
>
> so I'm wondering it is a missconfiguration with your git
> and you might want to change... so, just let me know if I should
> just move with this as is..
Hi Rodrigo, thanks for pointing this out. It looks like my local git
was in fact misconfigured somehow :(. Let me clean this up and repost
before we merge this. Looks like this is also impacting the other
series I have out. I'll repost there as well.
Thanks,
Stuart
>
> > Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> > ---
> > drivers/gpu/drm/xe/xe_device_sysfs.c | 8 ++++----
> > drivers/gpu/drm/xe/xe_hwmon.c | 8 ++++----
> > drivers/gpu/drm/xe/xe_vram_freq.c | 4 ++--
> > 3 files changed, 10 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_device_sysfs.c
> > b/drivers/gpu/drm/xe/xe_device_sysfs.c
> > index bd9015761aa0..6ee422594b56 100644
> > --- a/drivers/gpu/drm/xe/xe_device_sysfs.c
> > +++ b/drivers/gpu/drm/xe/xe_device_sysfs.c
> > @@ -76,7 +76,7 @@ lb_fan_control_version_show(struct device *dev,
> > struct device_attribute *attr, c
> > {
> > struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
> > struct xe_tile *root = xe_device_get_root_tile(xe);
> > - u32 cap, ver_low = FAN_TABLE, ver_high = FAN_TABLE;
> > + u32 cap = 0, ver_low = FAN_TABLE, ver_high = FAN_TABLE;
> > u16 major = 0, minor = 0, hotfix = 0, build = 0;
> > int ret;
> >
> > @@ -115,7 +115,7 @@ lb_voltage_regulator_version_show(struct device
> > *dev, struct device_attribute *a
> > {
> > struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
> > struct xe_tile *root = xe_device_get_root_tile(xe);
> > - u32 cap, ver_low = VR_CONFIG, ver_high = VR_CONFIG;
> > + u32 cap = 0, ver_low = VR_CONFIG, ver_high = VR_CONFIG;
> > u16 major = 0, minor = 0, hotfix = 0, build = 0;
> > int ret;
> >
> > @@ -153,7 +153,7 @@ static int late_bind_create_files(struct device
> > *dev)
> > {
> > struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
> > struct xe_tile *root = xe_device_get_root_tile(xe);
> > - u32 cap;
> > + u32 cap = 0;
> > int ret;
> >
> > xe_pm_runtime_get(xe);
> > @@ -186,7 +186,7 @@ static void late_bind_remove_files(struct
> > device *dev)
> > {
> > struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
> > struct xe_tile *root = xe_device_get_root_tile(xe);
> > - u32 cap;
> > + u32 cap = 0;
> > int ret;
> >
> > xe_pm_runtime_get(xe);
> > diff --git a/drivers/gpu/drm/xe/xe_hwmon.c
> > b/drivers/gpu/drm/xe/xe_hwmon.c
> > index c17ed1ae8649..32a76ae6e9dc 100644
> > --- a/drivers/gpu/drm/xe/xe_hwmon.c
> > +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> > @@ -179,7 +179,7 @@ static int xe_hwmon_pcode_rmw_power_limit(const
> > struct xe_hwmon *hwmon, u32 attr
> > u32 clr, u32 set)
> > {
> > struct xe_tile *root_tile = xe_device_get_root_tile(hwmon-
> > >xe);
> > - u32 val0, val1;
> > + u32 val0 = 0, val1 = 0;
> > int ret = 0;
> >
> > ret = xe_pcode_read(root_tile,
> > PCODE_MBOX(PCODE_POWER_SETUP,
> > @@ -734,7 +734,7 @@ static int xe_hwmon_power_curr_crit_read(struct
> > xe_hwmon *hwmon, int channel,
> > long *value, u32
> > scale_factor)
> > {
> > int ret;
> > - u32 uval;
> > + u32 uval = 0;
> >
> > mutex_lock(&hwmon->hwmon_lock);
> >
> > @@ -918,7 +918,7 @@ xe_hwmon_power_write(struct xe_hwmon *hwmon,
> > u32 attr, int channel, long val)
> > static umode_t
> > xe_hwmon_curr_is_visible(const struct xe_hwmon *hwmon, u32 attr,
> > int channel)
> > {
> > - u32 uval;
> > + u32 uval = 0;
> >
> > /* hwmon sysfs attribute of current available only for
> > package */
> > if (channel != CHANNEL_PKG)
> > @@ -1020,7 +1020,7 @@ xe_hwmon_energy_read(struct xe_hwmon *hwmon,
> > u32 attr, int channel, long *val)
> > static umode_t
> > xe_hwmon_fan_is_visible(struct xe_hwmon *hwmon, u32 attr, int
> > channel)
> > {
> > - u32 uval;
> > + u32 uval = 0;
> >
> > if (!hwmon->xe->info.has_fan_control)
> > return 0;
> > diff --git a/drivers/gpu/drm/xe/xe_vram_freq.c
> > b/drivers/gpu/drm/xe/xe_vram_freq.c
> > index b26e26d73dae..17bc84da4cdc 100644
> > --- a/drivers/gpu/drm/xe/xe_vram_freq.c
> > +++ b/drivers/gpu/drm/xe/xe_vram_freq.c
> > @@ -34,7 +34,7 @@ static ssize_t max_freq_show(struct device *dev,
> > struct device_attribute *attr,
> > char *buf)
> > {
> > struct xe_tile *tile = dev_to_tile(dev);
> > - u32 val, mbox;
> > + u32 val = 0, mbox;
> > int err;
> >
> > mbox = REG_FIELD_PREP(PCODE_MB_COMMAND,
> > PCODE_FREQUENCY_CONFIG)
> > @@ -56,7 +56,7 @@ static ssize_t min_freq_show(struct device *dev,
> > struct device_attribute *attr,
> > char *buf)
> > {
> > struct xe_tile *tile = dev_to_tile(dev);
> > - u32 val, mbox;
> > + u32 val = 0, mbox;
> > int err;
> >
> > mbox = REG_FIELD_PREP(PCODE_MB_COMMAND,
> > PCODE_FREQUENCY_CONFIG)
> > --
> > 2.34.1
> >
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH] drm/xe/pcode: Initialize data0 for pcode read routine
@ 2025-08-19 20:10 Stuart Summers
2025-08-20 6:07 ` ✓ CI.KUnit: success for drm/xe/pcode: Initialize data0 for pcode read routine (rev3) Patchwork
` (4 more replies)
0 siblings, 5 replies; 14+ messages in thread
From: Stuart Summers @ 2025-08-19 20:10 UTC (permalink / raw)
Cc: intel-xe, raag.jadav, rodrigo.vivi, Stuart Summers,
Jonathan Cavitt
There are two registers filled in when reading data from
pcode besides the mailbox itself. Currently, we allow a NULL
value for the second of these two (data1) and assume the first
is defined. However, many of the routines that are calling
this function assume that pcode will ignore the value being
passed in and so leave that first value (data0) defined but
uninitialized. To be safe, make sure this value is always
initialized to something (0 generally) in the event pcode
behavior changes and starts using this value.
v2: Fix sob/author
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
---
drivers/gpu/drm/xe/xe_device_sysfs.c | 8 ++++----
drivers/gpu/drm/xe/xe_hwmon.c | 8 ++++----
drivers/gpu/drm/xe/xe_vram_freq.c | 4 ++--
3 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_device_sysfs.c b/drivers/gpu/drm/xe/xe_device_sysfs.c
index bd9015761aa0..6ee422594b56 100644
--- a/drivers/gpu/drm/xe/xe_device_sysfs.c
+++ b/drivers/gpu/drm/xe/xe_device_sysfs.c
@@ -76,7 +76,7 @@ lb_fan_control_version_show(struct device *dev, struct device_attribute *attr, c
{
struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
struct xe_tile *root = xe_device_get_root_tile(xe);
- u32 cap, ver_low = FAN_TABLE, ver_high = FAN_TABLE;
+ u32 cap = 0, ver_low = FAN_TABLE, ver_high = FAN_TABLE;
u16 major = 0, minor = 0, hotfix = 0, build = 0;
int ret;
@@ -115,7 +115,7 @@ lb_voltage_regulator_version_show(struct device *dev, struct device_attribute *a
{
struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
struct xe_tile *root = xe_device_get_root_tile(xe);
- u32 cap, ver_low = VR_CONFIG, ver_high = VR_CONFIG;
+ u32 cap = 0, ver_low = VR_CONFIG, ver_high = VR_CONFIG;
u16 major = 0, minor = 0, hotfix = 0, build = 0;
int ret;
@@ -153,7 +153,7 @@ static int late_bind_create_files(struct device *dev)
{
struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
struct xe_tile *root = xe_device_get_root_tile(xe);
- u32 cap;
+ u32 cap = 0;
int ret;
xe_pm_runtime_get(xe);
@@ -186,7 +186,7 @@ static void late_bind_remove_files(struct device *dev)
{
struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
struct xe_tile *root = xe_device_get_root_tile(xe);
- u32 cap;
+ u32 cap = 0;
int ret;
xe_pm_runtime_get(xe);
diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index c17ed1ae8649..32a76ae6e9dc 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -179,7 +179,7 @@ static int xe_hwmon_pcode_rmw_power_limit(const struct xe_hwmon *hwmon, u32 attr
u32 clr, u32 set)
{
struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
- u32 val0, val1;
+ u32 val0 = 0, val1 = 0;
int ret = 0;
ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_POWER_SETUP,
@@ -734,7 +734,7 @@ static int xe_hwmon_power_curr_crit_read(struct xe_hwmon *hwmon, int channel,
long *value, u32 scale_factor)
{
int ret;
- u32 uval;
+ u32 uval = 0;
mutex_lock(&hwmon->hwmon_lock);
@@ -918,7 +918,7 @@ xe_hwmon_power_write(struct xe_hwmon *hwmon, u32 attr, int channel, long val)
static umode_t
xe_hwmon_curr_is_visible(const struct xe_hwmon *hwmon, u32 attr, int channel)
{
- u32 uval;
+ u32 uval = 0;
/* hwmon sysfs attribute of current available only for package */
if (channel != CHANNEL_PKG)
@@ -1020,7 +1020,7 @@ xe_hwmon_energy_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
static umode_t
xe_hwmon_fan_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
{
- u32 uval;
+ u32 uval = 0;
if (!hwmon->xe->info.has_fan_control)
return 0;
diff --git a/drivers/gpu/drm/xe/xe_vram_freq.c b/drivers/gpu/drm/xe/xe_vram_freq.c
index b26e26d73dae..17bc84da4cdc 100644
--- a/drivers/gpu/drm/xe/xe_vram_freq.c
+++ b/drivers/gpu/drm/xe/xe_vram_freq.c
@@ -34,7 +34,7 @@ static ssize_t max_freq_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct xe_tile *tile = dev_to_tile(dev);
- u32 val, mbox;
+ u32 val = 0, mbox;
int err;
mbox = REG_FIELD_PREP(PCODE_MB_COMMAND, PCODE_FREQUENCY_CONFIG)
@@ -56,7 +56,7 @@ static ssize_t min_freq_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct xe_tile *tile = dev_to_tile(dev);
- u32 val, mbox;
+ u32 val = 0, mbox;
int err;
mbox = REG_FIELD_PREP(PCODE_MB_COMMAND, PCODE_FREQUENCY_CONFIG)
--
2.34.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* ✓ CI.KUnit: success for drm/xe/pcode: Initialize data0 for pcode read routine (rev3)
2025-08-19 20:10 [PATCH] drm/xe/pcode: Initialize data0 for pcode read routine Stuart Summers
@ 2025-08-20 6:07 ` Patchwork
2025-08-20 6:38 ` [PATCH] drm/xe/pcode: Initialize data0 for pcode read routine Raag Jadav
` (3 subsequent siblings)
4 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2025-08-20 6:07 UTC (permalink / raw)
To: Stuart Summers; +Cc: intel-xe
== Series Details ==
Series: drm/xe/pcode: Initialize data0 for pcode read routine (rev3)
URL : https://patchwork.freedesktop.org/series/152700/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[06:05:59] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:06:03] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:06:32] Starting KUnit Kernel (1/1)...
[06:06:32] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:06:32] ================== guc_buf (11 subtests) ===================
[06:06:32] [PASSED] test_smallest
[06:06:32] [PASSED] test_largest
[06:06:32] [PASSED] test_granular
[06:06:32] [PASSED] test_unique
[06:06:32] [PASSED] test_overlap
[06:06:32] [PASSED] test_reusable
[06:06:32] [PASSED] test_too_big
[06:06:32] [PASSED] test_flush
[06:06:32] [PASSED] test_lookup
[06:06:32] [PASSED] test_data
[06:06:32] [PASSED] test_class
[06:06:32] ===================== [PASSED] guc_buf =====================
[06:06:32] =================== guc_dbm (7 subtests) ===================
[06:06:32] [PASSED] test_empty
[06:06:32] [PASSED] test_default
[06:06:32] ======================== test_size ========================
[06:06:32] [PASSED] 4
[06:06:32] [PASSED] 8
[06:06:32] [PASSED] 32
[06:06:32] [PASSED] 256
[06:06:32] ==================== [PASSED] test_size ====================
[06:06:32] ======================= test_reuse ========================
[06:06:32] [PASSED] 4
[06:06:32] [PASSED] 8
[06:06:32] [PASSED] 32
[06:06:32] [PASSED] 256
[06:06:32] =================== [PASSED] test_reuse ====================
[06:06:32] =================== test_range_overlap ====================
[06:06:32] [PASSED] 4
[06:06:32] [PASSED] 8
[06:06:32] [PASSED] 32
[06:06:32] [PASSED] 256
[06:06:32] =============== [PASSED] test_range_overlap ================
[06:06:32] =================== test_range_compact ====================
[06:06:32] [PASSED] 4
[06:06:32] [PASSED] 8
[06:06:32] [PASSED] 32
[06:06:32] [PASSED] 256
[06:06:32] =============== [PASSED] test_range_compact ================
[06:06:32] ==================== test_range_spare =====================
[06:06:32] [PASSED] 4
[06:06:32] [PASSED] 8
[06:06:32] [PASSED] 32
[06:06:32] [PASSED] 256
[06:06:32] ================ [PASSED] test_range_spare =================
[06:06:32] ===================== [PASSED] guc_dbm =====================
[06:06:32] =================== guc_idm (6 subtests) ===================
[06:06:32] [PASSED] bad_init
[06:06:32] [PASSED] no_init
[06:06:32] [PASSED] init_fini
[06:06:32] [PASSED] check_used
[06:06:32] [PASSED] check_quota
[06:06:32] [PASSED] check_all
[06:06:32] ===================== [PASSED] guc_idm =====================
[06:06:32] ================== no_relay (3 subtests) ===================
[06:06:32] [PASSED] xe_drops_guc2pf_if_not_ready
[06:06:32] [PASSED] xe_drops_guc2vf_if_not_ready
[06:06:32] [PASSED] xe_rejects_send_if_not_ready
[06:06:32] ==================== [PASSED] no_relay =====================
[06:06:32] ================== pf_relay (14 subtests) ==================
[06:06:32] [PASSED] pf_rejects_guc2pf_too_short
[06:06:32] [PASSED] pf_rejects_guc2pf_too_long
[06:06:32] [PASSED] pf_rejects_guc2pf_no_payload
[06:06:32] [PASSED] pf_fails_no_payload
[06:06:32] [PASSED] pf_fails_bad_origin
[06:06:32] [PASSED] pf_fails_bad_type
[06:06:32] [PASSED] pf_txn_reports_error
[06:06:32] [PASSED] pf_txn_sends_pf2guc
[06:06:32] [PASSED] pf_sends_pf2guc
[06:06:32] [SKIPPED] pf_loopback_nop
[06:06:32] [SKIPPED] pf_loopback_echo
[06:06:32] [SKIPPED] pf_loopback_fail
[06:06:32] [SKIPPED] pf_loopback_busy
[06:06:32] [SKIPPED] pf_loopback_retry
[06:06:32] ==================== [PASSED] pf_relay =====================
[06:06:32] ================== vf_relay (3 subtests) ===================
[06:06:32] [PASSED] vf_rejects_guc2vf_too_short
[06:06:32] [PASSED] vf_rejects_guc2vf_too_long
[06:06:32] [PASSED] vf_rejects_guc2vf_no_payload
[06:06:32] ==================== [PASSED] vf_relay =====================
[06:06:32] ===================== lmtt (1 subtest) =====================
[06:06:32] ======================== test_ops =========================
[06:06:32] [PASSED] 2-level
[06:06:32] [PASSED] multi-level
[06:06:32] ==================== [PASSED] test_ops =====================
[06:06:32] ====================== [PASSED] lmtt =======================
[06:06:32] ================= pf_service (11 subtests) =================
[06:06:32] [PASSED] pf_negotiate_any
[06:06:32] [PASSED] pf_negotiate_base_match
[06:06:32] [PASSED] pf_negotiate_base_newer
[06:06:32] [PASSED] pf_negotiate_base_next
[06:06:32] [SKIPPED] pf_negotiate_base_older
[06:06:32] [PASSED] pf_negotiate_base_prev
[06:06:32] [PASSED] pf_negotiate_latest_match
[06:06:32] [PASSED] pf_negotiate_latest_newer
[06:06:32] [PASSED] pf_negotiate_latest_next
[06:06:32] [SKIPPED] pf_negotiate_latest_older
[06:06:32] [SKIPPED] pf_negotiate_latest_prev
[06:06:32] =================== [PASSED] pf_service ====================
[06:06:32] =================== xe_mocs (2 subtests) ===================
[06:06:32] ================ xe_live_mocs_kernel_kunit ================
[06:06:32] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[06:06:32] ================ xe_live_mocs_reset_kunit =================
[06:06:32] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[06:06:32] ==================== [SKIPPED] xe_mocs =====================
[06:06:32] ================= xe_migrate (2 subtests) ==================
[06:06:32] ================= xe_migrate_sanity_kunit =================
[06:06:32] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[06:06:32] ================== xe_validate_ccs_kunit ==================
[06:06:32] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[06:06:32] =================== [SKIPPED] xe_migrate ===================
[06:06:32] ================== xe_dma_buf (1 subtest) ==================
[06:06:32] ==================== xe_dma_buf_kunit =====================
[06:06:32] ================ [SKIPPED] xe_dma_buf_kunit ================
[06:06:32] =================== [SKIPPED] xe_dma_buf ===================
[06:06:32] ================= xe_bo_shrink (1 subtest) =================
[06:06:32] =================== xe_bo_shrink_kunit ====================
[06:06:32] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[06:06:32] ================== [SKIPPED] xe_bo_shrink ==================
[06:06:32] ==================== xe_bo (2 subtests) ====================
[06:06:32] ================== xe_ccs_migrate_kunit ===================
[06:06:32] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[06:06:32] ==================== xe_bo_evict_kunit ====================
[06:06:32] =============== [SKIPPED] xe_bo_evict_kunit ================
[06:06:32] ===================== [SKIPPED] xe_bo ======================
[06:06:32] ==================== args (11 subtests) ====================
[06:06:32] [PASSED] count_args_test
[06:06:32] [PASSED] call_args_example
[06:06:32] [PASSED] call_args_test
[06:06:32] [PASSED] drop_first_arg_example
[06:06:32] [PASSED] drop_first_arg_test
[06:06:32] [PASSED] first_arg_example
[06:06:32] [PASSED] first_arg_test
[06:06:32] [PASSED] last_arg_example
[06:06:32] [PASSED] last_arg_test
[06:06:32] [PASSED] pick_arg_example
[06:06:32] [PASSED] sep_comma_example
[06:06:32] ====================== [PASSED] args =======================
[06:06:32] =================== xe_pci (3 subtests) ====================
[06:06:32] ==================== check_graphics_ip ====================
[06:06:32] [PASSED] 12.70 Xe_LPG
[06:06:32] [PASSED] 12.71 Xe_LPG
[06:06:32] [PASSED] 12.74 Xe_LPG+
[06:06:32] [PASSED] 20.01 Xe2_HPG
[06:06:32] [PASSED] 20.02 Xe2_HPG
[06:06:32] [PASSED] 20.04 Xe2_LPG
[06:06:32] [PASSED] 30.00 Xe3_LPG
[06:06:32] [PASSED] 30.01 Xe3_LPG
[06:06:32] [PASSED] 30.03 Xe3_LPG
[06:06:32] ================ [PASSED] check_graphics_ip ================
[06:06:32] ===================== check_media_ip ======================
[06:06:32] [PASSED] 13.00 Xe_LPM+
[06:06:32] [PASSED] 13.01 Xe2_HPM
[06:06:32] [PASSED] 20.00 Xe2_LPM
[06:06:32] [PASSED] 30.00 Xe3_LPM
[06:06:32] [PASSED] 30.02 Xe3_LPM
[06:06:32] ================= [PASSED] check_media_ip ==================
[06:06:32] ================= check_platform_gt_count =================
[06:06:32] [PASSED] 0x9A60 (TIGERLAKE)
[06:06:32] [PASSED] 0x9A68 (TIGERLAKE)
[06:06:32] [PASSED] 0x9A70 (TIGERLAKE)
[06:06:32] [PASSED] 0x9A40 (TIGERLAKE)
[06:06:32] [PASSED] 0x9A49 (TIGERLAKE)
[06:06:32] [PASSED] 0x9A59 (TIGERLAKE)
[06:06:32] [PASSED] 0x9A78 (TIGERLAKE)
[06:06:32] [PASSED] 0x9AC0 (TIGERLAKE)
[06:06:32] [PASSED] 0x9AC9 (TIGERLAKE)
[06:06:32] [PASSED] 0x9AD9 (TIGERLAKE)
[06:06:32] [PASSED] 0x9AF8 (TIGERLAKE)
[06:06:32] [PASSED] 0x4C80 (ROCKETLAKE)
[06:06:32] [PASSED] 0x4C8A (ROCKETLAKE)
[06:06:32] [PASSED] 0x4C8B (ROCKETLAKE)
[06:06:32] [PASSED] 0x4C8C (ROCKETLAKE)
[06:06:32] [PASSED] 0x4C90 (ROCKETLAKE)
[06:06:32] [PASSED] 0x4C9A (ROCKETLAKE)
[06:06:32] [PASSED] 0x4680 (ALDERLAKE_S)
[06:06:32] [PASSED] 0x4682 (ALDERLAKE_S)
[06:06:32] [PASSED] 0x4688 (ALDERLAKE_S)
[06:06:32] [PASSED] 0x468A (ALDERLAKE_S)
[06:06:32] [PASSED] 0x468B (ALDERLAKE_S)
[06:06:32] [PASSED] 0x4690 (ALDERLAKE_S)
[06:06:32] [PASSED] 0x4692 (ALDERLAKE_S)
[06:06:32] [PASSED] 0x4693 (ALDERLAKE_S)
[06:06:32] [PASSED] 0x46A0 (ALDERLAKE_P)
[06:06:32] [PASSED] 0x46A1 (ALDERLAKE_P)
[06:06:32] [PASSED] 0x46A2 (ALDERLAKE_P)
[06:06:32] [PASSED] 0x46A3 (ALDERLAKE_P)
[06:06:32] [PASSED] 0x46A6 (ALDERLAKE_P)
[06:06:32] [PASSED] 0x46A8 (ALDERLAKE_P)
[06:06:32] [PASSED] 0x46AA (ALDERLAKE_P)
[06:06:32] [PASSED] 0x462A (ALDERLAKE_P)
[06:06:32] [PASSED] 0x4626 (ALDERLAKE_P)
[06:06:32] [PASSED] 0x4628 (ALDERLAKE_P)
[06:06:32] [PASSED] 0x46B0 (ALDERLAKE_P)
[06:06:32] [PASSED] 0x46B1 (ALDERLAKE_P)
[06:06:32] [PASSED] 0x46B2 (ALDERLAKE_P)
[06:06:32] [PASSED] 0x46B3 (ALDERLAKE_P)
[06:06:32] [PASSED] 0x46C0 (ALDERLAKE_P)
[06:06:32] [PASSED] 0x46C1 (ALDERLAKE_P)
[06:06:32] [PASSED] 0x46C2 (ALDERLAKE_P)
[06:06:32] [PASSED] 0x46C3 (ALDERLAKE_P)
[06:06:32] [PASSED] 0x46D0 (ALDERLAKE_N)
[06:06:32] [PASSED] 0x46D1 (ALDERLAKE_N)
[06:06:32] [PASSED] 0x46D2 (ALDERLAKE_N)
[06:06:32] [PASSED] 0x46D3 (ALDERLAKE_N)
[06:06:32] [PASSED] 0x46D4 (ALDERLAKE_N)
[06:06:32] [PASSED] 0xA721 (ALDERLAKE_P)
[06:06:32] [PASSED] 0xA7A1 (ALDERLAKE_P)
[06:06:32] [PASSED] 0xA7A9 (ALDERLAKE_P)
[06:06:32] [PASSED] 0xA7AC (ALDERLAKE_P)
[06:06:32] [PASSED] 0xA7AD (ALDERLAKE_P)
[06:06:32] [PASSED] 0xA720 (ALDERLAKE_P)
[06:06:32] [PASSED] 0xA7A0 (ALDERLAKE_P)
[06:06:32] [PASSED] 0xA7A8 (ALDERLAKE_P)
[06:06:32] [PASSED] 0xA7AA (ALDERLAKE_P)
[06:06:32] [PASSED] 0xA7AB (ALDERLAKE_P)
[06:06:32] [PASSED] 0xA780 (ALDERLAKE_S)
[06:06:32] [PASSED] 0xA781 (ALDERLAKE_S)
[06:06:32] [PASSED] 0xA782 (ALDERLAKE_S)
[06:06:32] [PASSED] 0xA783 (ALDERLAKE_S)
[06:06:32] [PASSED] 0xA788 (ALDERLAKE_S)
[06:06:32] [PASSED] 0xA789 (ALDERLAKE_S)
[06:06:32] [PASSED] 0xA78A (ALDERLAKE_S)
[06:06:32] [PASSED] 0xA78B (ALDERLAKE_S)
[06:06:32] [PASSED] 0x4905 (DG1)
[06:06:32] [PASSED] 0x4906 (DG1)
[06:06:32] [PASSED] 0x4907 (DG1)
[06:06:32] [PASSED] 0x4908 (DG1)
[06:06:32] [PASSED] 0x4909 (DG1)
[06:06:32] [PASSED] 0x56C0 (DG2)
[06:06:32] [PASSED] 0x56C2 (DG2)
[06:06:32] [PASSED] 0x56C1 (DG2)
[06:06:32] [PASSED] 0x7D51 (METEORLAKE)
[06:06:32] [PASSED] 0x7DD1 (METEORLAKE)
[06:06:32] [PASSED] 0x7D41 (METEORLAKE)
[06:06:32] [PASSED] 0x7D67 (METEORLAKE)
[06:06:32] [PASSED] 0xB640 (METEORLAKE)
[06:06:32] [PASSED] 0x56A0 (DG2)
[06:06:32] [PASSED] 0x56A1 (DG2)
[06:06:32] [PASSED] 0x56A2 (DG2)
[06:06:32] [PASSED] 0x56BE (DG2)
[06:06:32] [PASSED] 0x56BF (DG2)
[06:06:32] [PASSED] 0x5690 (DG2)
[06:06:32] [PASSED] 0x5691 (DG2)
[06:06:32] [PASSED] 0x5692 (DG2)
[06:06:32] [PASSED] 0x56A5 (DG2)
[06:06:32] [PASSED] 0x56A6 (DG2)
[06:06:32] [PASSED] 0x56B0 (DG2)
[06:06:32] [PASSED] 0x56B1 (DG2)
[06:06:32] [PASSED] 0x56BA (DG2)
[06:06:32] [PASSED] 0x56BB (DG2)
[06:06:32] [PASSED] 0x56BC (DG2)
[06:06:32] [PASSED] 0x56BD (DG2)
[06:06:32] [PASSED] 0x5693 (DG2)
[06:06:32] [PASSED] 0x5694 (DG2)
[06:06:32] [PASSED] 0x5695 (DG2)
[06:06:32] [PASSED] 0x56A3 (DG2)
[06:06:32] [PASSED] 0x56A4 (DG2)
[06:06:32] [PASSED] 0x56B2 (DG2)
[06:06:32] [PASSED] 0x56B3 (DG2)
[06:06:32] [PASSED] 0x5696 (DG2)
[06:06:32] [PASSED] 0x5697 (DG2)
[06:06:32] [PASSED] 0xB69 (PVC)
[06:06:32] [PASSED] 0xB6E (PVC)
[06:06:32] [PASSED] 0xBD4 (PVC)
[06:06:32] [PASSED] 0xBD5 (PVC)
[06:06:32] [PASSED] 0xBD6 (PVC)
[06:06:32] [PASSED] 0xBD7 (PVC)
[06:06:32] [PASSED] 0xBD8 (PVC)
[06:06:32] [PASSED] 0xBD9 (PVC)
[06:06:32] [PASSED] 0xBDA (PVC)
[06:06:32] [PASSED] 0xBDB (PVC)
[06:06:32] [PASSED] 0xBE0 (PVC)
[06:06:32] [PASSED] 0xBE1 (PVC)
[06:06:32] [PASSED] 0xBE5 (PVC)
[06:06:32] [PASSED] 0x7D40 (METEORLAKE)
[06:06:32] [PASSED] 0x7D45 (METEORLAKE)
[06:06:32] [PASSED] 0x7D55 (METEORLAKE)
[06:06:32] [PASSED] 0x7D60 (METEORLAKE)
[06:06:32] [PASSED] 0x7DD5 (METEORLAKE)
[06:06:32] [PASSED] 0x6420 (LUNARLAKE)
[06:06:32] [PASSED] 0x64A0 (LUNARLAKE)
[06:06:32] [PASSED] 0x64B0 (LUNARLAKE)
[06:06:32] [PASSED] 0xE202 (BATTLEMAGE)
[06:06:32] [PASSED] 0xE209 (BATTLEMAGE)
[06:06:32] [PASSED] 0xE20B (BATTLEMAGE)
[06:06:32] [PASSED] 0xE20C (BATTLEMAGE)
[06:06:32] [PASSED] 0xE20D (BATTLEMAGE)
[06:06:32] [PASSED] 0xE210 (BATTLEMAGE)
[06:06:32] [PASSED] 0xE211 (BATTLEMAGE)
[06:06:32] [PASSED] 0xE212 (BATTLEMAGE)
[06:06:32] [PASSED] 0xE216 (BATTLEMAGE)
[06:06:32] [PASSED] 0xE220 (BATTLEMAGE)
[06:06:32] [PASSED] 0xE221 (BATTLEMAGE)
[06:06:32] [PASSED] 0xE222 (BATTLEMAGE)
[06:06:32] [PASSED] 0xE223 (BATTLEMAGE)
[06:06:32] [PASSED] 0xB080 (PANTHERLAKE)
[06:06:32] [PASSED] 0xB081 (PANTHERLAKE)
[06:06:32] [PASSED] 0xB082 (PANTHERLAKE)
[06:06:32] [PASSED] 0xB083 (PANTHERLAKE)
[06:06:32] [PASSED] 0xB084 (PANTHERLAKE)
[06:06:32] [PASSED] 0xB085 (PANTHERLAKE)
[06:06:32] [PASSED] 0xB086 (PANTHERLAKE)
[06:06:32] [PASSED] 0xB087 (PANTHERLAKE)
[06:06:32] [PASSED] 0xB08F (PANTHERLAKE)
[06:06:32] [PASSED] 0xB090 (PANTHERLAKE)
[06:06:32] [PASSED] 0xB0A0 (PANTHERLAKE)
[06:06:32] [PASSED] 0xB0B0 (PANTHERLAKE)
[06:06:32] [PASSED] 0xFD80 (PANTHERLAKE)
[06:06:32] [PASSED] 0xFD81 (PANTHERLAKE)
[06:06:32] ============= [PASSED] check_platform_gt_count =============
[06:06:32] ===================== [PASSED] xe_pci ======================
[06:06:32] =================== xe_rtp (2 subtests) ====================
[06:06:32] =============== xe_rtp_process_to_sr_tests ================
[06:06:32] [PASSED] coalesce-same-reg
[06:06:32] [PASSED] no-match-no-add
[06:06:32] [PASSED] match-or
[06:06:32] [PASSED] match-or-xfail
[06:06:32] [PASSED] no-match-no-add-multiple-rules
[06:06:32] [PASSED] two-regs-two-entries
[06:06:32] [PASSED] clr-one-set-other
[06:06:32] [PASSED] set-field
[06:06:32] [PASSED] conflict-duplicate
[06:06:32] [PASSED] conflict-not-disjoint
[06:06:32] [PASSED] conflict-reg-type
[06:06:32] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[06:06:32] ================== xe_rtp_process_tests ===================
[06:06:32] [PASSED] active1
[06:06:32] [PASSED] active2
[06:06:32] [PASSED] active-inactive
[06:06:32] [PASSED] inactive-active
[06:06:32] [PASSED] inactive-1st_or_active-inactive
[06:06:32] [PASSED] inactive-2nd_or_active-inactive
[06:06:32] [PASSED] inactive-last_or_active-inactive
[06:06:32] [PASSED] inactive-no_or_active-inactive
[06:06:32] ============== [PASSED] xe_rtp_process_tests ===============
[06:06:32] ===================== [PASSED] xe_rtp ======================
[06:06:32] ==================== xe_wa (1 subtest) =====================
[06:06:32] ======================== xe_wa_gt =========================
[06:06:32] [PASSED] TIGERLAKE (B0)
[06:06:32] [PASSED] DG1 (A0)
[06:06:32] [PASSED] DG1 (B0)
[06:06:32] [PASSED] ALDERLAKE_S (A0)
[06:06:32] [PASSED] ALDERLAKE_S (B0)
[06:06:32] [PASSED] ALDERLAKE_S (C0)
[06:06:32] [PASSED] ALDERLAKE_S (D0)
[06:06:32] [PASSED] ALDERLAKE_P (A0)
[06:06:32] [PASSED] ALDERLAKE_P (B0)
[06:06:32] [PASSED] ALDERLAKE_P (C0)
[06:06:32] [PASSED] ALDERLAKE_S_RPLS (D0)
[06:06:32] [PASSED] ALDERLAKE_P_RPLU (E0)
[06:06:32] [PASSED] DG2_G10 (C0)
[06:06:32] [PASSED] DG2_G11 (B1)
[06:06:32] [PASSED] DG2_G12 (A1)
[06:06:32] [PASSED] METEORLAKE (g:A0, m:A0)
[06:06:32] [PASSED] METEORLAKE (g:A0, m:A0)
[06:06:32] [PASSED] METEORLAKE (g:A0, m:A0)
[06:06:32] [PASSED] LUNARLAKE (g:A0, m:A0)
[06:06:32] [PASSED] LUNARLAKE (g:B0, m:A0)
stty: 'standard input': Inappropriate ioctl for device
[06:06:32] [PASSED] BATTLEMAGE (g:A0, m:A1)
[06:06:32] ==================== [PASSED] xe_wa_gt =====================
[06:06:32] ====================== [PASSED] xe_wa ======================
[06:06:32] ============================================================
[06:06:32] Testing complete. Ran 297 tests: passed: 281, skipped: 16
[06:06:33] Elapsed time: 33.943s total, 4.273s configuring, 29.303s building, 0.327s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[06:06:33] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:06:34] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:06:58] Starting KUnit Kernel (1/1)...
[06:06:58] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:06:58] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[06:06:58] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[06:06:58] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[06:06:58] =========== drm_validate_clone_mode (2 subtests) ===========
[06:06:58] ============== drm_test_check_in_clone_mode ===============
[06:06:58] [PASSED] in_clone_mode
[06:06:58] [PASSED] not_in_clone_mode
[06:06:58] ========== [PASSED] drm_test_check_in_clone_mode ===========
[06:06:58] =============== drm_test_check_valid_clones ===============
[06:06:58] [PASSED] not_in_clone_mode
[06:06:58] [PASSED] valid_clone
[06:06:58] [PASSED] invalid_clone
[06:06:58] =========== [PASSED] drm_test_check_valid_clones ===========
[06:06:58] ============= [PASSED] drm_validate_clone_mode =============
[06:06:58] ============= drm_validate_modeset (1 subtest) =============
[06:06:58] [PASSED] drm_test_check_connector_changed_modeset
[06:06:58] ============== [PASSED] drm_validate_modeset ===============
[06:06:58] ====== drm_test_bridge_get_current_state (2 subtests) ======
[06:06:58] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[06:06:58] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[06:06:58] ======== [PASSED] drm_test_bridge_get_current_state ========
[06:06:58] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[06:06:58] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[06:06:58] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[06:06:58] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[06:06:58] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[06:06:58] ============== drm_bridge_alloc (2 subtests) ===============
[06:06:58] [PASSED] drm_test_drm_bridge_alloc_basic
[06:06:58] [PASSED] drm_test_drm_bridge_alloc_get_put
[06:06:58] ================ [PASSED] drm_bridge_alloc =================
[06:06:58] ================== drm_buddy (7 subtests) ==================
[06:06:58] [PASSED] drm_test_buddy_alloc_limit
[06:06:58] [PASSED] drm_test_buddy_alloc_optimistic
[06:06:58] [PASSED] drm_test_buddy_alloc_pessimistic
[06:06:58] [PASSED] drm_test_buddy_alloc_pathological
[06:06:58] [PASSED] drm_test_buddy_alloc_contiguous
[06:06:58] [PASSED] drm_test_buddy_alloc_clear
[06:06:58] [PASSED] drm_test_buddy_alloc_range_bias
[06:06:58] ==================== [PASSED] drm_buddy ====================
[06:06:58] ============= drm_cmdline_parser (40 subtests) =============
[06:06:58] [PASSED] drm_test_cmdline_force_d_only
[06:06:58] [PASSED] drm_test_cmdline_force_D_only_dvi
[06:06:58] [PASSED] drm_test_cmdline_force_D_only_hdmi
[06:06:58] [PASSED] drm_test_cmdline_force_D_only_not_digital
[06:06:58] [PASSED] drm_test_cmdline_force_e_only
[06:06:58] [PASSED] drm_test_cmdline_res
[06:06:58] [PASSED] drm_test_cmdline_res_vesa
[06:06:58] [PASSED] drm_test_cmdline_res_vesa_rblank
[06:06:58] [PASSED] drm_test_cmdline_res_rblank
[06:06:58] [PASSED] drm_test_cmdline_res_bpp
[06:06:58] [PASSED] drm_test_cmdline_res_refresh
[06:06:58] [PASSED] drm_test_cmdline_res_bpp_refresh
[06:06:58] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[06:06:58] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[06:06:58] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[06:06:58] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[06:06:58] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[06:06:58] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[06:06:58] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[06:06:58] [PASSED] drm_test_cmdline_res_margins_force_on
[06:06:58] [PASSED] drm_test_cmdline_res_vesa_margins
[06:06:58] [PASSED] drm_test_cmdline_name
[06:06:58] [PASSED] drm_test_cmdline_name_bpp
[06:06:58] [PASSED] drm_test_cmdline_name_option
[06:06:58] [PASSED] drm_test_cmdline_name_bpp_option
[06:06:58] [PASSED] drm_test_cmdline_rotate_0
[06:06:58] [PASSED] drm_test_cmdline_rotate_90
[06:06:58] [PASSED] drm_test_cmdline_rotate_180
[06:06:58] [PASSED] drm_test_cmdline_rotate_270
[06:06:58] [PASSED] drm_test_cmdline_hmirror
[06:06:58] [PASSED] drm_test_cmdline_vmirror
[06:06:58] [PASSED] drm_test_cmdline_margin_options
[06:06:58] [PASSED] drm_test_cmdline_multiple_options
[06:06:58] [PASSED] drm_test_cmdline_bpp_extra_and_option
[06:06:58] [PASSED] drm_test_cmdline_extra_and_option
[06:06:58] [PASSED] drm_test_cmdline_freestanding_options
[06:06:58] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[06:06:58] [PASSED] drm_test_cmdline_panel_orientation
[06:06:58] ================ drm_test_cmdline_invalid =================
[06:06:58] [PASSED] margin_only
[06:06:58] [PASSED] interlace_only
[06:06:58] [PASSED] res_missing_x
[06:06:58] [PASSED] res_missing_y
[06:06:58] [PASSED] res_bad_y
[06:06:58] [PASSED] res_missing_y_bpp
[06:06:58] [PASSED] res_bad_bpp
[06:06:58] [PASSED] res_bad_refresh
[06:06:58] [PASSED] res_bpp_refresh_force_on_off
[06:06:58] [PASSED] res_invalid_mode
[06:06:58] [PASSED] res_bpp_wrong_place_mode
[06:06:58] [PASSED] name_bpp_refresh
[06:06:58] [PASSED] name_refresh
[06:06:58] [PASSED] name_refresh_wrong_mode
[06:06:58] [PASSED] name_refresh_invalid_mode
[06:06:58] [PASSED] rotate_multiple
[06:06:58] [PASSED] rotate_invalid_val
[06:06:58] [PASSED] rotate_truncated
[06:06:58] [PASSED] invalid_option
[06:06:58] [PASSED] invalid_tv_option
[06:06:58] [PASSED] truncated_tv_option
[06:06:58] ============ [PASSED] drm_test_cmdline_invalid =============
[06:06:58] =============== drm_test_cmdline_tv_options ===============
[06:06:58] [PASSED] NTSC
[06:06:58] [PASSED] NTSC_443
[06:06:58] [PASSED] NTSC_J
[06:06:58] [PASSED] PAL
[06:06:58] [PASSED] PAL_M
[06:06:58] [PASSED] PAL_N
[06:06:58] [PASSED] SECAM
[06:06:58] [PASSED] MONO_525
[06:06:58] [PASSED] MONO_625
[06:06:58] =========== [PASSED] drm_test_cmdline_tv_options ===========
[06:06:58] =============== [PASSED] drm_cmdline_parser ================
[06:06:58] ========== drmm_connector_hdmi_init (20 subtests) ==========
[06:06:58] [PASSED] drm_test_connector_hdmi_init_valid
[06:06:58] [PASSED] drm_test_connector_hdmi_init_bpc_8
[06:06:58] [PASSED] drm_test_connector_hdmi_init_bpc_10
[06:06:58] [PASSED] drm_test_connector_hdmi_init_bpc_12
[06:06:58] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[06:06:58] [PASSED] drm_test_connector_hdmi_init_bpc_null
[06:06:58] [PASSED] drm_test_connector_hdmi_init_formats_empty
[06:06:58] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[06:06:58] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[06:06:58] [PASSED] supported_formats=0x9 yuv420_allowed=1
[06:06:58] [PASSED] supported_formats=0x9 yuv420_allowed=0
[06:06:58] [PASSED] supported_formats=0x3 yuv420_allowed=1
[06:06:58] [PASSED] supported_formats=0x3 yuv420_allowed=0
[06:06:58] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[06:06:58] [PASSED] drm_test_connector_hdmi_init_null_ddc
[06:06:58] [PASSED] drm_test_connector_hdmi_init_null_product
[06:06:58] [PASSED] drm_test_connector_hdmi_init_null_vendor
[06:06:58] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[06:06:58] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[06:06:58] [PASSED] drm_test_connector_hdmi_init_product_valid
[06:06:58] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[06:06:58] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[06:06:58] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[06:06:58] ========= drm_test_connector_hdmi_init_type_valid =========
[06:06:58] [PASSED] HDMI-A
[06:06:58] [PASSED] HDMI-B
[06:06:58] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[06:06:58] ======== drm_test_connector_hdmi_init_type_invalid ========
[06:06:58] [PASSED] Unknown
[06:06:58] [PASSED] VGA
[06:06:58] [PASSED] DVI-I
[06:06:58] [PASSED] DVI-D
[06:06:58] [PASSED] DVI-A
[06:06:58] [PASSED] Composite
[06:06:58] [PASSED] SVIDEO
[06:06:58] [PASSED] LVDS
[06:06:58] [PASSED] Component
[06:06:58] [PASSED] DIN
[06:06:58] [PASSED] DP
[06:06:58] [PASSED] TV
[06:06:58] [PASSED] eDP
[06:06:58] [PASSED] Virtual
[06:06:58] [PASSED] DSI
[06:06:58] [PASSED] DPI
[06:06:58] [PASSED] Writeback
[06:06:58] [PASSED] SPI
[06:06:58] [PASSED] USB
[06:06:58] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[06:06:58] ============ [PASSED] drmm_connector_hdmi_init =============
[06:06:58] ============= drmm_connector_init (3 subtests) =============
[06:06:58] [PASSED] drm_test_drmm_connector_init
[06:06:58] [PASSED] drm_test_drmm_connector_init_null_ddc
[06:06:58] ========= drm_test_drmm_connector_init_type_valid =========
[06:06:58] [PASSED] Unknown
[06:06:58] [PASSED] VGA
[06:06:58] [PASSED] DVI-I
[06:06:58] [PASSED] DVI-D
[06:06:58] [PASSED] DVI-A
[06:06:58] [PASSED] Composite
[06:06:58] [PASSED] SVIDEO
[06:06:58] [PASSED] LVDS
[06:06:58] [PASSED] Component
[06:06:58] [PASSED] DIN
[06:06:58] [PASSED] DP
[06:06:58] [PASSED] HDMI-A
[06:06:58] [PASSED] HDMI-B
[06:06:58] [PASSED] TV
[06:06:58] [PASSED] eDP
[06:06:58] [PASSED] Virtual
[06:06:58] [PASSED] DSI
[06:06:58] [PASSED] DPI
[06:06:58] [PASSED] Writeback
[06:06:58] [PASSED] SPI
[06:06:58] [PASSED] USB
[06:06:58] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[06:06:58] =============== [PASSED] drmm_connector_init ===============
[06:06:58] ========= drm_connector_dynamic_init (6 subtests) ==========
[06:06:58] [PASSED] drm_test_drm_connector_dynamic_init
[06:06:58] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[06:06:58] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[06:06:58] [PASSED] drm_test_drm_connector_dynamic_init_properties
[06:06:58] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[06:06:58] [PASSED] Unknown
[06:06:58] [PASSED] VGA
[06:06:58] [PASSED] DVI-I
[06:06:58] [PASSED] DVI-D
[06:06:58] [PASSED] DVI-A
[06:06:58] [PASSED] Composite
[06:06:58] [PASSED] SVIDEO
[06:06:58] [PASSED] LVDS
[06:06:58] [PASSED] Component
[06:06:58] [PASSED] DIN
[06:06:58] [PASSED] DP
[06:06:58] [PASSED] HDMI-A
[06:06:58] [PASSED] HDMI-B
[06:06:58] [PASSED] TV
[06:06:58] [PASSED] eDP
[06:06:58] [PASSED] Virtual
[06:06:58] [PASSED] DSI
[06:06:58] [PASSED] DPI
[06:06:58] [PASSED] Writeback
[06:06:58] [PASSED] SPI
[06:06:58] [PASSED] USB
[06:06:58] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[06:06:58] ======== drm_test_drm_connector_dynamic_init_name =========
[06:06:58] [PASSED] Unknown
[06:06:58] [PASSED] VGA
[06:06:58] [PASSED] DVI-I
[06:06:58] [PASSED] DVI-D
[06:06:58] [PASSED] DVI-A
[06:06:58] [PASSED] Composite
[06:06:58] [PASSED] SVIDEO
[06:06:58] [PASSED] LVDS
[06:06:58] [PASSED] Component
[06:06:58] [PASSED] DIN
[06:06:58] [PASSED] DP
[06:06:58] [PASSED] HDMI-A
[06:06:58] [PASSED] HDMI-B
[06:06:58] [PASSED] TV
[06:06:58] [PASSED] eDP
[06:06:58] [PASSED] Virtual
[06:06:58] [PASSED] DSI
[06:06:58] [PASSED] DPI
[06:06:58] [PASSED] Writeback
[06:06:58] [PASSED] SPI
[06:06:58] [PASSED] USB
[06:06:58] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[06:06:58] =========== [PASSED] drm_connector_dynamic_init ============
[06:06:58] ==== drm_connector_dynamic_register_early (4 subtests) =====
[06:06:58] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[06:06:58] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[06:06:58] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[06:06:58] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[06:06:58] ====== [PASSED] drm_connector_dynamic_register_early =======
[06:06:58] ======= drm_connector_dynamic_register (7 subtests) ========
[06:06:58] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[06:06:58] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[06:06:58] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[06:06:58] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[06:06:58] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[06:06:58] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[06:06:58] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[06:06:58] ========= [PASSED] drm_connector_dynamic_register ==========
[06:06:58] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[06:06:58] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[06:06:58] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[06:06:58] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[06:06:58] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[06:06:58] ========== drm_test_get_tv_mode_from_name_valid ===========
[06:06:58] [PASSED] NTSC
[06:06:58] [PASSED] NTSC-443
[06:06:58] [PASSED] NTSC-J
[06:06:58] [PASSED] PAL
[06:06:58] [PASSED] PAL-M
[06:06:58] [PASSED] PAL-N
[06:06:58] [PASSED] SECAM
[06:06:58] [PASSED] Mono
[06:06:58] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[06:06:58] [PASSED] drm_test_get_tv_mode_from_name_truncated
[06:06:58] ============ [PASSED] drm_get_tv_mode_from_name ============
[06:06:58] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[06:06:58] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[06:06:58] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[06:06:58] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[06:06:58] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[06:06:58] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[06:06:58] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[06:06:58] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[06:06:58] [PASSED] VIC 96
[06:06:58] [PASSED] VIC 97
[06:06:58] [PASSED] VIC 101
[06:06:58] [PASSED] VIC 102
[06:06:58] [PASSED] VIC 106
[06:06:58] [PASSED] VIC 107
[06:06:58] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[06:06:58] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[06:06:58] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[06:06:58] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[06:06:58] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[06:06:58] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[06:06:58] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[06:06:58] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[06:06:58] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[06:06:58] [PASSED] Automatic
[06:06:58] [PASSED] Full
[06:06:58] [PASSED] Limited 16:235
[06:06:58] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[06:06:58] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[06:06:58] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[06:06:58] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[06:06:58] === drm_test_drm_hdmi_connector_get_output_format_name ====
[06:06:58] [PASSED] RGB
[06:06:58] [PASSED] YUV 4:2:0
[06:06:58] [PASSED] YUV 4:2:2
[06:06:58] [PASSED] YUV 4:4:4
[06:06:58] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[06:06:58] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[06:06:58] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[06:06:58] ============= drm_damage_helper (21 subtests) ==============
[06:06:58] [PASSED] drm_test_damage_iter_no_damage
[06:06:58] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[06:06:58] [PASSED] drm_test_damage_iter_no_damage_src_moved
[06:06:58] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[06:06:58] [PASSED] drm_test_damage_iter_no_damage_not_visible
[06:06:58] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[06:06:58] [PASSED] drm_test_damage_iter_no_damage_no_fb
[06:06:58] [PASSED] drm_test_damage_iter_simple_damage
[06:06:58] [PASSED] drm_test_damage_iter_single_damage
[06:06:58] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[06:06:58] [PASSED] drm_test_damage_iter_single_damage_outside_src
[06:06:58] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[06:06:58] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[06:06:58] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[06:06:58] [PASSED] drm_test_damage_iter_single_damage_src_moved
[06:06:58] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[06:06:58] [PASSED] drm_test_damage_iter_damage
[06:06:58] [PASSED] drm_test_damage_iter_damage_one_intersect
[06:06:58] [PASSED] drm_test_damage_iter_damage_one_outside
[06:06:58] [PASSED] drm_test_damage_iter_damage_src_moved
[06:06:58] [PASSED] drm_test_damage_iter_damage_not_visible
[06:06:58] ================ [PASSED] drm_damage_helper ================
[06:06:58] ============== drm_dp_mst_helper (3 subtests) ==============
[06:06:58] ============== drm_test_dp_mst_calc_pbn_mode ==============
[06:06:58] [PASSED] Clock 154000 BPP 30 DSC disabled
[06:06:58] [PASSED] Clock 234000 BPP 30 DSC disabled
[06:06:58] [PASSED] Clock 297000 BPP 24 DSC disabled
[06:06:58] [PASSED] Clock 332880 BPP 24 DSC enabled
[06:06:58] [PASSED] Clock 324540 BPP 24 DSC enabled
[06:06:58] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[06:06:58] ============== drm_test_dp_mst_calc_pbn_div ===============
[06:06:58] [PASSED] Link rate 2000000 lane count 4
[06:06:58] [PASSED] Link rate 2000000 lane count 2
[06:06:58] [PASSED] Link rate 2000000 lane count 1
[06:06:58] [PASSED] Link rate 1350000 lane count 4
[06:06:58] [PASSED] Link rate 1350000 lane count 2
[06:06:58] [PASSED] Link rate 1350000 lane count 1
[06:06:58] [PASSED] Link rate 1000000 lane count 4
[06:06:58] [PASSED] Link rate 1000000 lane count 2
[06:06:58] [PASSED] Link rate 1000000 lane count 1
[06:06:58] [PASSED] Link rate 810000 lane count 4
[06:06:58] [PASSED] Link rate 810000 lane count 2
[06:06:58] [PASSED] Link rate 810000 lane count 1
[06:06:58] [PASSED] Link rate 540000 lane count 4
[06:06:58] [PASSED] Link rate 540000 lane count 2
[06:06:58] [PASSED] Link rate 540000 lane count 1
[06:06:58] [PASSED] Link rate 270000 lane count 4
[06:06:58] [PASSED] Link rate 270000 lane count 2
[06:06:58] [PASSED] Link rate 270000 lane count 1
[06:06:58] [PASSED] Link rate 162000 lane count 4
[06:06:58] [PASSED] Link rate 162000 lane count 2
[06:06:58] [PASSED] Link rate 162000 lane count 1
[06:06:58] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[06:06:58] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[06:06:58] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[06:06:58] [PASSED] DP_POWER_UP_PHY with port number
[06:06:58] [PASSED] DP_POWER_DOWN_PHY with port number
[06:06:58] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[06:06:58] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[06:06:58] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[06:06:58] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[06:06:58] [PASSED] DP_QUERY_PAYLOAD with port number
[06:06:58] [PASSED] DP_QUERY_PAYLOAD with VCPI
[06:06:58] [PASSED] DP_REMOTE_DPCD_READ with port number
[06:06:58] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[06:06:58] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[06:06:58] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[06:06:58] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[06:06:58] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[06:06:58] [PASSED] DP_REMOTE_I2C_READ with port number
[06:06:58] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[06:06:58] [PASSED] DP_REMOTE_I2C_READ with transactions array
[06:06:58] [PASSED] DP_REMOTE_I2C_WRITE with port number
[06:06:58] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[06:06:58] [PASSED] DP_REMOTE_I2C_WRITE with data array
[06:06:58] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[06:06:58] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[06:06:58] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[06:06:58] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[06:06:58] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[06:06:58] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[06:06:58] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[06:06:58] ================ [PASSED] drm_dp_mst_helper ================
[06:06:58] ================== drm_exec (7 subtests) ===================
[06:06:58] [PASSED] sanitycheck
[06:06:58] [PASSED] test_lock
[06:06:58] [PASSED] test_lock_unlock
[06:06:58] [PASSED] test_duplicates
[06:06:58] [PASSED] test_prepare
[06:06:58] [PASSED] test_prepare_array
[06:06:58] [PASSED] test_multiple_loops
[06:06:58] ==================== [PASSED] drm_exec =====================
[06:06:58] =========== drm_format_helper_test (17 subtests) ===========
[06:06:58] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[06:06:58] [PASSED] single_pixel_source_buffer
[06:06:58] [PASSED] single_pixel_clip_rectangle
[06:06:58] [PASSED] well_known_colors
[06:06:58] [PASSED] destination_pitch
[06:06:58] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[06:06:58] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[06:06:58] [PASSED] single_pixel_source_buffer
[06:06:58] [PASSED] single_pixel_clip_rectangle
[06:06:58] [PASSED] well_known_colors
[06:06:58] [PASSED] destination_pitch
[06:06:58] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[06:06:58] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[06:06:58] [PASSED] single_pixel_source_buffer
[06:06:58] [PASSED] single_pixel_clip_rectangle
[06:06:58] [PASSED] well_known_colors
[06:06:58] [PASSED] destination_pitch
[06:06:58] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[06:06:58] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[06:06:58] [PASSED] single_pixel_source_buffer
[06:06:58] [PASSED] single_pixel_clip_rectangle
[06:06:58] [PASSED] well_known_colors
[06:06:58] [PASSED] destination_pitch
[06:06:58] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[06:06:58] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[06:06:58] [PASSED] single_pixel_source_buffer
[06:06:58] [PASSED] single_pixel_clip_rectangle
[06:06:58] [PASSED] well_known_colors
[06:06:58] [PASSED] destination_pitch
[06:06:58] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[06:06:58] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[06:06:58] [PASSED] single_pixel_source_buffer
[06:06:58] [PASSED] single_pixel_clip_rectangle
[06:06:58] [PASSED] well_known_colors
[06:06:58] [PASSED] destination_pitch
[06:06:58] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[06:06:58] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[06:06:58] [PASSED] single_pixel_source_buffer
[06:06:58] [PASSED] single_pixel_clip_rectangle
[06:06:58] [PASSED] well_known_colors
[06:06:58] [PASSED] destination_pitch
[06:06:58] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[06:06:58] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[06:06:58] [PASSED] single_pixel_source_buffer
[06:06:58] [PASSED] single_pixel_clip_rectangle
[06:06:58] [PASSED] well_known_colors
[06:06:58] [PASSED] destination_pitch
[06:06:58] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[06:06:58] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[06:06:58] [PASSED] single_pixel_source_buffer
[06:06:58] [PASSED] single_pixel_clip_rectangle
[06:06:58] [PASSED] well_known_colors
[06:06:58] [PASSED] destination_pitch
[06:06:58] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[06:06:58] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[06:06:58] [PASSED] single_pixel_source_buffer
[06:06:58] [PASSED] single_pixel_clip_rectangle
[06:06:58] [PASSED] well_known_colors
[06:06:58] [PASSED] destination_pitch
[06:06:58] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[06:06:58] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[06:06:58] [PASSED] single_pixel_source_buffer
[06:06:58] [PASSED] single_pixel_clip_rectangle
[06:06:58] [PASSED] well_known_colors
[06:06:58] [PASSED] destination_pitch
[06:06:58] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[06:06:58] ============== drm_test_fb_xrgb8888_to_mono ===============
[06:06:58] [PASSED] single_pixel_source_buffer
[06:06:58] [PASSED] single_pixel_clip_rectangle
[06:06:58] [PASSED] well_known_colors
[06:06:58] [PASSED] destination_pitch
[06:06:58] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[06:06:58] ==================== drm_test_fb_swab =====================
[06:06:58] [PASSED] single_pixel_source_buffer
[06:06:58] [PASSED] single_pixel_clip_rectangle
[06:06:58] [PASSED] well_known_colors
[06:06:58] [PASSED] destination_pitch
[06:06:58] ================ [PASSED] drm_test_fb_swab =================
[06:06:58] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[06:06:58] [PASSED] single_pixel_source_buffer
[06:06:58] [PASSED] single_pixel_clip_rectangle
[06:06:58] [PASSED] well_known_colors
[06:06:58] [PASSED] destination_pitch
[06:06:58] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[06:06:58] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[06:06:58] [PASSED] single_pixel_source_buffer
[06:06:58] [PASSED] single_pixel_clip_rectangle
[06:06:58] [PASSED] well_known_colors
[06:06:58] [PASSED] destination_pitch
[06:06:58] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[06:06:58] ================= drm_test_fb_clip_offset =================
[06:06:58] [PASSED] pass through
[06:06:58] [PASSED] horizontal offset
[06:06:58] [PASSED] vertical offset
[06:06:58] [PASSED] horizontal and vertical offset
[06:06:58] [PASSED] horizontal offset (custom pitch)
[06:06:58] [PASSED] vertical offset (custom pitch)
[06:06:58] [PASSED] horizontal and vertical offset (custom pitch)
[06:06:58] ============= [PASSED] drm_test_fb_clip_offset =============
[06:06:58] =================== drm_test_fb_memcpy ====================
[06:06:58] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[06:06:58] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[06:06:58] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[06:06:58] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[06:06:58] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[06:06:58] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[06:06:58] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[06:06:58] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[06:06:58] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[06:06:58] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[06:06:58] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[06:06:58] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[06:06:58] =============== [PASSED] drm_test_fb_memcpy ================
[06:06:58] ============= [PASSED] drm_format_helper_test ==============
[06:06:58] ================= drm_format (18 subtests) =================
[06:06:58] [PASSED] drm_test_format_block_width_invalid
[06:06:58] [PASSED] drm_test_format_block_width_one_plane
[06:06:58] [PASSED] drm_test_format_block_width_two_plane
[06:06:58] [PASSED] drm_test_format_block_width_three_plane
[06:06:58] [PASSED] drm_test_format_block_width_tiled
[06:06:58] [PASSED] drm_test_format_block_height_invalid
[06:06:58] [PASSED] drm_test_format_block_height_one_plane
[06:06:58] [PASSED] drm_test_format_block_height_two_plane
[06:06:58] [PASSED] drm_test_format_block_height_three_plane
[06:06:58] [PASSED] drm_test_format_block_height_tiled
[06:06:58] [PASSED] drm_test_format_min_pitch_invalid
[06:06:58] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[06:06:58] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[06:06:58] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[06:06:58] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[06:06:58] [PASSED] drm_test_format_min_pitch_two_plane
[06:06:58] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[06:06:58] [PASSED] drm_test_format_min_pitch_tiled
[06:06:58] =================== [PASSED] drm_format ====================
[06:06:58] ============== drm_framebuffer (10 subtests) ===============
[06:06:58] ========== drm_test_framebuffer_check_src_coords ==========
[06:06:58] [PASSED] Success: source fits into fb
[06:06:58] [PASSED] Fail: overflowing fb with x-axis coordinate
[06:06:58] [PASSED] Fail: overflowing fb with y-axis coordinate
[06:06:58] [PASSED] Fail: overflowing fb with source width
[06:06:58] [PASSED] Fail: overflowing fb with source height
[06:06:58] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[06:06:58] [PASSED] drm_test_framebuffer_cleanup
[06:06:58] =============== drm_test_framebuffer_create ===============
[06:06:58] [PASSED] ABGR8888 normal sizes
[06:06:58] [PASSED] ABGR8888 max sizes
[06:06:58] [PASSED] ABGR8888 pitch greater than min required
[06:06:58] [PASSED] ABGR8888 pitch less than min required
[06:06:58] [PASSED] ABGR8888 Invalid width
[06:06:58] [PASSED] ABGR8888 Invalid buffer handle
[06:06:58] [PASSED] No pixel format
[06:06:58] [PASSED] ABGR8888 Width 0
[06:06:58] [PASSED] ABGR8888 Height 0
[06:06:58] [PASSED] ABGR8888 Out of bound height * pitch combination
[06:06:58] [PASSED] ABGR8888 Large buffer offset
[06:06:58] [PASSED] ABGR8888 Buffer offset for inexistent plane
[06:06:58] [PASSED] ABGR8888 Invalid flag
[06:06:58] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[06:06:58] [PASSED] ABGR8888 Valid buffer modifier
[06:06:58] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[06:06:58] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[06:06:58] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[06:06:58] [PASSED] NV12 Normal sizes
[06:06:58] [PASSED] NV12 Max sizes
[06:06:58] [PASSED] NV12 Invalid pitch
[06:06:58] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[06:06:58] [PASSED] NV12 different modifier per-plane
[06:06:58] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[06:06:58] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[06:06:58] [PASSED] NV12 Modifier for inexistent plane
[06:06:58] [PASSED] NV12 Handle for inexistent plane
[06:06:58] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[06:06:58] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[06:06:58] [PASSED] YVU420 Normal sizes
[06:06:58] [PASSED] YVU420 Max sizes
[06:06:58] [PASSED] YVU420 Invalid pitch
[06:06:58] [PASSED] YVU420 Different pitches
[06:06:58] [PASSED] YVU420 Different buffer offsets/pitches
[06:06:58] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[06:06:58] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[06:06:58] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[06:06:58] [PASSED] YVU420 Valid modifier
[06:06:58] [PASSED] YVU420 Different modifiers per plane
[06:06:58] [PASSED] YVU420 Modifier for inexistent plane
[06:06:58] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[06:06:58] [PASSED] X0L2 Normal sizes
[06:06:58] [PASSED] X0L2 Max sizes
[06:06:58] [PASSED] X0L2 Invalid pitch
[06:06:58] [PASSED] X0L2 Pitch greater than minimum required
[06:06:58] [PASSED] X0L2 Handle for inexistent plane
[06:06:58] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[06:06:58] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[06:06:58] [PASSED] X0L2 Valid modifier
[06:06:58] [PASSED] X0L2 Modifier for inexistent plane
[06:06:58] =========== [PASSED] drm_test_framebuffer_create ===========
[06:06:58] [PASSED] drm_test_framebuffer_free
[06:06:58] [PASSED] drm_test_framebuffer_init
[06:06:58] [PASSED] drm_test_framebuffer_init_bad_format
[06:06:58] [PASSED] drm_test_framebuffer_init_dev_mismatch
[06:06:58] [PASSED] drm_test_framebuffer_lookup
[06:06:58] [PASSED] drm_test_framebuffer_lookup_inexistent
[06:06:58] [PASSED] drm_test_framebuffer_modifiers_not_supported
[06:06:58] ================= [PASSED] drm_framebuffer =================
[06:06:58] ================ drm_gem_shmem (8 subtests) ================
[06:06:58] [PASSED] drm_gem_shmem_test_obj_create
[06:06:58] [PASSED] drm_gem_shmem_test_obj_create_private
[06:06:58] [PASSED] drm_gem_shmem_test_pin_pages
[06:06:58] [PASSED] drm_gem_shmem_test_vmap
[06:06:58] [PASSED] drm_gem_shmem_test_get_pages_sgt
[06:06:58] [PASSED] drm_gem_shmem_test_get_sg_table
[06:06:58] [PASSED] drm_gem_shmem_test_madvise
[06:06:58] [PASSED] drm_gem_shmem_test_purge
[06:06:58] ================== [PASSED] drm_gem_shmem ==================
[06:06:58] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[06:06:58] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[06:06:58] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[06:06:58] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[06:06:58] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[06:06:58] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[06:06:58] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[06:06:58] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[06:06:58] [PASSED] Automatic
[06:06:58] [PASSED] Full
[06:06:58] [PASSED] Limited 16:235
[06:06:58] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[06:06:58] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[06:06:58] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[06:06:58] [PASSED] drm_test_check_disable_connector
[06:06:58] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[06:06:58] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[06:06:58] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[06:06:58] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[06:06:58] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[06:06:58] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[06:06:58] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[06:06:58] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[06:06:58] [PASSED] drm_test_check_output_bpc_dvi
[06:06:58] [PASSED] drm_test_check_output_bpc_format_vic_1
[06:06:58] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[06:06:58] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[06:06:58] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[06:06:58] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[06:06:58] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[06:06:58] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[06:06:58] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[06:06:58] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[06:06:58] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[06:06:58] [PASSED] drm_test_check_broadcast_rgb_value
[06:06:58] [PASSED] drm_test_check_bpc_8_value
[06:06:58] [PASSED] drm_test_check_bpc_10_value
[06:06:58] [PASSED] drm_test_check_bpc_12_value
[06:06:58] [PASSED] drm_test_check_format_value
[06:06:58] [PASSED] drm_test_check_tmds_char_value
[06:06:58] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[06:06:58] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[06:06:58] [PASSED] drm_test_check_mode_valid
[06:06:58] [PASSED] drm_test_check_mode_valid_reject
[06:06:58] [PASSED] drm_test_check_mode_valid_reject_rate
[06:06:58] [PASSED] drm_test_check_mode_valid_reject_max_clock
[06:06:58] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[06:06:58] ================= drm_managed (2 subtests) =================
[06:06:58] [PASSED] drm_test_managed_release_action
[06:06:58] [PASSED] drm_test_managed_run_action
[06:06:58] =================== [PASSED] drm_managed ===================
[06:06:58] =================== drm_mm (6 subtests) ====================
[06:06:58] [PASSED] drm_test_mm_init
[06:06:58] [PASSED] drm_test_mm_debug
[06:06:58] [PASSED] drm_test_mm_align32
[06:06:58] [PASSED] drm_test_mm_align64
[06:06:58] [PASSED] drm_test_mm_lowest
[06:06:58] [PASSED] drm_test_mm_highest
[06:06:58] ===================== [PASSED] drm_mm ======================
[06:06:58] ============= drm_modes_analog_tv (5 subtests) =============
[06:06:58] [PASSED] drm_test_modes_analog_tv_mono_576i
[06:06:58] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[06:06:58] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[06:06:58] [PASSED] drm_test_modes_analog_tv_pal_576i
[06:06:58] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[06:06:58] =============== [PASSED] drm_modes_analog_tv ===============
[06:06:58] ============== drm_plane_helper (2 subtests) ===============
[06:06:58] =============== drm_test_check_plane_state ================
[06:06:58] [PASSED] clipping_simple
[06:06:58] [PASSED] clipping_rotate_reflect
[06:06:58] [PASSED] positioning_simple
[06:06:58] [PASSED] upscaling
[06:06:58] [PASSED] downscaling
[06:06:58] [PASSED] rounding1
[06:06:58] [PASSED] rounding2
[06:06:58] [PASSED] rounding3
[06:06:58] [PASSED] rounding4
[06:06:58] =========== [PASSED] drm_test_check_plane_state ============
[06:06:58] =========== drm_test_check_invalid_plane_state ============
[06:06:58] [PASSED] positioning_invalid
[06:06:58] [PASSED] upscaling_invalid
[06:06:58] [PASSED] downscaling_invalid
[06:06:58] ======= [PASSED] drm_test_check_invalid_plane_state ========
[06:06:58] ================ [PASSED] drm_plane_helper =================
[06:06:58] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[06:06:58] ====== drm_test_connector_helper_tv_get_modes_check =======
[06:06:58] [PASSED] None
[06:06:58] [PASSED] PAL
[06:06:58] [PASSED] NTSC
[06:06:58] [PASSED] Both, NTSC Default
[06:06:58] [PASSED] Both, PAL Default
[06:06:58] [PASSED] Both, NTSC Default, with PAL on command-line
[06:06:58] [PASSED] Both, PAL Default, with NTSC on command-line
[06:06:58] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[06:06:58] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[06:06:58] ================== drm_rect (9 subtests) ===================
[06:06:58] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[06:06:58] [PASSED] drm_test_rect_clip_scaled_not_clipped
[06:06:58] [PASSED] drm_test_rect_clip_scaled_clipped
[06:06:58] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[06:06:58] ================= drm_test_rect_intersect =================
[06:06:58] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[06:06:58] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[06:06:58] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[06:06:58] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[06:06:58] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[06:06:58] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[06:06:58] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[06:06:58] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[06:06:58] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[06:06:58] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[06:06:58] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[06:06:58] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[06:06:58] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[06:06:58] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[06:06:58] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[06:06:58] ============= [PASSED] drm_test_rect_intersect =============
[06:06:58] ================ drm_test_rect_calc_hscale ================
[06:06:58] [PASSED] normal use
[06:06:58] [PASSED] out of max range
[06:06:58] [PASSED] out of min range
[06:06:58] [PASSED] zero dst
[06:06:58] [PASSED] negative src
[06:06:58] [PASSED] negative dst
[06:06:58] ============ [PASSED] drm_test_rect_calc_hscale ============
[06:06:58] ================ drm_test_rect_calc_vscale ================
[06:06:58] [PASSED] normal use
[06:06:58] [PASSED] out of max range
[06:06:58] [PASSED] out of min range
[06:06:58] [PASSED] zero dst
[06:06:58] [PASSED] negative src
[06:06:58] [PASSED] negative dst
[06:06:58] ============ [PASSED] drm_test_rect_calc_vscale ============
[06:06:58] ================== drm_test_rect_rotate ===================
[06:06:58] [PASSED] reflect-x
[06:06:58] [PASSED] reflect-y
[06:06:58] [PASSED] rotate-0
[06:06:58] [PASSED] rotate-90
[06:06:58] [PASSED] rotate-180
[06:06:58] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[06:06:58] ============== [PASSED] drm_test_rect_rotate ===============
[06:06:58] ================ drm_test_rect_rotate_inv =================
[06:06:58] [PASSED] reflect-x
[06:06:58] [PASSED] reflect-y
[06:06:58] [PASSED] rotate-0
[06:06:58] [PASSED] rotate-90
[06:06:58] [PASSED] rotate-180
[06:06:58] [PASSED] rotate-270
[06:06:58] ============ [PASSED] drm_test_rect_rotate_inv =============
[06:06:58] ==================== [PASSED] drm_rect =====================
[06:06:58] ============ drm_sysfb_modeset_test (1 subtest) ============
[06:06:58] ============ drm_test_sysfb_build_fourcc_list =============
[06:06:58] [PASSED] no native formats
[06:06:58] [PASSED] XRGB8888 as native format
[06:06:58] [PASSED] remove duplicates
[06:06:58] [PASSED] convert alpha formats
[06:06:58] [PASSED] random formats
[06:06:58] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[06:06:58] ============= [PASSED] drm_sysfb_modeset_test ==============
[06:06:58] ============================================================
[06:06:58] Testing complete. Ran 616 tests: passed: 616
[06:06:58] Elapsed time: 25.688s total, 1.693s configuring, 23.774s building, 0.190s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[06:06:58] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:07:00] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:07:08] Starting KUnit Kernel (1/1)...
[06:07:08] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:07:08] ================= ttm_device (5 subtests) ==================
[06:07:08] [PASSED] ttm_device_init_basic
[06:07:08] [PASSED] ttm_device_init_multiple
[06:07:08] [PASSED] ttm_device_fini_basic
[06:07:08] [PASSED] ttm_device_init_no_vma_man
[06:07:08] ================== ttm_device_init_pools ==================
[06:07:08] [PASSED] No DMA allocations, no DMA32 required
[06:07:08] [PASSED] DMA allocations, DMA32 required
[06:07:08] [PASSED] No DMA allocations, DMA32 required
[06:07:08] [PASSED] DMA allocations, no DMA32 required
[06:07:08] ============== [PASSED] ttm_device_init_pools ==============
[06:07:08] =================== [PASSED] ttm_device ====================
[06:07:08] ================== ttm_pool (8 subtests) ===================
[06:07:08] ================== ttm_pool_alloc_basic ===================
[06:07:08] [PASSED] One page
[06:07:08] [PASSED] More than one page
[06:07:08] [PASSED] Above the allocation limit
[06:07:08] [PASSED] One page, with coherent DMA mappings enabled
[06:07:08] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[06:07:08] ============== [PASSED] ttm_pool_alloc_basic ===============
[06:07:08] ============== ttm_pool_alloc_basic_dma_addr ==============
[06:07:08] [PASSED] One page
[06:07:08] [PASSED] More than one page
[06:07:08] [PASSED] Above the allocation limit
[06:07:08] [PASSED] One page, with coherent DMA mappings enabled
[06:07:08] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[06:07:08] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[06:07:08] [PASSED] ttm_pool_alloc_order_caching_match
[06:07:08] [PASSED] ttm_pool_alloc_caching_mismatch
[06:07:08] [PASSED] ttm_pool_alloc_order_mismatch
[06:07:08] [PASSED] ttm_pool_free_dma_alloc
[06:07:08] [PASSED] ttm_pool_free_no_dma_alloc
[06:07:08] [PASSED] ttm_pool_fini_basic
[06:07:08] ==================== [PASSED] ttm_pool =====================
[06:07:08] ================ ttm_resource (8 subtests) =================
[06:07:08] ================= ttm_resource_init_basic =================
[06:07:08] [PASSED] Init resource in TTM_PL_SYSTEM
[06:07:08] [PASSED] Init resource in TTM_PL_VRAM
[06:07:08] [PASSED] Init resource in a private placement
[06:07:08] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[06:07:08] ============= [PASSED] ttm_resource_init_basic =============
[06:07:08] [PASSED] ttm_resource_init_pinned
[06:07:08] [PASSED] ttm_resource_fini_basic
[06:07:08] [PASSED] ttm_resource_manager_init_basic
[06:07:08] [PASSED] ttm_resource_manager_usage_basic
[06:07:08] [PASSED] ttm_resource_manager_set_used_basic
[06:07:08] [PASSED] ttm_sys_man_alloc_basic
[06:07:08] [PASSED] ttm_sys_man_free_basic
[06:07:08] ================== [PASSED] ttm_resource ===================
[06:07:08] =================== ttm_tt (15 subtests) ===================
[06:07:08] ==================== ttm_tt_init_basic ====================
[06:07:08] [PASSED] Page-aligned size
[06:07:08] [PASSED] Extra pages requested
[06:07:08] ================ [PASSED] ttm_tt_init_basic ================
[06:07:08] [PASSED] ttm_tt_init_misaligned
[06:07:08] [PASSED] ttm_tt_fini_basic
[06:07:08] [PASSED] ttm_tt_fini_sg
[06:07:08] [PASSED] ttm_tt_fini_shmem
[06:07:08] [PASSED] ttm_tt_create_basic
[06:07:08] [PASSED] ttm_tt_create_invalid_bo_type
[06:07:08] [PASSED] ttm_tt_create_ttm_exists
[06:07:08] [PASSED] ttm_tt_create_failed
[06:07:08] [PASSED] ttm_tt_destroy_basic
[06:07:08] [PASSED] ttm_tt_populate_null_ttm
[06:07:08] [PASSED] ttm_tt_populate_populated_ttm
[06:07:08] [PASSED] ttm_tt_unpopulate_basic
[06:07:08] [PASSED] ttm_tt_unpopulate_empty_ttm
[06:07:08] [PASSED] ttm_tt_swapin_basic
[06:07:08] ===================== [PASSED] ttm_tt ======================
[06:07:08] =================== ttm_bo (14 subtests) ===================
[06:07:08] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[06:07:08] [PASSED] Cannot be interrupted and sleeps
[06:07:08] [PASSED] Cannot be interrupted, locks straight away
[06:07:08] [PASSED] Can be interrupted, sleeps
[06:07:08] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[06:07:08] [PASSED] ttm_bo_reserve_locked_no_sleep
[06:07:08] [PASSED] ttm_bo_reserve_no_wait_ticket
[06:07:08] [PASSED] ttm_bo_reserve_double_resv
[06:07:08] [PASSED] ttm_bo_reserve_interrupted
[06:07:08] [PASSED] ttm_bo_reserve_deadlock
[06:07:08] [PASSED] ttm_bo_unreserve_basic
[06:07:08] [PASSED] ttm_bo_unreserve_pinned
[06:07:08] [PASSED] ttm_bo_unreserve_bulk
[06:07:08] [PASSED] ttm_bo_put_basic
[06:07:08] [PASSED] ttm_bo_put_shared_resv
[06:07:08] [PASSED] ttm_bo_pin_basic
[06:07:08] [PASSED] ttm_bo_pin_unpin_resource
[06:07:08] [PASSED] ttm_bo_multiple_pin_one_unpin
[06:07:08] ===================== [PASSED] ttm_bo ======================
[06:07:08] ============== ttm_bo_validate (21 subtests) ===============
[06:07:08] ============== ttm_bo_init_reserved_sys_man ===============
[06:07:08] [PASSED] Buffer object for userspace
[06:07:08] [PASSED] Kernel buffer object
[06:07:08] [PASSED] Shared buffer object
[06:07:08] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[06:07:08] ============== ttm_bo_init_reserved_mock_man ==============
[06:07:08] [PASSED] Buffer object for userspace
[06:07:08] [PASSED] Kernel buffer object
[06:07:08] [PASSED] Shared buffer object
[06:07:08] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[06:07:08] [PASSED] ttm_bo_init_reserved_resv
[06:07:08] ================== ttm_bo_validate_basic ==================
[06:07:08] [PASSED] Buffer object for userspace
[06:07:08] [PASSED] Kernel buffer object
[06:07:08] [PASSED] Shared buffer object
[06:07:08] ============== [PASSED] ttm_bo_validate_basic ==============
[06:07:08] [PASSED] ttm_bo_validate_invalid_placement
[06:07:08] ============= ttm_bo_validate_same_placement ==============
[06:07:08] [PASSED] System manager
[06:07:08] [PASSED] VRAM manager
[06:07:08] ========= [PASSED] ttm_bo_validate_same_placement ==========
[06:07:08] [PASSED] ttm_bo_validate_failed_alloc
[06:07:08] [PASSED] ttm_bo_validate_pinned
[06:07:08] [PASSED] ttm_bo_validate_busy_placement
[06:07:08] ================ ttm_bo_validate_multihop =================
[06:07:08] [PASSED] Buffer object for userspace
[06:07:08] [PASSED] Kernel buffer object
[06:07:08] [PASSED] Shared buffer object
[06:07:08] ============ [PASSED] ttm_bo_validate_multihop =============
[06:07:08] ========== ttm_bo_validate_no_placement_signaled ==========
[06:07:08] [PASSED] Buffer object in system domain, no page vector
[06:07:08] [PASSED] Buffer object in system domain with an existing page vector
[06:07:08] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[06:07:08] ======== ttm_bo_validate_no_placement_not_signaled ========
[06:07:08] [PASSED] Buffer object for userspace
[06:07:08] [PASSED] Kernel buffer object
[06:07:08] [PASSED] Shared buffer object
[06:07:08] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[06:07:08] [PASSED] ttm_bo_validate_move_fence_signaled
[06:07:08] ========= ttm_bo_validate_move_fence_not_signaled =========
[06:07:08] [PASSED] Waits for GPU
[06:07:08] [PASSED] Tries to lock straight away
[06:07:08] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[06:07:08] [PASSED] ttm_bo_validate_happy_evict
[06:07:08] [PASSED] ttm_bo_validate_all_pinned_evict
[06:07:08] [PASSED] ttm_bo_validate_allowed_only_evict
[06:07:08] [PASSED] ttm_bo_validate_deleted_evict
[06:07:08] [PASSED] ttm_bo_validate_busy_domain_evict
[06:07:08] [PASSED] ttm_bo_validate_evict_gutting
[06:07:08] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[06:07:08] ================= [PASSED] ttm_bo_validate =================
[06:07:08] ============================================================
[06:07:08] Testing complete. Ran 101 tests: passed: 101
[06:07:08] Elapsed time: 9.914s total, 1.751s configuring, 7.947s building, 0.170s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] drm/xe/pcode: Initialize data0 for pcode read routine
2025-08-19 20:10 [PATCH] drm/xe/pcode: Initialize data0 for pcode read routine Stuart Summers
2025-08-20 6:07 ` ✓ CI.KUnit: success for drm/xe/pcode: Initialize data0 for pcode read routine (rev3) Patchwork
@ 2025-08-20 6:38 ` Raag Jadav
2025-08-20 7:29 ` ✓ Xe.CI.BAT: success for drm/xe/pcode: Initialize data0 for pcode read routine (rev3) Patchwork
` (2 subsequent siblings)
4 siblings, 0 replies; 14+ messages in thread
From: Raag Jadav @ 2025-08-20 6:38 UTC (permalink / raw)
To: Stuart Summers, badal.nilawar, karthik.poosa
Cc: intel-xe, rodrigo.vivi, Jonathan Cavitt
+ pcode experts
On Tue, Aug 19, 2025 at 08:10:54PM +0000, Stuart Summers wrote:
> There are two registers filled in when reading data from
> pcode besides the mailbox itself. Currently, we allow a NULL
> value for the second of these two (data1) and assume the first
> is defined. However, many of the routines that are calling
> this function assume that pcode will ignore the value being
> passed in and so leave that first value (data0) defined but
> uninitialized. To be safe, make sure this value is always
> initialized to something (0 generally) in the event pcode
> behavior changes and starts using this value.
>
> v2: Fix sob/author
>
> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> ---
> drivers/gpu/drm/xe/xe_device_sysfs.c | 8 ++++----
> drivers/gpu/drm/xe/xe_hwmon.c | 8 ++++----
> drivers/gpu/drm/xe/xe_vram_freq.c | 4 ++--
> 3 files changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_device_sysfs.c b/drivers/gpu/drm/xe/xe_device_sysfs.c
> index bd9015761aa0..6ee422594b56 100644
> --- a/drivers/gpu/drm/xe/xe_device_sysfs.c
> +++ b/drivers/gpu/drm/xe/xe_device_sysfs.c
> @@ -76,7 +76,7 @@ lb_fan_control_version_show(struct device *dev, struct device_attribute *attr, c
> {
> struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
> struct xe_tile *root = xe_device_get_root_tile(xe);
> - u32 cap, ver_low = FAN_TABLE, ver_high = FAN_TABLE;
> + u32 cap = 0, ver_low = FAN_TABLE, ver_high = FAN_TABLE;
> u16 major = 0, minor = 0, hotfix = 0, build = 0;
> int ret;
>
> @@ -115,7 +115,7 @@ lb_voltage_regulator_version_show(struct device *dev, struct device_attribute *a
> {
> struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
> struct xe_tile *root = xe_device_get_root_tile(xe);
> - u32 cap, ver_low = VR_CONFIG, ver_high = VR_CONFIG;
> + u32 cap = 0, ver_low = VR_CONFIG, ver_high = VR_CONFIG;
> u16 major = 0, minor = 0, hotfix = 0, build = 0;
> int ret;
>
> @@ -153,7 +153,7 @@ static int late_bind_create_files(struct device *dev)
> {
> struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
> struct xe_tile *root = xe_device_get_root_tile(xe);
> - u32 cap;
> + u32 cap = 0;
> int ret;
>
> xe_pm_runtime_get(xe);
> @@ -186,7 +186,7 @@ static void late_bind_remove_files(struct device *dev)
> {
> struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
> struct xe_tile *root = xe_device_get_root_tile(xe);
> - u32 cap;
> + u32 cap = 0;
> int ret;
>
> xe_pm_runtime_get(xe);
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index c17ed1ae8649..32a76ae6e9dc 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -179,7 +179,7 @@ static int xe_hwmon_pcode_rmw_power_limit(const struct xe_hwmon *hwmon, u32 attr
> u32 clr, u32 set)
> {
> struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
> - u32 val0, val1;
> + u32 val0 = 0, val1 = 0;
> int ret = 0;
>
> ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_POWER_SETUP,
> @@ -734,7 +734,7 @@ static int xe_hwmon_power_curr_crit_read(struct xe_hwmon *hwmon, int channel,
> long *value, u32 scale_factor)
> {
> int ret;
> - u32 uval;
> + u32 uval = 0;
>
> mutex_lock(&hwmon->hwmon_lock);
>
> @@ -918,7 +918,7 @@ xe_hwmon_power_write(struct xe_hwmon *hwmon, u32 attr, int channel, long val)
> static umode_t
> xe_hwmon_curr_is_visible(const struct xe_hwmon *hwmon, u32 attr, int channel)
> {
> - u32 uval;
> + u32 uval = 0;
>
> /* hwmon sysfs attribute of current available only for package */
> if (channel != CHANNEL_PKG)
> @@ -1020,7 +1020,7 @@ xe_hwmon_energy_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
> static umode_t
> xe_hwmon_fan_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
> {
> - u32 uval;
> + u32 uval = 0;
>
> if (!hwmon->xe->info.has_fan_control)
> return 0;
> diff --git a/drivers/gpu/drm/xe/xe_vram_freq.c b/drivers/gpu/drm/xe/xe_vram_freq.c
> index b26e26d73dae..17bc84da4cdc 100644
> --- a/drivers/gpu/drm/xe/xe_vram_freq.c
> +++ b/drivers/gpu/drm/xe/xe_vram_freq.c
> @@ -34,7 +34,7 @@ static ssize_t max_freq_show(struct device *dev, struct device_attribute *attr,
> char *buf)
> {
> struct xe_tile *tile = dev_to_tile(dev);
> - u32 val, mbox;
> + u32 val = 0, mbox;
> int err;
>
> mbox = REG_FIELD_PREP(PCODE_MB_COMMAND, PCODE_FREQUENCY_CONFIG)
> @@ -56,7 +56,7 @@ static ssize_t min_freq_show(struct device *dev, struct device_attribute *attr,
> char *buf)
> {
> struct xe_tile *tile = dev_to_tile(dev);
> - u32 val, mbox;
> + u32 val = 0, mbox;
> int err;
>
> mbox = REG_FIELD_PREP(PCODE_MB_COMMAND, PCODE_FREQUENCY_CONFIG)
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* ✓ Xe.CI.BAT: success for drm/xe/pcode: Initialize data0 for pcode read routine (rev3)
2025-08-19 20:10 [PATCH] drm/xe/pcode: Initialize data0 for pcode read routine Stuart Summers
2025-08-20 6:07 ` ✓ CI.KUnit: success for drm/xe/pcode: Initialize data0 for pcode read routine (rev3) Patchwork
2025-08-20 6:38 ` [PATCH] drm/xe/pcode: Initialize data0 for pcode read routine Raag Jadav
@ 2025-08-20 7:29 ` Patchwork
2025-08-21 2:11 ` ✗ Xe.CI.Full: failure " Patchwork
2025-08-22 16:26 ` [PATCH] drm/xe/pcode: Initialize data0 for pcode read routine Rodrigo Vivi
4 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2025-08-20 7:29 UTC (permalink / raw)
To: Stuart Summers; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 888 bytes --]
== Series Details ==
Series: drm/xe/pcode: Initialize data0 for pcode read routine (rev3)
URL : https://patchwork.freedesktop.org/series/152700/
State : success
== Summary ==
CI Bug Log - changes from xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621_BAT -> xe-pw-152700v3_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (11 -> 9)
------------------------------
Missing (2): bat-adlp-vm bat-ptl-vm
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621 -> xe-pw-152700v3
IGT_8498: 8498
xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621: 58aeea9c7882b70436d9c2e55e45738711a41621
xe-pw-152700v3: 152700v3
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/index.html
[-- Attachment #2: Type: text/html, Size: 1436 bytes --]
^ permalink raw reply [flat|nested] 14+ messages in thread
* ✗ Xe.CI.Full: failure for drm/xe/pcode: Initialize data0 for pcode read routine (rev3)
2025-08-19 20:10 [PATCH] drm/xe/pcode: Initialize data0 for pcode read routine Stuart Summers
` (2 preceding siblings ...)
2025-08-20 7:29 ` ✓ Xe.CI.BAT: success for drm/xe/pcode: Initialize data0 for pcode read routine (rev3) Patchwork
@ 2025-08-21 2:11 ` Patchwork
2025-08-22 16:26 ` [PATCH] drm/xe/pcode: Initialize data0 for pcode read routine Rodrigo Vivi
4 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2025-08-21 2:11 UTC (permalink / raw)
To: Stuart Summers; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 28854 bytes --]
== Series Details ==
Series: drm/xe/pcode: Initialize data0 for pcode read routine (rev3)
URL : https://patchwork.freedesktop.org/series/152700/
State : failure
== Summary ==
CI Bug Log - changes from xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621_FULL -> xe-pw-152700v3_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-152700v3_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-152700v3_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-152700v3_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@xe_exec_system_allocator@process-many-stride-malloc-bo-unmap-nomemset:
- shard-bmg: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-bmg-1/igt@xe_exec_system_allocator@process-many-stride-malloc-bo-unmap-nomemset.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-1/igt@xe_exec_system_allocator@process-many-stride-malloc-bo-unmap-nomemset.html
Known issues
------------
Here are the changes found in xe-pw-152700v3_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-c-edp-1:
- shard-lnl: [PASS][3] -> [FAIL][4] ([Intel XE#911]) +3 other tests fail
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-lnl-3/igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-c-edp-1.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-lnl-5/igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-c-edp-1.html
* igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1:
- shard-adlp: [PASS][5] -> [FAIL][6] ([Intel XE#3908]) +1 other test fail
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-adlp-3/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-adlp-2/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1.html
* igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p:
- shard-dg2-set2: NOTRUN -> [SKIP][7] ([Intel XE#2191])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-dg2-463/igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-b-dp-2:
- shard-bmg: NOTRUN -> [SKIP][8] ([Intel XE#2652] / [Intel XE#787]) +3 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-1/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-b-dp-2.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][9] ([Intel XE#455] / [Intel XE#787]) +12 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-dg2-434/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc@pipe-d-dp-4.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs@pipe-c-hdmi-a-2:
- shard-dg2-set2: NOTRUN -> [SKIP][10] ([Intel XE#787]) +90 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-dg2-432/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs@pipe-c-hdmi-a-2.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-a-dp-2:
- shard-bmg: [PASS][11] -> [FAIL][12] ([Intel XE#5376]) +2 other tests fail
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-bmg-2/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-a-dp-2.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-7/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-a-dp-2.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6:
- shard-dg2-set2: [PASS][13] -> [INCOMPLETE][14] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][15] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-6.html
* igt@kms_color@ctm-red-to-blue@pipe-d-hdmi-a-1:
- shard-adlp: [PASS][16] -> [DMESG-WARN][17] ([Intel XE#3868]) +1 other test dmesg-warn
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-adlp-1/igt@kms_color@ctm-red-to-blue@pipe-d-hdmi-a-1.html
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-adlp-3/igt@kms_color@ctm-red-to-blue@pipe-d-hdmi-a-1.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size:
- shard-bmg: [PASS][18] -> [SKIP][19] ([Intel XE#2291])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-bmg-2/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic:
- shard-bmg: [PASS][20] -> [FAIL][21] ([Intel XE#1475]) +1 other test fail
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
* igt@kms_cursor_legacy@flip-vs-cursor-legacy:
- shard-bmg: [PASS][22] -> [FAIL][23] ([Intel XE#5299])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-bmg-3/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-2/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
* igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible:
- shard-bmg: [PASS][24] -> [SKIP][25] ([Intel XE#2316])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-bmg-2/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html
* igt@kms_flip@flip-vs-blocking-wf-vblank@c-hdmi-a1:
- shard-adlp: [PASS][26] -> [DMESG-WARN][27] ([Intel XE#4543]) +6 other tests dmesg-warn
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-adlp-4/igt@kms_flip@flip-vs-blocking-wf-vblank@c-hdmi-a1.html
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-adlp-1/igt@kms_flip@flip-vs-blocking-wf-vblank@c-hdmi-a1.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
- shard-lnl: [PASS][28] -> [FAIL][29] ([Intel XE#301]) +1 other test fail
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-lnl: [PASS][30] -> [FAIL][31] ([Intel XE#301] / [Intel XE#3149]) +1 other test fail
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_flip@flip-vs-rmfb-interruptible:
- shard-adlp: [PASS][32] -> [DMESG-WARN][33] ([Intel XE#4543] / [Intel XE#5208]) +1 other test dmesg-warn
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-adlp-8/igt@kms_flip@flip-vs-rmfb-interruptible.html
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-adlp-3/igt@kms_flip@flip-vs-rmfb-interruptible.html
* igt@kms_flip@flip-vs-suspend@d-hdmi-a1:
- shard-adlp: [PASS][34] -> [DMESG-WARN][35] ([Intel XE#2953] / [Intel XE#4173]) +5 other tests dmesg-warn
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-adlp-6/igt@kms_flip@flip-vs-suspend@d-hdmi-a1.html
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-adlp-2/igt@kms_flip@flip-vs-suspend@d-hdmi-a1.html
* igt@kms_flip@modeset-vs-vblank-race:
- shard-bmg: NOTRUN -> [INCOMPLETE][36] ([Intel XE#2049]) +1 other test incomplete
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-7/igt@kms_flip@modeset-vs-vblank-race.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-x-to-y:
- shard-adlp: [PASS][37] -> [FAIL][38] ([Intel XE#1874])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-adlp-6/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-x-to-y.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-adlp-4/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-x-to-y.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-to-x:
- shard-adlp: [PASS][39] -> [DMESG-FAIL][40] ([Intel XE#4543]) +1 other test dmesg-fail
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-adlp-6/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-to-x.html
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-adlp-4/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-to-x.html
* igt@kms_setmode@basic:
- shard-bmg: [PASS][41] -> [FAIL][42] ([Intel XE#2883]) +3 other tests fail
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-bmg-4/igt@kms_setmode@basic.html
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-3/igt@kms_setmode@basic.html
* igt@kms_setmode@basic@pipe-b-edp-1:
- shard-lnl: [PASS][43] -> [FAIL][44] ([Intel XE#2883]) +2 other tests fail
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-lnl-7/igt@kms_setmode@basic@pipe-b-edp-1.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-lnl-4/igt@kms_setmode@basic@pipe-b-edp-1.html
* igt@xe_eudebug@vma-ufence-faultable:
- shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#4837])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-5/igt@xe_eudebug@vma-ufence-faultable.html
* igt@xe_exec_basic@multigpu-once-null:
- shard-dg2-set2: [PASS][46] -> [SKIP][47] ([Intel XE#1392]) +5 other tests skip
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-dg2-433/igt@xe_exec_basic@multigpu-once-null.html
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-dg2-432/igt@xe_exec_basic@multigpu-once-null.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-free-race:
- shard-dg2-set2: NOTRUN -> [SKIP][48] ([Intel XE#4915]) +1 other test skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-dg2-463/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-free-race.html
* igt@xe_exec_threads@threads-hang-fd-rebind:
- shard-dg2-set2: [PASS][49] -> [DMESG-WARN][50] ([Intel XE#3876])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-dg2-433/igt@xe_exec_threads@threads-hang-fd-rebind.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-dg2-432/igt@xe_exec_threads@threads-hang-fd-rebind.html
#### Possible fixes ####
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4:
- shard-dg2-set2: [INCOMPLETE][51] ([Intel XE#3124]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4.html
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6:
- shard-dg2-set2: [DMESG-WARN][53] ([Intel XE#1727] / [Intel XE#3113]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6.html
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6.html
* igt@kms_cursor_legacy@torture-bo@pipe-a:
- shard-bmg: [DMESG-WARN][55] ([Intel XE#5354]) -> [PASS][56] +1 other test pass
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-bmg-4/igt@kms_cursor_legacy@torture-bo@pipe-a.html
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-3/igt@kms_cursor_legacy@torture-bo@pipe-a.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc:
- shard-bmg: [SKIP][57] ([Intel XE#1340]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-bmg-6/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-1/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
* igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
- shard-bmg: [SKIP][59] ([Intel XE#2316]) -> [PASS][60] +2 other tests pass
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-bmg-6/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-1/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
* igt@kms_flip@basic-flip-vs-dpms@c-hdmi-a1:
- shard-adlp: [DMESG-WARN][61] ([Intel XE#4543]) -> [PASS][62] +1 other test pass
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-adlp-8/igt@kms_flip@basic-flip-vs-dpms@c-hdmi-a1.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-adlp-3/igt@kms_flip@basic-flip-vs-dpms@c-hdmi-a1.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-x-to-x:
- shard-adlp: [DMESG-FAIL][63] ([Intel XE#4543]) -> [PASS][64] +1 other test pass
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-adlp-6/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-x-to-x.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-adlp-4/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-x-to-x.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-x-to-y:
- shard-adlp: [FAIL][65] ([Intel XE#1874]) -> [PASS][66]
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-adlp-6/igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-x-to-y.html
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-adlp-4/igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-x-to-y.html
* igt@kms_hdr@static-toggle:
- shard-bmg: [SKIP][67] ([Intel XE#1503]) -> [PASS][68]
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-bmg-6/igt@kms_hdr@static-toggle.html
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-1/igt@kms_hdr@static-toggle.html
* igt@kms_joiner@basic-force-big-joiner:
- shard-bmg: [SKIP][69] ([Intel XE#3012]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-bmg-6/igt@kms_joiner@basic-force-big-joiner.html
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-1/igt@kms_joiner@basic-force-big-joiner.html
* igt@kms_plane_multiple@2x-tiling-none:
- shard-bmg: [SKIP][71] ([Intel XE#4596]) -> [PASS][72]
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-none.html
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-1/igt@kms_plane_multiple@2x-tiling-none.html
* igt@kms_setmode@basic@pipe-a-hdmi-a-6:
- shard-dg2-set2: [FAIL][73] ([Intel XE#2883]) -> [PASS][74] +6 other tests pass
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-dg2-436/igt@kms_setmode@basic@pipe-a-hdmi-a-6.html
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-dg2-433/igt@kms_setmode@basic@pipe-a-hdmi-a-6.html
* igt@kms_vblank@wait-forked-hang:
- shard-adlp: [DMESG-WARN][75] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][76]
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-adlp-1/igt@kms_vblank@wait-forked-hang.html
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-adlp-4/igt@kms_vblank@wait-forked-hang.html
* igt@xe_exec_basic@multigpu-no-exec-rebind:
- shard-dg2-set2: [SKIP][77] ([Intel XE#1392]) -> [PASS][78] +3 other tests pass
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-rebind.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-dg2-434/igt@xe_exec_basic@multigpu-no-exec-rebind.html
* igt@xe_exec_basic@once-rebind:
- shard-adlp: [DMESG-FAIL][79] ([Intel XE#3876]) -> [PASS][80]
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-adlp-6/igt@xe_exec_basic@once-rebind.html
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-adlp-8/igt@xe_exec_basic@once-rebind.html
* igt@xe_exec_system_allocator@process-many-malloc-bo-unmap-nomemset:
- shard-bmg: [FAIL][81] -> [PASS][82]
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-bmg-8/igt@xe_exec_system_allocator@process-many-malloc-bo-unmap-nomemset.html
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-3/igt@xe_exec_system_allocator@process-many-malloc-bo-unmap-nomemset.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-new-bo-map-nomemset:
- shard-lnl: [FAIL][83] -> [PASS][84] +1 other test pass
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-lnl-2/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-new-bo-map-nomemset.html
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-lnl-8/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-new-bo-map-nomemset.html
#### Warnings ####
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
- shard-dg2-set2: [INCOMPLETE][85] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) -> [INCOMPLETE][86] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124])
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-blt:
- shard-bmg: [SKIP][87] ([Intel XE#2311]) -> [SKIP][88] ([Intel XE#2312]) +4 other tests skip
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-blt.html
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-bmg: [SKIP][89] ([Intel XE#2312]) -> [SKIP][90] ([Intel XE#2311]) +3 other tests skip
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-shrfb-draw-mmap-wc.html
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-pri-indfb-multidraw:
- shard-bmg: [SKIP][91] ([Intel XE#2312]) -> [SKIP][92] ([Intel XE#5390]) +2 other tests skip
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-pri-indfb-multidraw.html
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-render:
- shard-bmg: [SKIP][93] ([Intel XE#5390]) -> [SKIP][94] ([Intel XE#2312])
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-render.html
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][95] ([Intel XE#2313]) -> [SKIP][96] ([Intel XE#2312]) +3 other tests skip
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-mmap-wc.html
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt:
- shard-bmg: [SKIP][97] ([Intel XE#2312]) -> [SKIP][98] ([Intel XE#2313]) +3 other tests skip
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt.html
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-1/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt.html
* igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
- shard-bmg: [SKIP][99] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836]) -> [ABORT][100] ([Intel XE#4760] / [Intel XE#5545])
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-bmg-3/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-2/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
* igt@xe_pmu@fn-engine-activity-sched-if-idle:
- shard-bmg: [ABORT][101] ([Intel XE#3970]) -> [DMESG-WARN][102] ([Intel XE#3876])
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621/shard-bmg-3/igt@xe_pmu@fn-engine-activity-sched-if-idle.html
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/shard-bmg-7/igt@xe_pmu@fn-engine-activity-sched-if-idle.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1475]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1475
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1874
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2883]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2883
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#3124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3124
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3868]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3868
[Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876
[Intel XE#3908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3908
[Intel XE#3970]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3970
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4760
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#5208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5208
[Intel XE#5299]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5299
[Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
[Intel XE#5376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5376
[Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
[Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/911
Build changes
-------------
* Linux: xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621 -> xe-pw-152700v3
IGT_8498: 8498
xe-3582-58aeea9c7882b70436d9c2e55e45738711a41621: 58aeea9c7882b70436d9c2e55e45738711a41621
xe-pw-152700v3: 152700v3
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152700v3/index.html
[-- Attachment #2: Type: text/html, Size: 33481 bytes --]
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] drm/xe/pcode: Initialize data0 for pcode read routine
2025-08-19 20:10 [PATCH] drm/xe/pcode: Initialize data0 for pcode read routine Stuart Summers
` (3 preceding siblings ...)
2025-08-21 2:11 ` ✗ Xe.CI.Full: failure " Patchwork
@ 2025-08-22 16:26 ` Rodrigo Vivi
4 siblings, 0 replies; 14+ messages in thread
From: Rodrigo Vivi @ 2025-08-22 16:26 UTC (permalink / raw)
To: Stuart Summers; +Cc: intel-xe, raag.jadav, Jonathan Cavitt
On Tue, Aug 19, 2025 at 08:10:54PM +0000, Stuart Summers wrote:
> There are two registers filled in when reading data from
> pcode besides the mailbox itself. Currently, we allow a NULL
> value for the second of these two (data1) and assume the first
> is defined. However, many of the routines that are calling
> this function assume that pcode will ignore the value being
> passed in and so leave that first value (data0) defined but
> uninitialized. To be safe, make sure this value is always
> initialized to something (0 generally) in the event pcode
> behavior changes and starts using this value.
>
> v2: Fix sob/author
pushed to drm-xe-next. Thank you all
>
> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> ---
> drivers/gpu/drm/xe/xe_device_sysfs.c | 8 ++++----
> drivers/gpu/drm/xe/xe_hwmon.c | 8 ++++----
> drivers/gpu/drm/xe/xe_vram_freq.c | 4 ++--
> 3 files changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_device_sysfs.c b/drivers/gpu/drm/xe/xe_device_sysfs.c
> index bd9015761aa0..6ee422594b56 100644
> --- a/drivers/gpu/drm/xe/xe_device_sysfs.c
> +++ b/drivers/gpu/drm/xe/xe_device_sysfs.c
> @@ -76,7 +76,7 @@ lb_fan_control_version_show(struct device *dev, struct device_attribute *attr, c
> {
> struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
> struct xe_tile *root = xe_device_get_root_tile(xe);
> - u32 cap, ver_low = FAN_TABLE, ver_high = FAN_TABLE;
> + u32 cap = 0, ver_low = FAN_TABLE, ver_high = FAN_TABLE;
> u16 major = 0, minor = 0, hotfix = 0, build = 0;
> int ret;
>
> @@ -115,7 +115,7 @@ lb_voltage_regulator_version_show(struct device *dev, struct device_attribute *a
> {
> struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
> struct xe_tile *root = xe_device_get_root_tile(xe);
> - u32 cap, ver_low = VR_CONFIG, ver_high = VR_CONFIG;
> + u32 cap = 0, ver_low = VR_CONFIG, ver_high = VR_CONFIG;
> u16 major = 0, minor = 0, hotfix = 0, build = 0;
> int ret;
>
> @@ -153,7 +153,7 @@ static int late_bind_create_files(struct device *dev)
> {
> struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
> struct xe_tile *root = xe_device_get_root_tile(xe);
> - u32 cap;
> + u32 cap = 0;
> int ret;
>
> xe_pm_runtime_get(xe);
> @@ -186,7 +186,7 @@ static void late_bind_remove_files(struct device *dev)
> {
> struct xe_device *xe = pdev_to_xe_device(to_pci_dev(dev));
> struct xe_tile *root = xe_device_get_root_tile(xe);
> - u32 cap;
> + u32 cap = 0;
> int ret;
>
> xe_pm_runtime_get(xe);
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index c17ed1ae8649..32a76ae6e9dc 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -179,7 +179,7 @@ static int xe_hwmon_pcode_rmw_power_limit(const struct xe_hwmon *hwmon, u32 attr
> u32 clr, u32 set)
> {
> struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
> - u32 val0, val1;
> + u32 val0 = 0, val1 = 0;
> int ret = 0;
>
> ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_POWER_SETUP,
> @@ -734,7 +734,7 @@ static int xe_hwmon_power_curr_crit_read(struct xe_hwmon *hwmon, int channel,
> long *value, u32 scale_factor)
> {
> int ret;
> - u32 uval;
> + u32 uval = 0;
>
> mutex_lock(&hwmon->hwmon_lock);
>
> @@ -918,7 +918,7 @@ xe_hwmon_power_write(struct xe_hwmon *hwmon, u32 attr, int channel, long val)
> static umode_t
> xe_hwmon_curr_is_visible(const struct xe_hwmon *hwmon, u32 attr, int channel)
> {
> - u32 uval;
> + u32 uval = 0;
>
> /* hwmon sysfs attribute of current available only for package */
> if (channel != CHANNEL_PKG)
> @@ -1020,7 +1020,7 @@ xe_hwmon_energy_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
> static umode_t
> xe_hwmon_fan_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
> {
> - u32 uval;
> + u32 uval = 0;
>
> if (!hwmon->xe->info.has_fan_control)
> return 0;
> diff --git a/drivers/gpu/drm/xe/xe_vram_freq.c b/drivers/gpu/drm/xe/xe_vram_freq.c
> index b26e26d73dae..17bc84da4cdc 100644
> --- a/drivers/gpu/drm/xe/xe_vram_freq.c
> +++ b/drivers/gpu/drm/xe/xe_vram_freq.c
> @@ -34,7 +34,7 @@ static ssize_t max_freq_show(struct device *dev, struct device_attribute *attr,
> char *buf)
> {
> struct xe_tile *tile = dev_to_tile(dev);
> - u32 val, mbox;
> + u32 val = 0, mbox;
> int err;
>
> mbox = REG_FIELD_PREP(PCODE_MB_COMMAND, PCODE_FREQUENCY_CONFIG)
> @@ -56,7 +56,7 @@ static ssize_t min_freq_show(struct device *dev, struct device_attribute *attr,
> char *buf)
> {
> struct xe_tile *tile = dev_to_tile(dev);
> - u32 val, mbox;
> + u32 val = 0, mbox;
> int err;
>
> mbox = REG_FIELD_PREP(PCODE_MB_COMMAND, PCODE_FREQUENCY_CONFIG)
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2025-08-22 16:27 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-08-19 20:10 [PATCH] drm/xe/pcode: Initialize data0 for pcode read routine Stuart Summers
2025-08-20 6:07 ` ✓ CI.KUnit: success for drm/xe/pcode: Initialize data0 for pcode read routine (rev3) Patchwork
2025-08-20 6:38 ` [PATCH] drm/xe/pcode: Initialize data0 for pcode read routine Raag Jadav
2025-08-20 7:29 ` ✓ Xe.CI.BAT: success for drm/xe/pcode: Initialize data0 for pcode read routine (rev3) Patchwork
2025-08-21 2:11 ` ✗ Xe.CI.Full: failure " Patchwork
2025-08-22 16:26 ` [PATCH] drm/xe/pcode: Initialize data0 for pcode read routine Rodrigo Vivi
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2025-08-13 19:54 stuartsummers
2025-08-17 16:36 ` Rodrigo Vivi
2025-08-19 14:40 ` Summers, Stuart
2025-08-08 15:36 stuartsummers
2025-08-08 16:38 ` Cavitt, Jonathan
2025-08-08 17:01 ` Summers, Stuart
2025-08-10 9:26 ` Raag Jadav
2025-08-11 15:29 ` Summers, Stuart
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