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* [PATCH v2 0/6] drm/xe: Add user commands to WA BB via configfs
@ 2025-08-27 22:35 Lucas De Marchi
  2025-08-27 22:35 ` [PATCH v2 1/6] drm/xe/configfs: Extract function to parse engine Lucas De Marchi
                   ` (11 more replies)
  0 siblings, 12 replies; 20+ messages in thread
From: Lucas De Marchi @ 2025-08-27 22:35 UTC (permalink / raw)
  To: intel-xe
  Cc: Lucas De Marchi, Stuart Summers, Matt Roper, Riana Tauro,
	Rodrigo Vivi, Umesh Nerlige Ramappa, Tvrtko Ursulin

Integrate WA BB (aka post context restore bb) with configfs to allow
validation to experiment with the GPU, executing commands on every
context switch.

Setting some registers to experiment:

	# echo 0 > /sys/bus/pci/drivers_autoprobe
	# modprobe xe
	# mkdir  /sys/kernel/config/xe/0000:04:00.0
	# echo '
	rcs cmd 11000001 4F104 DEADDEAD
	rcs reg 4F100 DEADBEEF
	' > /sys/kernel/config/xe/0000\:03\:00.0/ctx_restore_post_bb
	# echo 0000:04:00.0 > /sys/bus/pci/drivers/xe/bind

Testing it worked with intel_reg:

	# intel_reg read mmio:4F100
	(0x0004f100): 0xdeadbeef
	# intel_reg read mmio:4F104
	(0x0004f104): 0xdeaddead

This also prepares the codebase to use the same functions for mid
context restore.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
Changes in v2:
- Drop other refactors and fixes already merged
- Add documentation and make sure it works with intel_reg
- Refactor command parsing to be able to easily extend it for other BBs
  to be added in future.
- Link to v1: https://lore.kernel.org/r/20250523-wa-bb-cmds-v1-0-40b337f71bcd@intel.com
---
Lucas De Marchi (6):
      drm/xe/configfs: Extract function to parse engine
      drm/xe/configfs: Allow to select by class only
      drm/xe: Update workaround documentation
      drm/xe/configfs: Fix documentation warning
      drm/xe/lrc: Allow to add user commands on context switch
      drm/xe/configfs: Add post context restore bb

 drivers/gpu/drm/xe/xe_configfs.c | 367 ++++++++++++++++++++++++++++++++++++---
 drivers/gpu/drm/xe/xe_configfs.h |   6 +
 drivers/gpu/drm/xe/xe_lrc.c      |  25 +++
 drivers/gpu/drm/xe/xe_wa.c       |  45 +++--
 4 files changed, 406 insertions(+), 37 deletions(-)

base-commit: 6e22fa06326d0e47e6344ddf35b9d78bd5d00101
change-id: 20250523-wa-bb-cmds-2a81a7121fc2

Lucas De Marchi


^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH v2 1/6] drm/xe/configfs: Extract function to parse engine
  2025-08-27 22:35 [PATCH v2 0/6] drm/xe: Add user commands to WA BB via configfs Lucas De Marchi
@ 2025-08-27 22:35 ` Lucas De Marchi
  2025-09-02  5:57   ` Raag Jadav
  2025-08-27 22:35 ` [PATCH v2 2/6] drm/xe/configfs: Allow to select by class only Lucas De Marchi
                   ` (10 subsequent siblings)
  11 siblings, 1 reply; 20+ messages in thread
From: Lucas De Marchi @ 2025-08-27 22:35 UTC (permalink / raw)
  To: intel-xe
  Cc: Lucas De Marchi, Stuart Summers, Matt Roper, Riana Tauro,
	Rodrigo Vivi, Umesh Nerlige Ramappa, Tvrtko Ursulin

Move the part that copies the engine to a local buffer so it can be
shared in future for other configfs attributes parsing an engine.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/xe/xe_configfs.c | 32 +++++++++++++++++++++-----------
 1 file changed, 21 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 1025d3979b066..6cccab5456811 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -281,24 +281,34 @@ static bool lookup_engine_mask(const char *pattern, u64 *mask)
 	return false;
 }
 
+static int parse_engine(const char *s, const char *end_chars, u64 *mask)
+{
+	char buf[MAX_ENGINE_CLASS_CHARS + MAX_ENGINE_INSTANCE_CHARS + 1];
+	size_t len;
+
+	len = strcspn(s, end_chars);
+	if (len >= sizeof(buf))
+		return -EINVAL;
+
+	memcpy(buf, s, len);
+	buf[len] = '\0';
+
+	if (!lookup_engine_mask(buf, mask))
+		return -ENOENT;
+
+	return len;
+}
+
 static ssize_t engines_allowed_store(struct config_item *item, const char *page,
 				     size_t len)
 {
 	struct xe_config_group_device *dev = to_xe_config_group_device(item);
-	size_t patternlen, p;
+	ssize_t patternlen, p;
 	u64 mask, val = 0;
 
 	for (p = 0; p < len; p += patternlen + 1) {
-		char buf[MAX_ENGINE_CLASS_CHARS + MAX_ENGINE_INSTANCE_CHARS + 1];
-
-		patternlen = strcspn(page + p, ",\n");
-		if (patternlen >= sizeof(buf))
-			return -EINVAL;
-
-		memcpy(buf, page + p, patternlen);
-		buf[patternlen] = '\0';
-
-		if (!lookup_engine_mask(buf, &mask))
+		patternlen = parse_engine(page + p, ",\n", &mask);
+		if (patternlen < 0)
 			return -EINVAL;
 
 		val |= mask;

-- 
2.50.1


^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH v2 2/6] drm/xe/configfs: Allow to select by class only
  2025-08-27 22:35 [PATCH v2 0/6] drm/xe: Add user commands to WA BB via configfs Lucas De Marchi
  2025-08-27 22:35 ` [PATCH v2 1/6] drm/xe/configfs: Extract function to parse engine Lucas De Marchi
@ 2025-08-27 22:35 ` Lucas De Marchi
  2025-09-02  6:00   ` Raag Jadav
  2025-08-27 22:35 ` [PATCH v2 3/6] drm/xe: Update workaround documentation Lucas De Marchi
                   ` (9 subsequent siblings)
  11 siblings, 1 reply; 20+ messages in thread
From: Lucas De Marchi @ 2025-08-27 22:35 UTC (permalink / raw)
  To: intel-xe
  Cc: Lucas De Marchi, Stuart Summers, Matt Roper, Riana Tauro,
	Rodrigo Vivi, Umesh Nerlige Ramappa, Tvrtko Ursulin

For a future configfs attribute, it's desirable to select by engine mask
only as the instance doesn't make sense.

If the caller is only interested in class, allow lookup_engine_mask() to
return the matched index if mask is NULL. This allows parse_engine() to
still return an item if the caller wants to allow parsing a class-only
string like "rcs", "bcs", "ccs", etc.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/xe/xe_configfs.c | 53 ++++++++++++++++++++++++++++------------
 1 file changed, 37 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 6cccab5456811..a1d230007cc05 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -150,6 +150,7 @@ static void set_device_defaults(struct xe_config_device *config)
 struct engine_info {
 	const char *cls;
 	u64 mask;
+	enum xe_engine_class engine_class;
 };
 
 /* Some helpful macros to aid on the sizing of buffer allocation when parsing */
@@ -157,12 +158,12 @@ struct engine_info {
 #define MAX_ENGINE_INSTANCE_CHARS 2
 
 static const struct engine_info engine_info[] = {
-	{ .cls = "rcs", .mask = XE_HW_ENGINE_RCS_MASK },
-	{ .cls = "bcs", .mask = XE_HW_ENGINE_BCS_MASK },
-	{ .cls = "vcs", .mask = XE_HW_ENGINE_VCS_MASK },
-	{ .cls = "vecs", .mask = XE_HW_ENGINE_VECS_MASK },
-	{ .cls = "ccs", .mask = XE_HW_ENGINE_CCS_MASK },
-	{ .cls = "gsccs", .mask = XE_HW_ENGINE_GSCCS_MASK },
+	{ .cls = "rcs", .mask = XE_HW_ENGINE_RCS_MASK, XE_ENGINE_CLASS_RENDER },
+	{ .cls = "bcs", .mask = XE_HW_ENGINE_BCS_MASK, XE_ENGINE_CLASS_COPY },
+	{ .cls = "vcs", .mask = XE_HW_ENGINE_VCS_MASK, XE_ENGINE_CLASS_VIDEO_DECODE },
+	{ .cls = "vecs", .mask = XE_HW_ENGINE_VECS_MASK, XE_ENGINE_CLASS_VIDEO_ENHANCE },
+	{ .cls = "ccs", .mask = XE_HW_ENGINE_CCS_MASK, XE_ENGINE_CLASS_COMPUTE },
+	{ .cls = "gsccs", .mask = XE_HW_ENGINE_GSCCS_MASK, XE_ENGINE_CLASS_OTHER },
 };
 
 static struct xe_config_group_device *to_xe_config_group_device(struct config_item *item)
@@ -251,7 +252,19 @@ static ssize_t engines_allowed_show(struct config_item *item, char *page)
 	return p - page;
 }
 
-static bool lookup_engine_mask(const char *pattern, u64 *mask)
+/*
+ * Lookup engine index from engine_info. If @mask is not NULL, reduce the mask
+ * according to the instance in @pattern.
+ *
+ * Examples of inputs:
+ *
+ * - lookup_engine_mask("rcs0", &mask): return "rcs" index from @engine_info and
+ *   mask == BIT_ULL(XE_HW_ENGINE_RCS0)
+ * - lookup_engine_mask("rcs*", &mask): return "rcs" index from @engine_info and
+ *   mask == XE_HW_ENGINE_RCS_MASK
+ * - lookup_engine_mask("rcs", NULL): return "rcs" index from @engine_info
+ */
+static int lookup_engine_mask(const char *pattern, u64 *mask)
 {
 	for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
 		u8 instance;
@@ -261,30 +274,34 @@ static bool lookup_engine_mask(const char *pattern, u64 *mask)
 			continue;
 
 		pattern += strlen(engine_info[i].cls);
+		if (!mask && !*pattern)
+			return i;
 
 		if (!strcmp(pattern, "*")) {
 			*mask = engine_info[i].mask;
-			return true;
+			return i;
 		}
 
 		if (kstrtou8(pattern, 10, &instance))
-			return false;
+			return -ENOENT;
 
 		bit = __ffs64(engine_info[i].mask) + instance;
 		if (bit >= fls64(engine_info[i].mask))
-			return false;
+			return -ENOENT;
 
 		*mask = BIT_ULL(bit);
-		return true;
+		return i;
 	}
 
-	return false;
+	return -ENOENT;
 }
 
-static int parse_engine(const char *s, const char *end_chars, u64 *mask)
+static int parse_engine(const char *s, const char *end_chars, u64 *mask,
+			const struct engine_info **info)
 {
 	char buf[MAX_ENGINE_CLASS_CHARS + MAX_ENGINE_INSTANCE_CHARS + 1];
 	size_t len;
+	int idx;
 
 	len = strcspn(s, end_chars);
 	if (len >= sizeof(buf))
@@ -293,8 +310,12 @@ static int parse_engine(const char *s, const char *end_chars, u64 *mask)
 	memcpy(buf, s, len);
 	buf[len] = '\0';
 
-	if (!lookup_engine_mask(buf, mask))
-		return -ENOENT;
+	idx = lookup_engine_mask(buf, mask);
+	if (idx < 0)
+		return idx;
+
+	if (info)
+		*info = &engine_info[idx];
 
 	return len;
 }
@@ -307,7 +328,7 @@ static ssize_t engines_allowed_store(struct config_item *item, const char *page,
 	u64 mask, val = 0;
 
 	for (p = 0; p < len; p += patternlen + 1) {
-		patternlen = parse_engine(page + p, ",\n", &mask);
+		patternlen = parse_engine(page + p, ",\n", &mask, NULL);
 		if (patternlen < 0)
 			return -EINVAL;
 

-- 
2.50.1


^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH v2 3/6] drm/xe: Update workaround documentation
  2025-08-27 22:35 [PATCH v2 0/6] drm/xe: Add user commands to WA BB via configfs Lucas De Marchi
  2025-08-27 22:35 ` [PATCH v2 1/6] drm/xe/configfs: Extract function to parse engine Lucas De Marchi
  2025-08-27 22:35 ` [PATCH v2 2/6] drm/xe/configfs: Allow to select by class only Lucas De Marchi
@ 2025-08-27 22:35 ` Lucas De Marchi
  2025-09-02 18:49   ` Summers, Stuart
  2025-08-27 22:35 ` [PATCH v2 4/6] drm/xe/configfs: Fix documentation warning Lucas De Marchi
                   ` (8 subsequent siblings)
  11 siblings, 1 reply; 20+ messages in thread
From: Lucas De Marchi @ 2025-08-27 22:35 UTC (permalink / raw)
  To: intel-xe
  Cc: Lucas De Marchi, Stuart Summers, Matt Roper, Riana Tauro,
	Rodrigo Vivi, Umesh Nerlige Ramappa, Tvrtko Ursulin

Bring it up to reality, better documenting the existing batch buffers,
OOB rules and fixing some typos.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/xe/xe_wa.c | 45 ++++++++++++++++++++++++++++++++-------------
 1 file changed, 32 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index 52c7df4c3afd8..a19cf811b580a 100644
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -39,7 +39,8 @@
  *   Register Immediate commands) once when initializing the device and saved in
  *   the default context. That default context is then used on every context
  *   creation to have a "primed golden context", i.e. a context image that
- *   already contains the changes needed to all the registers.
+ *   already contains the changes needed to all the registers. See
+ *   drivers/gpu/drm/xe/xe_lrc.c for default context handling.
  *
  * - Engine workarounds: the list of these WAs is applied whenever the specific
  *   engine is reset. It's also possible that a set of engine classes share a
@@ -48,10 +49,10 @@
  *   them need to keeep the workaround programming: the approach taken in the
  *   driver is to tie those workarounds to the first compute/render engine that
  *   is registered.  When executing with GuC submission, engine resets are
- *   outside of kernel driver control, hence the list of registers involved in
+ *   outside of kernel driver control, hence the list of registers involved is
  *   written once, on engine initialization, and then passed to GuC, that
  *   saves/restores their values before/after the reset takes place. See
- *   ``drivers/gpu/drm/xe/xe_guc_ads.c`` for reference.
+ *   drivers/gpu/drm/xe/xe_guc_ads.c for reference.
  *
  * - GT workarounds: the list of these WAs is applied whenever these registers
  *   revert to their default values: on GPU reset, suspend/resume [1]_, etc.
@@ -66,21 +67,39 @@
  *   hardware on every HW context restore. These buffers are created and
  *   programmed in the default context so the hardware always go through those
  *   programming sequences when switching contexts. The support for workaround
- *   batchbuffers is enabled these hardware mechanisms:
+ *   batchbuffers is enabled via these hardware mechanisms:
  *
- *   #. INDIRECT_CTX: A batchbuffer and an offset are provided in the default
- *      context, pointing the hardware to jump to that location when that offset
- *      is reached in the context restore. Workaround batchbuffer in the driver
- *      currently uses this mechanism for all platforms.
+ *   #. INDIRECT_CTX (also known as **mid context restore bb**): A batchbuffer
+ *      and an offset are provided in the default context, pointing the hardware
+ *      to jump to that location when that offset is reached in the context
+ *      restore.  When a context is being restored, this is executed after the
+ *      ring context, in the middle (or beginning) of the engine context image.
  *
- *   #. BB_PER_CTX_PTR: A batchbuffer is provided in the default context,
- *      pointing the hardware to a buffer to continue executing after the
- *      engine registers are restored in a context restore sequence. This is
- *      currently not used in the driver.
+ *   #. BB_PER_CTX_PTR (also known as **post context restore bb**): A
+ *      batchbuffer is provided in the default context, pointing the hardware to
+ *      a buffer to continue executing after the engine registers are restored
+ *      in a context restore sequence.
+ *
+ *   Below is the timeline for a context restore sequence:
+ *
+ *   .. code::
+ *
+ *                        INDIRECT_CTX_OFFSET
+ *                   |----------->|
+ *      .------------.------------.-------------.------------.--------------.-----------.
+ *      |Ring        | Engine     | Mid-context | Engine     | Post-context | Ring      |
+ *      |Restore     | Restore (1)| BB Restore  | Restore (2)| BB Restore   | Execution |
+ *      `------------'------------'-------------'------------'--------------'-----------'
  *
  * - Other/OOB:  There are WAs that, due to their nature, cannot be applied from
  *   a central place. Those are peppered around the rest of the code, as needed.
- *   Workarounds related to the display IP are the main example.
+ *   There's a central place to control which workarounds are enabled:
+ *   drivers/gpu/drm/xe/xe_wa_oob.rules for GT workarounds and
+ *   drivers/gpu/drm/xe/xe_device_wa_oob.rules for device/SoC workarounds.
+ *   These files only record which workarounds are enabled: during early device
+ *   initialization those rules are evaluated and recorded by the driver. Then
+ *   later the driver checks with ``XE_WA()`` and ``XE_DEVICE_WA()`` to
+ *   implement them.
  *
  * .. [1] Technically, some registers are powercontext saved & restored, so they
  *    survive a suspend/resume. In practice, writing them again is not too

-- 
2.50.1


^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH v2 4/6] drm/xe/configfs: Fix documentation warning
  2025-08-27 22:35 [PATCH v2 0/6] drm/xe: Add user commands to WA BB via configfs Lucas De Marchi
                   ` (2 preceding siblings ...)
  2025-08-27 22:35 ` [PATCH v2 3/6] drm/xe: Update workaround documentation Lucas De Marchi
@ 2025-08-27 22:35 ` Lucas De Marchi
  2025-09-02  6:04   ` Raag Jadav
  2025-08-27 22:35 ` [PATCH v2 5/6] drm/xe/lrc: Allow to add user commands on context switch Lucas De Marchi
                   ` (7 subsequent siblings)
  11 siblings, 1 reply; 20+ messages in thread
From: Lucas De Marchi @ 2025-08-27 22:35 UTC (permalink / raw)
  To: intel-xe
  Cc: Lucas De Marchi, Stuart Summers, Matt Roper, Riana Tauro,
	Rodrigo Vivi, Umesh Nerlige Ramappa, Tvrtko Ursulin

Fix this warning while building the documentation:

	Documentation/gpu/xe/xe_configfs:9: drivers/gpu/drm/xe/xe_configfs.c:138:
	WARNING: Definition list ends without a blank line; unexpected unindent.

That also makes it format it better in the output.

Fixes: e2b33fce5eb0 ("drm/xe/configfs: Improve documentation steps")
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/xe/xe_configfs.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index a1d230007cc05..483b13ef567b2 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -34,7 +34,7 @@
  *
  * To create a device, the ``xe`` module should already be loaded, but some
  * attributes can only be set before binding the device. It can be accomplished
- * by blocking the driver autoprobe:
+ * by blocking the driver autoprobe::
  *
  *	# echo 0 > /sys/bus/pci/drivers_autoprobe
  *	# modprobe xe

-- 
2.50.1


^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH v2 5/6] drm/xe/lrc: Allow to add user commands on context switch
  2025-08-27 22:35 [PATCH v2 0/6] drm/xe: Add user commands to WA BB via configfs Lucas De Marchi
                   ` (3 preceding siblings ...)
  2025-08-27 22:35 ` [PATCH v2 4/6] drm/xe/configfs: Fix documentation warning Lucas De Marchi
@ 2025-08-27 22:35 ` Lucas De Marchi
  2025-08-28  2:54   ` Lucas De Marchi
  2025-08-27 22:35 ` [PATCH v2 6/6] drm/xe/configfs: Add post context restore bb Lucas De Marchi
                   ` (6 subsequent siblings)
  11 siblings, 1 reply; 20+ messages in thread
From: Lucas De Marchi @ 2025-08-27 22:35 UTC (permalink / raw)
  To: intel-xe
  Cc: Lucas De Marchi, Stuart Summers, Matt Roper, Riana Tauro,
	Rodrigo Vivi, Umesh Nerlige Ramappa, Tvrtko Ursulin

During validation it's useful to allows additional commands to be
executed on context switch. Fetch the commands from configfs (to be
added) and add them to the WA BB.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/xe/xe_configfs.c | 13 +++++++++++++
 drivers/gpu/drm/xe/xe_configfs.h |  6 ++++++
 drivers/gpu/drm/xe/xe_lrc.c      | 25 +++++++++++++++++++++++++
 3 files changed, 44 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 483b13ef567b2..639c1dbf888f6 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -630,6 +630,19 @@ bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)
 	return ret;
 }
 
+/**
+ * xe_configfs_get_ctx_restore_post_bb - get configfs ctx_restore_post_bb setting
+ * @pdev: pci device
+ *
+ * Return: post_ctx_restore setting in configfs
+ */
+u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
+					enum xe_engine_class class,
+					const u32 **cs)
+{
+	return 0;
+}
+
 int __init xe_configfs_init(void)
 {
 	int ret;
diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h
index 58c8c31640008..a53e2d8fc792f 100644
--- a/drivers/gpu/drm/xe/xe_configfs.h
+++ b/drivers/gpu/drm/xe/xe_configfs.h
@@ -8,6 +8,8 @@
 #include <linux/limits.h>
 #include <linux/types.h>
 
+#include <xe_hw_engine_types.h>
+
 struct pci_dev;
 
 #if IS_ENABLED(CONFIG_CONFIGFS_FS)
@@ -18,6 +20,8 @@ bool xe_configfs_get_survivability_mode(struct pci_dev *pdev);
 void xe_configfs_clear_survivability_mode(struct pci_dev *pdev);
 u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
 bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
+u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
+					const u32 **cs);
 #else
 static inline int xe_configfs_init(void) { return 0; }
 static inline void xe_configfs_exit(void) { }
@@ -26,6 +30,8 @@ static inline bool xe_configfs_get_survivability_mode(struct pci_dev *pdev) { re
 static inline void xe_configfs_clear_survivability_mode(struct pci_dev *pdev) { }
 static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
 static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; }
+u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
+					const u32 **cs) { return 0; }
 #endif
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index 8f6c3ba478828..13e920a53e3a8 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -16,6 +16,7 @@
 #include "regs/xe_lrc_layout.h"
 #include "xe_bb.h"
 #include "xe_bo.h"
+#include "xe_configfs.h"
 #include "xe_device.h"
 #include "xe_drm_client.h"
 #include "xe_exec_queue_types.h"
@@ -1102,6 +1103,29 @@ static ssize_t setup_timestamp_wa(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
 	return cmd - batch;
 }
 
+static ssize_t setup_configfs_post_ctx_restore_bb(struct xe_lrc *lrc,
+						  struct xe_hw_engine *hwe,
+						  u32 *batch, size_t max_len)
+{
+	struct xe_device *xe = gt_to_xe(lrc->gt);
+	const u32 *user_batch;
+	u32 *cmd = batch;
+	u32 count;
+
+	count = xe_configfs_get_ctx_restore_post_bb(to_pci_dev(xe->drm.dev),
+						    hwe->class, &user_batch);
+	if (!count)
+		return 0;
+
+	if (count > max_len)
+		return -ENOSPC;
+
+	memcpy(cmd, user_batch, count * sizeof(u32));
+	cmd += count;
+
+	return cmd - batch;
+}
+
 static ssize_t setup_invalidate_state_cache_wa(struct xe_lrc *lrc,
 					       struct xe_hw_engine *hwe,
 					       u32 *batch, size_t max_len)
@@ -1203,6 +1227,7 @@ int xe_lrc_setup_wa_bb_with_scratch(struct xe_lrc *lrc, struct xe_hw_engine *hwe
 		{ .setup = setup_timestamp_wa },
 		{ .setup = setup_invalidate_state_cache_wa },
 		{ .setup = setup_utilization_wa },
+		{ .setup = setup_configfs_post_ctx_restore_bb },
 	};
 	struct bo_setup_state state = {
 		.lrc = lrc,

-- 
2.50.1


^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH v2 6/6] drm/xe/configfs: Add post context restore bb
  2025-08-27 22:35 [PATCH v2 0/6] drm/xe: Add user commands to WA BB via configfs Lucas De Marchi
                   ` (4 preceding siblings ...)
  2025-08-27 22:35 ` [PATCH v2 5/6] drm/xe/lrc: Allow to add user commands on context switch Lucas De Marchi
@ 2025-08-27 22:35 ` Lucas De Marchi
  2025-08-28  1:49 ` ✗ CI.checkpatch: warning for drm/xe: Add user commands to WA BB via configfs Patchwork
                   ` (5 subsequent siblings)
  11 siblings, 0 replies; 20+ messages in thread
From: Lucas De Marchi @ 2025-08-27 22:35 UTC (permalink / raw)
  To: intel-xe
  Cc: Lucas De Marchi, Stuart Summers, Matt Roper, Riana Tauro,
	Rodrigo Vivi, Umesh Nerlige Ramappa, Tvrtko Ursulin

Allow the user to specify commands to execute during a context restore.
Currently it's possible to parse 2 types of actions:

	- cmd: the instructions are added as is to the bb
	- reg: just use the address and value, without worrying about
	  encoding the right LRI instruction. This is possibly the most
	  useful use case, so added a dedicated action for that.

This also serve as preparation for future BBs: mid context restore and
rc6 context restore that can re-use the same parsing functions.

The bin attribute from configfs is used here to allow multi-line input.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/xe/xe_configfs.c | 279 ++++++++++++++++++++++++++++++++++++++-
 1 file changed, 277 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 639c1dbf888f6..03383e92a5763 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -4,6 +4,7 @@
  */
 
 #include <linux/bitops.h>
+#include <linux/ctype.h>
 #include <linux/configfs.h>
 #include <linux/cleanup.h>
 #include <linux/find.h>
@@ -12,6 +13,7 @@
 #include <linux/pci.h>
 #include <linux/string.h>
 
+#include "instructions/xe_mi_commands.h"
 #include "xe_configfs.h"
 #include "xe_hw_engine_types.h"
 #include "xe_module.h"
@@ -115,6 +117,30 @@
  *
  * This attribute can only be set before binding to the device.
  *
+ * Context restore BB
+ * ------------------
+ *
+ * Allow to execute a batch buffer during any context switches. When the
+ * GPU is restoring the context, it executes additional commands. It's useful
+ * for testing additional workarounds and validating certain HW behaviors.
+ *
+ * Currently this is implemented only for post context restore. Examples:
+ *
+ * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10::
+ *
+ *	# echo 'rcs cmd 11000001 4F100 DEADBEEF' \
+ *		> /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb
+ *
+ * #. Load certain values in a couple of registers (can be used as a simpler
+ *    alternative to the `cmd`) action::
+ *
+ *	# echo '
+ *	  rcs reg 4F100 DEADBEEF
+ *	  rcs reg 4F104 FFFFFFFF
+ *	' > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb
+ *
+ * This attribute can only be set before binding to the device.
+ *
  * Remove devices
  * ==============
  *
@@ -123,11 +149,18 @@
  *	# rmdir /sys/kernel/config/xe/0000:03:00.0/
  */
 
+/* Similar to struct xe_bb, but not tied to HW (yet) */
+struct wa_bb {
+	u32 *cs;
+	u32 len; /* in dwords */
+};
+
 struct xe_config_group_device {
 	struct config_group group;
 
 	struct xe_config_device {
 		u64 engines_allowed;
+		struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
 		bool survivability_mode;
 		bool enable_psmi;
 	} config;
@@ -370,10 +403,237 @@ static ssize_t enable_psmi_store(struct config_item *item, const char *page, siz
 	return len;
 }
 
+static bool wa_bb_read_advance(bool dereference, char **p,
+			       const char *append, size_t len,
+			       size_t *max_size)
+{
+	if (dereference) {
+		if (len >= *max_size)
+			return false;
+		*max_size -= len;
+		if (append)
+			memcpy(*p, append, len);
+	}
+
+	*p += len;
+
+	return true;
+}
+
+static ssize_t wa_bb_read(struct xe_config_group_device *dev,
+			  struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
+			  char *data, size_t sz)
+{
+	char *p = data;
+
+	guard(mutex)(&dev->lock);
+
+	for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
+		enum xe_engine_class ec = engine_info[i].engine_class;
+		size_t len;
+
+		if (!wa_bb[ec].len)
+			continue;
+
+		len = snprintf(p, sz, "%s:", engine_info[i].cls);
+		if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
+			return -ENOBUFS;
+
+		for (size_t j = 0; j < wa_bb[ec].len; j++) {
+			len = snprintf(p, sz, " %08x", wa_bb[ec].cs[j]);
+			if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
+				return -ENOBUFS;
+		}
+
+		if (!wa_bb_read_advance(data, &p, "\n", 1, &sz))
+			return -ENOBUFS;
+	}
+
+	if (!wa_bb_read_advance(data, &p, "", 1, &sz))
+		return -ENOBUFS;
+
+	/* Reserve one more to match check for '\0' */
+	if (!data)
+		p++;
+
+	return p - data;
+}
+
+static ssize_t ctx_restore_post_bb_read(struct config_item *item,
+					void *data, size_t sz)
+{
+	struct xe_config_group_device *dev = to_xe_config_group_device(item);
+
+	return wa_bb_read(dev, dev->config.ctx_restore_post_bb, data, sz);
+}
+
+static void wa_bb_append(struct wa_bb *wa_bb, u32 val)
+{
+	if (wa_bb->cs)
+		wa_bb->cs[wa_bb->len] = val;
+
+	wa_bb->len++;
+}
+
+static ssize_t parse_hex(const char *line, u32 *pval)
+{
+	char numstr[12];
+	const char *p;
+	ssize_t numlen;
+
+	p = line + strspn(line, " \t");
+	if (!*p || *p == '\n')
+		return 0;
+
+	numlen = strcspn(p, " \t\n");
+	if (!numlen || numlen >= sizeof(numstr) - 1)
+		return -EINVAL;
+
+	memcpy(numstr, p, numlen);
+	numstr[numlen] = '\0';
+	p += numlen;
+
+	if (kstrtou32(numstr, 16, pval))
+		return -EINVAL;
+
+	return p - line;
+}
+
+/*
+ * Parse lines with the format
+ *
+ *	<engine-class> cmd <u32> <u32...>
+ *	<engine-class> reg <u32_addr> <u32_val>
+ *
+ * and optionally save them in @wa_bb[i].cs is non-NULL.
+ *
+ * Return the number of dwords parsed.
+ */
+static ssize_t parse_wa_bb_lines(const char *lines,
+				 struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX])
+{
+	ssize_t dwords = 0, ret;
+	const char *p;
+
+	for (p = lines; *p; p++) {
+		const struct engine_info *info = NULL;
+		u32 val, val2;
+
+		/* Also allow empty lines */
+		p += strspn(p, " \t\n");
+		if (!*p)
+			break;
+
+		ret = parse_engine(p, " \t\n", NULL, &info);
+		if (ret < 0)
+			return ret;
+
+		p += ret;
+		p += strspn(p, " \t");
+
+		if (str_has_prefix(p, "cmd")) {
+			for (p += strlen("cmd"); *p;) {
+				ret = parse_hex(p, &val);
+				if (ret < 0)
+					return -EINVAL;
+				if (!ret)
+					break;
+
+				p += ret;
+				dwords++;
+				wa_bb_append(&wa_bb[info->engine_class], val);
+			}
+		} else if (str_has_prefix(p, "reg")) {
+			p += strlen("reg");
+			ret = parse_hex(p, &val);
+			if (ret <= 0)
+				return -EINVAL;
+
+			p += ret;
+			ret = parse_hex(p, &val2);
+			if (ret <= 0)
+				return -EINVAL;
+
+			p += ret;
+			dwords += 3;
+			wa_bb_append(&wa_bb[info->engine_class],
+				     MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1));
+			wa_bb_append(&wa_bb[info->engine_class], val);
+			wa_bb_append(&wa_bb[info->engine_class], val2);
+		} else {
+			return -EINVAL;
+		}
+	}
+
+	return dwords;
+}
+
+static ssize_t wa_bb_store(struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
+			   struct xe_config_group_device *dev,
+			   const char *page, size_t len)
+{
+	/* tmp_wa_bb must match wa_bb's size */
+	struct wa_bb tmp_wa_bb[XE_ENGINE_CLASS_MAX] = { };
+	ssize_t count, class;
+	u32 *tmp;
+
+	/* 1. Count dwords - wa_bb[i].cs is NULL for all classes */
+	count = parse_wa_bb_lines(page, tmp_wa_bb);
+	if (count < 0)
+		return count;
+
+	guard(mutex)(&dev->lock);
+
+	if (is_bound(dev))
+		return -EBUSY;
+
+	/*
+	 * 2. Allocate a u32 array and set the pointers to the right positions
+	 * according to the length of each class' wa_bb
+	 */
+	tmp = krealloc(wa_bb[0].cs, count * sizeof(u32), GFP_KERNEL);
+	if (!tmp)
+		return -ENOMEM;
+
+	if (!count) {
+		memset(wa_bb, 0, sizeof(tmp_wa_bb));
+		return len;
+	}
+
+	for (class = 0, count = 0; class < XE_ENGINE_CLASS_MAX; ++class) {
+		tmp_wa_bb[class].cs = tmp + count;
+		count += tmp_wa_bb[class].len;
+		tmp_wa_bb[class].len = 0;
+	}
+
+	/* 3. Parse wa_bb lines again, this time saving the values */
+	count = parse_wa_bb_lines(page, tmp_wa_bb);
+	if (count < 0)
+		return count;
+
+	memcpy(wa_bb, tmp_wa_bb, sizeof(tmp_wa_bb));
+
+	return len;
+}
+
+static ssize_t ctx_restore_post_bb_write(struct config_item *item,
+					 const void *data, size_t sz)
+{
+	struct xe_config_group_device *dev = to_xe_config_group_device(item);
+
+	return wa_bb_store(dev->config.ctx_restore_post_bb, dev, data, sz);
+}
+
+CONFIGFS_BIN_ATTR(, ctx_restore_post_bb, NULL, SZ_4K);
 CONFIGFS_ATTR(, enable_psmi);
 CONFIGFS_ATTR(, engines_allowed);
 CONFIGFS_ATTR(, survivability_mode);
 
+static struct configfs_bin_attribute *xe_config_device_bin_attrs[] = {
+	&attr_ctx_restore_post_bb,
+	NULL,
+};
+
 static struct configfs_attribute *xe_config_device_attrs[] = {
 	&attr_enable_psmi,
 	&attr_engines_allowed,
@@ -386,6 +646,8 @@ static void xe_config_device_release(struct config_item *item)
 	struct xe_config_group_device *dev = to_xe_config_group_device(item);
 
 	mutex_destroy(&dev->lock);
+
+	kfree(dev->config.ctx_restore_post_bb[0].cs);
 	kfree(dev);
 }
 
@@ -395,6 +657,7 @@ static struct configfs_item_operations xe_config_device_ops = {
 
 static const struct config_item_type xe_config_device_type = {
 	.ct_item_ops	= &xe_config_device_ops,
+	.ct_bin_attrs	= xe_config_device_bin_attrs,
 	.ct_attrs	= xe_config_device_attrs,
 	.ct_owner	= THIS_MODULE,
 };
@@ -633,14 +896,26 @@ bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)
 /**
  * xe_configfs_get_ctx_restore_post_bb - get configfs ctx_restore_post_bb setting
  * @pdev: pci device
+ * @class: hw engine class
+ * @cs: pointer to the bb to use - only valid during probe
  *
- * Return: post_ctx_restore setting in configfs
+ * Return: Number of dwords used in the post_ctx_restore setting in configfs
  */
 u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
 					enum xe_engine_class class,
 					const u32 **cs)
 {
-	return 0;
+	struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
+	u32 len;
+
+	if (!dev)
+		return 0;
+
+	*cs = dev->config.ctx_restore_post_bb[class].cs;
+	len = dev->config.ctx_restore_post_bb[class].len;
+	config_item_put(&dev->group.cg_item);
+
+	return len;
 }
 
 int __init xe_configfs_init(void)

-- 
2.50.1


^ permalink raw reply related	[flat|nested] 20+ messages in thread

* ✗ CI.checkpatch: warning for drm/xe: Add user commands to WA BB via configfs
  2025-08-27 22:35 [PATCH v2 0/6] drm/xe: Add user commands to WA BB via configfs Lucas De Marchi
                   ` (5 preceding siblings ...)
  2025-08-27 22:35 ` [PATCH v2 6/6] drm/xe/configfs: Add post context restore bb Lucas De Marchi
@ 2025-08-28  1:49 ` Patchwork
  2025-08-28  1:49 ` ✗ CI.KUnit: failure " Patchwork
                   ` (4 subsequent siblings)
  11 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2025-08-28  1:49 UTC (permalink / raw)
  To: Lucas De Marchi; +Cc: intel-xe

== Series Details ==

Series: drm/xe: Add user commands to WA BB via configfs
URL   : https://patchwork.freedesktop.org/series/153594/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
e0fa7d6ad11ac6dc8dfa757164e518968a98b897
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit d48edbce73d98c9b5d2268dcef5b093908a26da1
Author: Lucas De Marchi <lucas.demarchi@intel.com>
Date:   Wed Aug 27 15:35:31 2025 -0700

    drm/xe/configfs: Add post context restore bb
    
    Allow the user to specify commands to execute during a context restore.
    Currently it's possible to parse 2 types of actions:
    
            - cmd: the instructions are added as is to the bb
            - reg: just use the address and value, without worrying about
              encoding the right LRI instruction. This is possibly the most
              useful use case, so added a dedicated action for that.
    
    This also serve as preparation for future BBs: mid context restore and
    rc6 context restore that can re-use the same parsing functions.
    
    The bin attribute from configfs is used here to allow multi-line input.
    
    Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
+ /mt/dim checkpatch f6f3d6ae1615f7ca0e414fb0766ab17eac65ae7c drm-intel
1d408243befa drm/xe/configfs: Extract function to parse engine
8a36d417c807 drm/xe/configfs: Allow to select by class only
d7fbe69cad1f drm/xe: Update workaround documentation
60b84aa5d666 drm/xe/configfs: Fix documentation warning
e0bad3b1eb7e drm/xe/lrc: Allow to add user commands on context switch
-:62: ERROR:OPEN_BRACE: open brace '{' following function definitions go on the next line
#62: FILE: drivers/gpu/drm/xe/xe_configfs.h:33:
+u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
+					const u32 **cs) { return 0; }

total: 1 errors, 0 warnings, 0 checks, 86 lines checked
d48edbce73d9 drm/xe/configfs: Add post context restore bb



^ permalink raw reply	[flat|nested] 20+ messages in thread

* ✗ CI.KUnit: failure for drm/xe: Add user commands to WA BB via configfs
  2025-08-27 22:35 [PATCH v2 0/6] drm/xe: Add user commands to WA BB via configfs Lucas De Marchi
                   ` (6 preceding siblings ...)
  2025-08-28  1:49 ` ✗ CI.checkpatch: warning for drm/xe: Add user commands to WA BB via configfs Patchwork
@ 2025-08-28  1:49 ` Patchwork
  2025-08-28  3:00 ` ✗ CI.checkpatch: warning for drm/xe: Add user commands to WA BB via configfs (rev2) Patchwork
                   ` (3 subsequent siblings)
  11 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2025-08-28  1:49 UTC (permalink / raw)
  To: Lucas De Marchi; +Cc: intel-xe

== Series Details ==

Series: drm/xe: Add user commands to WA BB via configfs
URL   : https://patchwork.freedesktop.org/series/153594/
State : failure

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
ERROR:root:In file included from ../drivers/gpu/drm/xe/xe_guc.c:19:
../drivers/gpu/drm/xe/xe_configfs.h:33:5: warning: no previous prototype for ‘xe_configfs_get_ctx_restore_post_bb’ [-Wmissing-prototypes]
   33 | u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
      |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_hw_engine.c:20:
../drivers/gpu/drm/xe/xe_configfs.h:33:5: warning: no previous prototype for ‘xe_configfs_get_ctx_restore_post_bb’ [-Wmissing-prototypes]
   33 | u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
      |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_lrc.c:19:
../drivers/gpu/drm/xe/xe_configfs.h:33:5: warning: no previous prototype for ‘xe_configfs_get_ctx_restore_post_bb’ [-Wmissing-prototypes]
   33 | u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
      |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_module.c:14:
../drivers/gpu/drm/xe/xe_configfs.h:33:5: warning: no previous prototype for ‘xe_configfs_get_ctx_restore_post_bb’ [-Wmissing-prototypes]
   33 | u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
      |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_pci.c:21:
../drivers/gpu/drm/xe/xe_configfs.h:33:5: warning: no previous prototype for ‘xe_configfs_get_ctx_restore_post_bb’ [-Wmissing-prototypes]
   33 | u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
      |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_rtp.c:12:
../drivers/gpu/drm/xe/xe_configfs.h:33:5: warning: no previous prototype for ‘xe_configfs_get_ctx_restore_post_bb’ [-Wmissing-prototypes]
   33 | u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
      |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_psmi.c:10:
../drivers/gpu/drm/xe/xe_configfs.h:33:5: warning: no previous prototype for ‘xe_configfs_get_ctx_restore_post_bb’ [-Wmissing-prototypes]
   33 | u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
      |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_survivability_mode.c:13:
../drivers/gpu/drm/xe/xe_configfs.h:33:5: warning: no previous prototype for ‘xe_configfs_get_ctx_restore_post_bb’ [-Wmissing-prototypes]
   33 | u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
      |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
ld: drivers/gpu/drm/xe/xe_hw_engine.o: in function `xe_configfs_get_ctx_restore_post_bb':
xe_hw_engine.c:(.text+0x3f0): multiple definition of `xe_configfs_get_ctx_restore_post_bb'; drivers/gpu/drm/xe/xe_guc.o:xe_guc.c:(.text+0x760): first defined here
ld: drivers/gpu/drm/xe/xe_lrc.o: in function `xe_configfs_get_ctx_restore_post_bb':
xe_lrc.c:(.text+0xb00): multiple definition of `xe_configfs_get_ctx_restore_post_bb'; drivers/gpu/drm/xe/xe_guc.o:xe_guc.c:(.text+0x760): first defined here
ld: drivers/gpu/drm/xe/xe_module.o: in function `xe_configfs_get_ctx_restore_post_bb':
xe_module.c:(.text+0x40): multiple definition of `xe_configfs_get_ctx_restore_post_bb'; drivers/gpu/drm/xe/xe_guc.o:xe_guc.c:(.text+0x760): first defined here
ld: drivers/gpu/drm/xe/xe_pci.o: in function `xe_configfs_get_ctx_restore_post_bb':
xe_pci.c:(.text+0x1ce0): multiple definition of `xe_configfs_get_ctx_restore_post_bb'; drivers/gpu/drm/xe/xe_guc.o:xe_guc.c:(.text+0x760): first defined here
ld: drivers/gpu/drm/xe/xe_psmi.o: in function `xe_configfs_get_ctx_restore_post_bb':
xe_psmi.c:(.text+0x0): multiple definition of `xe_configfs_get_ctx_restore_post_bb'; drivers/gpu/drm/xe/xe_guc.o:xe_guc.c:(.text+0x760): first defined here
ld: drivers/gpu/drm/xe/xe_rtp.o: in function `xe_configfs_get_ctx_restore_post_bb':
xe_rtp.c:(.text+0xc20): multiple definition of `xe_configfs_get_ctx_restore_post_bb'; drivers/gpu/drm/xe/xe_guc.o:xe_guc.c:(.text+0x760): first defined here
ld: drivers/gpu/drm/xe/xe_survivability_mode.o: in function `xe_configfs_get_ctx_restore_post_bb':
xe_survivability_mode.c:(.text+0x3b0): multiple definition of `xe_configfs_get_ctx_restore_post_bb'; drivers/gpu/drm/xe/xe_guc.o:xe_guc.c:(.text+0x760): first defined here
make[3]: *** [../scripts/Makefile.vmlinux_o:72: vmlinux.o] Error 1
make[2]: *** [/kernel/Makefile:1225: vmlinux_o] Error 2
make[1]: *** [/kernel/Makefile:248: __sub-make] Error 2
make: *** [Makefile:248: __sub-make] Error 2

[01:49:22] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[01:49:27] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH v2 5/6] drm/xe/lrc: Allow to add user commands on context switch
  2025-08-27 22:35 ` [PATCH v2 5/6] drm/xe/lrc: Allow to add user commands on context switch Lucas De Marchi
@ 2025-08-28  2:54   ` Lucas De Marchi
  0 siblings, 0 replies; 20+ messages in thread
From: Lucas De Marchi @ 2025-08-28  2:54 UTC (permalink / raw)
  To: intel-xe; +Cc: Lucas De Marchi

During validation it's useful to allows additional commands to be
executed on context switch. Fetch the commands from configfs (to be
added) and add them to the WA BB.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/xe/xe_configfs.c | 13 +++++++++++++
 drivers/gpu/drm/xe/xe_configfs.h |  6 ++++++
 drivers/gpu/drm/xe/xe_lrc.c      | 25 +++++++++++++++++++++++++
 3 files changed, 44 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 483b13ef567b2..639c1dbf888f6 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -630,6 +630,19 @@ bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)
 	return ret;
 }
 
+/**
+ * xe_configfs_get_ctx_restore_post_bb - get configfs ctx_restore_post_bb setting
+ * @pdev: pci device
+ *
+ * Return: post_ctx_restore setting in configfs
+ */
+u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
+					enum xe_engine_class class,
+					const u32 **cs)
+{
+	return 0;
+}
+
 int __init xe_configfs_init(void)
 {
 	int ret;
diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h
index 58c8c31640008..459d9f4faf5f2 100644
--- a/drivers/gpu/drm/xe/xe_configfs.h
+++ b/drivers/gpu/drm/xe/xe_configfs.h
@@ -8,6 +8,8 @@
 #include <linux/limits.h>
 #include <linux/types.h>
 
+#include <xe_hw_engine_types.h>
+
 struct pci_dev;
 
 #if IS_ENABLED(CONFIG_CONFIGFS_FS)
@@ -18,6 +20,8 @@ bool xe_configfs_get_survivability_mode(struct pci_dev *pdev);
 void xe_configfs_clear_survivability_mode(struct pci_dev *pdev);
 u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
 bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
+u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
+					const u32 **cs);
 #else
 static inline int xe_configfs_init(void) { return 0; }
 static inline void xe_configfs_exit(void) { }
@@ -26,6 +30,8 @@ static inline bool xe_configfs_get_survivability_mode(struct pci_dev *pdev) { re
 static inline void xe_configfs_clear_survivability_mode(struct pci_dev *pdev) { }
 static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
 static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; }
+static u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
+					       const u32 **cs) { return 0; }
 #endif
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index 8f6c3ba478828..13e920a53e3a8 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -16,6 +16,7 @@
 #include "regs/xe_lrc_layout.h"
 #include "xe_bb.h"
 #include "xe_bo.h"
+#include "xe_configfs.h"
 #include "xe_device.h"
 #include "xe_drm_client.h"
 #include "xe_exec_queue_types.h"
@@ -1102,6 +1103,29 @@ static ssize_t setup_timestamp_wa(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
 	return cmd - batch;
 }
 
+static ssize_t setup_configfs_post_ctx_restore_bb(struct xe_lrc *lrc,
+						  struct xe_hw_engine *hwe,
+						  u32 *batch, size_t max_len)
+{
+	struct xe_device *xe = gt_to_xe(lrc->gt);
+	const u32 *user_batch;
+	u32 *cmd = batch;
+	u32 count;
+
+	count = xe_configfs_get_ctx_restore_post_bb(to_pci_dev(xe->drm.dev),
+						    hwe->class, &user_batch);
+	if (!count)
+		return 0;
+
+	if (count > max_len)
+		return -ENOSPC;
+
+	memcpy(cmd, user_batch, count * sizeof(u32));
+	cmd += count;
+
+	return cmd - batch;
+}
+
 static ssize_t setup_invalidate_state_cache_wa(struct xe_lrc *lrc,
 					       struct xe_hw_engine *hwe,
 					       u32 *batch, size_t max_len)
@@ -1203,6 +1227,7 @@ int xe_lrc_setup_wa_bb_with_scratch(struct xe_lrc *lrc, struct xe_hw_engine *hwe
 		{ .setup = setup_timestamp_wa },
 		{ .setup = setup_invalidate_state_cache_wa },
 		{ .setup = setup_utilization_wa },
+		{ .setup = setup_configfs_post_ctx_restore_bb },
 	};
 	struct bo_setup_state state = {
 		.lrc = lrc,
-- 
2.50.1


^ permalink raw reply related	[flat|nested] 20+ messages in thread

* ✗ CI.checkpatch: warning for drm/xe: Add user commands to WA BB via configfs (rev2)
  2025-08-27 22:35 [PATCH v2 0/6] drm/xe: Add user commands to WA BB via configfs Lucas De Marchi
                   ` (7 preceding siblings ...)
  2025-08-28  1:49 ` ✗ CI.KUnit: failure " Patchwork
@ 2025-08-28  3:00 ` Patchwork
  2025-08-28  3:01 ` ✓ CI.KUnit: success " Patchwork
                   ` (2 subsequent siblings)
  11 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2025-08-28  3:00 UTC (permalink / raw)
  To: Lucas De Marchi; +Cc: intel-xe

== Series Details ==

Series: drm/xe: Add user commands to WA BB via configfs (rev2)
URL   : https://patchwork.freedesktop.org/series/153594/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
e0fa7d6ad11ac6dc8dfa757164e518968a98b897
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 133568e6f92501c6b7cc8352679a3a50fe3b8f51
Author: Lucas De Marchi <lucas.demarchi@intel.com>
Date:   Wed Aug 27 15:35:31 2025 -0700

    drm/xe/configfs: Add post context restore bb
    
    Allow the user to specify commands to execute during a context restore.
    Currently it's possible to parse 2 types of actions:
    
            - cmd: the instructions are added as is to the bb
            - reg: just use the address and value, without worrying about
              encoding the right LRI instruction. This is possibly the most
              useful use case, so added a dedicated action for that.
    
    This also serve as preparation for future BBs: mid context restore and
    rc6 context restore that can re-use the same parsing functions.
    
    The bin attribute from configfs is used here to allow multi-line input.
    
    Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
+ /mt/dim checkpatch f6f3d6ae1615f7ca0e414fb0766ab17eac65ae7c drm-intel
929e860c08c8 drm/xe/configfs: Extract function to parse engine
e8b024b6a436 drm/xe/configfs: Allow to select by class only
af233b4957f4 drm/xe: Update workaround documentation
993f464a9927 drm/xe/configfs: Fix documentation warning
e0d2f9c99828 drm/xe/lrc: Allow to add user commands on context switch
-:62: ERROR:OPEN_BRACE: open brace '{' following function definitions go on the next line
#62: FILE: drivers/gpu/drm/xe/xe_configfs.h:33:
+static u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
+					       const u32 **cs) { return 0; }

total: 1 errors, 0 warnings, 0 checks, 86 lines checked
133568e6f925 drm/xe/configfs: Add post context restore bb



^ permalink raw reply	[flat|nested] 20+ messages in thread

* ✓ CI.KUnit: success for drm/xe: Add user commands to WA BB via configfs (rev2)
  2025-08-27 22:35 [PATCH v2 0/6] drm/xe: Add user commands to WA BB via configfs Lucas De Marchi
                   ` (8 preceding siblings ...)
  2025-08-28  3:00 ` ✗ CI.checkpatch: warning for drm/xe: Add user commands to WA BB via configfs (rev2) Patchwork
@ 2025-08-28  3:01 ` Patchwork
  2025-08-28  3:39 ` ✓ Xe.CI.BAT: " Patchwork
  2025-08-28  4:45 ` ✗ Xe.CI.Full: failure " Patchwork
  11 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2025-08-28  3:01 UTC (permalink / raw)
  To: Lucas De Marchi; +Cc: intel-xe

== Series Details ==

Series: drm/xe: Add user commands to WA BB via configfs (rev2)
URL   : https://patchwork.freedesktop.org/series/153594/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[03:00:08] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[03:00:12] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
In file included from ../drivers/gpu/drm/xe/xe_guc.c:19:
../drivers/gpu/drm/xe/xe_configfs.h:33:12: warning: ‘xe_configfs_get_ctx_restore_post_bb’ defined but not used [-Wunused-function]
   33 | static u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
      |            ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_hw_engine.c:20:
../drivers/gpu/drm/xe/xe_configfs.h:33:12: warning: ‘xe_configfs_get_ctx_restore_post_bb’ defined but not used [-Wunused-function]
   33 | static u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
      |            ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_module.c:14:
../drivers/gpu/drm/xe/xe_configfs.h:33:12: warning: ‘xe_configfs_get_ctx_restore_post_bb’ defined but not used [-Wunused-function]
   33 | static u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
      |            ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_pci.c:21:
../drivers/gpu/drm/xe/xe_configfs.h:33:12: warning: ‘xe_configfs_get_ctx_restore_post_bb’ defined but not used [-Wunused-function]
   33 | static u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
      |            ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_psmi.c:10:
../drivers/gpu/drm/xe/xe_configfs.h:33:12: warning: ‘xe_configfs_get_ctx_restore_post_bb’ defined but not used [-Wunused-function]
   33 | static u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
      |            ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_rtp.c:12:
../drivers/gpu/drm/xe/xe_configfs.h:33:12: warning: ‘xe_configfs_get_ctx_restore_post_bb’ defined but not used [-Wunused-function]
   33 | static u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
      |            ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_survivability_mode.c:13:
../drivers/gpu/drm/xe/xe_configfs.h:33:12: warning: ‘xe_configfs_get_ctx_restore_post_bb’ defined but not used [-Wunused-function]
   33 | static u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
      |            ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

[03:00:41] Starting KUnit Kernel (1/1)...
[03:00:41] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[03:00:41] ================== guc_buf (11 subtests) ===================
[03:00:41] [PASSED] test_smallest
[03:00:41] [PASSED] test_largest
[03:00:41] [PASSED] test_granular
[03:00:41] [PASSED] test_unique
[03:00:41] [PASSED] test_overlap
[03:00:41] [PASSED] test_reusable
[03:00:41] [PASSED] test_too_big
[03:00:41] [PASSED] test_flush
[03:00:41] [PASSED] test_lookup
[03:00:41] [PASSED] test_data
[03:00:41] [PASSED] test_class
[03:00:41] ===================== [PASSED] guc_buf =====================
[03:00:41] =================== guc_dbm (7 subtests) ===================
[03:00:41] [PASSED] test_empty
[03:00:41] [PASSED] test_default
[03:00:41] ======================== test_size  ========================
[03:00:41] [PASSED] 4
[03:00:41] [PASSED] 8
[03:00:41] [PASSED] 32
[03:00:41] [PASSED] 256
[03:00:41] ==================== [PASSED] test_size ====================
[03:00:41] ======================= test_reuse  ========================
[03:00:41] [PASSED] 4
[03:00:41] [PASSED] 8
[03:00:41] [PASSED] 32
[03:00:41] [PASSED] 256
[03:00:41] =================== [PASSED] test_reuse ====================
[03:00:41] =================== test_range_overlap  ====================
[03:00:41] [PASSED] 4
[03:00:41] [PASSED] 8
[03:00:41] [PASSED] 32
[03:00:41] [PASSED] 256
[03:00:41] =============== [PASSED] test_range_overlap ================
[03:00:41] =================== test_range_compact  ====================
[03:00:41] [PASSED] 4
[03:00:41] [PASSED] 8
[03:00:41] [PASSED] 32
[03:00:41] [PASSED] 256
[03:00:41] =============== [PASSED] test_range_compact ================
[03:00:41] ==================== test_range_spare  =====================
[03:00:41] [PASSED] 4
[03:00:41] [PASSED] 8
[03:00:41] [PASSED] 32
[03:00:41] [PASSED] 256
[03:00:41] ================ [PASSED] test_range_spare =================
[03:00:41] ===================== [PASSED] guc_dbm =====================
[03:00:41] =================== guc_idm (6 subtests) ===================
[03:00:41] [PASSED] bad_init
[03:00:41] [PASSED] no_init
[03:00:41] [PASSED] init_fini
[03:00:41] [PASSED] check_used
[03:00:41] [PASSED] check_quota
[03:00:41] [PASSED] check_all
[03:00:41] ===================== [PASSED] guc_idm =====================
[03:00:41] ================== no_relay (3 subtests) ===================
[03:00:41] [PASSED] xe_drops_guc2pf_if_not_ready
[03:00:41] [PASSED] xe_drops_guc2vf_if_not_ready
[03:00:41] [PASSED] xe_rejects_send_if_not_ready
[03:00:41] ==================== [PASSED] no_relay =====================
[03:00:41] ================== pf_relay (14 subtests) ==================
[03:00:41] [PASSED] pf_rejects_guc2pf_too_short
[03:00:41] [PASSED] pf_rejects_guc2pf_too_long
[03:00:41] [PASSED] pf_rejects_guc2pf_no_payload
[03:00:41] [PASSED] pf_fails_no_payload
[03:00:41] [PASSED] pf_fails_bad_origin
[03:00:41] [PASSED] pf_fails_bad_type
[03:00:41] [PASSED] pf_txn_reports_error
[03:00:41] [PASSED] pf_txn_sends_pf2guc
[03:00:41] [PASSED] pf_sends_pf2guc
[03:00:41] [SKIPPED] pf_loopback_nop
[03:00:41] [SKIPPED] pf_loopback_echo
[03:00:41] [SKIPPED] pf_loopback_fail
[03:00:41] [SKIPPED] pf_loopback_busy
[03:00:41] [SKIPPED] pf_loopback_retry
[03:00:41] ==================== [PASSED] pf_relay =====================
[03:00:41] ================== vf_relay (3 subtests) ===================
[03:00:41] [PASSED] vf_rejects_guc2vf_too_short
[03:00:41] [PASSED] vf_rejects_guc2vf_too_long
[03:00:41] [PASSED] vf_rejects_guc2vf_no_payload
[03:00:41] ==================== [PASSED] vf_relay =====================
[03:00:41] ===================== lmtt (1 subtest) =====================
[03:00:41] ======================== test_ops  =========================
[03:00:41] [PASSED] 2-level
[03:00:41] [PASSED] multi-level
[03:00:41] ==================== [PASSED] test_ops =====================
[03:00:41] ====================== [PASSED] lmtt =======================
[03:00:41] ================= pf_service (11 subtests) =================
[03:00:41] [PASSED] pf_negotiate_any
[03:00:41] [PASSED] pf_negotiate_base_match
[03:00:41] [PASSED] pf_negotiate_base_newer
[03:00:41] [PASSED] pf_negotiate_base_next
[03:00:41] [SKIPPED] pf_negotiate_base_older
[03:00:41] [PASSED] pf_negotiate_base_prev
[03:00:41] [PASSED] pf_negotiate_latest_match
[03:00:41] [PASSED] pf_negotiate_latest_newer
[03:00:41] [PASSED] pf_negotiate_latest_next
[03:00:41] [SKIPPED] pf_negotiate_latest_older
[03:00:41] [SKIPPED] pf_negotiate_latest_prev
[03:00:41] =================== [PASSED] pf_service ====================
[03:00:41] =================== xe_mocs (2 subtests) ===================
[03:00:41] ================ xe_live_mocs_kernel_kunit  ================
[03:00:41] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[03:00:41] ================ xe_live_mocs_reset_kunit  =================
[03:00:41] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[03:00:41] ==================== [SKIPPED] xe_mocs =====================
[03:00:41] ================= xe_migrate (2 subtests) ==================
[03:00:41] ================= xe_migrate_sanity_kunit  =================
[03:00:41] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[03:00:41] ================== xe_validate_ccs_kunit  ==================
[03:00:41] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[03:00:41] =================== [SKIPPED] xe_migrate ===================
[03:00:41] ================== xe_dma_buf (1 subtest) ==================
[03:00:41] ==================== xe_dma_buf_kunit  =====================
[03:00:41] ================ [SKIPPED] xe_dma_buf_kunit ================
[03:00:41] =================== [SKIPPED] xe_dma_buf ===================
[03:00:41] ================= xe_bo_shrink (1 subtest) =================
[03:00:41] =================== xe_bo_shrink_kunit  ====================
[03:00:41] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[03:00:41] ================== [SKIPPED] xe_bo_shrink ==================
[03:00:41] ==================== xe_bo (2 subtests) ====================
[03:00:41] ================== xe_ccs_migrate_kunit  ===================
[03:00:41] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[03:00:41] ==================== xe_bo_evict_kunit  ====================
[03:00:41] =============== [SKIPPED] xe_bo_evict_kunit ================
[03:00:41] ===================== [SKIPPED] xe_bo ======================
[03:00:41] ==================== args (11 subtests) ====================
[03:00:41] [PASSED] count_args_test
[03:00:41] [PASSED] call_args_example
[03:00:41] [PASSED] call_args_test
[03:00:41] [PASSED] drop_first_arg_example
[03:00:41] [PASSED] drop_first_arg_test
[03:00:41] [PASSED] first_arg_example
[03:00:41] [PASSED] first_arg_test
[03:00:41] [PASSED] last_arg_example
[03:00:41] [PASSED] last_arg_test
[03:00:41] [PASSED] pick_arg_example
[03:00:41] [PASSED] sep_comma_example
[03:00:41] ====================== [PASSED] args =======================
[03:00:41] =================== xe_pci (3 subtests) ====================
[03:00:41] ==================== check_graphics_ip  ====================
[03:00:41] [PASSED] 12.70 Xe_LPG
[03:00:41] [PASSED] 12.71 Xe_LPG
[03:00:41] [PASSED] 12.74 Xe_LPG+
[03:00:41] [PASSED] 20.01 Xe2_HPG
[03:00:41] [PASSED] 20.02 Xe2_HPG
[03:00:41] [PASSED] 20.04 Xe2_LPG
[03:00:41] [PASSED] 30.00 Xe3_LPG
[03:00:41] [PASSED] 30.01 Xe3_LPG
[03:00:41] [PASSED] 30.03 Xe3_LPG
[03:00:41] ================ [PASSED] check_graphics_ip ================
[03:00:41] ===================== check_media_ip  ======================
[03:00:41] [PASSED] 13.00 Xe_LPM+
[03:00:41] [PASSED] 13.01 Xe2_HPM
[03:00:41] [PASSED] 20.00 Xe2_LPM
[03:00:41] [PASSED] 30.00 Xe3_LPM
[03:00:41] [PASSED] 30.02 Xe3_LPM
[03:00:41] ================= [PASSED] check_media_ip ==================
[03:00:41] ================= check_platform_gt_count  =================
[03:00:41] [PASSED] 0x9A60 (TIGERLAKE)
[03:00:41] [PASSED] 0x9A68 (TIGERLAKE)
[03:00:41] [PASSED] 0x9A70 (TIGERLAKE)
[03:00:41] [PASSED] 0x9A40 (TIGERLAKE)
[03:00:41] [PASSED] 0x9A49 (TIGERLAKE)
[03:00:41] [PASSED] 0x9A59 (TIGERLAKE)
[03:00:41] [PASSED] 0x9A78 (TIGERLAKE)
[03:00:41] [PASSED] 0x9AC0 (TIGERLAKE)
[03:00:41] [PASSED] 0x9AC9 (TIGERLAKE)
[03:00:41] [PASSED] 0x9AD9 (TIGERLAKE)
[03:00:41] [PASSED] 0x9AF8 (TIGERLAKE)
[03:00:41] [PASSED] 0x4C80 (ROCKETLAKE)
[03:00:41] [PASSED] 0x4C8A (ROCKETLAKE)
[03:00:41] [PASSED] 0x4C8B (ROCKETLAKE)
[03:00:41] [PASSED] 0x4C8C (ROCKETLAKE)
[03:00:41] [PASSED] 0x4C90 (ROCKETLAKE)
[03:00:41] [PASSED] 0x4C9A (ROCKETLAKE)
[03:00:41] [PASSED] 0x4680 (ALDERLAKE_S)
[03:00:41] [PASSED] 0x4682 (ALDERLAKE_S)
[03:00:41] [PASSED] 0x4688 (ALDERLAKE_S)
[03:00:41] [PASSED] 0x468A (ALDERLAKE_S)
[03:00:41] [PASSED] 0x468B (ALDERLAKE_S)
[03:00:41] [PASSED] 0x4690 (ALDERLAKE_S)
[03:00:41] [PASSED] 0x4692 (ALDERLAKE_S)
[03:00:41] [PASSED] 0x4693 (ALDERLAKE_S)
[03:00:41] [PASSED] 0x46A0 (ALDERLAKE_P)
[03:00:41] [PASSED] 0x46A1 (ALDERLAKE_P)
[03:00:41] [PASSED] 0x46A2 (ALDERLAKE_P)
[03:00:41] [PASSED] 0x46A3 (ALDERLAKE_P)
[03:00:41] [PASSED] 0x46A6 (ALDERLAKE_P)
[03:00:41] [PASSED] 0x46A8 (ALDERLAKE_P)
[03:00:41] [PASSED] 0x46AA (ALDERLAKE_P)
[03:00:41] [PASSED] 0x462A (ALDERLAKE_P)
[03:00:41] [PASSED] 0x4626 (ALDERLAKE_P)
[03:00:41] [PASSED] 0x4628 (ALDERLAKE_P)
[03:00:41] [PASSED] 0x46B0 (ALDERLAKE_P)
[03:00:41] [PASSED] 0x46B1 (ALDERLAKE_P)
[03:00:41] [PASSED] 0x46B2 (ALDERLAKE_P)
[03:00:41] [PASSED] 0x46B3 (ALDERLAKE_P)
[03:00:41] [PASSED] 0x46C0 (ALDERLAKE_P)
[03:00:41] [PASSED] 0x46C1 (ALDERLAKE_P)
[03:00:41] [PASSED] 0x46C2 (ALDERLAKE_P)
[03:00:41] [PASSED] 0x46C3 (ALDERLAKE_P)
[03:00:41] [PASSED] 0x46D0 (ALDERLAKE_N)
[03:00:41] [PASSED] 0x46D1 (ALDERLAKE_N)
[03:00:41] [PASSED] 0x46D2 (ALDERLAKE_N)
[03:00:41] [PASSED] 0x46D3 (ALDERLAKE_N)
[03:00:41] [PASSED] 0x46D4 (ALDERLAKE_N)
[03:00:41] [PASSED] 0xA721 (ALDERLAKE_P)
[03:00:41] [PASSED] 0xA7A1 (ALDERLAKE_P)
[03:00:41] [PASSED] 0xA7A9 (ALDERLAKE_P)
[03:00:41] [PASSED] 0xA7AC (ALDERLAKE_P)
[03:00:41] [PASSED] 0xA7AD (ALDERLAKE_P)
[03:00:41] [PASSED] 0xA720 (ALDERLAKE_P)
[03:00:41] [PASSED] 0xA7A0 (ALDERLAKE_P)
[03:00:41] [PASSED] 0xA7A8 (ALDERLAKE_P)
[03:00:41] [PASSED] 0xA7AA (ALDERLAKE_P)
[03:00:41] [PASSED] 0xA7AB (ALDERLAKE_P)
[03:00:41] [PASSED] 0xA780 (ALDERLAKE_S)
[03:00:41] [PASSED] 0xA781 (ALDERLAKE_S)
[03:00:41] [PASSED] 0xA782 (ALDERLAKE_S)
[03:00:41] [PASSED] 0xA783 (ALDERLAKE_S)
[03:00:41] [PASSED] 0xA788 (ALDERLAKE_S)
[03:00:41] [PASSED] 0xA789 (ALDERLAKE_S)
[03:00:41] [PASSED] 0xA78A (ALDERLAKE_S)
[03:00:41] [PASSED] 0xA78B (ALDERLAKE_S)
[03:00:41] [PASSED] 0x4905 (DG1)
[03:00:41] [PASSED] 0x4906 (DG1)
[03:00:41] [PASSED] 0x4907 (DG1)
[03:00:41] [PASSED] 0x4908 (DG1)
[03:00:41] [PASSED] 0x4909 (DG1)
[03:00:41] [PASSED] 0x56C0 (DG2)
[03:00:41] [PASSED] 0x56C2 (DG2)
[03:00:41] [PASSED] 0x56C1 (DG2)
[03:00:41] [PASSED] 0x7D51 (METEORLAKE)
[03:00:41] [PASSED] 0x7DD1 (METEORLAKE)
[03:00:41] [PASSED] 0x7D41 (METEORLAKE)
[03:00:41] [PASSED] 0x7D67 (METEORLAKE)
[03:00:41] [PASSED] 0xB640 (METEORLAKE)
[03:00:41] [PASSED] 0x56A0 (DG2)
[03:00:41] [PASSED] 0x56A1 (DG2)
[03:00:41] [PASSED] 0x56A2 (DG2)
[03:00:41] [PASSED] 0x56BE (DG2)
[03:00:41] [PASSED] 0x56BF (DG2)
[03:00:41] [PASSED] 0x5690 (DG2)
[03:00:41] [PASSED] 0x5691 (DG2)
[03:00:41] [PASSED] 0x5692 (DG2)
[03:00:41] [PASSED] 0x56A5 (DG2)
[03:00:41] [PASSED] 0x56A6 (DG2)
[03:00:41] [PASSED] 0x56B0 (DG2)
[03:00:41] [PASSED] 0x56B1 (DG2)
[03:00:41] [PASSED] 0x56BA (DG2)
[03:00:41] [PASSED] 0x56BB (DG2)
[03:00:41] [PASSED] 0x56BC (DG2)
[03:00:41] [PASSED] 0x56BD (DG2)
[03:00:41] [PASSED] 0x5693 (DG2)
[03:00:41] [PASSED] 0x5694 (DG2)
[03:00:41] [PASSED] 0x5695 (DG2)
[03:00:41] [PASSED] 0x56A3 (DG2)
[03:00:41] [PASSED] 0x56A4 (DG2)
[03:00:41] [PASSED] 0x56B2 (DG2)
[03:00:41] [PASSED] 0x56B3 (DG2)
[03:00:41] [PASSED] 0x5696 (DG2)
[03:00:41] [PASSED] 0x5697 (DG2)
[03:00:41] [PASSED] 0xB69 (PVC)
[03:00:41] [PASSED] 0xB6E (PVC)
[03:00:41] [PASSED] 0xBD4 (PVC)
[03:00:41] [PASSED] 0xBD5 (PVC)
[03:00:41] [PASSED] 0xBD6 (PVC)
[03:00:41] [PASSED] 0xBD7 (PVC)
[03:00:41] [PASSED] 0xBD8 (PVC)
[03:00:41] [PASSED] 0xBD9 (PVC)
[03:00:41] [PASSED] 0xBDA (PVC)
[03:00:41] [PASSED] 0xBDB (PVC)
[03:00:41] [PASSED] 0xBE0 (PVC)
[03:00:41] [PASSED] 0xBE1 (PVC)
[03:00:41] [PASSED] 0xBE5 (PVC)
[03:00:41] [PASSED] 0x7D40 (METEORLAKE)
[03:00:41] [PASSED] 0x7D45 (METEORLAKE)
[03:00:41] [PASSED] 0x7D55 (METEORLAKE)
[03:00:41] [PASSED] 0x7D60 (METEORLAKE)
[03:00:41] [PASSED] 0x7DD5 (METEORLAKE)
[03:00:41] [PASSED] 0x6420 (LUNARLAKE)
[03:00:41] [PASSED] 0x64A0 (LUNARLAKE)
[03:00:41] [PASSED] 0x64B0 (LUNARLAKE)
[03:00:41] [PASSED] 0xE202 (BATTLEMAGE)
[03:00:41] [PASSED] 0xE209 (BATTLEMAGE)
[03:00:41] [PASSED] 0xE20B (BATTLEMAGE)
[03:00:41] [PASSED] 0xE20C (BATTLEMAGE)
[03:00:41] [PASSED] 0xE20D (BATTLEMAGE)
[03:00:41] [PASSED] 0xE210 (BATTLEMAGE)
[03:00:41] [PASSED] 0xE211 (BATTLEMAGE)
[03:00:41] [PASSED] 0xE212 (BATTLEMAGE)
[03:00:41] [PASSED] 0xE216 (BATTLEMAGE)
[03:00:41] [PASSED] 0xE220 (BATTLEMAGE)
[03:00:41] [PASSED] 0xE221 (BATTLEMAGE)
[03:00:41] [PASSED] 0xE222 (BATTLEMAGE)
[03:00:41] [PASSED] 0xE223 (BATTLEMAGE)
[03:00:41] [PASSED] 0xB080 (PANTHERLAKE)
[03:00:41] [PASSED] 0xB081 (PANTHERLAKE)
[03:00:41] [PASSED] 0xB082 (PANTHERLAKE)
[03:00:41] [PASSED] 0xB083 (PANTHERLAKE)
[03:00:41] [PASSED] 0xB084 (PANTHERLAKE)
[03:00:41] [PASSED] 0xB085 (PANTHERLAKE)
[03:00:41] [PASSED] 0xB086 (PANTHERLAKE)
[03:00:41] [PASSED] 0xB087 (PANTHERLAKE)
stty: 'standard input': Inappropriate ioctl for device
[03:00:41] [PASSED] 0xB08F (PANTHERLAKE)
[03:00:41] [PASSED] 0xB090 (PANTHERLAKE)
[03:00:41] [PASSED] 0xB0A0 (PANTHERLAKE)
[03:00:41] [PASSED] 0xB0B0 (PANTHERLAKE)
[03:00:41] [PASSED] 0xFD80 (PANTHERLAKE)
[03:00:41] [PASSED] 0xFD81 (PANTHERLAKE)
[03:00:41] ============= [PASSED] check_platform_gt_count =============
[03:00:41] ===================== [PASSED] xe_pci ======================
[03:00:41] =================== xe_rtp (2 subtests) ====================
[03:00:41] =============== xe_rtp_process_to_sr_tests  ================
[03:00:41] [PASSED] coalesce-same-reg
[03:00:41] [PASSED] no-match-no-add
[03:00:41] [PASSED] match-or
[03:00:41] [PASSED] match-or-xfail
[03:00:41] [PASSED] no-match-no-add-multiple-rules
[03:00:41] [PASSED] two-regs-two-entries
[03:00:41] [PASSED] clr-one-set-other
[03:00:41] [PASSED] set-field
[03:00:41] [PASSED] conflict-duplicate
[03:00:41] [PASSED] conflict-not-disjoint
[03:00:41] [PASSED] conflict-reg-type
[03:00:41] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[03:00:41] ================== xe_rtp_process_tests  ===================
[03:00:41] [PASSED] active1
[03:00:41] [PASSED] active2
[03:00:41] [PASSED] active-inactive
[03:00:41] [PASSED] inactive-active
[03:00:41] [PASSED] inactive-1st_or_active-inactive
[03:00:41] [PASSED] inactive-2nd_or_active-inactive
[03:00:41] [PASSED] inactive-last_or_active-inactive
[03:00:41] [PASSED] inactive-no_or_active-inactive
[03:00:41] ============== [PASSED] xe_rtp_process_tests ===============
[03:00:41] ===================== [PASSED] xe_rtp ======================
[03:00:41] ==================== xe_wa (1 subtest) =====================
[03:00:41] ======================== xe_wa_gt  =========================
[03:00:41] [PASSED] TIGERLAKE (B0)
[03:00:41] [PASSED] DG1 (A0)
[03:00:41] [PASSED] DG1 (B0)
[03:00:41] [PASSED] ALDERLAKE_S (A0)
[03:00:41] [PASSED] ALDERLAKE_S (B0)
[03:00:41] [PASSED] ALDERLAKE_S (C0)
[03:00:41] [PASSED] ALDERLAKE_S (D0)
[03:00:41] [PASSED] ALDERLAKE_P (A0)
[03:00:41] [PASSED] ALDERLAKE_P (B0)
[03:00:41] [PASSED] ALDERLAKE_P (C0)
[03:00:41] [PASSED] ALDERLAKE_S_RPLS (D0)
[03:00:41] [PASSED] ALDERLAKE_P_RPLU (E0)
[03:00:41] [PASSED] DG2_G10 (C0)
[03:00:41] [PASSED] DG2_G11 (B1)
[03:00:41] [PASSED] DG2_G12 (A1)
[03:00:41] [PASSED] METEORLAKE (g:A0, m:A0)
[03:00:41] [PASSED] METEORLAKE (g:A0, m:A0)
[03:00:41] [PASSED] METEORLAKE (g:A0, m:A0)
[03:00:41] [PASSED] LUNARLAKE (g:A0, m:A0)
[03:00:41] [PASSED] LUNARLAKE (g:B0, m:A0)
[03:00:41] [PASSED] BATTLEMAGE (g:A0, m:A1)
[03:00:41] [PASSED] PANTHERLAKE (g:A0, m:A0)
[03:00:41] ==================== [PASSED] xe_wa_gt =====================
[03:00:41] ====================== [PASSED] xe_wa ======================
[03:00:41] ============================================================
[03:00:41] Testing complete. Ran 298 tests: passed: 282, skipped: 16
[03:00:41] Elapsed time: 33.286s total, 4.196s configuring, 28.723s building, 0.325s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[03:00:41] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[03:00:43] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[03:01:06] Starting KUnit Kernel (1/1)...
[03:01:06] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[03:01:06] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[03:01:06] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[03:01:06] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[03:01:06] =========== drm_validate_clone_mode (2 subtests) ===========
[03:01:06] ============== drm_test_check_in_clone_mode  ===============
[03:01:06] [PASSED] in_clone_mode
[03:01:06] [PASSED] not_in_clone_mode
[03:01:06] ========== [PASSED] drm_test_check_in_clone_mode ===========
[03:01:06] =============== drm_test_check_valid_clones  ===============
[03:01:06] [PASSED] not_in_clone_mode
[03:01:06] [PASSED] valid_clone
[03:01:06] [PASSED] invalid_clone
[03:01:06] =========== [PASSED] drm_test_check_valid_clones ===========
[03:01:06] ============= [PASSED] drm_validate_clone_mode =============
[03:01:06] ============= drm_validate_modeset (1 subtest) =============
[03:01:06] [PASSED] drm_test_check_connector_changed_modeset
[03:01:06] ============== [PASSED] drm_validate_modeset ===============
[03:01:06] ====== drm_test_bridge_get_current_state (2 subtests) ======
[03:01:06] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[03:01:06] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[03:01:06] ======== [PASSED] drm_test_bridge_get_current_state ========
[03:01:06] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[03:01:06] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[03:01:06] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[03:01:06] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[03:01:06] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[03:01:06] ============== drm_bridge_alloc (2 subtests) ===============
[03:01:06] [PASSED] drm_test_drm_bridge_alloc_basic
[03:01:06] [PASSED] drm_test_drm_bridge_alloc_get_put
[03:01:06] ================ [PASSED] drm_bridge_alloc =================
[03:01:06] ================== drm_buddy (7 subtests) ==================
[03:01:06] [PASSED] drm_test_buddy_alloc_limit
[03:01:06] [PASSED] drm_test_buddy_alloc_optimistic
[03:01:06] [PASSED] drm_test_buddy_alloc_pessimistic
[03:01:06] [PASSED] drm_test_buddy_alloc_pathological
[03:01:06] [PASSED] drm_test_buddy_alloc_contiguous
[03:01:06] [PASSED] drm_test_buddy_alloc_clear
[03:01:06] [PASSED] drm_test_buddy_alloc_range_bias
[03:01:06] ==================== [PASSED] drm_buddy ====================
[03:01:06] ============= drm_cmdline_parser (40 subtests) =============
[03:01:06] [PASSED] drm_test_cmdline_force_d_only
[03:01:06] [PASSED] drm_test_cmdline_force_D_only_dvi
[03:01:06] [PASSED] drm_test_cmdline_force_D_only_hdmi
[03:01:06] [PASSED] drm_test_cmdline_force_D_only_not_digital
[03:01:06] [PASSED] drm_test_cmdline_force_e_only
[03:01:06] [PASSED] drm_test_cmdline_res
[03:01:06] [PASSED] drm_test_cmdline_res_vesa
[03:01:06] [PASSED] drm_test_cmdline_res_vesa_rblank
[03:01:06] [PASSED] drm_test_cmdline_res_rblank
[03:01:06] [PASSED] drm_test_cmdline_res_bpp
[03:01:06] [PASSED] drm_test_cmdline_res_refresh
[03:01:06] [PASSED] drm_test_cmdline_res_bpp_refresh
[03:01:06] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[03:01:06] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[03:01:06] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[03:01:06] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[03:01:06] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[03:01:06] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[03:01:06] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[03:01:06] [PASSED] drm_test_cmdline_res_margins_force_on
[03:01:06] [PASSED] drm_test_cmdline_res_vesa_margins
[03:01:06] [PASSED] drm_test_cmdline_name
[03:01:06] [PASSED] drm_test_cmdline_name_bpp
[03:01:06] [PASSED] drm_test_cmdline_name_option
[03:01:06] [PASSED] drm_test_cmdline_name_bpp_option
[03:01:06] [PASSED] drm_test_cmdline_rotate_0
[03:01:06] [PASSED] drm_test_cmdline_rotate_90
[03:01:06] [PASSED] drm_test_cmdline_rotate_180
[03:01:06] [PASSED] drm_test_cmdline_rotate_270
[03:01:06] [PASSED] drm_test_cmdline_hmirror
[03:01:06] [PASSED] drm_test_cmdline_vmirror
[03:01:06] [PASSED] drm_test_cmdline_margin_options
[03:01:06] [PASSED] drm_test_cmdline_multiple_options
[03:01:06] [PASSED] drm_test_cmdline_bpp_extra_and_option
[03:01:06] [PASSED] drm_test_cmdline_extra_and_option
[03:01:06] [PASSED] drm_test_cmdline_freestanding_options
[03:01:06] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[03:01:06] [PASSED] drm_test_cmdline_panel_orientation
[03:01:06] ================ drm_test_cmdline_invalid  =================
[03:01:06] [PASSED] margin_only
[03:01:06] [PASSED] interlace_only
[03:01:06] [PASSED] res_missing_x
[03:01:06] [PASSED] res_missing_y
[03:01:06] [PASSED] res_bad_y
[03:01:06] [PASSED] res_missing_y_bpp
[03:01:06] [PASSED] res_bad_bpp
[03:01:06] [PASSED] res_bad_refresh
[03:01:06] [PASSED] res_bpp_refresh_force_on_off
[03:01:06] [PASSED] res_invalid_mode
[03:01:06] [PASSED] res_bpp_wrong_place_mode
[03:01:06] [PASSED] name_bpp_refresh
[03:01:06] [PASSED] name_refresh
[03:01:06] [PASSED] name_refresh_wrong_mode
[03:01:06] [PASSED] name_refresh_invalid_mode
[03:01:06] [PASSED] rotate_multiple
[03:01:06] [PASSED] rotate_invalid_val
[03:01:06] [PASSED] rotate_truncated
[03:01:06] [PASSED] invalid_option
[03:01:06] [PASSED] invalid_tv_option
[03:01:06] [PASSED] truncated_tv_option
[03:01:06] ============ [PASSED] drm_test_cmdline_invalid =============
[03:01:06] =============== drm_test_cmdline_tv_options  ===============
[03:01:06] [PASSED] NTSC
[03:01:06] [PASSED] NTSC_443
[03:01:06] [PASSED] NTSC_J
[03:01:06] [PASSED] PAL
[03:01:06] [PASSED] PAL_M
[03:01:06] [PASSED] PAL_N
[03:01:06] [PASSED] SECAM
[03:01:06] [PASSED] MONO_525
[03:01:06] [PASSED] MONO_625
[03:01:06] =========== [PASSED] drm_test_cmdline_tv_options ===========
[03:01:06] =============== [PASSED] drm_cmdline_parser ================
[03:01:06] ========== drmm_connector_hdmi_init (20 subtests) ==========
[03:01:06] [PASSED] drm_test_connector_hdmi_init_valid
[03:01:06] [PASSED] drm_test_connector_hdmi_init_bpc_8
[03:01:06] [PASSED] drm_test_connector_hdmi_init_bpc_10
[03:01:06] [PASSED] drm_test_connector_hdmi_init_bpc_12
[03:01:06] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[03:01:06] [PASSED] drm_test_connector_hdmi_init_bpc_null
[03:01:06] [PASSED] drm_test_connector_hdmi_init_formats_empty
[03:01:06] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[03:01:06] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[03:01:06] [PASSED] supported_formats=0x9 yuv420_allowed=1
[03:01:06] [PASSED] supported_formats=0x9 yuv420_allowed=0
[03:01:06] [PASSED] supported_formats=0x3 yuv420_allowed=1
[03:01:06] [PASSED] supported_formats=0x3 yuv420_allowed=0
[03:01:06] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[03:01:06] [PASSED] drm_test_connector_hdmi_init_null_ddc
[03:01:06] [PASSED] drm_test_connector_hdmi_init_null_product
[03:01:06] [PASSED] drm_test_connector_hdmi_init_null_vendor
[03:01:06] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[03:01:06] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[03:01:06] [PASSED] drm_test_connector_hdmi_init_product_valid
[03:01:06] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[03:01:06] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[03:01:06] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[03:01:06] ========= drm_test_connector_hdmi_init_type_valid  =========
[03:01:06] [PASSED] HDMI-A
[03:01:06] [PASSED] HDMI-B
[03:01:06] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[03:01:06] ======== drm_test_connector_hdmi_init_type_invalid  ========
[03:01:06] [PASSED] Unknown
[03:01:06] [PASSED] VGA
[03:01:06] [PASSED] DVI-I
[03:01:06] [PASSED] DVI-D
[03:01:06] [PASSED] DVI-A
[03:01:06] [PASSED] Composite
[03:01:06] [PASSED] SVIDEO
[03:01:06] [PASSED] LVDS
[03:01:06] [PASSED] Component
[03:01:06] [PASSED] DIN
[03:01:06] [PASSED] DP
[03:01:06] [PASSED] TV
[03:01:06] [PASSED] eDP
[03:01:06] [PASSED] Virtual
[03:01:06] [PASSED] DSI
[03:01:06] [PASSED] DPI
[03:01:06] [PASSED] Writeback
[03:01:06] [PASSED] SPI
[03:01:06] [PASSED] USB
[03:01:06] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[03:01:06] ============ [PASSED] drmm_connector_hdmi_init =============
[03:01:06] ============= drmm_connector_init (3 subtests) =============
[03:01:06] [PASSED] drm_test_drmm_connector_init
[03:01:06] [PASSED] drm_test_drmm_connector_init_null_ddc
[03:01:06] ========= drm_test_drmm_connector_init_type_valid  =========
[03:01:06] [PASSED] Unknown
[03:01:06] [PASSED] VGA
[03:01:06] [PASSED] DVI-I
[03:01:06] [PASSED] DVI-D
[03:01:06] [PASSED] DVI-A
[03:01:06] [PASSED] Composite
[03:01:06] [PASSED] SVIDEO
[03:01:06] [PASSED] LVDS
[03:01:06] [PASSED] Component
[03:01:06] [PASSED] DIN
[03:01:06] [PASSED] DP
[03:01:06] [PASSED] HDMI-A
[03:01:06] [PASSED] HDMI-B
[03:01:06] [PASSED] TV
[03:01:06] [PASSED] eDP
[03:01:06] [PASSED] Virtual
[03:01:06] [PASSED] DSI
[03:01:06] [PASSED] DPI
[03:01:06] [PASSED] Writeback
[03:01:06] [PASSED] SPI
[03:01:06] [PASSED] USB
[03:01:06] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[03:01:06] =============== [PASSED] drmm_connector_init ===============
[03:01:06] ========= drm_connector_dynamic_init (6 subtests) ==========
[03:01:06] [PASSED] drm_test_drm_connector_dynamic_init
[03:01:06] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[03:01:06] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[03:01:06] [PASSED] drm_test_drm_connector_dynamic_init_properties
[03:01:06] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[03:01:06] [PASSED] Unknown
[03:01:06] [PASSED] VGA
[03:01:06] [PASSED] DVI-I
[03:01:06] [PASSED] DVI-D
[03:01:06] [PASSED] DVI-A
[03:01:06] [PASSED] Composite
[03:01:06] [PASSED] SVIDEO
[03:01:06] [PASSED] LVDS
[03:01:06] [PASSED] Component
[03:01:06] [PASSED] DIN
[03:01:06] [PASSED] DP
[03:01:06] [PASSED] HDMI-A
[03:01:06] [PASSED] HDMI-B
[03:01:06] [PASSED] TV
[03:01:06] [PASSED] eDP
[03:01:06] [PASSED] Virtual
[03:01:06] [PASSED] DSI
[03:01:06] [PASSED] DPI
[03:01:06] [PASSED] Writeback
[03:01:06] [PASSED] SPI
[03:01:06] [PASSED] USB
[03:01:06] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[03:01:06] ======== drm_test_drm_connector_dynamic_init_name  =========
[03:01:06] [PASSED] Unknown
[03:01:06] [PASSED] VGA
[03:01:06] [PASSED] DVI-I
[03:01:06] [PASSED] DVI-D
[03:01:06] [PASSED] DVI-A
[03:01:06] [PASSED] Composite
[03:01:06] [PASSED] SVIDEO
[03:01:06] [PASSED] LVDS
[03:01:06] [PASSED] Component
[03:01:06] [PASSED] DIN
[03:01:06] [PASSED] DP
[03:01:06] [PASSED] HDMI-A
[03:01:06] [PASSED] HDMI-B
[03:01:06] [PASSED] TV
[03:01:06] [PASSED] eDP
[03:01:06] [PASSED] Virtual
[03:01:06] [PASSED] DSI
[03:01:06] [PASSED] DPI
[03:01:06] [PASSED] Writeback
[03:01:06] [PASSED] SPI
[03:01:06] [PASSED] USB
[03:01:06] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[03:01:06] =========== [PASSED] drm_connector_dynamic_init ============
[03:01:06] ==== drm_connector_dynamic_register_early (4 subtests) =====
[03:01:06] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[03:01:06] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[03:01:06] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[03:01:06] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[03:01:06] ====== [PASSED] drm_connector_dynamic_register_early =======
[03:01:06] ======= drm_connector_dynamic_register (7 subtests) ========
[03:01:06] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[03:01:06] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[03:01:06] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[03:01:06] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[03:01:06] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[03:01:06] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[03:01:06] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[03:01:06] ========= [PASSED] drm_connector_dynamic_register ==========
[03:01:06] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[03:01:06] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[03:01:06] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[03:01:06] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[03:01:06] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[03:01:06] ========== drm_test_get_tv_mode_from_name_valid  ===========
[03:01:06] [PASSED] NTSC
[03:01:06] [PASSED] NTSC-443
[03:01:06] [PASSED] NTSC-J
[03:01:06] [PASSED] PAL
[03:01:06] [PASSED] PAL-M
[03:01:06] [PASSED] PAL-N
[03:01:06] [PASSED] SECAM
[03:01:06] [PASSED] Mono
[03:01:06] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[03:01:06] [PASSED] drm_test_get_tv_mode_from_name_truncated
[03:01:06] ============ [PASSED] drm_get_tv_mode_from_name ============
[03:01:06] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[03:01:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[03:01:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[03:01:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[03:01:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[03:01:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[03:01:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[03:01:06] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[03:01:06] [PASSED] VIC 96
[03:01:06] [PASSED] VIC 97
[03:01:06] [PASSED] VIC 101
[03:01:06] [PASSED] VIC 102
[03:01:06] [PASSED] VIC 106
[03:01:06] [PASSED] VIC 107
[03:01:06] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[03:01:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[03:01:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[03:01:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[03:01:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[03:01:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[03:01:06] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[03:01:06] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[03:01:06] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[03:01:06] [PASSED] Automatic
[03:01:06] [PASSED] Full
[03:01:06] [PASSED] Limited 16:235
[03:01:06] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[03:01:06] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[03:01:06] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[03:01:06] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[03:01:06] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[03:01:06] [PASSED] RGB
[03:01:06] [PASSED] YUV 4:2:0
[03:01:06] [PASSED] YUV 4:2:2
[03:01:06] [PASSED] YUV 4:4:4
[03:01:06] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[03:01:06] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[03:01:06] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[03:01:06] ============= drm_damage_helper (21 subtests) ==============
[03:01:06] [PASSED] drm_test_damage_iter_no_damage
[03:01:06] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[03:01:06] [PASSED] drm_test_damage_iter_no_damage_src_moved
[03:01:06] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[03:01:06] [PASSED] drm_test_damage_iter_no_damage_not_visible
[03:01:06] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[03:01:06] [PASSED] drm_test_damage_iter_no_damage_no_fb
[03:01:06] [PASSED] drm_test_damage_iter_simple_damage
[03:01:06] [PASSED] drm_test_damage_iter_single_damage
[03:01:06] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[03:01:06] [PASSED] drm_test_damage_iter_single_damage_outside_src
[03:01:06] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[03:01:06] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[03:01:06] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[03:01:06] [PASSED] drm_test_damage_iter_single_damage_src_moved
[03:01:06] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[03:01:06] [PASSED] drm_test_damage_iter_damage
[03:01:06] [PASSED] drm_test_damage_iter_damage_one_intersect
[03:01:06] [PASSED] drm_test_damage_iter_damage_one_outside
[03:01:06] [PASSED] drm_test_damage_iter_damage_src_moved
[03:01:06] [PASSED] drm_test_damage_iter_damage_not_visible
[03:01:06] ================ [PASSED] drm_damage_helper ================
[03:01:06] ============== drm_dp_mst_helper (3 subtests) ==============
[03:01:06] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[03:01:06] [PASSED] Clock 154000 BPP 30 DSC disabled
[03:01:06] [PASSED] Clock 234000 BPP 30 DSC disabled
[03:01:06] [PASSED] Clock 297000 BPP 24 DSC disabled
[03:01:06] [PASSED] Clock 332880 BPP 24 DSC enabled
[03:01:06] [PASSED] Clock 324540 BPP 24 DSC enabled
[03:01:06] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[03:01:06] ============== drm_test_dp_mst_calc_pbn_div  ===============
[03:01:06] [PASSED] Link rate 2000000 lane count 4
[03:01:06] [PASSED] Link rate 2000000 lane count 2
[03:01:06] [PASSED] Link rate 2000000 lane count 1
[03:01:06] [PASSED] Link rate 1350000 lane count 4
[03:01:06] [PASSED] Link rate 1350000 lane count 2
[03:01:06] [PASSED] Link rate 1350000 lane count 1
[03:01:06] [PASSED] Link rate 1000000 lane count 4
[03:01:06] [PASSED] Link rate 1000000 lane count 2
[03:01:06] [PASSED] Link rate 1000000 lane count 1
[03:01:06] [PASSED] Link rate 810000 lane count 4
[03:01:06] [PASSED] Link rate 810000 lane count 2
[03:01:06] [PASSED] Link rate 810000 lane count 1
[03:01:06] [PASSED] Link rate 540000 lane count 4
[03:01:06] [PASSED] Link rate 540000 lane count 2
[03:01:06] [PASSED] Link rate 540000 lane count 1
[03:01:06] [PASSED] Link rate 270000 lane count 4
[03:01:06] [PASSED] Link rate 270000 lane count 2
[03:01:06] [PASSED] Link rate 270000 lane count 1
[03:01:06] [PASSED] Link rate 162000 lane count 4
[03:01:06] [PASSED] Link rate 162000 lane count 2
[03:01:06] [PASSED] Link rate 162000 lane count 1
[03:01:06] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[03:01:06] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[03:01:06] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[03:01:06] [PASSED] DP_POWER_UP_PHY with port number
[03:01:06] [PASSED] DP_POWER_DOWN_PHY with port number
[03:01:06] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[03:01:06] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[03:01:06] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[03:01:06] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[03:01:06] [PASSED] DP_QUERY_PAYLOAD with port number
[03:01:06] [PASSED] DP_QUERY_PAYLOAD with VCPI
[03:01:06] [PASSED] DP_REMOTE_DPCD_READ with port number
[03:01:06] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[03:01:06] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[03:01:06] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[03:01:06] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[03:01:06] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[03:01:06] [PASSED] DP_REMOTE_I2C_READ with port number
[03:01:06] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[03:01:06] [PASSED] DP_REMOTE_I2C_READ with transactions array
[03:01:06] [PASSED] DP_REMOTE_I2C_WRITE with port number
[03:01:06] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[03:01:06] [PASSED] DP_REMOTE_I2C_WRITE with data array
[03:01:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[03:01:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[03:01:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[03:01:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[03:01:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[03:01:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[03:01:06] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[03:01:06] ================ [PASSED] drm_dp_mst_helper ================
[03:01:06] ================== drm_exec (7 subtests) ===================
[03:01:06] [PASSED] sanitycheck
[03:01:06] [PASSED] test_lock
[03:01:06] [PASSED] test_lock_unlock
[03:01:06] [PASSED] test_duplicates
[03:01:06] [PASSED] test_prepare
[03:01:06] [PASSED] test_prepare_array
[03:01:06] [PASSED] test_multiple_loops
[03:01:06] ==================== [PASSED] drm_exec =====================
[03:01:06] =========== drm_format_helper_test (17 subtests) ===========
[03:01:06] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[03:01:06] [PASSED] single_pixel_source_buffer
[03:01:06] [PASSED] single_pixel_clip_rectangle
[03:01:06] [PASSED] well_known_colors
[03:01:06] [PASSED] destination_pitch
[03:01:06] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[03:01:06] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[03:01:06] [PASSED] single_pixel_source_buffer
[03:01:06] [PASSED] single_pixel_clip_rectangle
[03:01:06] [PASSED] well_known_colors
[03:01:06] [PASSED] destination_pitch
[03:01:06] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[03:01:06] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[03:01:06] [PASSED] single_pixel_source_buffer
[03:01:06] [PASSED] single_pixel_clip_rectangle
[03:01:06] [PASSED] well_known_colors
[03:01:06] [PASSED] destination_pitch
[03:01:06] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[03:01:06] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[03:01:06] [PASSED] single_pixel_source_buffer
[03:01:06] [PASSED] single_pixel_clip_rectangle
[03:01:06] [PASSED] well_known_colors
[03:01:06] [PASSED] destination_pitch
[03:01:06] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[03:01:06] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[03:01:06] [PASSED] single_pixel_source_buffer
[03:01:06] [PASSED] single_pixel_clip_rectangle
[03:01:06] [PASSED] well_known_colors
[03:01:06] [PASSED] destination_pitch
[03:01:06] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[03:01:06] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[03:01:06] [PASSED] single_pixel_source_buffer
[03:01:06] [PASSED] single_pixel_clip_rectangle
[03:01:06] [PASSED] well_known_colors
[03:01:06] [PASSED] destination_pitch
[03:01:06] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[03:01:06] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[03:01:06] [PASSED] single_pixel_source_buffer
[03:01:06] [PASSED] single_pixel_clip_rectangle
[03:01:06] [PASSED] well_known_colors
[03:01:06] [PASSED] destination_pitch
[03:01:06] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[03:01:06] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[03:01:06] [PASSED] single_pixel_source_buffer
[03:01:06] [PASSED] single_pixel_clip_rectangle
[03:01:06] [PASSED] well_known_colors
[03:01:06] [PASSED] destination_pitch
[03:01:06] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[03:01:06] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[03:01:06] [PASSED] single_pixel_source_buffer
[03:01:06] [PASSED] single_pixel_clip_rectangle
[03:01:06] [PASSED] well_known_colors
[03:01:06] [PASSED] destination_pitch
[03:01:06] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[03:01:06] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[03:01:06] [PASSED] single_pixel_source_buffer
[03:01:06] [PASSED] single_pixel_clip_rectangle
[03:01:06] [PASSED] well_known_colors
[03:01:06] [PASSED] destination_pitch
[03:01:06] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[03:01:06] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[03:01:06] [PASSED] single_pixel_source_buffer
[03:01:06] [PASSED] single_pixel_clip_rectangle
[03:01:06] [PASSED] well_known_colors
[03:01:06] [PASSED] destination_pitch
[03:01:06] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[03:01:06] ============== drm_test_fb_xrgb8888_to_mono  ===============
[03:01:06] [PASSED] single_pixel_source_buffer
[03:01:06] [PASSED] single_pixel_clip_rectangle
[03:01:06] [PASSED] well_known_colors
[03:01:06] [PASSED] destination_pitch
[03:01:06] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[03:01:06] ==================== drm_test_fb_swab  =====================
[03:01:06] [PASSED] single_pixel_source_buffer
[03:01:06] [PASSED] single_pixel_clip_rectangle
[03:01:06] [PASSED] well_known_colors
[03:01:06] [PASSED] destination_pitch
[03:01:06] ================ [PASSED] drm_test_fb_swab =================
[03:01:06] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[03:01:06] [PASSED] single_pixel_source_buffer
[03:01:06] [PASSED] single_pixel_clip_rectangle
[03:01:06] [PASSED] well_known_colors
[03:01:06] [PASSED] destination_pitch
[03:01:06] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[03:01:06] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[03:01:06] [PASSED] single_pixel_source_buffer
[03:01:06] [PASSED] single_pixel_clip_rectangle
[03:01:06] [PASSED] well_known_colors
[03:01:06] [PASSED] destination_pitch
[03:01:06] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[03:01:06] ================= drm_test_fb_clip_offset  =================
[03:01:06] [PASSED] pass through
[03:01:06] [PASSED] horizontal offset
[03:01:06] [PASSED] vertical offset
[03:01:06] [PASSED] horizontal and vertical offset
[03:01:06] [PASSED] horizontal offset (custom pitch)
[03:01:06] [PASSED] vertical offset (custom pitch)
[03:01:06] [PASSED] horizontal and vertical offset (custom pitch)
[03:01:06] ============= [PASSED] drm_test_fb_clip_offset =============
[03:01:06] =================== drm_test_fb_memcpy  ====================
[03:01:06] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[03:01:06] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[03:01:06] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[03:01:06] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[03:01:06] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[03:01:06] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[03:01:06] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[03:01:06] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[03:01:06] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[03:01:06] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[03:01:06] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[03:01:06] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[03:01:06] =============== [PASSED] drm_test_fb_memcpy ================
[03:01:06] ============= [PASSED] drm_format_helper_test ==============
[03:01:06] ================= drm_format (18 subtests) =================
[03:01:06] [PASSED] drm_test_format_block_width_invalid
[03:01:06] [PASSED] drm_test_format_block_width_one_plane
[03:01:06] [PASSED] drm_test_format_block_width_two_plane
[03:01:06] [PASSED] drm_test_format_block_width_three_plane
[03:01:06] [PASSED] drm_test_format_block_width_tiled
[03:01:06] [PASSED] drm_test_format_block_height_invalid
[03:01:06] [PASSED] drm_test_format_block_height_one_plane
[03:01:06] [PASSED] drm_test_format_block_height_two_plane
[03:01:06] [PASSED] drm_test_format_block_height_three_plane
[03:01:06] [PASSED] drm_test_format_block_height_tiled
[03:01:06] [PASSED] drm_test_format_min_pitch_invalid
[03:01:06] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[03:01:06] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[03:01:06] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[03:01:06] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[03:01:06] [PASSED] drm_test_format_min_pitch_two_plane
[03:01:06] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[03:01:06] [PASSED] drm_test_format_min_pitch_tiled
[03:01:06] =================== [PASSED] drm_format ====================
[03:01:06] ============== drm_framebuffer (10 subtests) ===============
[03:01:06] ========== drm_test_framebuffer_check_src_coords  ==========
[03:01:06] [PASSED] Success: source fits into fb
[03:01:06] [PASSED] Fail: overflowing fb with x-axis coordinate
[03:01:06] [PASSED] Fail: overflowing fb with y-axis coordinate
[03:01:06] [PASSED] Fail: overflowing fb with source width
[03:01:06] [PASSED] Fail: overflowing fb with source height
[03:01:06] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[03:01:06] [PASSED] drm_test_framebuffer_cleanup
[03:01:06] =============== drm_test_framebuffer_create  ===============
[03:01:06] [PASSED] ABGR8888 normal sizes
[03:01:06] [PASSED] ABGR8888 max sizes
[03:01:06] [PASSED] ABGR8888 pitch greater than min required
[03:01:06] [PASSED] ABGR8888 pitch less than min required
[03:01:06] [PASSED] ABGR8888 Invalid width
[03:01:06] [PASSED] ABGR8888 Invalid buffer handle
[03:01:06] [PASSED] No pixel format
[03:01:06] [PASSED] ABGR8888 Width 0
[03:01:06] [PASSED] ABGR8888 Height 0
[03:01:06] [PASSED] ABGR8888 Out of bound height * pitch combination
[03:01:06] [PASSED] ABGR8888 Large buffer offset
[03:01:06] [PASSED] ABGR8888 Buffer offset for inexistent plane
[03:01:06] [PASSED] ABGR8888 Invalid flag
[03:01:06] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[03:01:06] [PASSED] ABGR8888 Valid buffer modifier
[03:01:06] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[03:01:06] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[03:01:06] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[03:01:06] [PASSED] NV12 Normal sizes
[03:01:06] [PASSED] NV12 Max sizes
[03:01:06] [PASSED] NV12 Invalid pitch
[03:01:06] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[03:01:06] [PASSED] NV12 different  modifier per-plane
[03:01:06] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[03:01:06] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[03:01:06] [PASSED] NV12 Modifier for inexistent plane
[03:01:06] [PASSED] NV12 Handle for inexistent plane
[03:01:06] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[03:01:06] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[03:01:06] [PASSED] YVU420 Normal sizes
[03:01:06] [PASSED] YVU420 Max sizes
[03:01:06] [PASSED] YVU420 Invalid pitch
[03:01:06] [PASSED] YVU420 Different pitches
[03:01:06] [PASSED] YVU420 Different buffer offsets/pitches
[03:01:06] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[03:01:06] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[03:01:06] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[03:01:06] [PASSED] YVU420 Valid modifier
[03:01:06] [PASSED] YVU420 Different modifiers per plane
[03:01:06] [PASSED] YVU420 Modifier for inexistent plane
[03:01:06] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[03:01:06] [PASSED] X0L2 Normal sizes
[03:01:06] [PASSED] X0L2 Max sizes
[03:01:06] [PASSED] X0L2 Invalid pitch
[03:01:06] [PASSED] X0L2 Pitch greater than minimum required
[03:01:06] [PASSED] X0L2 Handle for inexistent plane
[03:01:06] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[03:01:06] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[03:01:06] [PASSED] X0L2 Valid modifier
[03:01:06] [PASSED] X0L2 Modifier for inexistent plane
[03:01:06] =========== [PASSED] drm_test_framebuffer_create ===========
[03:01:06] [PASSED] drm_test_framebuffer_free
[03:01:06] [PASSED] drm_test_framebuffer_init
[03:01:06] [PASSED] drm_test_framebuffer_init_bad_format
[03:01:06] [PASSED] drm_test_framebuffer_init_dev_mismatch
[03:01:06] [PASSED] drm_test_framebuffer_lookup
[03:01:06] [PASSED] drm_test_framebuffer_lookup_inexistent
[03:01:06] [PASSED] drm_test_framebuffer_modifiers_not_supported
[03:01:06] ================= [PASSED] drm_framebuffer =================
[03:01:06] ================ drm_gem_shmem (8 subtests) ================
[03:01:06] [PASSED] drm_gem_shmem_test_obj_create
[03:01:06] [PASSED] drm_gem_shmem_test_obj_create_private
[03:01:06] [PASSED] drm_gem_shmem_test_pin_pages
[03:01:06] [PASSED] drm_gem_shmem_test_vmap
[03:01:06] [PASSED] drm_gem_shmem_test_get_pages_sgt
[03:01:06] [PASSED] drm_gem_shmem_test_get_sg_table
[03:01:06] [PASSED] drm_gem_shmem_test_madvise
[03:01:06] [PASSED] drm_gem_shmem_test_purge
[03:01:06] ================== [PASSED] drm_gem_shmem ==================
[03:01:06] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[03:01:06] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[03:01:06] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[03:01:06] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[03:01:06] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[03:01:06] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[03:01:06] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[03:01:06] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[03:01:06] [PASSED] Automatic
[03:01:06] [PASSED] Full
[03:01:06] [PASSED] Limited 16:235
[03:01:06] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[03:01:06] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[03:01:06] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[03:01:06] [PASSED] drm_test_check_disable_connector
[03:01:06] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[03:01:06] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[03:01:06] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[03:01:06] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[03:01:06] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[03:01:06] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[03:01:06] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[03:01:06] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[03:01:06] [PASSED] drm_test_check_output_bpc_dvi
[03:01:06] [PASSED] drm_test_check_output_bpc_format_vic_1
[03:01:06] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[03:01:06] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[03:01:06] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[03:01:06] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[03:01:06] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[03:01:06] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[03:01:06] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[03:01:06] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[03:01:06] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[03:01:06] [PASSED] drm_test_check_broadcast_rgb_value
[03:01:06] [PASSED] drm_test_check_bpc_8_value
[03:01:06] [PASSED] drm_test_check_bpc_10_value
[03:01:06] [PASSED] drm_test_check_bpc_12_value
[03:01:06] [PASSED] drm_test_check_format_value
[03:01:06] [PASSED] drm_test_check_tmds_char_value
[03:01:06] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[03:01:06] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[03:01:06] [PASSED] drm_test_check_mode_valid
[03:01:06] [PASSED] drm_test_check_mode_valid_reject
[03:01:06] [PASSED] drm_test_check_mode_valid_reject_rate
[03:01:06] [PASSED] drm_test_check_mode_valid_reject_max_clock
[03:01:06] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[03:01:06] ================= drm_managed (2 subtests) =================
[03:01:06] [PASSED] drm_test_managed_release_action
[03:01:06] [PASSED] drm_test_managed_run_action
[03:01:06] =================== [PASSED] drm_managed ===================
[03:01:06] =================== drm_mm (6 subtests) ====================
[03:01:06] [PASSED] drm_test_mm_init
[03:01:06] [PASSED] drm_test_mm_debug
[03:01:06] [PASSED] drm_test_mm_align32
[03:01:06] [PASSED] drm_test_mm_align64
[03:01:06] [PASSED] drm_test_mm_lowest
[03:01:06] [PASSED] drm_test_mm_highest
[03:01:06] ===================== [PASSED] drm_mm ======================
[03:01:06] ============= drm_modes_analog_tv (5 subtests) =============
[03:01:06] [PASSED] drm_test_modes_analog_tv_mono_576i
[03:01:06] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[03:01:06] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[03:01:06] [PASSED] drm_test_modes_analog_tv_pal_576i
[03:01:06] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[03:01:06] =============== [PASSED] drm_modes_analog_tv ===============
[03:01:06] ============== drm_plane_helper (2 subtests) ===============
[03:01:06] =============== drm_test_check_plane_state  ================
[03:01:06] [PASSED] clipping_simple
[03:01:06] [PASSED] clipping_rotate_reflect
[03:01:06] [PASSED] positioning_simple
[03:01:06] [PASSED] upscaling
[03:01:06] [PASSED] downscaling
[03:01:06] [PASSED] rounding1
[03:01:06] [PASSED] rounding2
[03:01:06] [PASSED] rounding3
[03:01:06] [PASSED] rounding4
[03:01:06] =========== [PASSED] drm_test_check_plane_state ============
[03:01:06] =========== drm_test_check_invalid_plane_state  ============
[03:01:06] [PASSED] positioning_invalid
[03:01:06] [PASSED] upscaling_invalid
[03:01:06] [PASSED] downscaling_invalid
[03:01:06] ======= [PASSED] drm_test_check_invalid_plane_state ========
[03:01:06] ================ [PASSED] drm_plane_helper =================
[03:01:06] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[03:01:06] ====== drm_test_connector_helper_tv_get_modes_check  =======
[03:01:06] [PASSED] None
[03:01:06] [PASSED] PAL
[03:01:06] [PASSED] NTSC
[03:01:06] [PASSED] Both, NTSC Default
[03:01:06] [PASSED] Both, PAL Default
[03:01:06] [PASSED] Both, NTSC Default, with PAL on command-line
[03:01:06] [PASSED] Both, PAL Default, with NTSC on command-line
[03:01:06] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[03:01:06] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[03:01:06] ================== drm_rect (9 subtests) ===================
[03:01:06] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[03:01:06] [PASSED] drm_test_rect_clip_scaled_not_clipped
[03:01:06] [PASSED] drm_test_rect_clip_scaled_clipped
[03:01:06] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[03:01:06] ================= drm_test_rect_intersect  =================
[03:01:06] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[03:01:06] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[03:01:06] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[03:01:06] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[03:01:06] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[03:01:06] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[03:01:06] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[03:01:06] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[03:01:06] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[03:01:06] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[03:01:06] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[03:01:06] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[03:01:06] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[03:01:06] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[03:01:06] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[03:01:06] ============= [PASSED] drm_test_rect_intersect =============
[03:01:06] ================ drm_test_rect_calc_hscale  ================
[03:01:06] [PASSED] normal use
[03:01:06] [PASSED] out of max range
[03:01:06] [PASSED] out of min range
[03:01:06] [PASSED] zero dst
[03:01:06] [PASSED] negative src
[03:01:06] [PASSED] negative dst
[03:01:06] ============ [PASSED] drm_test_rect_calc_hscale ============
[03:01:06] ================ drm_test_rect_calc_vscale  ================
[03:01:06] [PASSED] normal use
[03:01:06] [PASSED] out of max range
[03:01:06] [PASSED] out of min range
[03:01:06] [PASSED] zero dst
[03:01:06] [PASSED] negative src
[03:01:06] [PASSED] negative dst
[03:01:06] ============ [PASSED] drm_test_rect_calc_vscale ============
[03:01:06] ================== drm_test_rect_rotate  ===================
[03:01:06] [PASSED] reflect-x
[03:01:06] [PASSED] reflect-y
[03:01:06] [PASSED] rotate-0
[03:01:06] [PASSED] rotate-90
[03:01:06] [PASSED] rotate-180
[03:01:06] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[03:01:06] ============== [PASSED] drm_test_rect_rotate ===============
[03:01:06] ================ drm_test_rect_rotate_inv  =================
[03:01:06] [PASSED] reflect-x
[03:01:06] [PASSED] reflect-y
[03:01:06] [PASSED] rotate-0
[03:01:06] [PASSED] rotate-90
[03:01:06] [PASSED] rotate-180
[03:01:06] [PASSED] rotate-270
[03:01:06] ============ [PASSED] drm_test_rect_rotate_inv =============
[03:01:06] ==================== [PASSED] drm_rect =====================
[03:01:06] ============ drm_sysfb_modeset_test (1 subtest) ============
[03:01:06] ============ drm_test_sysfb_build_fourcc_list  =============
[03:01:06] [PASSED] no native formats
[03:01:06] [PASSED] XRGB8888 as native format
[03:01:06] [PASSED] remove duplicates
[03:01:06] [PASSED] convert alpha formats
[03:01:06] [PASSED] random formats
[03:01:06] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[03:01:06] ============= [PASSED] drm_sysfb_modeset_test ==============
[03:01:06] ============================================================
[03:01:06] Testing complete. Ran 616 tests: passed: 616
[03:01:06] Elapsed time: 24.776s total, 1.769s configuring, 22.788s building, 0.195s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[03:01:06] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[03:01:08] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[03:01:16] Starting KUnit Kernel (1/1)...
[03:01:16] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[03:01:16] ================= ttm_device (5 subtests) ==================
[03:01:16] [PASSED] ttm_device_init_basic
[03:01:16] [PASSED] ttm_device_init_multiple
[03:01:16] [PASSED] ttm_device_fini_basic
[03:01:16] [PASSED] ttm_device_init_no_vma_man
[03:01:16] ================== ttm_device_init_pools  ==================
[03:01:16] [PASSED] No DMA allocations, no DMA32 required
[03:01:16] [PASSED] DMA allocations, DMA32 required
[03:01:16] [PASSED] No DMA allocations, DMA32 required
[03:01:16] [PASSED] DMA allocations, no DMA32 required
[03:01:16] ============== [PASSED] ttm_device_init_pools ==============
[03:01:16] =================== [PASSED] ttm_device ====================
[03:01:16] ================== ttm_pool (8 subtests) ===================
[03:01:16] ================== ttm_pool_alloc_basic  ===================
[03:01:16] [PASSED] One page
[03:01:16] [PASSED] More than one page
[03:01:16] [PASSED] Above the allocation limit
[03:01:16] [PASSED] One page, with coherent DMA mappings enabled
[03:01:16] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[03:01:16] ============== [PASSED] ttm_pool_alloc_basic ===============
[03:01:16] ============== ttm_pool_alloc_basic_dma_addr  ==============
[03:01:16] [PASSED] One page
[03:01:16] [PASSED] More than one page
[03:01:16] [PASSED] Above the allocation limit
[03:01:16] [PASSED] One page, with coherent DMA mappings enabled
[03:01:16] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[03:01:16] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[03:01:16] [PASSED] ttm_pool_alloc_order_caching_match
[03:01:16] [PASSED] ttm_pool_alloc_caching_mismatch
[03:01:16] [PASSED] ttm_pool_alloc_order_mismatch
[03:01:16] [PASSED] ttm_pool_free_dma_alloc
[03:01:16] [PASSED] ttm_pool_free_no_dma_alloc
[03:01:16] [PASSED] ttm_pool_fini_basic
[03:01:16] ==================== [PASSED] ttm_pool =====================
[03:01:16] ================ ttm_resource (8 subtests) =================
[03:01:16] ================= ttm_resource_init_basic  =================
[03:01:16] [PASSED] Init resource in TTM_PL_SYSTEM
[03:01:16] [PASSED] Init resource in TTM_PL_VRAM
[03:01:16] [PASSED] Init resource in a private placement
[03:01:16] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[03:01:16] ============= [PASSED] ttm_resource_init_basic =============
[03:01:16] [PASSED] ttm_resource_init_pinned
[03:01:16] [PASSED] ttm_resource_fini_basic
[03:01:16] [PASSED] ttm_resource_manager_init_basic
[03:01:16] [PASSED] ttm_resource_manager_usage_basic
[03:01:16] [PASSED] ttm_resource_manager_set_used_basic
[03:01:16] [PASSED] ttm_sys_man_alloc_basic
[03:01:16] [PASSED] ttm_sys_man_free_basic
[03:01:16] ================== [PASSED] ttm_resource ===================
[03:01:16] =================== ttm_tt (15 subtests) ===================
[03:01:16] ==================== ttm_tt_init_basic  ====================
[03:01:16] [PASSED] Page-aligned size
[03:01:16] [PASSED] Extra pages requested
[03:01:16] ================ [PASSED] ttm_tt_init_basic ================
[03:01:16] [PASSED] ttm_tt_init_misaligned
[03:01:16] [PASSED] ttm_tt_fini_basic
[03:01:16] [PASSED] ttm_tt_fini_sg
[03:01:16] [PASSED] ttm_tt_fini_shmem
[03:01:16] [PASSED] ttm_tt_create_basic
[03:01:16] [PASSED] ttm_tt_create_invalid_bo_type
[03:01:16] [PASSED] ttm_tt_create_ttm_exists
[03:01:16] [PASSED] ttm_tt_create_failed
[03:01:16] [PASSED] ttm_tt_destroy_basic
[03:01:16] [PASSED] ttm_tt_populate_null_ttm
[03:01:16] [PASSED] ttm_tt_populate_populated_ttm
[03:01:16] [PASSED] ttm_tt_unpopulate_basic
[03:01:16] [PASSED] ttm_tt_unpopulate_empty_ttm
[03:01:16] [PASSED] ttm_tt_swapin_basic
[03:01:16] ===================== [PASSED] ttm_tt ======================
[03:01:16] =================== ttm_bo (14 subtests) ===================
[03:01:16] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[03:01:16] [PASSED] Cannot be interrupted and sleeps
[03:01:16] [PASSED] Cannot be interrupted, locks straight away
[03:01:16] [PASSED] Can be interrupted, sleeps
[03:01:16] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[03:01:16] [PASSED] ttm_bo_reserve_locked_no_sleep
[03:01:16] [PASSED] ttm_bo_reserve_no_wait_ticket
[03:01:16] [PASSED] ttm_bo_reserve_double_resv
[03:01:16] [PASSED] ttm_bo_reserve_interrupted
[03:01:16] [PASSED] ttm_bo_reserve_deadlock
[03:01:16] [PASSED] ttm_bo_unreserve_basic
[03:01:16] [PASSED] ttm_bo_unreserve_pinned
[03:01:16] [PASSED] ttm_bo_unreserve_bulk
[03:01:16] [PASSED] ttm_bo_put_basic
[03:01:16] [PASSED] ttm_bo_put_shared_resv
[03:01:16] [PASSED] ttm_bo_pin_basic
[03:01:16] [PASSED] ttm_bo_pin_unpin_resource
[03:01:16] [PASSED] ttm_bo_multiple_pin_one_unpin
[03:01:16] ===================== [PASSED] ttm_bo ======================
[03:01:16] ============== ttm_bo_validate (21 subtests) ===============
[03:01:16] ============== ttm_bo_init_reserved_sys_man  ===============
[03:01:16] [PASSED] Buffer object for userspace
[03:01:16] [PASSED] Kernel buffer object
[03:01:16] [PASSED] Shared buffer object
[03:01:16] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[03:01:16] ============== ttm_bo_init_reserved_mock_man  ==============
[03:01:16] [PASSED] Buffer object for userspace
[03:01:16] [PASSED] Kernel buffer object
[03:01:16] [PASSED] Shared buffer object
[03:01:16] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[03:01:16] [PASSED] ttm_bo_init_reserved_resv
[03:01:16] ================== ttm_bo_validate_basic  ==================
[03:01:16] [PASSED] Buffer object for userspace
[03:01:16] [PASSED] Kernel buffer object
[03:01:16] [PASSED] Shared buffer object
[03:01:16] ============== [PASSED] ttm_bo_validate_basic ==============
[03:01:16] [PASSED] ttm_bo_validate_invalid_placement
[03:01:16] ============= ttm_bo_validate_same_placement  ==============
[03:01:16] [PASSED] System manager
[03:01:16] [PASSED] VRAM manager
[03:01:16] ========= [PASSED] ttm_bo_validate_same_placement ==========
[03:01:16] [PASSED] ttm_bo_validate_failed_alloc
[03:01:16] [PASSED] ttm_bo_validate_pinned
[03:01:16] [PASSED] ttm_bo_validate_busy_placement
[03:01:16] ================ ttm_bo_validate_multihop  =================
[03:01:16] [PASSED] Buffer object for userspace
[03:01:16] [PASSED] Kernel buffer object
[03:01:16] [PASSED] Shared buffer object
[03:01:16] ============ [PASSED] ttm_bo_validate_multihop =============
[03:01:16] ========== ttm_bo_validate_no_placement_signaled  ==========
[03:01:16] [PASSED] Buffer object in system domain, no page vector
[03:01:16] [PASSED] Buffer object in system domain with an existing page vector
[03:01:16] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[03:01:16] ======== ttm_bo_validate_no_placement_not_signaled  ========
[03:01:16] [PASSED] Buffer object for userspace
[03:01:16] [PASSED] Kernel buffer object
[03:01:16] [PASSED] Shared buffer object
[03:01:16] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[03:01:16] [PASSED] ttm_bo_validate_move_fence_signaled
[03:01:16] ========= ttm_bo_validate_move_fence_not_signaled  =========
[03:01:16] [PASSED] Waits for GPU
[03:01:16] [PASSED] Tries to lock straight away
[03:01:16] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[03:01:16] [PASSED] ttm_bo_validate_happy_evict
[03:01:16] [PASSED] ttm_bo_validate_all_pinned_evict
[03:01:16] [PASSED] ttm_bo_validate_allowed_only_evict
[03:01:16] [PASSED] ttm_bo_validate_deleted_evict
[03:01:16] [PASSED] ttm_bo_validate_busy_domain_evict
[03:01:16] [PASSED] ttm_bo_validate_evict_gutting
[03:01:16] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[03:01:16] ================= [PASSED] ttm_bo_validate =================
[03:01:16] ============================================================
[03:01:16] Testing complete. Ran 101 tests: passed: 101
[03:01:16] Elapsed time: 10.013s total, 1.747s configuring, 8.000s building, 0.232s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 20+ messages in thread

* ✓ Xe.CI.BAT: success for drm/xe: Add user commands to WA BB via configfs (rev2)
  2025-08-27 22:35 [PATCH v2 0/6] drm/xe: Add user commands to WA BB via configfs Lucas De Marchi
                   ` (9 preceding siblings ...)
  2025-08-28  3:01 ` ✓ CI.KUnit: success " Patchwork
@ 2025-08-28  3:39 ` Patchwork
  2025-08-28  4:45 ` ✗ Xe.CI.Full: failure " Patchwork
  11 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2025-08-28  3:39 UTC (permalink / raw)
  To: Lucas De Marchi; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 1752 bytes --]

== Series Details ==

Series: drm/xe: Add user commands to WA BB via configfs (rev2)
URL   : https://patchwork.freedesktop.org/series/153594/
State : success

== Summary ==

CI Bug Log - changes from xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578_BAT -> xe-pw-153594v2_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-153594v2_BAT that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@kms_flip@basic-flip-vs-wf_vblank:
    - bat-adlp-7:         [DMESG-WARN][1] ([Intel XE#4543]) -> [PASS][2] +1 other test pass
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#5783]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5783


Build changes
-------------

  * IGT: IGT_8511 -> IGT_8512
  * Linux: xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578 -> xe-pw-153594v2

  IGT_8511: 8511
  IGT_8512: 8512
  xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578: 3a2760f3080e5188b19cdb4640cec5eb0926d578
  xe-pw-153594v2: 153594v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/index.html

[-- Attachment #2: Type: text/html, Size: 2265 bytes --]

^ permalink raw reply	[flat|nested] 20+ messages in thread

* ✗ Xe.CI.Full: failure for drm/xe: Add user commands to WA BB via configfs (rev2)
  2025-08-27 22:35 [PATCH v2 0/6] drm/xe: Add user commands to WA BB via configfs Lucas De Marchi
                   ` (10 preceding siblings ...)
  2025-08-28  3:39 ` ✓ Xe.CI.BAT: " Patchwork
@ 2025-08-28  4:45 ` Patchwork
  11 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2025-08-28  4:45 UTC (permalink / raw)
  To: Lucas De Marchi; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 168114 bytes --]

== Series Details ==

Series: drm/xe: Add user commands to WA BB via configfs (rev2)
URL   : https://patchwork.freedesktop.org/series/153594/
State : failure

== Summary ==

CI Bug Log - changes from xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578_FULL -> xe-pw-153594v2_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-153594v2_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-153594v2_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-153594v2_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@xe_evict@evict-beng-large-multi-vm:
    - shard-bmg:          [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-5/igt@xe_evict@evict-beng-large-multi-vm.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-2/igt@xe_evict@evict-beng-large-multi-vm.html

  * igt@xe_pm@s2idle-basic-exec:
    - shard-dg2-set2:     [PASS][3] -> [TIMEOUT][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-464/igt@xe_pm@s2idle-basic-exec.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-466/igt@xe_pm@s2idle-basic-exec.html

  * igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs@vf-random:
    - shard-bmg:          [PASS][5] -> [FAIL][6] +2 other tests fail
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-4/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs@vf-random.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-1/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs@vf-random.html

  
Known issues
------------

  Here are the changes found in xe-pw-153594v2_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@fbdev@unaligned-write:
    - shard-dg2-set2:     [PASS][7] -> [SKIP][8] ([Intel XE#2134])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-436/igt@fbdev@unaligned-write.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@fbdev@unaligned-write.html

  * igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1:
    - shard-lnl:          NOTRUN -> [FAIL][9] ([Intel XE#911]) +3 other tests fail
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-8/igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1.html

  * igt@kms_async_flips@async-flip-with-page-flip-events-tiled@pipe-b-hdmi-a-1-y:
    - shard-adlp:         NOTRUN -> [DMESG-WARN][10] ([Intel XE#4543]) +9 other tests dmesg-warn
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-3/igt@kms_async_flips@async-flip-with-page-flip-events-tiled@pipe-b-hdmi-a-1-y.html

  * igt@kms_async_flips@crc-atomic@pipe-d-hdmi-a-1:
    - shard-adlp:         [PASS][11] -> [FAIL][12] ([Intel XE#3884]) +1 other test fail
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-1/igt@kms_async_flips@crc-atomic@pipe-d-hdmi-a-1.html
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@kms_async_flips@crc-atomic@pipe-d-hdmi-a-1.html

  * igt@kms_async_flips@test-cursor:
    - shard-lnl:          NOTRUN -> [SKIP][13] ([Intel XE#664])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-3/igt@kms_async_flips@test-cursor.html

  * igt@kms_atomic_transition@plane-all-modeset-transition:
    - shard-lnl:          NOTRUN -> [SKIP][14] ([Intel XE#3279])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-4/igt@kms_atomic_transition@plane-all-modeset-transition.html

  * igt@kms_atomic_transition@plane-toggle-modeset-transition:
    - shard-adlp:         [PASS][15] -> [FAIL][16] ([Intel XE#3908]) +1 other test fail
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-1/igt@kms_atomic_transition@plane-toggle-modeset-transition.html
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-1/igt@kms_atomic_transition@plane-toggle-modeset-transition.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-270:
    - shard-lnl:          NOTRUN -> [SKIP][17] ([Intel XE#1407]) +3 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-8/igt@kms_big_fb@4-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-adlp:         NOTRUN -> [SKIP][18] ([Intel XE#1124]) +14 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-6/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-lnl:          NOTRUN -> [SKIP][19] ([Intel XE#3658])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-1/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_fb@linear-32bpp-rotate-270:
    - shard-dg2-set2:     NOTRUN -> [SKIP][20] ([Intel XE#316]) +3 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@kms_big_fb@linear-32bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#2327])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-6/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-0:
    - shard-adlp:         NOTRUN -> [DMESG-FAIL][22] ([Intel XE#4543]) +1 other test dmesg-fail
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@kms_big_fb@x-tiled-64bpp-rotate-0.html

  * igt@kms_big_fb@x-tiled-8bpp-rotate-90:
    - shard-adlp:         NOTRUN -> [SKIP][23] ([Intel XE#316]) +5 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@kms_big_fb@x-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#1124]) +1 other test skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-2/igt@kms_big_fb@y-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-64bpp-rotate-90:
    - shard-dg2-set2:     NOTRUN -> [SKIP][25] ([Intel XE#1124]) +2 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-433/igt@kms_big_fb@y-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-addfb-size-overflow:
    - shard-dg2-set2:     NOTRUN -> [SKIP][26] ([Intel XE#610])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-432/igt@kms_big_fb@y-tiled-addfb-size-overflow.html
    - shard-lnl:          NOTRUN -> [SKIP][27] ([Intel XE#1428])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-4/igt@kms_big_fb@y-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-adlp:         [PASS][28] -> [DMESG-FAIL][29] ([Intel XE#4543]) +10 other tests dmesg-fail
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-4/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-1/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@yf-tiled-addfb:
    - shard-dg2-set2:     NOTRUN -> [SKIP][30] ([Intel XE#619])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@kms_big_fb@yf-tiled-addfb.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-lnl:          NOTRUN -> [SKIP][31] ([Intel XE#1124]) +8 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-5/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p:
    - shard-bmg:          [PASS][32] -> [SKIP][33] ([Intel XE#2314] / [Intel XE#2894])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-1/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html

  * igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p:
    - shard-lnl:          NOTRUN -> [SKIP][34] ([Intel XE#2191]) +2 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-4/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html

  * igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p:
    - shard-adlp:         NOTRUN -> [SKIP][35] ([Intel XE#2191]) +2 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html

  * igt@kms_bw@connected-linear-tiling-3-displays-2160x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#2314] / [Intel XE#2894])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-7/igt@kms_bw@connected-linear-tiling-3-displays-2160x1440p.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][37] ([Intel XE#2191]) +1 other test skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-466/igt@kms_bw@connected-linear-tiling-3-displays-2160x1440p.html

  * igt@kms_bw@linear-tiling-1-displays-3840x2160p:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#367])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-3/igt@kms_bw@linear-tiling-1-displays-3840x2160p.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][39] ([Intel XE#367])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-464/igt@kms_bw@linear-tiling-1-displays-3840x2160p.html

  * igt@kms_bw@linear-tiling-4-displays-2160x1440p:
    - shard-adlp:         NOTRUN -> [SKIP][40] ([Intel XE#367]) +2 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-9/igt@kms_bw@linear-tiling-4-displays-2160x1440p.html
    - shard-lnl:          NOTRUN -> [SKIP][41] ([Intel XE#1512])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-2/igt@kms_bw@linear-tiling-4-displays-2160x1440p.html

  * igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4:
    - shard-dg2-set2:     NOTRUN -> [SKIP][42] ([Intel XE#455] / [Intel XE#787]) +36 other tests skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-464/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc:
    - shard-lnl:          NOTRUN -> [SKIP][43] ([Intel XE#2887]) +13 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-5/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-c-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][44] ([Intel XE#787]) +53 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-8/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-c-hdmi-a-1.html

  * igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#2887]) +4 other tests skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-1/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs:
    - shard-dg2-set2:     NOTRUN -> [SKIP][46] ([Intel XE#2907])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-466/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-adlp:         NOTRUN -> [SKIP][47] ([Intel XE#3442])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-9/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
    - shard-adlp:         NOTRUN -> [SKIP][48] ([Intel XE#455] / [Intel XE#787]) +35 other tests skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-9/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc:
    - shard-lnl:          NOTRUN -> [SKIP][49] ([Intel XE#3432]) +1 other test skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-3/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#3432]) +1 other test skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-6/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
    - shard-adlp:         NOTRUN -> [SKIP][51] ([Intel XE#2907]) +2 other tests skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [SKIP][52] ([Intel XE#787]) +209 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-463/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-6.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [INCOMPLETE][53] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522])
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-6.html

  * igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#2652] / [Intel XE#787]) +12 other tests skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-3/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2.html

  * igt@kms_cdclk@mode-transition:
    - shard-adlp:         NOTRUN -> [SKIP][55] ([Intel XE#4417] / [Intel XE#455])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@kms_cdclk@mode-transition.html

  * igt@kms_cdclk@mode-transition@pipe-a-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][56] ([Intel XE#4417]) +2 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@kms_cdclk@mode-transition@pipe-a-hdmi-a-1.html

  * igt@kms_chamelium_audio@hdmi-audio-edid:
    - shard-adlp:         NOTRUN -> [SKIP][57] ([Intel XE#373]) +10 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-9/igt@kms_chamelium_audio@hdmi-audio-edid.html

  * igt@kms_chamelium_color@ctm-blue-to-red:
    - shard-dg2-set2:     NOTRUN -> [SKIP][58] ([Intel XE#306])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@kms_chamelium_color@ctm-blue-to-red.html

  * igt@kms_chamelium_color@ctm-max:
    - shard-lnl:          NOTRUN -> [SKIP][59] ([Intel XE#306])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-8/igt@kms_chamelium_color@ctm-max.html
    - shard-adlp:         NOTRUN -> [SKIP][60] ([Intel XE#306]) +1 other test skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-2/igt@kms_chamelium_color@ctm-max.html

  * igt@kms_chamelium_edid@hdmi-edid-stress-resolution-4k:
    - shard-dg2-set2:     NOTRUN -> [SKIP][61] ([Intel XE#373]) +3 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-4k.html

  * igt@kms_chamelium_frames@hdmi-aspect-ratio:
    - shard-bmg:          NOTRUN -> [SKIP][62] ([Intel XE#2252]) +3 other tests skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-4/igt@kms_chamelium_frames@hdmi-aspect-ratio.html

  * igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats:
    - shard-lnl:          NOTRUN -> [SKIP][63] ([Intel XE#373]) +7 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-5/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html

  * igt@kms_content_protection@atomic-dpms@pipe-a-dp-4:
    - shard-dg2-set2:     NOTRUN -> [FAIL][64] ([Intel XE#1178]) +1 other test fail
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-463/igt@kms_content_protection@atomic-dpms@pipe-a-dp-4.html

  * igt@kms_content_protection@content-type-change:
    - shard-bmg:          NOTRUN -> [SKIP][65] ([Intel XE#2341])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-5/igt@kms_content_protection@content-type-change.html
    - shard-lnl:          NOTRUN -> [SKIP][66] ([Intel XE#3278])
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-7/igt@kms_content_protection@content-type-change.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-bmg:          NOTRUN -> [SKIP][67] ([Intel XE#2390])
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-7/igt@kms_content_protection@dp-mst-type-1.html
    - shard-adlp:         NOTRUN -> [SKIP][68] ([Intel XE#307]) +1 other test skip
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-6/igt@kms_content_protection@dp-mst-type-1.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][69] ([Intel XE#307])
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@kms_content_protection@dp-mst-type-1.html
    - shard-lnl:          NOTRUN -> [SKIP][70] ([Intel XE#307])
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-7/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_content_protection@lic-type-0@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][71] ([Intel XE#1178])
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-2/igt@kms_content_protection@lic-type-0@pipe-a-dp-2.html

  * igt@kms_content_protection@lic-type-0@pipe-a-dp-4:
    - shard-dg2-set2:     NOTRUN -> [FAIL][72] ([Intel XE#3304])
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-433/igt@kms_content_protection@lic-type-0@pipe-a-dp-4.html

  * igt@kms_cursor_crc@cursor-onscreen-512x170:
    - shard-lnl:          NOTRUN -> [SKIP][73] ([Intel XE#2321]) +1 other test skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-4/igt@kms_cursor_crc@cursor-onscreen-512x170.html
    - shard-adlp:         NOTRUN -> [SKIP][74] ([Intel XE#308]) +1 other test skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-3/igt@kms_cursor_crc@cursor-onscreen-512x170.html

  * igt@kms_cursor_crc@cursor-random-128x42:
    - shard-lnl:          NOTRUN -> [SKIP][75] ([Intel XE#1424]) +2 other tests skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-1/igt@kms_cursor_crc@cursor-random-128x42.html

  * igt@kms_cursor_crc@cursor-rapid-movement-64x21:
    - shard-bmg:          NOTRUN -> [SKIP][76] ([Intel XE#2320])
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-4/igt@kms_cursor_crc@cursor-rapid-movement-64x21.html

  * igt@kms_cursor_crc@cursor-sliding-512x512:
    - shard-dg2-set2:     NOTRUN -> [SKIP][77] ([Intel XE#308]) +1 other test skip
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@kms_cursor_crc@cursor-sliding-512x512.html

  * igt@kms_cursor_edge_walk@128x128-right-edge:
    - shard-dg2-set2:     NOTRUN -> [SKIP][78] ([Intel XE#4208] / [i915#2575]) +59 other tests skip
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@kms_cursor_edge_walk@128x128-right-edge.html

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
    - shard-lnl:          NOTRUN -> [SKIP][79] ([Intel XE#309]) +5 other tests skip
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-7/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
    - shard-adlp:         NOTRUN -> [SKIP][80] ([Intel XE#309]) +8 other tests skip
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-6/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
    - shard-bmg:          [PASS][81] -> [SKIP][82] ([Intel XE#2291]) +1 other test skip
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-8/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html

  * igt@kms_dirtyfb@psr-dirtyfb-ioctl:
    - shard-bmg:          NOTRUN -> [SKIP][83] ([Intel XE#1508])
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-6/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html

  * igt@kms_dp_linktrain_fallback@dp-fallback:
    - shard-adlp:         NOTRUN -> [SKIP][84] ([Intel XE#4331]) +1 other test skip
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-6/igt@kms_dp_linktrain_fallback@dp-fallback.html
    - shard-bmg:          [PASS][85] -> [FAIL][86] ([Intel XE#4367])
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-4/igt@kms_dp_linktrain_fallback@dp-fallback.html
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-1/igt@kms_dp_linktrain_fallback@dp-fallback.html
    - shard-lnl:          NOTRUN -> [SKIP][87] ([Intel XE#4294])
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-3/igt@kms_dp_linktrain_fallback@dp-fallback.html

  * igt@kms_dp_linktrain_fallback@dsc-fallback:
    - shard-lnl:          NOTRUN -> [SKIP][88] ([Intel XE#4331])
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-1/igt@kms_dp_linktrain_fallback@dsc-fallback.html

  * igt@kms_feature_discovery@chamelium:
    - shard-adlp:         NOTRUN -> [SKIP][89] ([Intel XE#701])
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-1/igt@kms_feature_discovery@chamelium.html

  * igt@kms_feature_discovery@display-4x:
    - shard-adlp:         NOTRUN -> [SKIP][90] ([Intel XE#1138])
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@kms_feature_discovery@display-4x.html
    - shard-lnl:          NOTRUN -> [SKIP][91] ([Intel XE#1138])
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-3/igt@kms_feature_discovery@display-4x.html

  * igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible:
    - shard-bmg:          NOTRUN -> [SKIP][92] ([Intel XE#2316])
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html
    - shard-adlp:         NOTRUN -> [SKIP][93] ([Intel XE#310]) +6 other tests skip
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-6/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible:
    - shard-lnl:          NOTRUN -> [SKIP][94] ([Intel XE#1421]) +4 other tests skip
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-4/igt@kms_flip@2x-flip-vs-suspend-interruptible.html

  * igt@kms_flip@2x-plain-flip-fb-recreate:
    - shard-bmg:          [PASS][95] -> [SKIP][96] ([Intel XE#2316]) +8 other tests skip
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-1/igt@kms_flip@2x-plain-flip-fb-recreate.html
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-6/igt@kms_flip@2x-plain-flip-fb-recreate.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
    - shard-lnl:          NOTRUN -> [FAIL][97] ([Intel XE#301]) +1 other test fail
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-adlp:         [PASS][98] -> [DMESG-WARN][99] ([Intel XE#4543]) +15 other tests dmesg-warn
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-8/igt@kms_flip@flip-vs-suspend-interruptible.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-3/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_flip@flip-vs-suspend@d-hdmi-a1:
    - shard-adlp:         [PASS][100] -> [DMESG-WARN][101] ([Intel XE#2953] / [Intel XE#4173])
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-1/igt@kms_flip@flip-vs-suspend@d-hdmi-a1.html
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@kms_flip@flip-vs-suspend@d-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-upscaling:
    - shard-dg2-set2:     [PASS][102] -> [SKIP][103] ([Intel XE#2351] / [Intel XE#4208]) +15 other tests skip
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-466/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-upscaling.html
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-default-mode:
    - shard-lnl:          NOTRUN -> [SKIP][104] ([Intel XE#1401]) +2 other tests skip
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-3/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][105] ([Intel XE#2293] / [Intel XE#2380])
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-7/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode:
    - shard-bmg:          NOTRUN -> [SKIP][106] ([Intel XE#2293])
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-7/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling:
    - shard-lnl:          NOTRUN -> [SKIP][107] ([Intel XE#1401] / [Intel XE#1745]) +2 other tests skip
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-8/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling:
    - shard-lnl:          NOTRUN -> [SKIP][108] ([Intel XE#1397] / [Intel XE#1745])
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-3/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-default-mode:
    - shard-lnl:          NOTRUN -> [SKIP][109] ([Intel XE#1397])
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-3/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
    - shard-dg2-set2:     NOTRUN -> [SKIP][110] ([Intel XE#455]) +9 other tests skip
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-466/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html

  * igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-shrfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][111] ([Intel XE#2311]) +4 other tests skip
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-onoff:
    - shard-dg2-set2:     NOTRUN -> [SKIP][112] ([Intel XE#2351] / [Intel XE#4208]) +11 other tests skip
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt:
    - shard-lnl:          NOTRUN -> [SKIP][113] ([Intel XE#656]) +38 other tests skip
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-modesetfrombusy:
    - shard-bmg:          NOTRUN -> [SKIP][114] ([Intel XE#5390]) +4 other tests skip
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-modesetfrombusy.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-render:
    - shard-dg2-set2:     NOTRUN -> [SKIP][115] ([Intel XE#651]) +15 other tests skip
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-463/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-blt:
    - shard-lnl:          NOTRUN -> [SKIP][116] ([Intel XE#651]) +13 other tests skip
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-shrfb-scaledprimary:
    - shard-adlp:         NOTRUN -> [SKIP][117] ([Intel XE#651]) +17 other tests skip
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-1/igt@kms_frontbuffer_tracking@fbcdrrs-shrfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-msflip-blt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][118] ([Intel XE#653]) +14 other tests skip
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][119] ([Intel XE#2313]) +8 other tests skip
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt:
    - shard-adlp:         NOTRUN -> [SKIP][120] ([Intel XE#656]) +47 other tests skip
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt:
    - shard-adlp:         NOTRUN -> [SKIP][121] ([Intel XE#653]) +14 other tests skip
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][122] ([Intel XE#2312]) +1 other test skip
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_joiner@basic-force-ultra-joiner:
    - shard-lnl:          NOTRUN -> [SKIP][123] ([Intel XE#2925])
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-3/igt@kms_joiner@basic-force-ultra-joiner.html

  * igt@kms_joiner@invalid-modeset-big-joiner:
    - shard-adlp:         NOTRUN -> [SKIP][124] ([Intel XE#346])
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-6/igt@kms_joiner@invalid-modeset-big-joiner.html
    - shard-bmg:          NOTRUN -> [SKIP][125] ([Intel XE#346])
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-7/igt@kms_joiner@invalid-modeset-big-joiner.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][126] ([Intel XE#346])
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@kms_joiner@invalid-modeset-big-joiner.html
    - shard-lnl:          NOTRUN -> [SKIP][127] ([Intel XE#346])
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-7/igt@kms_joiner@invalid-modeset-big-joiner.html

  * igt@kms_joiner@invalid-modeset-force-big-joiner:
    - shard-adlp:         NOTRUN -> [SKIP][128] ([Intel XE#3012])
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-3/igt@kms_joiner@invalid-modeset-force-big-joiner.html

  * igt@kms_lease@lease-invalid-crtc:
    - shard-dg2-set2:     [PASS][129] -> [SKIP][130] ([Intel XE#4208] / [i915#2575]) +88 other tests skip
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-433/igt@kms_lease@lease-invalid-crtc.html
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@kms_lease@lease-invalid-crtc.html

  * igt@kms_panel_fitting@legacy:
    - shard-adlp:         NOTRUN -> [SKIP][131] ([Intel XE#455]) +26 other tests skip
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-8/igt@kms_panel_fitting@legacy.html

  * igt@kms_plane_cursor@primary@pipe-a-hdmi-a-6-size-256:
    - shard-dg2-set2:     NOTRUN -> [FAIL][132] ([Intel XE#616]) +2 other tests fail
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-433/igt@kms_plane_cursor@primary@pipe-a-hdmi-a-6-size-256.html

  * igt@kms_plane_lowres@tiling-x@pipe-b-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][133] ([Intel XE#599]) +7 other tests skip
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-3/igt@kms_plane_lowres@tiling-x@pipe-b-edp-1.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-5-with-pixel-format@pipe-c:
    - shard-lnl:          NOTRUN -> [SKIP][134] ([Intel XE#2763]) +7 other tests skip
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-5/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-pixel-format@pipe-c.html

  * igt@kms_pm_backlight@basic-brightness:
    - shard-dg2-set2:     NOTRUN -> [SKIP][135] ([Intel XE#870])
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@kms_pm_backlight@basic-brightness.html

  * igt@kms_pm_backlight@brightness-with-dpms:
    - shard-bmg:          NOTRUN -> [SKIP][136] ([Intel XE#2938])
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-7/igt@kms_pm_backlight@brightness-with-dpms.html

  * igt@kms_pm_backlight@fade-with-dpms:
    - shard-adlp:         NOTRUN -> [SKIP][137] ([Intel XE#870]) +1 other test skip
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-6/igt@kms_pm_backlight@fade-with-dpms.html

  * igt@kms_pm_dc@dc5-retention-flops:
    - shard-lnl:          NOTRUN -> [SKIP][138] ([Intel XE#3309])
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-8/igt@kms_pm_dc@dc5-retention-flops.html
    - shard-adlp:         NOTRUN -> [SKIP][139] ([Intel XE#3309])
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-2/igt@kms_pm_dc@dc5-retention-flops.html

  * igt@kms_pm_dc@dc6-psr:
    - shard-lnl:          [PASS][140] -> [FAIL][141] ([Intel XE#718])
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-8/igt@kms_pm_dc@dc6-psr.html
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-2/igt@kms_pm_dc@dc6-psr.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][142] ([Intel XE#1129])
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-433/igt@kms_pm_dc@dc6-psr.html

  * igt@kms_pm_dc@dc9-dpms:
    - shard-adlp:         NOTRUN -> [FAIL][143] ([Intel XE#3325])
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-8/igt@kms_pm_dc@dc9-dpms.html

  * igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-sf:
    - shard-bmg:          NOTRUN -> [SKIP][144] ([Intel XE#1406] / [Intel XE#1489]) +4 other tests skip
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-8/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf:
    - shard-lnl:          NOTRUN -> [SKIP][145] ([Intel XE#1406] / [Intel XE#2893] / [Intel XE#4608]) +1 other test skip
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-1/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf@pipe-a-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][146] ([Intel XE#1406] / [Intel XE#4608]) +2 other tests skip
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-1/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf@pipe-a-edp-1.html

  * igt@kms_psr2_sf@pr-cursor-plane-update-sf:
    - shard-dg2-set2:     NOTRUN -> [SKIP][147] ([Intel XE#1406] / [Intel XE#1489]) +3 other tests skip
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-466/igt@kms_psr2_sf@pr-cursor-plane-update-sf.html

  * igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-adlp:         NOTRUN -> [SKIP][148] ([Intel XE#1406] / [Intel XE#1489]) +8 other tests skip
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@pr-plane-move-sf-dmg-area:
    - shard-lnl:          NOTRUN -> [SKIP][149] ([Intel XE#1406] / [Intel XE#2893]) +3 other tests skip
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-4/igt@kms_psr2_sf@pr-plane-move-sf-dmg-area.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-dg2-set2:     NOTRUN -> [SKIP][150] ([Intel XE#1122] / [Intel XE#1406])
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-464/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@fbc-pr-dpms:
    - shard-dg2-set2:     NOTRUN -> [SKIP][151] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +5 other tests skip
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@kms_psr@fbc-pr-dpms.html

  * igt@kms_psr@fbc-psr2-cursor-plane-onoff:
    - shard-dg2-set2:     NOTRUN -> [SKIP][152] ([Intel XE#1406] / [Intel XE#4208]) +4 other tests skip
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@kms_psr@fbc-psr2-cursor-plane-onoff.html

  * igt@kms_psr@fbc-psr2-sprite-plane-onoff:
    - shard-lnl:          NOTRUN -> [SKIP][153] ([Intel XE#1406]) +5 other tests skip
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-7/igt@kms_psr@fbc-psr2-sprite-plane-onoff.html

  * igt@kms_psr@fbc-psr2-sprite-plane-onoff@edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][154] ([Intel XE#1406] / [Intel XE#4609])
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-7/igt@kms_psr@fbc-psr2-sprite-plane-onoff@edp-1.html

  * igt@kms_psr@pr-primary-page-flip:
    - shard-adlp:         NOTRUN -> [SKIP][155] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +16 other tests skip
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-1/igt@kms_psr@pr-primary-page-flip.html

  * igt@kms_psr@pr-primary-render:
    - shard-bmg:          NOTRUN -> [SKIP][156] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +3 other tests skip
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-2/igt@kms_psr@pr-primary-render.html

  * igt@kms_psr@pr-sprite-plane-onoff:
    - shard-dg2-set2:     NOTRUN -> [SKIP][157] ([Intel XE#1406] / [Intel XE#2351] / [Intel XE#4208]) +1 other test skip
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@kms_psr@pr-sprite-plane-onoff.html

  * igt@kms_rotation_crc@primary-rotation-270:
    - shard-adlp:         NOTRUN -> [SKIP][158] ([Intel XE#3414])
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-6/igt@kms_rotation_crc@primary-rotation-270.html
    - shard-lnl:          NOTRUN -> [SKIP][159] ([Intel XE#3414] / [Intel XE#3904])
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-8/igt@kms_rotation_crc@primary-rotation-270.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
    - shard-dg2-set2:     NOTRUN -> [SKIP][160] ([Intel XE#3414])
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
    - shard-adlp:         NOTRUN -> [SKIP][161] ([Intel XE#1127])
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-1/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
    - shard-lnl:          NOTRUN -> [SKIP][162] ([Intel XE#1127])
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-1/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html

  * igt@xe_ccs@block-copy-compressed-inc-dimension:
    - shard-adlp:         NOTRUN -> [SKIP][163] ([Intel XE#455] / [Intel XE#488] / [Intel XE#5607]) +1 other test skip
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-6/igt@xe_ccs@block-copy-compressed-inc-dimension.html

  * igt@xe_compute_preempt@compute-preempt-many-all-ram@engine-drm_xe_engine_class_compute:
    - shard-dg2-set2:     NOTRUN -> [FAIL][164] ([Intel XE#5890])
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-432/igt@xe_compute_preempt@compute-preempt-many-all-ram@engine-drm_xe_engine_class_compute.html

  * igt@xe_copy_basic@mem-copy-linear-0xfffe:
    - shard-adlp:         NOTRUN -> [SKIP][165] ([Intel XE#1123])
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@xe_copy_basic@mem-copy-linear-0xfffe.html

  * igt@xe_copy_basic@mem-set-linear-0xfd:
    - shard-adlp:         NOTRUN -> [SKIP][166] ([Intel XE#1126])
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@xe_copy_basic@mem-set-linear-0xfd.html

  * igt@xe_eu_stall@non-blocking-re-enable:
    - shard-adlp:         NOTRUN -> [SKIP][167] ([Intel XE#5626])
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-1/igt@xe_eu_stall@non-blocking-re-enable.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][168] ([Intel XE#5626])
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-466/igt@xe_eu_stall@non-blocking-re-enable.html

  * igt@xe_eudebug_online@basic-breakpoint:
    - shard-bmg:          NOTRUN -> [SKIP][169] ([Intel XE#4837]) +3 other tests skip
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-3/igt@xe_eudebug_online@basic-breakpoint.html

  * igt@xe_eudebug_online@single-step-one:
    - shard-adlp:         NOTRUN -> [SKIP][170] ([Intel XE#4837] / [Intel XE#5565]) +14 other tests skip
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@xe_eudebug_online@single-step-one.html

  * igt@xe_eudebug_sriov@deny-eudebug:
    - shard-adlp:         NOTRUN -> [SKIP][171] ([Intel XE#4519])
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-3/igt@xe_eudebug_sriov@deny-eudebug.html

  * igt@xe_evict@evict-beng-large-cm:
    - shard-lnl:          NOTRUN -> [SKIP][172] ([Intel XE#688]) +2 other tests skip
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-2/igt@xe_evict@evict-beng-large-cm.html
    - shard-adlp:         NOTRUN -> [SKIP][173] ([Intel XE#261] / [Intel XE#5564]) +1 other test skip
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-1/igt@xe_evict@evict-beng-large-cm.html

  * igt@xe_evict@evict-small-external-cm:
    - shard-adlp:         NOTRUN -> [SKIP][174] ([Intel XE#261] / [Intel XE#5564] / [Intel XE#688]) +1 other test skip
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-1/igt@xe_evict@evict-small-external-cm.html

  * igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen:
    - shard-adlp:         NOTRUN -> [SKIP][175] ([Intel XE#5563] / [Intel XE#688])
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-2/igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr:
    - shard-dg2-set2:     [PASS][176] -> [SKIP][177] ([Intel XE#1392]) +1 other test skip
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-433/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html

  * igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate-race:
    - shard-lnl:          NOTRUN -> [SKIP][178] ([Intel XE#1392]) +7 other tests skip
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-7/igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate-race.html

  * igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate:
    - shard-adlp:         NOTRUN -> [SKIP][179] ([Intel XE#1392] / [Intel XE#5575]) +9 other tests skip
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-9/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate.html
    - shard-bmg:          NOTRUN -> [SKIP][180] ([Intel XE#2322]) +3 other tests skip
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-7/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate.html

  * igt@xe_exec_fault_mode@once-userptr-invalidate:
    - shard-adlp:         NOTRUN -> [SKIP][181] ([Intel XE#288] / [Intel XE#5561]) +31 other tests skip
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@xe_exec_fault_mode@once-userptr-invalidate.html

  * igt@xe_exec_fault_mode@twice-userptr-prefetch:
    - shard-dg2-set2:     NOTRUN -> [SKIP][182] ([Intel XE#288]) +9 other tests skip
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@xe_exec_fault_mode@twice-userptr-prefetch.html

  * igt@xe_exec_fault_mode@twice-userptr-rebind-imm:
    - shard-dg2-set2:     NOTRUN -> [SKIP][183] ([Intel XE#4208]) +296 other tests skip
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@xe_exec_fault_mode@twice-userptr-rebind-imm.html

  * igt@xe_exec_mix_modes@exec-spinner-interrupted-dma-fence:
    - shard-dg2-set2:     NOTRUN -> [SKIP][184] ([Intel XE#2360])
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-432/igt@xe_exec_mix_modes@exec-spinner-interrupted-dma-fence.html

  * igt@xe_exec_reset@parallel-gt-reset:
    - shard-bmg:          [PASS][185] -> [DMESG-WARN][186] ([Intel XE#3876])
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-4/igt@xe_exec_reset@parallel-gt-reset.html
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-4/igt@xe_exec_reset@parallel-gt-reset.html

  * igt@xe_exec_sip_eudebug@breakpoint-waitsip:
    - shard-dg2-set2:     NOTRUN -> [SKIP][187] ([Intel XE#4837]) +4 other tests skip
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@xe_exec_sip_eudebug@breakpoint-waitsip.html

  * igt@xe_exec_sip_eudebug@breakpoint-writesip:
    - shard-lnl:          NOTRUN -> [SKIP][188] ([Intel XE#4837]) +11 other tests skip
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-7/igt@xe_exec_sip_eudebug@breakpoint-writesip.html

  * igt@xe_exec_system_allocator@process-many-execqueues-free:
    - shard-adlp:         NOTRUN -> [SKIP][189] ([Intel XE#4915]) +286 other tests skip
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-2/igt@xe_exec_system_allocator@process-many-execqueues-free.html

  * igt@xe_exec_system_allocator@process-many-stride-mmap-huge:
    - shard-lnl:          NOTRUN -> [SKIP][190] ([Intel XE#4943]) +14 other tests skip
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-5/igt@xe_exec_system_allocator@process-many-stride-mmap-huge.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-mmap-huge:
    - shard-bmg:          NOTRUN -> [SKIP][191] ([Intel XE#4943]) +2 other tests skip
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-1/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-mmap-huge.html

  * igt@xe_exec_system_allocator@twice-malloc-fork-read:
    - shard-dg2-set2:     NOTRUN -> [SKIP][192] ([Intel XE#4915]) +108 other tests skip
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-464/igt@xe_exec_system_allocator@twice-malloc-fork-read.html

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
    - shard-lnl:          NOTRUN -> [ABORT][193] ([Intel XE#4917] / [Intel XE#5466])
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-2/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
    - shard-adlp:         NOTRUN -> [ABORT][194] ([Intel XE#4917] / [Intel XE#5530])
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-1/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv:
    - shard-dg2-set2:     NOTRUN -> [DMESG-WARN][195] ([Intel XE#5893])
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-466/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html
    - shard-lnl:          NOTRUN -> [ABORT][196] ([Intel XE#4757])
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-5/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html

  * igt@xe_live_ktest@xe_bo:
    - shard-dg2-set2:     NOTRUN -> [SKIP][197] ([Intel XE#2229] / [Intel XE#455]) +1 other test skip
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@xe_live_ktest@xe_bo.html
    - shard-adlp:         NOTRUN -> [SKIP][198] ([Intel XE#2229] / [Intel XE#455]) +1 other test skip
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-3/igt@xe_live_ktest@xe_bo.html

  * igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit:
    - shard-lnl:          NOTRUN -> [SKIP][199] ([Intel XE#2229]) +1 other test skip
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-4/igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit.html

  * igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
    - shard-dg2-set2:     NOTRUN -> [SKIP][200] ([Intel XE#2229])
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
    - shard-adlp:         NOTRUN -> [SKIP][201] ([Intel XE#2229])
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-3/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html

  * igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit:
    - shard-adlp:         NOTRUN -> [SKIP][202] ([Intel XE#2229] / [Intel XE#5488])
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html

  * igt@xe_mmap@pci-membarrier-bad-object:
    - shard-adlp:         NOTRUN -> [SKIP][203] ([Intel XE#5100]) +1 other test skip
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-1/igt@xe_mmap@pci-membarrier-bad-object.html
    - shard-lnl:          NOTRUN -> [SKIP][204] ([Intel XE#5100])
   [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-1/igt@xe_mmap@pci-membarrier-bad-object.html

  * igt@xe_module_load@many-reload:
    - shard-dg2-set2:     NOTRUN -> [FAIL][205] ([Intel XE#4208])
   [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@xe_module_load@many-reload.html

  * igt@xe_module_load@reload:
    - shard-dg2-set2:     [PASS][206] -> [FAIL][207] ([Intel XE#4208]) +1 other test fail
   [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-432/igt@xe_module_load@reload.html
   [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@xe_module_load@reload.html

  * igt@xe_noexec_ping_pong:
    - shard-adlp:         NOTRUN -> [SKIP][208] ([Intel XE#379] / [Intel XE#5613])
   [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-6/igt@xe_noexec_ping_pong.html
    - shard-lnl:          NOTRUN -> [SKIP][209] ([Intel XE#379])
   [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-8/igt@xe_noexec_ping_pong.html

  * igt@xe_oa@buffer-size:
    - shard-adlp:         NOTRUN -> [SKIP][210] ([Intel XE#5103])
   [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@xe_oa@buffer-size.html

  * igt@xe_oa@non-zero-reason:
    - shard-dg2-set2:     NOTRUN -> [SKIP][211] ([Intel XE#3573]) +2 other tests skip
   [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-432/igt@xe_oa@non-zero-reason.html

  * igt@xe_oa@syncs-syncobj-cfg:
    - shard-adlp:         NOTRUN -> [SKIP][212] ([Intel XE#3573]) +5 other tests skip
   [212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-9/igt@xe_oa@syncs-syncobj-cfg.html

  * igt@xe_pat@pat-index-xe2:
    - shard-adlp:         NOTRUN -> [SKIP][213] ([Intel XE#977])
   [213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-8/igt@xe_pat@pat-index-xe2.html

  * igt@xe_pat@pat-index-xelpg:
    - shard-adlp:         NOTRUN -> [SKIP][214] ([Intel XE#979])
   [214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-9/igt@xe_pat@pat-index-xelpg.html
    - shard-lnl:          NOTRUN -> [SKIP][215] ([Intel XE#979])
   [215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-5/igt@xe_pat@pat-index-xelpg.html

  * igt@xe_pm@d3cold-i2c:
    - shard-adlp:         NOTRUN -> [SKIP][216] ([Intel XE#5694])
   [216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@xe_pm@d3cold-i2c.html

  * igt@xe_pm@d3hot-i2c:
    - shard-dg2-set2:     NOTRUN -> [SKIP][217] ([Intel XE#5742])
   [217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@xe_pm@d3hot-i2c.html
    - shard-lnl:          NOTRUN -> [SKIP][218] ([Intel XE#5742])
   [218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-3/igt@xe_pm@d3hot-i2c.html
    - shard-adlp:         NOTRUN -> [SKIP][219] ([Intel XE#5742])
   [219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@xe_pm@d3hot-i2c.html

  * igt@xe_pm@d3hot-mmap-vram:
    - shard-lnl:          NOTRUN -> [SKIP][220] ([Intel XE#1948])
   [220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-1/igt@xe_pm@d3hot-mmap-vram.html

  * igt@xe_pm@s3-exec-after:
    - shard-lnl:          NOTRUN -> [SKIP][221] ([Intel XE#584])
   [221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-1/igt@xe_pm@s3-exec-after.html

  * igt@xe_pm@s4-d3cold-basic-exec:
    - shard-lnl:          NOTRUN -> [SKIP][222] ([Intel XE#2284] / [Intel XE#366])
   [222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-7/igt@xe_pm@s4-d3cold-basic-exec.html
    - shard-adlp:         NOTRUN -> [SKIP][223] ([Intel XE#2284] / [Intel XE#366])
   [223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-6/igt@xe_pm@s4-d3cold-basic-exec.html

  * igt@xe_pm@vram-d3cold-threshold:
    - shard-dg2-set2:     NOTRUN -> [SKIP][224] ([Intel XE#579])
   [224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-466/igt@xe_pm@vram-d3cold-threshold.html

  * igt@xe_pmu@engine-activity-idle:
    - shard-bmg:          [PASS][225] -> [DMESG-WARN][226] ([Intel XE#5213]) +1 other test dmesg-warn
   [225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-8/igt@xe_pmu@engine-activity-idle.html
   [226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-4/igt@xe_pmu@engine-activity-idle.html

  * igt@xe_pmu@fn-engine-activity-sched-if-idle:
    - shard-bmg:          [PASS][227] -> [ABORT][228] ([Intel XE#3970])
   [227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-6/igt@xe_pmu@fn-engine-activity-sched-if-idle.html
   [228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-1/igt@xe_pmu@fn-engine-activity-sched-if-idle.html

  * igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq:
    - shard-dg2-set2:     NOTRUN -> [SKIP][229] ([Intel XE#4733]) +1 other test skip
   [229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-464/igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq.html

  * igt@xe_pxp@regular-src-to-pxp-dest-rendercopy:
    - shard-adlp:         NOTRUN -> [SKIP][230] ([Intel XE#4733] / [Intel XE#5594]) +1 other test skip
   [230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-9/igt@xe_pxp@regular-src-to-pxp-dest-rendercopy.html

  * igt@xe_query@multigpu-query-pxp-status:
    - shard-lnl:          NOTRUN -> [SKIP][231] ([Intel XE#944]) +4 other tests skip
   [231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-7/igt@xe_query@multigpu-query-pxp-status.html

  * igt@xe_query@multigpu-query-uc-fw-version-huc:
    - shard-adlp:         NOTRUN -> [SKIP][232] ([Intel XE#944]) +5 other tests skip
   [232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-3/igt@xe_query@multigpu-query-uc-fw-version-huc.html
    - shard-bmg:          NOTRUN -> [SKIP][233] ([Intel XE#944])
   [233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-2/igt@xe_query@multigpu-query-uc-fw-version-huc.html

  * igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling:
    - shard-lnl:          NOTRUN -> [SKIP][234] ([Intel XE#4130]) +1 other test skip
   [234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-1/igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling.html

  * igt@xe_sriov_flr@flr-vf1-clear:
    - shard-dg2-set2:     NOTRUN -> [SKIP][235] ([Intel XE#3342])
   [235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-464/igt@xe_sriov_flr@flr-vf1-clear.html

  * igt@xe_vm@munmap-style-unbind-many-either-side-partial:
    - shard-dg2-set2:     [PASS][236] -> [SKIP][237] ([Intel XE#4208]) +172 other tests skip
   [236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-464/igt@xe_vm@munmap-style-unbind-many-either-side-partial.html
   [237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@xe_vm@munmap-style-unbind-many-either-side-partial.html

  
#### Possible fixes ####

  * igt@core_getversion@all-cards:
    - shard-dg2-set2:     [FAIL][238] ([Intel XE#4208]) -> [PASS][239] +2 other tests pass
   [238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@core_getversion@all-cards.html
   [239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@core_getversion@all-cards.html

  * igt@fbdev@nullptr:
    - shard-dg2-set2:     [SKIP][240] ([Intel XE#2134]) -> [PASS][241] +1 other test pass
   [240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@fbdev@nullptr.html
   [241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-464/igt@fbdev@nullptr.html

  * igt@kms_atomic_transition@modeset-transition-nonblocking-fencing:
    - shard-dg2-set2:     [SKIP][242] ([Intel XE#4208] / [i915#2575]) -> [PASS][243] +114 other tests pass
   [242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@kms_atomic_transition@modeset-transition-nonblocking-fencing.html
   [243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-433/igt@kms_atomic_transition@modeset-transition-nonblocking-fencing.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-adlp:         [DMESG-FAIL][244] ([Intel XE#4543]) -> [PASS][245] +4 other tests pass
   [244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-1/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
   [245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-2/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p:
    - shard-bmg:          [SKIP][246] ([Intel XE#2314] / [Intel XE#2894]) -> [PASS][247]
   [246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p.html
   [247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-4/igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
    - shard-dg2-set2:     [INCOMPLETE][248] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124]) -> [PASS][249]
   [248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
   [249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6:
    - shard-dg2-set2:     [INCOMPLETE][250] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) -> [PASS][251]
   [250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6.html
   [251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
    - shard-bmg:          [SKIP][252] ([Intel XE#2291]) -> [PASS][253] +2 other tests pass
   [252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html
   [253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-5/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html

  * igt@kms_display_modes@extended-mode-basic:
    - shard-bmg:          [SKIP][254] ([Intel XE#4302]) -> [PASS][255]
   [254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-6/igt@kms_display_modes@extended-mode-basic.html
   [255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-2/igt@kms_display_modes@extended-mode-basic.html

  * igt@kms_flip@2x-flip-vs-suspend@cd-dp2-hdmi-a3:
    - shard-bmg:          [INCOMPLETE][256] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][257] +3 other tests pass
   [256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-1/igt@kms_flip@2x-flip-vs-suspend@cd-dp2-hdmi-a3.html
   [257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-1/igt@kms_flip@2x-flip-vs-suspend@cd-dp2-hdmi-a3.html

  * igt@kms_flip@2x-nonexisting-fb:
    - shard-bmg:          [SKIP][258] ([Intel XE#2316]) -> [PASS][259] +7 other tests pass
   [258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-6/igt@kms_flip@2x-nonexisting-fb.html
   [259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-3/igt@kms_flip@2x-nonexisting-fb.html

  * igt@kms_flip@flip-vs-dpms-on-nop-interruptible:
    - shard-adlp:         [DMESG-WARN][260] ([Intel XE#4543]) -> [PASS][261] +7 other tests pass
   [260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-6/igt@kms_flip@flip-vs-dpms-on-nop-interruptible.html
   [261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-6/igt@kms_flip@flip-vs-dpms-on-nop-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-lnl:          [FAIL][262] ([Intel XE#301]) -> [PASS][263] +2 other tests pass
   [262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  * igt@kms_flip@flip-vs-suspend@b-hdmi-a1:
    - shard-adlp:         [DMESG-WARN][264] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][265] +3 other tests pass
   [264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-1/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html
   [265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling:
    - shard-adlp:         [DMESG-FAIL][266] ([Intel XE#4543] / [Intel XE#4921]) -> [PASS][267] +1 other test pass
   [266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-1/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html
   [267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move:
    - shard-dg2-set2:     [SKIP][268] ([Intel XE#2351] / [Intel XE#4208]) -> [PASS][269] +11 other tests pass
   [268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move.html
   [269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move.html

  * igt@kms_hdr@static-toggle-suspend:
    - shard-bmg:          [SKIP][270] ([Intel XE#1503]) -> [PASS][271]
   [270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-6/igt@kms_hdr@static-toggle-suspend.html
   [271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-3/igt@kms_hdr@static-toggle-suspend.html

  * igt@kms_joiner@invalid-modeset-force-big-joiner:
    - shard-bmg:          [SKIP][272] ([Intel XE#3012]) -> [PASS][273]
   [272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-6/igt@kms_joiner@invalid-modeset-force-big-joiner.html
   [273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-7/igt@kms_joiner@invalid-modeset-force-big-joiner.html

  * igt@kms_pm_dc@dc5-dpms:
    - shard-lnl:          [FAIL][274] ([Intel XE#718]) -> [PASS][275]
   [274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-4/igt@kms_pm_dc@dc5-dpms.html
   [275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-4/igt@kms_pm_dc@dc5-dpms.html

  * igt@kms_setmode@invalid-clone-single-crtc:
    - shard-bmg:          [SKIP][276] ([Intel XE#1435]) -> [PASS][277]
   [276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-6/igt@kms_setmode@invalid-clone-single-crtc.html
   [277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-1/igt@kms_setmode@invalid-clone-single-crtc.html

  * igt@kms_vrr@cmrr@pipe-a-edp-1:
    - shard-lnl:          [FAIL][278] ([Intel XE#4459]) -> [PASS][279] +1 other test pass
   [278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-5/igt@kms_vrr@cmrr@pipe-a-edp-1.html
   [279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-3/igt@kms_vrr@cmrr@pipe-a-edp-1.html

  * igt@xe_exec_balancer@once-parallel-rebind:
    - shard-dg2-set2:     [SKIP][280] ([Intel XE#4208]) -> [PASS][281] +254 other tests pass
   [280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@xe_exec_balancer@once-parallel-rebind.html
   [281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-464/igt@xe_exec_balancer@once-parallel-rebind.html

  * igt@xe_exec_basic@multigpu-no-exec-userptr:
    - shard-dg2-set2:     [SKIP][282] ([Intel XE#1392]) -> [PASS][283]
   [282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-userptr.html
   [283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@xe_exec_basic@multigpu-no-exec-userptr.html

  * igt@xe_module_load@load:
    - shard-lnl:          ([SKIP][284], [PASS][285], [PASS][286], [PASS][287], [PASS][288], [PASS][289], [PASS][290], [PASS][291], [PASS][292], [PASS][293], [ABORT][294], [ABORT][295], [ABORT][296], [PASS][297], [PASS][298], [PASS][299], [PASS][300], [PASS][301], [PASS][302], [PASS][303], [PASS][304], [PASS][305], [PASS][306], [PASS][307], [PASS][308]) ([Intel XE#378]) -> ([PASS][309], [PASS][310], [PASS][311], [PASS][312], [PASS][313], [PASS][314], [PASS][315], [PASS][316], [PASS][317], [PASS][318], [PASS][319], [PASS][320], [PASS][321], [PASS][322], [PASS][323], [PASS][324], [PASS][325], [PASS][326], [PASS][327], [PASS][328], [PASS][329], [PASS][330], [PASS][331], [PASS][332], [PASS][333])
   [284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-7/igt@xe_module_load@load.html
   [285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-3/igt@xe_module_load@load.html
   [286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-7/igt@xe_module_load@load.html
   [287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-7/igt@xe_module_load@load.html
   [288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-1/igt@xe_module_load@load.html
   [289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-4/igt@xe_module_load@load.html
   [290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-1/igt@xe_module_load@load.html
   [291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-1/igt@xe_module_load@load.html
   [292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-3/igt@xe_module_load@load.html
   [293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-3/igt@xe_module_load@load.html
   [294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-2/igt@xe_module_load@load.html
   [295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-2/igt@xe_module_load@load.html
   [296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-2/igt@xe_module_load@load.html
   [297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-4/igt@xe_module_load@load.html
   [298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-7/igt@xe_module_load@load.html
   [299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-7/igt@xe_module_load@load.html
   [300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-5/igt@xe_module_load@load.html
   [301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-5/igt@xe_module_load@load.html
   [302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-4/igt@xe_module_load@load.html
   [303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-4/igt@xe_module_load@load.html
   [304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-5/igt@xe_module_load@load.html
   [305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-5/igt@xe_module_load@load.html
   [306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-8/igt@xe_module_load@load.html
   [307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-8/igt@xe_module_load@load.html
   [308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-lnl-8/igt@xe_module_load@load.html
   [309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-1/igt@xe_module_load@load.html
   [310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-1/igt@xe_module_load@load.html
   [311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-1/igt@xe_module_load@load.html
   [312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-1/igt@xe_module_load@load.html
   [313]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-2/igt@xe_module_load@load.html
   [314]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-2/igt@xe_module_load@load.html
   [315]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-2/igt@xe_module_load@load.html
   [316]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-3/igt@xe_module_load@load.html
   [317]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-3/igt@xe_module_load@load.html
   [318]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-7/igt@xe_module_load@load.html
   [319]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-7/igt@xe_module_load@load.html
   [320]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-5/igt@xe_module_load@load.html
   [321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-7/igt@xe_module_load@load.html
   [322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-3/igt@xe_module_load@load.html
   [323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-7/igt@xe_module_load@load.html
   [324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-5/igt@xe_module_load@load.html
   [325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-5/igt@xe_module_load@load.html
   [326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-4/igt@xe_module_load@load.html
   [327]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-8/igt@xe_module_load@load.html
   [328]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-4/igt@xe_module_load@load.html
   [329]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-3/igt@xe_module_load@load.html
   [330]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-4/igt@xe_module_load@load.html
   [331]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-8/igt@xe_module_load@load.html
   [332]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-8/igt@xe_module_load@load.html
   [333]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-lnl-5/igt@xe_module_load@load.html
    - shard-bmg:          ([PASS][334], [PASS][335], [PASS][336], [PASS][337], [PASS][338], [PASS][339], [PASS][340], [PASS][341], [PASS][342], [PASS][343], [PASS][344], [SKIP][345], [PASS][346], [PASS][347], [PASS][348], [PASS][349], [PASS][350], [PASS][351], [PASS][352], [PASS][353], [PASS][354], [PASS][355], [PASS][356], [PASS][357], [PASS][358], [PASS][359]) ([Intel XE#2457]) -> ([PASS][360], [PASS][361], [PASS][362], [PASS][363], [PASS][364], [PASS][365], [PASS][366], [PASS][367], [PASS][368], [PASS][369], [PASS][370], [PASS][371], [PASS][372], [PASS][373], [PASS][374], [PASS][375], [PASS][376], [PASS][377], [PASS][378], [PASS][379], [PASS][380], [PASS][381], [PASS][382], [PASS][383], [PASS][384])
   [334]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-2/igt@xe_module_load@load.html
   [335]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-6/igt@xe_module_load@load.html
   [336]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-4/igt@xe_module_load@load.html
   [337]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-5/igt@xe_module_load@load.html
   [338]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-5/igt@xe_module_load@load.html
   [339]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-6/igt@xe_module_load@load.html
   [340]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-6/igt@xe_module_load@load.html
   [341]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-6/igt@xe_module_load@load.html
   [342]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-3/igt@xe_module_load@load.html
   [343]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-3/igt@xe_module_load@load.html
   [344]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-3/igt@xe_module_load@load.html
   [345]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-6/igt@xe_module_load@load.html
   [346]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-4/igt@xe_module_load@load.html
   [347]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-4/igt@xe_module_load@load.html
   [348]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-8/igt@xe_module_load@load.html
   [349]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-8/igt@xe_module_load@load.html
   [350]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-7/igt@xe_module_load@load.html
   [351]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-7/igt@xe_module_load@load.html
   [352]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-8/igt@xe_module_load@load.html
   [353]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-5/igt@xe_module_load@load.html
   [354]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-5/igt@xe_module_load@load.html
   [355]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-1/igt@xe_module_load@load.html
   [356]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-2/igt@xe_module_load@load.html
   [357]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-2/igt@xe_module_load@load.html
   [358]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-1/igt@xe_module_load@load.html
   [359]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-1/igt@xe_module_load@load.html
   [360]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-2/igt@xe_module_load@load.html
   [361]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-3/igt@xe_module_load@load.html
   [362]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-3/igt@xe_module_load@load.html
   [363]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-2/igt@xe_module_load@load.html
   [364]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-2/igt@xe_module_load@load.html
   [365]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-3/igt@xe_module_load@load.html
   [366]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-8/igt@xe_module_load@load.html
   [367]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-1/igt@xe_module_load@load.html
   [368]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-1/igt@xe_module_load@load.html
   [369]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-1/igt@xe_module_load@load.html
   [370]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-8/igt@xe_module_load@load.html
   [371]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-8/igt@xe_module_load@load.html
   [372]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-4/igt@xe_module_load@load.html
   [373]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-4/igt@xe_module_load@load.html
   [374]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-5/igt@xe_module_load@load.html
   [375]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-6/igt@xe_module_load@load.html
   [376]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-6/igt@xe_module_load@load.html
   [377]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-6/igt@xe_module_load@load.html
   [378]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-5/igt@xe_module_load@load.html
   [379]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-4/igt@xe_module_load@load.html
   [380]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-5/igt@xe_module_load@load.html
   [381]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-7/igt@xe_module_load@load.html
   [382]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-7/igt@xe_module_load@load.html
   [383]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-7/igt@xe_module_load@load.html
   [384]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-7/igt@xe_module_load@load.html
    - shard-dg2-set2:     ([PASS][385], [PASS][386], [PASS][387], [PASS][388], [PASS][389], [PASS][390], [PASS][391], [PASS][392], [PASS][393], [PASS][394], [PASS][395], [PASS][396], [PASS][397], [PASS][398], [PASS][399], [PASS][400], [PASS][401], [PASS][402], [PASS][403], [SKIP][404], [PASS][405], [PASS][406], [PASS][407]) ([Intel XE#378]) -> ([PASS][408], [PASS][409], [PASS][410], [PASS][411], [PASS][412], [PASS][413], [PASS][414], [PASS][415], [PASS][416], [PASS][417], [PASS][418], [PASS][419], [PASS][420], [PASS][421], [PASS][422], [PASS][423], [PASS][424], [PASS][425], [PASS][426], [PASS][427], [PASS][428], [PASS][429], [PASS][430], [PASS][431], [PASS][432])
   [385]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-464/igt@xe_module_load@load.html
   [386]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-464/igt@xe_module_load@load.html
   [387]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-466/igt@xe_module_load@load.html
   [388]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-433/igt@xe_module_load@load.html
   [389]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@xe_module_load@load.html
   [390]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@xe_module_load@load.html
   [391]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@xe_module_load@load.html
   [392]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@xe_module_load@load.html
   [393]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-433/igt@xe_module_load@load.html
   [394]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@xe_module_load@load.html
   [395]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@xe_module_load@load.html
   [396]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-466/igt@xe_module_load@load.html
   [397]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@xe_module_load@load.html
   [398]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@xe_module_load@load.html
   [399]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@xe_module_load@load.html
   [400]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@xe_module_load@load.html
   [401]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@xe_module_load@load.html
   [402]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-436/igt@xe_module_load@load.html
   [403]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-436/igt@xe_module_load@load.html
   [404]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@xe_module_load@load.html
   [405]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@xe_module_load@load.html
   [406]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-432/igt@xe_module_load@load.html
   [407]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-432/igt@xe_module_load@load.html
   [408]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@xe_module_load@load.html
   [409]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@xe_module_load@load.html
   [410]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@xe_module_load@load.html
   [411]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@xe_module_load@load.html
   [412]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-432/igt@xe_module_load@load.html
   [413]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-432/igt@xe_module_load@load.html
   [414]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@xe_module_load@load.html
   [415]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@xe_module_load@load.html
   [416]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@xe_module_load@load.html
   [417]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@xe_module_load@load.html
   [418]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@xe_module_load@load.html
   [419]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-466/igt@xe_module_load@load.html
   [420]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-466/igt@xe_module_load@load.html
   [421]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-463/igt@xe_module_load@load.html
   [422]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-463/igt@xe_module_load@load.html
   [423]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-433/igt@xe_module_load@load.html
   [424]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@xe_module_load@load.html
   [425]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-433/igt@xe_module_load@load.html
   [426]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-464/igt@xe_module_load@load.html
   [427]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-464/igt@xe_module_load@load.html
   [428]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@xe_module_load@load.html
   [429]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@xe_module_load@load.html
   [430]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@xe_module_load@load.html
   [431]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@xe_module_load@load.html
   [432]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@xe_module_load@load.html

  * igt@xe_vm@bind-array-enobufs:
    - shard-dg2-set2:     [DMESG-FAIL][433] ([Intel XE#3876]) -> [PASS][434]
   [433]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-464/igt@xe_vm@bind-array-enobufs.html
   [434]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-433/igt@xe_vm@bind-array-enobufs.html

  
#### Warnings ####

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - shard-dg2-set2:     [SKIP][435] ([Intel XE#4208] / [i915#2575]) -> [SKIP][436] ([Intel XE#623])
   [435]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
   [436]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_big_fb@4-tiled-16bpp-rotate-270:
    - shard-dg2-set2:     [SKIP][437] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][438] ([Intel XE#316])
   [437]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html
   [438]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-432/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-90:
    - shard-dg2-set2:     [SKIP][439] ([Intel XE#316]) -> [SKIP][440] ([Intel XE#4208]) +1 other test skip
   [439]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-436/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html
   [440]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html

  * igt@kms_big_fb@x-tiled-8bpp-rotate-270:
    - shard-dg2-set2:     [SKIP][441] ([Intel XE#4208]) -> [SKIP][442] ([Intel XE#316]) +3 other tests skip
   [441]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html
   [442]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-8bpp-rotate-90:
    - shard-dg2-set2:     [SKIP][443] ([Intel XE#316]) -> [SKIP][444] ([Intel XE#2351] / [Intel XE#4208]) +1 other test skip
   [443]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-464/igt@kms_big_fb@x-tiled-8bpp-rotate-90.html
   [444]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@kms_big_fb@x-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-64bpp-rotate-270:
    - shard-dg2-set2:     [SKIP][445] ([Intel XE#1124]) -> [SKIP][446] ([Intel XE#2351] / [Intel XE#4208]) +4 other tests skip
   [445]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-433/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html
   [446]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-64bpp-rotate-180:
    - shard-dg2-set2:     [SKIP][447] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][448] ([Intel XE#1124]) +7 other tests skip
   [447]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@kms_big_fb@yf-tiled-64bpp-rotate-180.html
   [448]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-466/igt@kms_big_fb@yf-tiled-64bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-addfb-size-overflow:
    - shard-dg2-set2:     [SKIP][449] ([Intel XE#4208]) -> [SKIP][450] ([Intel XE#610])
   [449]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
   [450]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-463/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-dg2-set2:     [SKIP][451] ([Intel XE#4208]) -> [SKIP][452] ([Intel XE#1124]) +9 other tests skip
   [451]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
   [452]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-464/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-dg2-set2:     [SKIP][453] ([Intel XE#1124]) -> [SKIP][454] ([Intel XE#4208]) +9 other tests skip
   [453]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-432/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
   [454]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p:
    - shard-dg2-set2:     [SKIP][455] ([Intel XE#4208] / [i915#2575]) -> [SKIP][456] ([Intel XE#2191])
   [455]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html
   [456]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html

  * igt@kms_bw@linear-tiling-1-displays-1920x1080p:
    - shard-dg2-set2:     [SKIP][457] ([Intel XE#4208] / [i915#2575]) -> [SKIP][458] ([Intel XE#367]) +4 other tests skip
   [457]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@kms_bw@linear-tiling-1-displays-1920x1080p.html
   [458]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-433/igt@kms_bw@linear-tiling-1-displays-1920x1080p.html

  * igt@kms_bw@linear-tiling-3-displays-3840x2160p:
    - shard-dg2-set2:     [SKIP][459] ([Intel XE#367]) -> [SKIP][460] ([Intel XE#4208] / [i915#2575]) +2 other tests skip
   [459]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-432/igt@kms_bw@linear-tiling-3-displays-3840x2160p.html
   [460]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@kms_bw@linear-tiling-3-displays-3840x2160p.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs:
    - shard-dg2-set2:     [SKIP][461] ([Intel XE#2907]) -> [SKIP][462] ([Intel XE#4208]) +2 other tests skip
   [461]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-433/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html
   [462]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html

  * igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs:
    - shard-dg2-set2:     [SKIP][463] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][464] ([Intel XE#455] / [Intel XE#787]) +3 other tests skip
   [463]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs.html
   [464]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs.html

  * igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs:
    - shard-dg2-set2:     [SKIP][465] ([Intel XE#4208]) -> [SKIP][466] ([Intel XE#455] / [Intel XE#787]) +14 other tests skip
   [465]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs.html
   [466]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-463/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc:
    - shard-dg2-set2:     [SKIP][467] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][468] ([Intel XE#2351] / [Intel XE#4208]) +2 other tests skip
   [467]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-436/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc.html
   [468]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-dg2-set2:     [SKIP][469] ([Intel XE#3442]) -> [SKIP][470] ([Intel XE#4208])
   [469]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-433/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
   [470]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
    - shard-dg2-set2:     [INCOMPLETE][471] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522]) -> [INCOMPLETE][472] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522])
   [471]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
   [472]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs:
    - shard-dg2-set2:     [SKIP][473] ([Intel XE#4208]) -> [SKIP][474] ([Intel XE#2907]) +1 other test skip
   [473]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html
   [474]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs:
    - shard-dg2-set2:     [SKIP][475] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][476] ([Intel XE#4208]) +6 other tests skip
   [475]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs.html
   [476]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs.html

  * igt@kms_cdclk@mode-transition-all-outputs:
    - shard-dg2-set2:     [SKIP][477] ([Intel XE#4418]) -> [SKIP][478] ([Intel XE#2351] / [Intel XE#4208])
   [477]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-436/igt@kms_cdclk@mode-transition-all-outputs.html
   [478]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@kms_cdclk@mode-transition-all-outputs.html

  * igt@kms_chamelium_color@ctm-0-75:
    - shard-dg2-set2:     [SKIP][479] ([Intel XE#306]) -> [SKIP][480] ([Intel XE#4208] / [i915#2575]) +1 other test skip
   [479]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-433/igt@kms_chamelium_color@ctm-0-75.html
   [480]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@kms_chamelium_color@ctm-0-75.html

  * igt@kms_chamelium_color@ctm-red-to-blue:
    - shard-dg2-set2:     [SKIP][481] ([Intel XE#4208] / [i915#2575]) -> [SKIP][482] ([Intel XE#306]) +2 other tests skip
   [481]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@kms_chamelium_color@ctm-red-to-blue.html
   [482]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-432/igt@kms_chamelium_color@ctm-red-to-blue.html

  * igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats:
    - shard-dg2-set2:     [SKIP][483] ([Intel XE#373]) -> [SKIP][484] ([Intel XE#4208] / [i915#2575]) +7 other tests skip
   [483]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-436/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html
   [484]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html

  * igt@kms_chamelium_hpd@hdmi-hpd:
    - shard-dg2-set2:     [SKIP][485] ([Intel XE#4208] / [i915#2575]) -> [SKIP][486] ([Intel XE#373]) +11 other tests skip
   [485]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@kms_chamelium_hpd@hdmi-hpd.html
   [486]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-463/igt@kms_chamelium_hpd@hdmi-hpd.html

  * igt@kms_content_protection@atomic:
    - shard-dg2-set2:     [FAIL][487] ([Intel XE#1178]) -> [SKIP][488] ([Intel XE#4208] / [i915#2575])
   [487]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-432/igt@kms_content_protection@atomic.html
   [488]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@kms_content_protection@atomic.html

  * igt@kms_content_protection@lic-type-0:
    - shard-dg2-set2:     [SKIP][489] ([Intel XE#4208] / [i915#2575]) -> [FAIL][490] ([Intel XE#1178]) +2 other tests fail
   [489]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@kms_content_protection@lic-type-0.html
   [490]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-433/igt@kms_content_protection@lic-type-0.html
    - shard-bmg:          [SKIP][491] ([Intel XE#2341]) -> [FAIL][492] ([Intel XE#1178])
   [491]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-6/igt@kms_content_protection@lic-type-0.html
   [492]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-2/igt@kms_content_protection@lic-type-0.html

  * igt@kms_cursor_crc@cursor-offscreen-512x170:
    - shard-dg2-set2:     [SKIP][493] ([Intel XE#308]) -> [SKIP][494] ([Intel XE#4208] / [i915#2575])
   [493]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-466/igt@kms_cursor_crc@cursor-offscreen-512x170.html
   [494]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@kms_cursor_crc@cursor-offscreen-512x170.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-dg2-set2:     [SKIP][495] ([Intel XE#4208] / [i915#2575]) -> [SKIP][496] ([Intel XE#308]) +1 other test skip
   [495]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@kms_cursor_crc@cursor-onscreen-512x512.html
   [496]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-463/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-dg2-set2:     [SKIP][497] ([Intel XE#323]) -> [SKIP][498] ([Intel XE#4208] / [i915#2575])
   [497]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-466/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
   [498]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_dp_link_training@uhbr-sst:
    - shard-dg2-set2:     [SKIP][499] ([Intel XE#4356]) -> [SKIP][500] ([Intel XE#4208])
   [499]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-466/igt@kms_dp_link_training@uhbr-sst.html
   [500]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@kms_dp_link_training@uhbr-sst.html

  * igt@kms_dsc@dsc-basic:
    - shard-dg2-set2:     [SKIP][501] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][502] ([Intel XE#455]) +1 other test skip
   [501]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@kms_dsc@dsc-basic.html
   [502]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-463/igt@kms_dsc@dsc-basic.html

  * igt@kms_dsc@dsc-with-bpc-formats:
    - shard-dg2-set2:     [SKIP][503] ([Intel XE#455]) -> [SKIP][504] ([Intel XE#2351] / [Intel XE#4208])
   [503]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-464/igt@kms_dsc@dsc-with-bpc-formats.html
   [504]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@kms_dsc@dsc-with-bpc-formats.html

  * igt@kms_dsc@dsc-with-output-formats-with-bpc:
    - shard-dg2-set2:     [SKIP][505] ([Intel XE#4208]) -> [SKIP][506] ([Intel XE#455]) +4 other tests skip
   [505]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
   [506]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@kms_dsc@dsc-with-output-formats-with-bpc.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats:
    - shard-dg2-set2:     [SKIP][507] ([Intel XE#4422]) -> [SKIP][508] ([Intel XE#4208]) +1 other test skip
   [507]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-432/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html
   [508]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests:
    - shard-dg2-set2:     [SKIP][509] ([Intel XE#4208]) -> [SKIP][510] ([Intel XE#4422])
   [509]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html
   [510]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-dg2-set2:     [SKIP][511] ([Intel XE#776]) -> [SKIP][512] ([Intel XE#4208])
   [511]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-466/igt@kms_fbcon_fbt@psr-suspend.html
   [512]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_feature_discovery@chamelium:
    - shard-dg2-set2:     [SKIP][513] ([Intel XE#4208] / [i915#2575]) -> [SKIP][514] ([Intel XE#701])
   [513]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@kms_feature_discovery@chamelium.html
   [514]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-466/igt@kms_feature_discovery@chamelium.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-dg2-set2:     [SKIP][515] ([Intel XE#1137]) -> [SKIP][516] ([Intel XE#4208] / [i915#2575])
   [515]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-432/igt@kms_feature_discovery@dp-mst.html
   [516]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_feature_discovery@psr2:
    - shard-dg2-set2:     [SKIP][517] ([Intel XE#1135]) -> [SKIP][518] ([Intel XE#4208] / [i915#2575])
   [517]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-436/igt@kms_feature_discovery@psr2.html
   [518]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@kms_feature_discovery@psr2.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling:
    - shard-dg2-set2:     [SKIP][519] ([Intel XE#455]) -> [SKIP][520] ([Intel XE#4208]) +1 other test skip
   [519]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-433/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html
   [520]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render:
    - shard-bmg:          [SKIP][521] ([Intel XE#2311]) -> [SKIP][522] ([Intel XE#2312]) +9 other tests skip
   [521]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html
   [522]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-onoff:
    - shard-dg2-set2:     [SKIP][523] ([Intel XE#651]) -> [SKIP][524] ([Intel XE#4208]) +24 other tests skip
   [523]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-432/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-onoff.html
   [524]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-plflip-blt:
    - shard-dg2-set2:     [SKIP][525] ([Intel XE#4208]) -> [SKIP][526] ([Intel XE#651]) +26 other tests skip
   [525]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-plflip-blt.html
   [526]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-433/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][527] ([Intel XE#2312]) -> [SKIP][528] ([Intel XE#2311]) +11 other tests skip
   [527]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
   [528]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@drrs-suspend:
    - shard-dg2-set2:     [SKIP][529] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][530] ([Intel XE#651]) +15 other tests skip
   [529]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@kms_frontbuffer_tracking@drrs-suspend.html
   [530]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-464/igt@kms_frontbuffer_tracking@drrs-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render:
    - shard-bmg:          [SKIP][531] ([Intel XE#5390]) -> [SKIP][532] ([Intel XE#2312]) +4 other tests skip
   [531]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render.html
   [532]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
    - shard-bmg:          [SKIP][533] ([Intel XE#2312]) -> [SKIP][534] ([Intel XE#5390]) +5 other tests skip
   [533]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html
   [534]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-y:
    - shard-dg2-set2:     [SKIP][535] ([Intel XE#658]) -> [SKIP][536] ([Intel XE#2351] / [Intel XE#4208])
   [535]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-432/igt@kms_frontbuffer_tracking@fbc-tiling-y.html
   [536]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@kms_frontbuffer_tracking@fbc-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-onoff:
    - shard-dg2-set2:     [SKIP][537] ([Intel XE#651]) -> [SKIP][538] ([Intel XE#2351] / [Intel XE#4208]) +10 other tests skip
   [537]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-433/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-onoff.html
   [538]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt:
    - shard-dg2-set2:     [SKIP][539] ([Intel XE#4208]) -> [SKIP][540] ([Intel XE#653]) +29 other tests skip
   [539]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html
   [540]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-466/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-blt:
    - shard-bmg:          [SKIP][541] ([Intel XE#2312]) -> [SKIP][542] ([Intel XE#2313]) +11 other tests skip
   [541]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-blt.html
   [542]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-onoff:
    - shard-dg2-set2:     [SKIP][543] ([Intel XE#653]) -> [SKIP][544] ([Intel XE#4208]) +24 other tests skip
   [543]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-466/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-onoff.html
   [544]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt:
    - shard-dg2-set2:     [SKIP][545] ([Intel XE#653]) -> [SKIP][546] ([Intel XE#2351] / [Intel XE#4208]) +5 other tests skip
   [545]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt.html
   [546]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
    - shard-dg2-set2:     [SKIP][547] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][548] ([Intel XE#658])
   [547]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
   [548]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-463/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-blt:
    - shard-bmg:          [SKIP][549] ([Intel XE#2313]) -> [SKIP][550] ([Intel XE#2312]) +5 other tests skip
   [549]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-blt.html
   [550]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-render:
    - shard-dg2-set2:     [SKIP][551] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][552] ([Intel XE#653]) +4 other tests skip
   [551]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-render.html
   [552]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-432/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-render.html

  * igt@kms_hdr@invalid-hdr:
    - shard-dg2-set2:     [SKIP][553] ([Intel XE#4208] / [i915#2575]) -> [SKIP][554] ([Intel XE#455]) +10 other tests skip
   [553]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@kms_hdr@invalid-hdr.html
   [554]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-433/igt@kms_hdr@invalid-hdr.html

  * igt@kms_joiner@basic-force-ultra-joiner:
    - shard-dg2-set2:     [SKIP][555] ([Intel XE#2925]) -> [SKIP][556] ([Intel XE#4208])
   [555]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-436/igt@kms_joiner@basic-force-ultra-joiner.html
   [556]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@kms_joiner@basic-force-ultra-joiner.html

  * igt@kms_joiner@basic-max-non-joiner:
    - shard-dg2-set2:     [SKIP][557] ([Intel XE#4208]) -> [SKIP][558] ([Intel XE#4298])
   [557]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@kms_joiner@basic-max-non-joiner.html
   [558]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-433/igt@kms_joiner@basic-max-non-joiner.html

  * igt@kms_joiner@invalid-modeset-force-ultra-joiner:
    - shard-dg2-set2:     [SKIP][559] ([Intel XE#4208]) -> [SKIP][560] ([Intel XE#2925])
   [559]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
   [560]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-463/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html

  * igt@kms_plane_cursor@primary:
    - shard-dg2-set2:     [SKIP][561] ([Intel XE#4208] / [i915#2575]) -> [FAIL][562] ([Intel XE#616])
   [561]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@kms_plane_cursor@primary.html
   [562]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-433/igt@kms_plane_cursor@primary.html

  * igt@kms_plane_multiple@2x-tiling-y:
    - shard-dg2-set2:     [SKIP][563] ([Intel XE#4208] / [i915#2575]) -> [SKIP][564] ([Intel XE#5021])
   [563]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@kms_plane_multiple@2x-tiling-y.html
   [564]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@kms_plane_multiple@2x-tiling-y.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-bmg:          [SKIP][565] ([Intel XE#5021]) -> [SKIP][566] ([Intel XE#4596])
   [565]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-1/igt@kms_plane_multiple@2x-tiling-yf.html
   [566]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_pm_backlight@brightness-with-dpms:
    - shard-dg2-set2:     [SKIP][567] ([Intel XE#4208]) -> [SKIP][568] ([Intel XE#2938])
   [567]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@kms_pm_backlight@brightness-with-dpms.html
   [568]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-466/igt@kms_pm_backlight@brightness-with-dpms.html

  * igt@kms_pm_backlight@fade:
    - shard-dg2-set2:     [SKIP][569] ([Intel XE#870]) -> [SKIP][570] ([Intel XE#4208])
   [569]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-436/igt@kms_pm_backlight@fade.html
   [570]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@kms_pm_backlight@fade.html

  * igt@kms_pm_dc@dc3co-vpb-simulation:
    - shard-dg2-set2:     [SKIP][571] ([Intel XE#1122]) -> [SKIP][572] ([Intel XE#2351] / [Intel XE#4208])
   [571]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-464/igt@kms_pm_dc@dc3co-vpb-simulation.html
   [572]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@kms_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_pm_dc@dc5-psr:
    - shard-dg2-set2:     [SKIP][573] ([Intel XE#1129]) -> [SKIP][574] ([Intel XE#4208])
   [573]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-466/igt@kms_pm_dc@dc5-psr.html
   [574]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@kms_pm_dc@dc5-psr.html

  * igt@kms_pm_dc@deep-pkgc:
    - shard-dg2-set2:     [SKIP][575] ([Intel XE#4208]) -> [SKIP][576] ([Intel XE#908])
   [575]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@kms_pm_dc@deep-pkgc.html
   [576]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-432/igt@kms_pm_dc@deep-pkgc.html

  * igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area:
    - shard-dg2-set2:     [SKIP][577] ([Intel XE#1406] / [Intel XE#4208]) -> [SKIP][578] ([Intel XE#1406] / [Intel XE#1489]) +9 other tests skip
   [577]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area.html
   [578]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-466/igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf:
    - shard-dg2-set2:     [SKIP][579] ([Intel XE#1406] / [Intel XE#1489]) -> [SKIP][580] ([Intel XE#1406] / [Intel XE#4208]) +8 other tests skip
   [579]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-432/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf.html
   [580]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_su@page_flip-nv12:
    - shard-dg2-set2:     [SKIP][581] ([Intel XE#1406] / [Intel XE#4208]) -> [SKIP][582] ([Intel XE#1122] / [Intel XE#1406])
   [581]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@kms_psr2_su@page_flip-nv12.html
   [582]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-432/igt@kms_psr2_su@page_flip-nv12.html

  * igt@kms_psr@fbc-pr-sprite-render:
    - shard-dg2-set2:     [SKIP][583] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) -> [SKIP][584] ([Intel XE#1406] / [Intel XE#2351] / [Intel XE#4208]) +3 other tests skip
   [583]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-433/igt@kms_psr@fbc-pr-sprite-render.html
   [584]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@kms_psr@fbc-pr-sprite-render.html

  * igt@kms_psr@fbc-psr-sprite-render:
    - shard-dg2-set2:     [SKIP][585] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) -> [SKIP][586] ([Intel XE#1406] / [Intel XE#4208]) +10 other tests skip
   [585]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-436/igt@kms_psr@fbc-psr-sprite-render.html
   [586]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@kms_psr@fbc-psr-sprite-render.html

  * igt@kms_psr@fbc-psr2-no-drrs:
    - shard-dg2-set2:     [SKIP][587] ([Intel XE#1406] / [Intel XE#4208]) -> [SKIP][588] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +7 other tests skip
   [587]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@kms_psr@fbc-psr2-no-drrs.html
   [588]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@kms_psr@fbc-psr2-no-drrs.html

  * igt@kms_psr@psr-dpms:
    - shard-dg2-set2:     [SKIP][589] ([Intel XE#1406] / [Intel XE#2351] / [Intel XE#4208]) -> [SKIP][590] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +6 other tests skip
   [589]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@kms_psr@psr-dpms.html
   [590]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@kms_psr@psr-dpms.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-dg2-set2:     [SKIP][591] ([Intel XE#1406] / [Intel XE#4208]) -> [SKIP][592] ([Intel XE#1406] / [Intel XE#2939])
   [591]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
   [592]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
    - shard-dg2-set2:     [SKIP][593] ([Intel XE#1127]) -> [SKIP][594] ([Intel XE#4208] / [i915#2575])
   [593]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-436/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
   [594]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-90:
    - shard-dg2-set2:     [SKIP][595] ([Intel XE#3414]) -> [SKIP][596] ([Intel XE#4208] / [i915#2575]) +3 other tests skip
   [595]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-432/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html
   [596]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
    - shard-dg2-set2:     [SKIP][597] ([Intel XE#4208] / [i915#2575]) -> [SKIP][598] ([Intel XE#1127])
   [597]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
   [598]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [SKIP][599] ([Intel XE#2426]) -> [FAIL][600] ([Intel XE#1729])
   [599]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-bmg-6/igt@kms_tiled_display@basic-test-pattern.html
   [600]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern.html
    - shard-dg2-set2:     [FAIL][601] ([Intel XE#1729]) -> [SKIP][602] ([Intel XE#4208] / [i915#2575])
   [601]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-466/igt@kms_tiled_display@basic-test-pattern.html
   [602]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_tv_load_detect@load-detect:
    - shard-dg2-set2:     [SKIP][603] ([Intel XE#4208] / [i915#2575]) -> [SKIP][604] ([Intel XE#330])
   [603]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@kms_tv_load_detect@load-detect.html
   [604]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-433/igt@kms_tv_load_detect@load-detect.html

  * igt@kms_vrr@flip-dpms:
    - shard-dg2-set2:     [SKIP][605] ([Intel XE#455]) -> [SKIP][606] ([Intel XE#4208] / [i915#2575]) +6 other tests skip
   [605]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-466/igt@kms_vrr@flip-dpms.html
   [606]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@kms_vrr@flip-dpms.html

  * igt@kms_vrr@lobf:
    - shard-dg2-set2:     [SKIP][607] ([Intel XE#4208] / [i915#2575]) -> [SKIP][608] ([Intel XE#2168])
   [607]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@kms_vrr@lobf.html
   [608]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-464/igt@kms_vrr@lobf.html

  * igt@xe_compute_preempt@compute-preempt-many-all-ram:
    - shard-dg2-set2:     [SKIP][609] ([Intel XE#4208]) -> [FAIL][610] ([Intel XE#5890])
   [609]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@xe_compute_preempt@compute-preempt-many-all-ram.html
   [610]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-432/igt@xe_compute_preempt@compute-preempt-many-all-ram.html

  * igt@xe_compute_preempt@compute-threadgroup-preempt:
    - shard-dg2-set2:     [SKIP][611] ([Intel XE#1280] / [Intel XE#455]) -> [SKIP][612] ([Intel XE#4208])
   [611]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-436/igt@xe_compute_preempt@compute-threadgroup-preempt.html
   [612]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@xe_compute_preempt@compute-threadgroup-preempt.html

  * igt@xe_configfs@survivability-mode:
    - shard-dg2-set2:     [SKIP][613] -> [SKIP][614] ([Intel XE#4208])
   [613]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-432/igt@xe_configfs@survivability-mode.html
   [614]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@xe_configfs@survivability-mode.html

  * igt@xe_copy_basic@mem-set-linear-0xfd:
    - shard-dg2-set2:     [SKIP][615] ([Intel XE#1126]) -> [SKIP][616] ([Intel XE#4208]) +1 other test skip
   [615]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-433/igt@xe_copy_basic@mem-set-linear-0xfd.html
   [616]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@xe_copy_basic@mem-set-linear-0xfd.html

  * igt@xe_copy_basic@mem-set-linear-0xfffe:
    - shard-dg2-set2:     [SKIP][617] ([Intel XE#4208]) -> [SKIP][618] ([Intel XE#1126])
   [617]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@xe_copy_basic@mem-set-linear-0xfffe.html
   [618]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-433/igt@xe_copy_basic@mem-set-linear-0xfffe.html

  * igt@xe_eu_stall@invalid-sampling-rate:
    - shard-dg2-set2:     [SKIP][619] ([Intel XE#4208]) -> [SKIP][620] ([Intel XE#5626])
   [619]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@xe_eu_stall@invalid-sampling-rate.html
   [620]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@xe_eu_stall@invalid-sampling-rate.html

  * igt@xe_eudebug@sysfs-toggle:
    - shard-dg2-set2:     [SKIP][621] ([Intel XE#4208]) -> [SKIP][622] ([Intel XE#4837]) +14 other tests skip
   [621]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@xe_eudebug@sysfs-toggle.html
   [622]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-464/igt@xe_eudebug@sysfs-toggle.html

  * igt@xe_eudebug@vm-bind-clear-faultable:
    - shard-dg2-set2:     [SKIP][623] ([Intel XE#4837]) -> [SKIP][624] ([Intel XE#4208]) +11 other tests skip
   [623]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-436/igt@xe_eudebug@vm-bind-clear-faultable.html
   [624]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@xe_eudebug@vm-bind-clear-faultable.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-bind:
    - shard-dg2-set2:     [SKIP][625] ([Intel XE#1392]) -> [SKIP][626] ([Intel XE#4208]) +2 other tests skip
   [625]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-bind.html
   [626]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-bind.html

  * igt@xe_exec_basic@multigpu-once-rebind:
    - shard-dg2-set2:     [SKIP][627] ([Intel XE#4208]) -> [SKIP][628] ([Intel XE#1392]) +1 other test skip
   [627]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@xe_exec_basic@multigpu-once-rebind.html
   [628]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-432/igt@xe_exec_basic@multigpu-once-rebind.html

  * igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-rebind-prefetch:
    - shard-dg2-set2:     [SKIP][629] ([Intel XE#4208]) -> [SKIP][630] ([Intel XE#288]) +38 other tests skip
   [629]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-rebind-prefetch.html
   [630]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-rebind-prefetch.html

  * igt@xe_exec_fault_mode@twice-userptr-invalidate-race:
    - shard-dg2-set2:     [SKIP][631] ([Intel XE#288]) -> [SKIP][632] ([Intel XE#4208]) +29 other tests skip
   [631]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-436/igt@xe_exec_fault_mode@twice-userptr-invalidate-race.html
   [632]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@xe_exec_fault_mode@twice-userptr-invalidate-race.html

  * igt@xe_exec_mix_modes@exec-simple-batch-store-lr:
    - shard-dg2-set2:     [SKIP][633] ([Intel XE#2360]) -> [SKIP][634] ([Intel XE#4208])
   [633]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-464/igt@xe_exec_mix_modes@exec-simple-batch-store-lr.html
   [634]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@xe_exec_mix_modes@exec-simple-batch-store-lr.html

  * igt@xe_exec_reset@parallel-gt-reset:
    - shard-dg2-set2:     [DMESG-WARN][635] ([Intel XE#3876]) -> [SKIP][636] ([Intel XE#4208])
   [635]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-433/igt@xe_exec_reset@parallel-gt-reset.html
   [636]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@xe_exec_reset@parallel-gt-reset.html

  * igt@xe_exec_system_allocator@threads-many-large-execqueues-malloc-mlock-nomemset:
    - shard-dg2-set2:     [SKIP][637] ([Intel XE#4208]) -> [SKIP][638] ([Intel XE#4915]) +313 other tests skip
   [637]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@xe_exec_system_allocator@threads-many-large-execqueues-malloc-mlock-nomemset.html
   [638]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@xe_exec_system_allocator@threads-many-large-execqueues-malloc-mlock-nomemset.html

  * igt@xe_exec_system_allocator@threads-many-large-mmap-shared-remap-dontunmap-eocheck:
    - shard-dg2-set2:     [SKIP][639] ([Intel XE#4915]) -> [SKIP][640] ([Intel XE#4208]) +258 other tests skip
   [639]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-464/igt@xe_exec_system_allocator@threads-many-large-mmap-shared-remap-dontunmap-eocheck.html
   [640]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@xe_exec_system_allocator@threads-many-large-mmap-shared-remap-dontunmap-eocheck.html

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
    - shard-dg2-set2:     [SKIP][641] ([Intel XE#4208]) -> [ABORT][642] ([Intel XE#4917])
   [641]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
   [642]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-463/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html

  * igt@xe_huc_copy@huc_copy:
    - shard-dg2-set2:     [SKIP][643] ([Intel XE#4208]) -> [SKIP][644] ([Intel XE#255])
   [643]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@xe_huc_copy@huc_copy.html
   [644]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-432/igt@xe_huc_copy@huc_copy.html

  * igt@xe_module_load@load:
    - shard-adlp:         ([PASS][645], [PASS][646], [SKIP][647], [PASS][648], [PASS][649], [PASS][650], [PASS][651], [PASS][652], [ABORT][653], [ABORT][654], [ABORT][655], [ABORT][656], [ABORT][657], [PASS][658], [PASS][659], [PASS][660], [PASS][661], [PASS][662], [PASS][663], [PASS][664], [PASS][665], [PASS][666], [PASS][667], [PASS][668], [PASS][669], [PASS][670]) ([Intel XE#378] / [Intel XE#5612]) -> ([PASS][671], [PASS][672], [PASS][673], [PASS][674], [PASS][675], [PASS][676], [PASS][677], [PASS][678], [PASS][679], [PASS][680], [SKIP][681], [PASS][682], [PASS][683], [PASS][684], [PASS][685], [PASS][686], [PASS][687], [PASS][688], [PASS][689], [PASS][690], [PASS][691], [PASS][692], [PASS][693], [PASS][694], [PASS][695], [PASS][696]) ([Intel XE#378] / [Intel XE#5612])
   [645]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-3/igt@xe_module_load@load.html
   [646]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-8/igt@xe_module_load@load.html
   [647]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-3/igt@xe_module_load@load.html
   [648]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-1/igt@xe_module_load@load.html
   [649]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-3/igt@xe_module_load@load.html
   [650]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-3/igt@xe_module_load@load.html
   [651]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-8/igt@xe_module_load@load.html
   [652]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-8/igt@xe_module_load@load.html
   [653]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-9/igt@xe_module_load@load.html
   [654]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-9/igt@xe_module_load@load.html
   [655]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-9/igt@xe_module_load@load.html
   [656]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-9/igt@xe_module_load@load.html
   [657]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-9/igt@xe_module_load@load.html
   [658]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-1/igt@xe_module_load@load.html
   [659]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-1/igt@xe_module_load@load.html
   [660]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-3/igt@xe_module_load@load.html
   [661]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-6/igt@xe_module_load@load.html
   [662]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-4/igt@xe_module_load@load.html
   [663]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-2/igt@xe_module_load@load.html
   [664]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-2/igt@xe_module_load@load.html
   [665]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-6/igt@xe_module_load@load.html
   [666]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-6/igt@xe_module_load@load.html
   [667]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-2/igt@xe_module_load@load.html
   [668]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-4/igt@xe_module_load@load.html
   [669]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-4/igt@xe_module_load@load.html
   [670]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-adlp-2/igt@xe_module_load@load.html
   [671]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-2/igt@xe_module_load@load.html
   [672]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-1/igt@xe_module_load@load.html
   [673]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@xe_module_load@load.html
   [674]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-1/igt@xe_module_load@load.html
   [675]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-1/igt@xe_module_load@load.html
   [676]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-1/igt@xe_module_load@load.html
   [677]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-2/igt@xe_module_load@load.html
   [678]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-2/igt@xe_module_load@load.html
   [679]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-8/igt@xe_module_load@load.html
   [680]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-3/igt@xe_module_load@load.html
   [681]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-3/igt@xe_module_load@load.html
   [682]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@xe_module_load@load.html
   [683]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@xe_module_load@load.html
   [684]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-4/igt@xe_module_load@load.html
   [685]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-8/igt@xe_module_load@load.html
   [686]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-8/igt@xe_module_load@load.html
   [687]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-6/igt@xe_module_load@load.html
   [688]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-6/igt@xe_module_load@load.html
   [689]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-8/igt@xe_module_load@load.html
   [690]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-9/igt@xe_module_load@load.html
   [691]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-9/igt@xe_module_load@load.html
   [692]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-9/igt@xe_module_load@load.html
   [693]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-6/igt@xe_module_load@load.html
   [694]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-6/igt@xe_module_load@load.html
   [695]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-3/igt@xe_module_load@load.html
   [696]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-adlp-3/igt@xe_module_load@load.html

  * igt@xe_oa@closed-fd-and-unmapped-access:
    - shard-dg2-set2:     [SKIP][697] ([Intel XE#4208]) -> [SKIP][698] ([Intel XE#3573]) +10 other tests skip
   [697]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@xe_oa@closed-fd-and-unmapped-access.html
   [698]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-466/igt@xe_oa@closed-fd-and-unmapped-access.html

  * igt@xe_oa@mmio-triggered-reports-read:
    - shard-dg2-set2:     [SKIP][699] ([Intel XE#4208]) -> [SKIP][700] ([Intel XE#5103])
   [699]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@xe_oa@mmio-triggered-reports-read.html
   [700]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-432/igt@xe_oa@mmio-triggered-reports-read.html

  * igt@xe_oa@polling-small-buf:
    - shard-dg2-set2:     [SKIP][701] ([Intel XE#3573]) -> [SKIP][702] ([Intel XE#4208]) +10 other tests skip
   [701]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-436/igt@xe_oa@polling-small-buf.html
   [702]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@xe_oa@polling-small-buf.html

  * igt@xe_pat@pat-index-xe2:
    - shard-dg2-set2:     [SKIP][703] ([Intel XE#4208]) -> [SKIP][704] ([Intel XE#977])
   [703]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@xe_pat@pat-index-xe2.html
   [704]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-464/igt@xe_pat@pat-index-xe2.html

  * igt@xe_pat@pat-index-xelpg:
    - shard-dg2-set2:     [SKIP][705] ([Intel XE#979]) -> [SKIP][706] ([Intel XE#4208])
   [705]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-464/igt@xe_pat@pat-index-xelpg.html
   [706]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@xe_pat@pat-index-xelpg.html

  * igt@xe_pm@d3cold-basic:
    - shard-dg2-set2:     [SKIP][707] ([Intel XE#2284] / [Intel XE#366]) -> [SKIP][708] ([Intel XE#4208])
   [707]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-436/igt@xe_pm@d3cold-basic.html
   [708]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@xe_pm@d3cold-basic.html

  * igt@xe_pm@d3cold-mocs:
    - shard-dg2-set2:     [SKIP][709] ([Intel XE#4208]) -> [SKIP][710] ([Intel XE#2284])
   [709]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@xe_pm@d3cold-mocs.html
   [710]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-463/igt@xe_pm@d3cold-mocs.html

  * igt@xe_pmu@fn-engine-activity-load:
    - shard-dg2-set2:     [SKIP][711] ([Intel XE#4650]) -> [SKIP][712] ([Intel XE#4208])
   [711]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-432/igt@xe_pmu@fn-engine-activity-load.html
   [712]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@xe_pmu@fn-engine-activity-load.html

  * igt@xe_pmu@fn-engine-activity-sched-if-idle:
    - shard-dg2-set2:     [SKIP][713] ([Intel XE#4208]) -> [SKIP][714] ([Intel XE#4650])
   [713]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@xe_pmu@fn-engine-activity-sched-if-idle.html
   [714]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@xe_pmu@fn-engine-activity-sched-if-idle.html

  * igt@xe_pxp@display-pxp-fb:
    - shard-dg2-set2:     [SKIP][715] ([Intel XE#4733]) -> [SKIP][716] ([Intel XE#4208]) +1 other test skip
   [715]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-432/igt@xe_pxp@display-pxp-fb.html
   [716]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@xe_pxp@display-pxp-fb.html

  * igt@xe_pxp@pxp-stale-bo-bind-post-rpm:
    - shard-dg2-set2:     [SKIP][717] ([Intel XE#4208]) -> [SKIP][718] ([Intel XE#4733]) +2 other tests skip
   [717]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-435/igt@xe_pxp@pxp-stale-bo-bind-post-rpm.html
   [718]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-464/igt@xe_pxp@pxp-stale-bo-bind-post-rpm.html

  * igt@xe_query@multigpu-query-invalid-cs-cycles:
    - shard-dg2-set2:     [SKIP][719] ([Intel XE#4208]) -> [SKIP][720] ([Intel XE#944]) +2 other tests skip
   [719]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@xe_query@multigpu-query-invalid-cs-cycles.html
   [720]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-436/igt@xe_query@multigpu-query-invalid-cs-cycles.html

  * igt@xe_query@multigpu-query-invalid-extension:
    - shard-dg2-set2:     [SKIP][721] ([Intel XE#944]) -> [SKIP][722] ([Intel XE#4208]) +2 other tests skip
   [721]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-436/igt@xe_query@multigpu-query-invalid-extension.html
   [722]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-434/igt@xe_query@multigpu-query-invalid-extension.html

  * igt@xe_sriov_auto_provisioning@fair-allocation:
    - shard-dg2-set2:     [SKIP][723] ([Intel XE#4208]) -> [SKIP][724] ([Intel XE#4130])
   [723]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-434/igt@xe_sriov_auto_provisioning@fair-allocation.html
   [724]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-432/igt@xe_sriov_auto_provisioning@fair-allocation.html

  * igt@xe_sriov_auto_provisioning@selfconfig-basic:
    - shard-dg2-set2:     [SKIP][725] ([Intel XE#4130]) -> [SKIP][726] ([Intel XE#4208])
   [725]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578/shard-dg2-432/igt@xe_sriov_auto_provisioning@selfconfig-basic.html
   [726]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/shard-dg2-435/igt@xe_sriov_auto_provisioning@selfconfig-basic.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
  [Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1126
  [Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
  [Intel XE#1129]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1129
  [Intel XE#1135]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1135
  [Intel XE#1137]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1137
  [Intel XE#1138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1138
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1280]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1280
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
  [Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1428
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
  [Intel XE#1512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1512
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
  [Intel XE#1948]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1948
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
  [Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
  [Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
  [Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
  [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2351
  [Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
  [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
  [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
  [Intel XE#255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/255
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
  [Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925
  [Intel XE#2938]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2938
  [Intel XE#2939]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2939
  [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
  [Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
  [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
  [Intel XE#3124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3124
  [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
  [Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
  [Intel XE#3278]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3278
  [Intel XE#3279]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3279
  [Intel XE#330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/330
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3309
  [Intel XE#3325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3325
  [Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3442
  [Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
  [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
  [Intel XE#3658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3658
  [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
  [Intel XE#379]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/379
  [Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876
  [Intel XE#3884]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3884
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#3908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3908
  [Intel XE#3970]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3970
  [Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
  [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
  [Intel XE#4208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4208
  [Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
  [Intel XE#4294]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4294
  [Intel XE#4298]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4298
  [Intel XE#4302]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4302
  [Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
  [Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
  [Intel XE#4356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4356
  [Intel XE#4367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4367
  [Intel XE#4417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4417
  [Intel XE#4418]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4418
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4459
  [Intel XE#4519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4519
  [Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
  [Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
  [Intel XE#4650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4650
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4757]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4757
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#488]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/488
  [Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
  [Intel XE#4917]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4917
  [Intel XE#4921]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4921
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5007
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5100]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5100
  [Intel XE#5103]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5103
  [Intel XE#5191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5191
  [Intel XE#5213]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5213
  [Intel XE#5300]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5300
  [Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
  [Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466
  [Intel XE#5488]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5488
  [Intel XE#5503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5503
  [Intel XE#5530]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5530
  [Intel XE#5561]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5561
  [Intel XE#5563]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5563
  [Intel XE#5564]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5564
  [Intel XE#5565]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5565
  [Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
  [Intel XE#5594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5594
  [Intel XE#5607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5607
  [Intel XE#5612]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5612
  [Intel XE#5613]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5613
  [Intel XE#5624]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5624
  [Intel XE#5626]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5626
  [Intel XE#5694]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5694
  [Intel XE#5742]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5742
  [Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579
  [Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
  [Intel XE#5890]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5890
  [Intel XE#5893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5893
  [Intel XE#599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/599
  [Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
  [Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
  [Intel XE#619]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/619
  [Intel XE#623]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/623
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/658
  [Intel XE#664]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/664
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#701]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/701
  [Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718
  [Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/908
  [Intel XE#911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/911
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
  [Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
  [i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575


Build changes
-------------

  * IGT: IGT_8511 -> IGT_8512
  * Linux: xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578 -> xe-pw-153594v2

  IGT_8511: 8511
  IGT_8512: 8512
  xe-3623-3a2760f3080e5188b19cdb4640cec5eb0926d578: 3a2760f3080e5188b19cdb4640cec5eb0926d578
  xe-pw-153594v2: 153594v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153594v2/index.html

[-- Attachment #2: Type: text/html, Size: 207913 bytes --]

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v2 1/6] drm/xe/configfs: Extract function to parse engine
  2025-08-27 22:35 ` [PATCH v2 1/6] drm/xe/configfs: Extract function to parse engine Lucas De Marchi
@ 2025-09-02  5:57   ` Raag Jadav
  0 siblings, 0 replies; 20+ messages in thread
From: Raag Jadav @ 2025-09-02  5:57 UTC (permalink / raw)
  To: Lucas De Marchi
  Cc: intel-xe, Stuart Summers, Matt Roper, Riana Tauro, Rodrigo Vivi,
	Umesh Nerlige Ramappa, Tvrtko Ursulin

On Wed, Aug 27, 2025 at 03:35:26PM -0700, Lucas De Marchi wrote:
> Move the part that copies the engine to a local buffer so it can be
> shared in future for other configfs attributes parsing an engine.
> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>

Reviewed-by: Raag Jadav <raag.jadav@intel.com>

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v2 2/6] drm/xe/configfs: Allow to select by class only
  2025-08-27 22:35 ` [PATCH v2 2/6] drm/xe/configfs: Allow to select by class only Lucas De Marchi
@ 2025-09-02  6:00   ` Raag Jadav
  2025-09-03 22:42     ` Lucas De Marchi
  0 siblings, 1 reply; 20+ messages in thread
From: Raag Jadav @ 2025-09-02  6:00 UTC (permalink / raw)
  To: Lucas De Marchi
  Cc: intel-xe, Stuart Summers, Matt Roper, Riana Tauro, Rodrigo Vivi,
	Umesh Nerlige Ramappa, Tvrtko Ursulin

On Wed, Aug 27, 2025 at 03:35:27PM -0700, Lucas De Marchi wrote:
> For a future configfs attribute, it's desirable to select by engine mask
> only as the instance doesn't make sense.
> 
> If the caller is only interested in class, allow lookup_engine_mask() to
> return the matched index if mask is NULL. This allows parse_engine() to
> still return an item if the caller wants to allow parsing a class-only
> string like "rcs", "bcs", "ccs", etc.
> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_configfs.c | 53 ++++++++++++++++++++++++++++------------
>  1 file changed, 37 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
> index 6cccab5456811..a1d230007cc05 100644
> --- a/drivers/gpu/drm/xe/xe_configfs.c
> +++ b/drivers/gpu/drm/xe/xe_configfs.c
> @@ -150,6 +150,7 @@ static void set_device_defaults(struct xe_config_device *config)
>  struct engine_info {
>  	const char *cls;
>  	u64 mask;
> +	enum xe_engine_class engine_class;
>  };
>  
>  /* Some helpful macros to aid on the sizing of buffer allocation when parsing */
> @@ -157,12 +158,12 @@ struct engine_info {
>  #define MAX_ENGINE_INSTANCE_CHARS 2
>  
>  static const struct engine_info engine_info[] = {
> -	{ .cls = "rcs", .mask = XE_HW_ENGINE_RCS_MASK },
> -	{ .cls = "bcs", .mask = XE_HW_ENGINE_BCS_MASK },
> -	{ .cls = "vcs", .mask = XE_HW_ENGINE_VCS_MASK },
> -	{ .cls = "vecs", .mask = XE_HW_ENGINE_VECS_MASK },
> -	{ .cls = "ccs", .mask = XE_HW_ENGINE_CCS_MASK },
> -	{ .cls = "gsccs", .mask = XE_HW_ENGINE_GSCCS_MASK },
> +	{ .cls = "rcs", .mask = XE_HW_ENGINE_RCS_MASK, XE_ENGINE_CLASS_RENDER },
> +	{ .cls = "bcs", .mask = XE_HW_ENGINE_BCS_MASK, XE_ENGINE_CLASS_COPY },
> +	{ .cls = "vcs", .mask = XE_HW_ENGINE_VCS_MASK, XE_ENGINE_CLASS_VIDEO_DECODE },
> +	{ .cls = "vecs", .mask = XE_HW_ENGINE_VECS_MASK, XE_ENGINE_CLASS_VIDEO_ENHANCE },
> +	{ .cls = "ccs", .mask = XE_HW_ENGINE_CCS_MASK, XE_ENGINE_CLASS_COMPUTE },
> +	{ .cls = "gsccs", .mask = XE_HW_ENGINE_GSCCS_MASK, XE_ENGINE_CLASS_OTHER },

Should this have ".engine_class =" for consistency?

>  static struct xe_config_group_device *to_xe_config_group_device(struct config_item *item)
> @@ -251,7 +252,19 @@ static ssize_t engines_allowed_show(struct config_item *item, char *page)
>  	return p - page;
>  }
>  
> -static bool lookup_engine_mask(const char *pattern, u64 *mask)
> +/*
> + * Lookup engine index from engine_info. If @mask is not NULL, reduce the mask
> + * according to the instance in @pattern.
> + *
> + * Examples of inputs:
> + *
> + * - lookup_engine_mask("rcs0", &mask): return "rcs" index from @engine_info and
> + *   mask == BIT_ULL(XE_HW_ENGINE_RCS0)
> + * - lookup_engine_mask("rcs*", &mask): return "rcs" index from @engine_info and
> + *   mask == XE_HW_ENGINE_RCS_MASK
> + * - lookup_engine_mask("rcs", NULL): return "rcs" index from @engine_info
> + */
> +static int lookup_engine_mask(const char *pattern, u64 *mask)

Should this now be lookup_engine_index()?

>  	for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
>  		u8 instance;
> @@ -261,30 +274,34 @@ static bool lookup_engine_mask(const char *pattern, u64 *mask)
>  			continue;
>  
>  		pattern += strlen(engine_info[i].cls);
> +		if (!mask && !*pattern)
> +			return i;
>  
>  		if (!strcmp(pattern, "*")) {
>  			*mask = engine_info[i].mask;
> -			return true;
> +			return i;
>  		}
>  
>  		if (kstrtou8(pattern, 10, &instance))
> -			return false;
> +			return -ENOENT;
>  
>  		bit = __ffs64(engine_info[i].mask) + instance;
>  		if (bit >= fls64(engine_info[i].mask))
> -			return false;
> +			return -ENOENT;
>  
>  		*mask = BIT_ULL(bit);
> -		return true;
> +		return i;
>  	}
>  
> -	return false;
> +	return -ENOENT;
>  }
>  
> -static int parse_engine(const char *s, const char *end_chars, u64 *mask)
> +static int parse_engine(const char *s, const char *end_chars, u64 *mask,
> +			const struct engine_info **info)

Considering we're parsing a single entry, do we really need a double pointer?

Raag

>  {
>  	char buf[MAX_ENGINE_CLASS_CHARS + MAX_ENGINE_INSTANCE_CHARS + 1];
>  	size_t len;
> +	int idx;
>  
>  	len = strcspn(s, end_chars);
>  	if (len >= sizeof(buf))
> @@ -293,8 +310,12 @@ static int parse_engine(const char *s, const char *end_chars, u64 *mask)
>  	memcpy(buf, s, len);
>  	buf[len] = '\0';
>  
> -	if (!lookup_engine_mask(buf, mask))
> -		return -ENOENT;
> +	idx = lookup_engine_mask(buf, mask);
> +	if (idx < 0)
> +		return idx;
> +
> +	if (info)
> +		*info = &engine_info[idx];
>  
>  	return len;
>  }
> @@ -307,7 +328,7 @@ static ssize_t engines_allowed_store(struct config_item *item, const char *page,
>  	u64 mask, val = 0;
>  
>  	for (p = 0; p < len; p += patternlen + 1) {
> -		patternlen = parse_engine(page + p, ",\n", &mask);
> +		patternlen = parse_engine(page + p, ",\n", &mask, NULL);
>  		if (patternlen < 0)
>  			return -EINVAL;
>  
> 
> -- 
> 2.50.1
> 

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v2 4/6] drm/xe/configfs: Fix documentation warning
  2025-08-27 22:35 ` [PATCH v2 4/6] drm/xe/configfs: Fix documentation warning Lucas De Marchi
@ 2025-09-02  6:04   ` Raag Jadav
  0 siblings, 0 replies; 20+ messages in thread
From: Raag Jadav @ 2025-09-02  6:04 UTC (permalink / raw)
  To: Lucas De Marchi
  Cc: intel-xe, Stuart Summers, Matt Roper, Riana Tauro, Rodrigo Vivi,
	Umesh Nerlige Ramappa, Tvrtko Ursulin

On Wed, Aug 27, 2025 at 03:35:29PM -0700, Lucas De Marchi wrote:
> Fix this warning while building the documentation:
> 
> 	Documentation/gpu/xe/xe_configfs:9: drivers/gpu/drm/xe/xe_configfs.c:138:
> 	WARNING: Definition list ends without a blank line; unexpected unindent.
> 
> That also makes it format it better in the output.

I found the heading adornments for "Overview" to be a bit off, which we also
might want to adjust for consistency.

> Fixes: e2b33fce5eb0 ("drm/xe/configfs: Improve documentation steps")
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>

Reviewed-by: Raag Jadav <raag.jadav@intel.com>

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v2 3/6] drm/xe: Update workaround documentation
  2025-08-27 22:35 ` [PATCH v2 3/6] drm/xe: Update workaround documentation Lucas De Marchi
@ 2025-09-02 18:49   ` Summers, Stuart
  2025-09-02 20:01     ` Lucas De Marchi
  0 siblings, 1 reply; 20+ messages in thread
From: Summers, Stuart @ 2025-09-02 18:49 UTC (permalink / raw)
  To: intel-xe@lists.freedesktop.org, De Marchi, Lucas
  Cc: Vivi, Rodrigo, Tauro, Riana, Nerlige Ramappa, Umesh,
	Roper, Matthew D, tursulin@ursulin.net

On Wed, 2025-08-27 at 15:35 -0700, Lucas De Marchi wrote:
> Bring it up to reality, better documenting the existing batch
> buffers,
> OOB rules and fixing some typos.
> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_wa.c | 45 ++++++++++++++++++++++++++++++++----
> ---------
>  1 file changed, 32 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
> index 52c7df4c3afd8..a19cf811b580a 100644
> --- a/drivers/gpu/drm/xe/xe_wa.c
> +++ b/drivers/gpu/drm/xe/xe_wa.c
> @@ -39,7 +39,8 @@
>   *   Register Immediate commands) once when initializing the device
> and saved in
>   *   the default context. That default context is then used on every
> context
>   *   creation to have a "primed golden context", i.e. a context
> image that
> - *   already contains the changes needed to all the registers.
> + *   already contains the changes needed to all the registers. See
> + *   drivers/gpu/drm/xe/xe_lrc.c for default context handling.
>   *
>   * - Engine workarounds: the list of these WAs is applied whenever
> the specific
>   *   engine is reset. It's also possible that a set of engine
> classes share a
> @@ -48,10 +49,10 @@
>   *   them need to keeep the workaround programming: the approach
> taken in the
>   *   driver is to tie those workarounds to the first compute/render
> engine that
>   *   is registered.  When executing with GuC submission, engine
> resets are
> - *   outside of kernel driver control, hence the list of registers
> involved in
> + *   outside of kernel driver control, hence the list of registers
> involved is
>   *   written once, on engine initialization, and then passed to GuC,
> that
>   *   saves/restores their values before/after the reset takes place.
> See
> - *   ``drivers/gpu/drm/xe/xe_guc_ads.c`` for reference.
> + *   drivers/gpu/drm/xe/xe_guc_ads.c for reference.
>   *
>   * - GT workarounds: the list of these WAs is applied whenever these
> registers
>   *   revert to their default values: on GPU reset, suspend/resume
> [1]_, etc.
> @@ -66,21 +67,39 @@
>   *   hardware on every HW context restore. These buffers are created
> and
>   *   programmed in the default context so the hardware always go
> through those
>   *   programming sequences when switching contexts. The support for
> workaround
> - *   batchbuffers is enabled these hardware mechanisms:
> + *   batchbuffers is enabled via these hardware mechanisms:
>   *
> - *   #. INDIRECT_CTX: A batchbuffer and an offset are provided in
> the default
> - *      context, pointing the hardware to jump to that location when
> that offset
> - *      is reached in the context restore. Workaround batchbuffer in
> the driver
> - *      currently uses this mechanism for all platforms.
> + *   #. INDIRECT_CTX (also known as **mid context restore bb**): A
> batchbuffer
> + *      and an offset are provided in the default context, pointing
> the hardware
> + *      to jump to that location when that offset is reached in the
> context
> + *      restore.  When a context is being restored, this is executed
> after the
> + *      ring context, in the middle (or beginning) of the engine
> context image.
>   *
> - *   #. BB_PER_CTX_PTR: A batchbuffer is provided in the default
> context,
> - *      pointing the hardware to a buffer to continue executing
> after the
> - *      engine registers are restored in a context restore sequence.
> This is
> - *      currently not used in the driver.
> + *   #. BB_PER_CTX_PTR (also known as **post context restore bb**):
> A
> + *      batchbuffer is provided in the default context, pointing the
> hardware to
> + *      a buffer to continue executing after the engine registers
> are restored
> + *      in a context restore sequence.
> + *
> + *   Below is the timeline for a context restore sequence:
> + *
> + *   .. code::
> + *
> + *                        INDIRECT_CTX_OFFSET
> + *                   |----------->|
> + *      .------------.------------.-------------.------------.------
> --------.-----------.
> + *      |Ring        | Engine     | Mid-context | Engine     | Post-
> context | Ring      |
> + *      |Restore     | Restore (1)| BB Restore  | Restore (2)| BB
> Restore   | Execution |
> + *      `------------'------------'-------------'------------'------
> --------'-----------'

This is great. Thanks for adding the documentation here!

I'm not super happy per context pointer (PER_CTX_PTR) expands to "post
context restore), but I get we're also aligning with the hardware
descriptions.

Otherwise everything looks good here. Having the illustration is also
really helpful:
Reviewed-by: Stuart Summers <stuart.summers@intel.com>

>   *
>   * - Other/OOB:  There are WAs that, due to their nature, cannot be
> applied from
>   *   a central place. Those are peppered around the rest of the
> code, as needed.
> - *   Workarounds related to the display IP are the main example.
> + *   There's a central place to control which workarounds are
> enabled:
> + *   drivers/gpu/drm/xe/xe_wa_oob.rules for GT workarounds and
> + *   drivers/gpu/drm/xe/xe_device_wa_oob.rules for device/SoC
> workarounds.
> + *   These files only record which workarounds are enabled: during
> early device
> + *   initialization those rules are evaluated and recorded by the
> driver. Then
> + *   later the driver checks with ``XE_WA()`` and ``XE_DEVICE_WA()``
> to
> + *   implement them.
>   *
>   * .. [1] Technically, some registers are powercontext saved &
> restored, so they
>   *    survive a suspend/resume. In practice, writing them again is
> not too
> 


^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v2 3/6] drm/xe: Update workaround documentation
  2025-09-02 18:49   ` Summers, Stuart
@ 2025-09-02 20:01     ` Lucas De Marchi
  0 siblings, 0 replies; 20+ messages in thread
From: Lucas De Marchi @ 2025-09-02 20:01 UTC (permalink / raw)
  To: Summers, Stuart
  Cc: intel-xe@lists.freedesktop.org, Vivi,  Rodrigo, Tauro, Riana,
	Nerlige Ramappa, Umesh, Roper, Matthew D, tursulin@ursulin.net

On Tue, Sep 02, 2025 at 06:49:15PM +0000, Stuart Summers wrote:
>On Wed, 2025-08-27 at 15:35 -0700, Lucas De Marchi wrote:
>> Bring it up to reality, better documenting the existing batch
>> buffers,
>> OOB rules and fixing some typos.
>>
>> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>> ---
>>  drivers/gpu/drm/xe/xe_wa.c | 45 ++++++++++++++++++++++++++++++++----
>> ---------
>>  1 file changed, 32 insertions(+), 13 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
>> index 52c7df4c3afd8..a19cf811b580a 100644
>> --- a/drivers/gpu/drm/xe/xe_wa.c
>> +++ b/drivers/gpu/drm/xe/xe_wa.c
>> @@ -39,7 +39,8 @@
>>   *   Register Immediate commands) once when initializing the device
>> and saved in
>>   *   the default context. That default context is then used on every
>> context
>>   *   creation to have a "primed golden context", i.e. a context
>> image that
>> - *   already contains the changes needed to all the registers.
>> + *   already contains the changes needed to all the registers. See
>> + *   drivers/gpu/drm/xe/xe_lrc.c for default context handling.
>>   *
>>   * - Engine workarounds: the list of these WAs is applied whenever
>> the specific
>>   *   engine is reset. It's also possible that a set of engine
>> classes share a
>> @@ -48,10 +49,10 @@
>>   *   them need to keeep the workaround programming: the approach
>> taken in the
>>   *   driver is to tie those workarounds to the first compute/render
>> engine that
>>   *   is registered.  When executing with GuC submission, engine
>> resets are
>> - *   outside of kernel driver control, hence the list of registers
>> involved in
>> + *   outside of kernel driver control, hence the list of registers
>> involved is
>>   *   written once, on engine initialization, and then passed to GuC,
>> that
>>   *   saves/restores their values before/after the reset takes place.
>> See
>> - *   ``drivers/gpu/drm/xe/xe_guc_ads.c`` for reference.
>> + *   drivers/gpu/drm/xe/xe_guc_ads.c for reference.
>>   *
>>   * - GT workarounds: the list of these WAs is applied whenever these
>> registers
>>   *   revert to their default values: on GPU reset, suspend/resume
>> [1]_, etc.
>> @@ -66,21 +67,39 @@
>>   *   hardware on every HW context restore. These buffers are created
>> and
>>   *   programmed in the default context so the hardware always go
>> through those
>>   *   programming sequences when switching contexts. The support for
>> workaround
>> - *   batchbuffers is enabled these hardware mechanisms:
>> + *   batchbuffers is enabled via these hardware mechanisms:
>>   *
>> - *   #. INDIRECT_CTX: A batchbuffer and an offset are provided in
>> the default
>> - *      context, pointing the hardware to jump to that location when
>> that offset
>> - *      is reached in the context restore. Workaround batchbuffer in
>> the driver
>> - *      currently uses this mechanism for all platforms.
>> + *   #. INDIRECT_CTX (also known as **mid context restore bb**): A
>> batchbuffer
>> + *      and an offset are provided in the default context, pointing
>> the hardware
>> + *      to jump to that location when that offset is reached in the
>> context
>> + *      restore.  When a context is being restored, this is executed
>> after the
>> + *      ring context, in the middle (or beginning) of the engine
>> context image.
>>   *
>> - *   #. BB_PER_CTX_PTR: A batchbuffer is provided in the default
>> context,
>> - *      pointing the hardware to a buffer to continue executing
>> after the
>> - *      engine registers are restored in a context restore sequence.
>> This is
>> - *      currently not used in the driver.
>> + *   #. BB_PER_CTX_PTR (also known as **post context restore bb**):
>> A
>> + *      batchbuffer is provided in the default context, pointing the
>> hardware to
>> + *      a buffer to continue executing after the engine registers
>> are restored
>> + *      in a context restore sequence.
>> + *
>> + *   Below is the timeline for a context restore sequence:
>> + *
>> + *   .. code::
>> + *
>> + *                        INDIRECT_CTX_OFFSET
>> + *                   |----------->|
>> + *      .------------.------------.-------------.------------.------
>> --------.-----------.
>> + *      |Ring        | Engine     | Mid-context | Engine     | Post-
>> context | Ring      |
>> + *      |Restore     | Restore (1)| BB Restore  | Restore (2)| BB
>> Restore   | Execution |
>> + *      `------------'------------'-------------'------------'------
>> --------'-----------'
>
>This is great. Thanks for adding the documentation here!
>
>I'm not super happy per context pointer (PER_CTX_PTR) expands to "post
>context restore), but I get we're also aligning with the hardware
>descriptions.
>
>Otherwise everything looks good here. Having the illustration is also
>really helpful:
>Reviewed-by: Stuart Summers <stuart.summers@intel.com>

Probably good to add a bspec reference here as I myself often have a
hard time to find this page

Bspec: 60122


thanks
Lucas De Marchi

>
>>   *
>>   * - Other/OOB:  There are WAs that, due to their nature, cannot be
>> applied from
>>   *   a central place. Those are peppered around the rest of the
>> code, as needed.
>> - *   Workarounds related to the display IP are the main example.
>> + *   There's a central place to control which workarounds are
>> enabled:
>> + *   drivers/gpu/drm/xe/xe_wa_oob.rules for GT workarounds and
>> + *   drivers/gpu/drm/xe/xe_device_wa_oob.rules for device/SoC
>> workarounds.
>> + *   These files only record which workarounds are enabled: during
>> early device
>> + *   initialization those rules are evaluated and recorded by the
>> driver. Then
>> + *   later the driver checks with ``XE_WA()`` and ``XE_DEVICE_WA()``
>> to
>> + *   implement them.
>>   *
>>   * .. [1] Technically, some registers are powercontext saved &
>> restored, so they
>>   *    survive a suspend/resume. In practice, writing them again is
>> not too
>>
>

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v2 2/6] drm/xe/configfs: Allow to select by class only
  2025-09-02  6:00   ` Raag Jadav
@ 2025-09-03 22:42     ` Lucas De Marchi
  0 siblings, 0 replies; 20+ messages in thread
From: Lucas De Marchi @ 2025-09-03 22:42 UTC (permalink / raw)
  To: Raag Jadav
  Cc: intel-xe, Stuart Summers, Matt Roper, Riana Tauro, Rodrigo Vivi,
	Umesh Nerlige Ramappa, Tvrtko Ursulin

On Tue, Sep 02, 2025 at 08:00:45AM +0200, Raag Jadav wrote:
>On Wed, Aug 27, 2025 at 03:35:27PM -0700, Lucas De Marchi wrote:
>> For a future configfs attribute, it's desirable to select by engine mask
>> only as the instance doesn't make sense.
>>
>> If the caller is only interested in class, allow lookup_engine_mask() to
>> return the matched index if mask is NULL. This allows parse_engine() to
>> still return an item if the caller wants to allow parsing a class-only
>> string like "rcs", "bcs", "ccs", etc.
>>
>> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>> ---
>>  drivers/gpu/drm/xe/xe_configfs.c | 53 ++++++++++++++++++++++++++++------------
>>  1 file changed, 37 insertions(+), 16 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
>> index 6cccab5456811..a1d230007cc05 100644
>> --- a/drivers/gpu/drm/xe/xe_configfs.c
>> +++ b/drivers/gpu/drm/xe/xe_configfs.c
>> @@ -150,6 +150,7 @@ static void set_device_defaults(struct xe_config_device *config)
>>  struct engine_info {
>>  	const char *cls;
>>  	u64 mask;
>> +	enum xe_engine_class engine_class;
>>  };
>>
>>  /* Some helpful macros to aid on the sizing of buffer allocation when parsing */
>> @@ -157,12 +158,12 @@ struct engine_info {
>>  #define MAX_ENGINE_INSTANCE_CHARS 2
>>
>>  static const struct engine_info engine_info[] = {
>> -	{ .cls = "rcs", .mask = XE_HW_ENGINE_RCS_MASK },
>> -	{ .cls = "bcs", .mask = XE_HW_ENGINE_BCS_MASK },
>> -	{ .cls = "vcs", .mask = XE_HW_ENGINE_VCS_MASK },
>> -	{ .cls = "vecs", .mask = XE_HW_ENGINE_VECS_MASK },
>> -	{ .cls = "ccs", .mask = XE_HW_ENGINE_CCS_MASK },
>> -	{ .cls = "gsccs", .mask = XE_HW_ENGINE_GSCCS_MASK },
>> +	{ .cls = "rcs", .mask = XE_HW_ENGINE_RCS_MASK, XE_ENGINE_CLASS_RENDER },
>> +	{ .cls = "bcs", .mask = XE_HW_ENGINE_BCS_MASK, XE_ENGINE_CLASS_COPY },
>> +	{ .cls = "vcs", .mask = XE_HW_ENGINE_VCS_MASK, XE_ENGINE_CLASS_VIDEO_DECODE },
>> +	{ .cls = "vecs", .mask = XE_HW_ENGINE_VECS_MASK, XE_ENGINE_CLASS_VIDEO_ENHANCE },
>> +	{ .cls = "ccs", .mask = XE_HW_ENGINE_CCS_MASK, XE_ENGINE_CLASS_COMPUTE },
>> +	{ .cls = "gsccs", .mask = XE_HW_ENGINE_GSCCS_MASK, XE_ENGINE_CLASS_OTHER },
>
>Should this have ".engine_class =" for consistency?
>
>>  static struct xe_config_group_device *to_xe_config_group_device(struct config_item *item)
>> @@ -251,7 +252,19 @@ static ssize_t engines_allowed_show(struct config_item *item, char *page)
>>  	return p - page;
>>  }
>>
>> -static bool lookup_engine_mask(const char *pattern, u64 *mask)
>> +/*
>> + * Lookup engine index from engine_info. If @mask is not NULL, reduce the mask
>> + * according to the instance in @pattern.
>> + *
>> + * Examples of inputs:
>> + *
>> + * - lookup_engine_mask("rcs0", &mask): return "rcs" index from @engine_info and
>> + *   mask == BIT_ULL(XE_HW_ENGINE_RCS0)
>> + * - lookup_engine_mask("rcs*", &mask): return "rcs" index from @engine_info and
>> + *   mask == XE_HW_ENGINE_RCS_MASK
>> + * - lookup_engine_mask("rcs", NULL): return "rcs" index from @engine_info
>> + */
>> +static int lookup_engine_mask(const char *pattern, u64 *mask)
>
>Should this now be lookup_engine_index()?

engine_index may be confusing since this is not about the index/instance
of the engine, it's just the index in the engine_info array.

Maybe lookup_engine_info() and return a pointer would be clearer.

I didn't want to separate the engine class vs instance parsing, but it
could be clearer that way. I will take another look.

thanks
Lucas De Marchi

>
>>  	for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
>>  		u8 instance;
>> @@ -261,30 +274,34 @@ static bool lookup_engine_mask(const char *pattern, u64 *mask)
>>  			continue;
>>
>>  		pattern += strlen(engine_info[i].cls);
>> +		if (!mask && !*pattern)
>> +			return i;
>>
>>  		if (!strcmp(pattern, "*")) {
>>  			*mask = engine_info[i].mask;
>> -			return true;
>> +			return i;
>>  		}
>>
>>  		if (kstrtou8(pattern, 10, &instance))
>> -			return false;
>> +			return -ENOENT;
>>
>>  		bit = __ffs64(engine_info[i].mask) + instance;
>>  		if (bit >= fls64(engine_info[i].mask))
>> -			return false;
>> +			return -ENOENT;
>>
>>  		*mask = BIT_ULL(bit);
>> -		return true;
>> +		return i;
>>  	}
>>
>> -	return false;
>> +	return -ENOENT;
>>  }
>>
>> -static int parse_engine(const char *s, const char *end_chars, u64 *mask)
>> +static int parse_engine(const char *s, const char *end_chars, u64 *mask,
>> +			const struct engine_info **info)
>
>Considering we're parsing a single entry, do we really need a double pointer?
>
>Raag
>
>>  {
>>  	char buf[MAX_ENGINE_CLASS_CHARS + MAX_ENGINE_INSTANCE_CHARS + 1];
>>  	size_t len;
>> +	int idx;
>>
>>  	len = strcspn(s, end_chars);
>>  	if (len >= sizeof(buf))
>> @@ -293,8 +310,12 @@ static int parse_engine(const char *s, const char *end_chars, u64 *mask)
>>  	memcpy(buf, s, len);
>>  	buf[len] = '\0';
>>
>> -	if (!lookup_engine_mask(buf, mask))
>> -		return -ENOENT;
>> +	idx = lookup_engine_mask(buf, mask);
>> +	if (idx < 0)
>> +		return idx;
>> +
>> +	if (info)
>> +		*info = &engine_info[idx];
>>
>>  	return len;
>>  }
>> @@ -307,7 +328,7 @@ static ssize_t engines_allowed_store(struct config_item *item, const char *page,
>>  	u64 mask, val = 0;
>>
>>  	for (p = 0; p < len; p += patternlen + 1) {
>> -		patternlen = parse_engine(page + p, ",\n", &mask);
>> +		patternlen = parse_engine(page + p, ",\n", &mask, NULL);
>>  		if (patternlen < 0)
>>  			return -EINVAL;
>>
>>
>> --
>> 2.50.1
>>

^ permalink raw reply	[flat|nested] 20+ messages in thread

end of thread, other threads:[~2025-09-03 22:43 UTC | newest]

Thread overview: 20+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-08-27 22:35 [PATCH v2 0/6] drm/xe: Add user commands to WA BB via configfs Lucas De Marchi
2025-08-27 22:35 ` [PATCH v2 1/6] drm/xe/configfs: Extract function to parse engine Lucas De Marchi
2025-09-02  5:57   ` Raag Jadav
2025-08-27 22:35 ` [PATCH v2 2/6] drm/xe/configfs: Allow to select by class only Lucas De Marchi
2025-09-02  6:00   ` Raag Jadav
2025-09-03 22:42     ` Lucas De Marchi
2025-08-27 22:35 ` [PATCH v2 3/6] drm/xe: Update workaround documentation Lucas De Marchi
2025-09-02 18:49   ` Summers, Stuart
2025-09-02 20:01     ` Lucas De Marchi
2025-08-27 22:35 ` [PATCH v2 4/6] drm/xe/configfs: Fix documentation warning Lucas De Marchi
2025-09-02  6:04   ` Raag Jadav
2025-08-27 22:35 ` [PATCH v2 5/6] drm/xe/lrc: Allow to add user commands on context switch Lucas De Marchi
2025-08-28  2:54   ` Lucas De Marchi
2025-08-27 22:35 ` [PATCH v2 6/6] drm/xe/configfs: Add post context restore bb Lucas De Marchi
2025-08-28  1:49 ` ✗ CI.checkpatch: warning for drm/xe: Add user commands to WA BB via configfs Patchwork
2025-08-28  1:49 ` ✗ CI.KUnit: failure " Patchwork
2025-08-28  3:00 ` ✗ CI.checkpatch: warning for drm/xe: Add user commands to WA BB via configfs (rev2) Patchwork
2025-08-28  3:01 ` ✓ CI.KUnit: success " Patchwork
2025-08-28  3:39 ` ✓ Xe.CI.BAT: " Patchwork
2025-08-28  4:45 ` ✗ Xe.CI.Full: failure " Patchwork

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