From: Matthew Brost <matthew.brost@intel.com>
To: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: <intel-xe@lists.freedesktop.org>
Subject: Re: [PATCH 2/5] drm/xe/guc: Use proper flag definitions when registering context
Date: Thu, 4 Sep 2025 12:36:57 -0700 [thread overview]
Message-ID: <aLnqWSFiQoaHnIX/@lstrano-desk.jf.intel.com> (raw)
In-Reply-To: <20250904192918.7346-3-michal.wajdeczko@intel.com>
On Thu, Sep 04, 2025 at 09:29:14PM +0200, Michal Wajdeczko wrote:
> In H2G action context type is specified in flags dword in bits 2:1.
> Use generic FIELD_PREP macro instead of misleading BIT logic.
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/xe_guc_fwif.h | 1 +
> drivers/gpu/drm/xe/xe_guc_submit.c | 6 ++----
> 2 files changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h
> index 0508f1064178..561e15e86d58 100644
> --- a/drivers/gpu/drm/xe/xe_guc_fwif.h
> +++ b/drivers/gpu/drm/xe/xe_guc_fwif.h
> @@ -65,6 +65,7 @@ struct guc_ctxt_registration_info {
> u32 hwlrca_hi;
> };
> #define CONTEXT_REGISTRATION_FLAG_KMD BIT(0)
> +#define CONTEXT_REGISTRATION_FLAG_TYPE GENMASK(2, 1)
>
> /* 32-bit KLV structure as used by policy updates and others */
> struct guc_klv_generic_dw_t {
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> index f2920b047b2c..3437206c4a55 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> @@ -558,10 +558,8 @@ static void register_exec_queue(struct xe_exec_queue *q, int ctx_type)
> info.engine_submit_mask = q->logical_mask;
> info.hwlrca_lo = lower_32_bits(xe_lrc_descriptor(lrc));
> info.hwlrca_hi = upper_32_bits(xe_lrc_descriptor(lrc));
> - info.flags = CONTEXT_REGISTRATION_FLAG_KMD;
> -
> - if (ctx_type != GUC_CONTEXT_NORMAL)
> - info.flags |= BIT(ctx_type);
> + info.flags = CONTEXT_REGISTRATION_FLAG_KMD |
> + FIELD_PREP(CONTEXT_REGISTRATION_FLAG_TYPE, ctx_type);
>
> if (xe_exec_queue_is_parallel(q)) {
> u64 ggtt_addr = xe_lrc_parallel_ggtt_addr(lrc);
> --
> 2.47.1
>
next prev parent reply other threads:[~2025-09-04 19:37 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-04 19:29 [PATCH 0/5] Small improvements around VF CCS Michal Wajdeczko
2025-09-04 19:29 ` [PATCH 1/5] drm/xe/guc: Rename xe_guc_register_exec_queue Michal Wajdeczko
2025-09-05 7:05 ` K V P, Satyanarayana
2025-09-04 19:29 ` [PATCH 2/5] drm/xe/guc: Use proper flag definitions when registering context Michal Wajdeczko
2025-09-04 19:36 ` Matthew Brost [this message]
2025-09-04 19:29 ` [PATCH 3/5] drm/xe/vf: Drop IS_VF_CCS_INIT_NEEDED macro Michal Wajdeczko
2025-09-05 3:27 ` Matthew Brost
2025-09-05 7:18 ` K V P, Satyanarayana
2025-09-04 19:29 ` [PATCH 4/5] drm/xe/vf: Use single check when calling VF CCS functions Michal Wajdeczko
2025-09-05 7:40 ` K V P, Satyanarayana
2025-09-04 19:29 ` [PATCH 5/5] drm/xe/bo: Add xe_bo_has_valid_ccs_bb helper Michal Wajdeczko
2025-09-04 20:31 ` Matthew Brost
2025-09-05 7:42 ` K V P, Satyanarayana
2025-09-04 19:36 ` ✓ CI.KUnit: success for Small improvements around VF CCS Patchwork
2025-09-04 20:19 ` ✓ Xe.CI.BAT: " Patchwork
2025-09-05 11:55 ` ✗ Xe.CI.Full: failure " Patchwork
2025-09-05 12:34 ` Michal Wajdeczko
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