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d="scan'208";a="180718553" Received: from pgcooper-mobl3.ger.corp.intel.com (HELO localhost) ([10.245.244.255]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Sep 2025 10:33:18 -0700 Date: Thu, 18 Sep 2025 20:33:15 +0300 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Jani Nikula Cc: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Subject: Re: [PATCH 4/5] drm/i915/irq: rename de_irq_mask[] to de_pipe_imr_mask[] Message-ID: References: <55bbf17df871331c2c34af748cf9cf812d6a65d7.1758198300.git.jani.nikula@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <55bbf17df871331c2c34af748cf9cf812d6a65d7.1758198300.git.jani.nikula@intel.com> X-Patchwork-Hint: comment Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Thu, Sep 18, 2025 at 03:25:47PM +0300, Jani Nikula wrote: > Rename the struct intel_display de_irq_mask[] member to > de_pipe_imr_mask[] to reflect its usage more accurately. > > Signed-off-by: Jani Nikula Reviewed-by: Ville Syrjälä > --- > .../gpu/drm/i915/display/intel_display_core.h | 6 +++++- > drivers/gpu/drm/i915/display/intel_display_irq.c | 16 ++++++++-------- > 2 files changed, 13 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h > index 4a52bbe327b7..df4da52cbdb3 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_core.h > +++ b/drivers/gpu/drm/i915/display/intel_display_core.h > @@ -485,7 +485,11 @@ struct intel_display { > * bitfield. > */ > u32 ilk_de_imr_mask; > - u32 de_irq_mask[I915_MAX_PIPES]; > + /* > + * Cached value of BDW+ DE pipe IMR to avoid reads in updating > + * the bitfield. > + */ > + u32 de_pipe_imr_mask[I915_MAX_PIPES]; > u32 pipestat_irq_mask[I915_MAX_PIPES]; > } irq; > > diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c > index f4ba9b08e044..93c2e42f98c9 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_irq.c > +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c > @@ -215,13 +215,13 @@ static void bdw_update_pipe_irq(struct intel_display *display, > if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv))) > return; > > - new_val = display->irq.de_irq_mask[pipe]; > + new_val = display->irq.de_pipe_imr_mask[pipe]; > new_val &= ~interrupt_mask; > new_val |= (~enabled_irq_mask & interrupt_mask); > > - if (new_val != display->irq.de_irq_mask[pipe]) { > - display->irq.de_irq_mask[pipe] = new_val; > - intel_de_write(display, GEN8_DE_PIPE_IMR(pipe), display->irq.de_irq_mask[pipe]); > + if (new_val != display->irq.de_pipe_imr_mask[pipe]) { > + display->irq.de_pipe_imr_mask[pipe] = new_val; > + intel_de_write(display, GEN8_DE_PIPE_IMR(pipe), display->irq.de_pipe_imr_mask[pipe]); > intel_de_posting_read(display, GEN8_DE_PIPE_IMR(pipe)); > } > } > @@ -2085,8 +2085,8 @@ void gen8_irq_power_well_post_enable(struct intel_display *display, > > for_each_pipe_masked(display, pipe, pipe_mask) > intel_display_irq_regs_init(display, GEN8_DE_PIPE_IRQ_REGS(pipe), > - display->irq.de_irq_mask[pipe], > - ~display->irq.de_irq_mask[pipe] | extra_ier); > + display->irq.de_pipe_imr_mask[pipe], > + ~display->irq.de_pipe_imr_mask[pipe] | extra_ier); > > spin_unlock_irq(&display->irq.lock); > } > @@ -2300,12 +2300,12 @@ void gen8_de_irq_postinstall(struct intel_display *display) > } > > for_each_pipe(display, pipe) { > - display->irq.de_irq_mask[pipe] = ~de_pipe_masked; > + display->irq.de_pipe_imr_mask[pipe] = ~de_pipe_masked; > > if (intel_display_power_is_enabled(display, > POWER_DOMAIN_PIPE(pipe))) > intel_display_irq_regs_init(display, GEN8_DE_PIPE_IRQ_REGS(pipe), > - display->irq.de_irq_mask[pipe], > + display->irq.de_pipe_imr_mask[pipe], > de_pipe_enables); > } > > -- > 2.47.3 -- Ville Syrjälä Intel