Re: [CI 00/13] CCS uncached mocs 0 test run

[Rodrigo Vivi <rodrigo.vivi@intel.com>]

On Thu, Oct 02, 2025 at 03:24:38PM +0100, Tvrtko Ursulin wrote:
> HW hardcodes mocs 0 for CCS?!
> 
> Tvrtko Ursulin (13):
>   drm/xe: Fix ggtt fb alignment
>   drm/xe/xelpg: Flush CCS when flushing caches
>   drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS
>   drm/xe/xelp: Support auxccs invalidation on blitter
>   drm/xe/xelp: Use MI_FLUSH_DW_CCS on auxccs platforms
>   drm/xe/xelp: Wait for AuxCCS invalidation to complete
>   drm/xe: Export xe_emit_aux_table_inv
>   drm/xe/xelp: Add AuxCCS invalidation to the indirect context
>     workarounds
>   drm/xe: Flush GGTT writes after populating DPT
>   drm/xe: Handle DPT in system memory
>   drm/xe/display: Add support for AuxCCS
>   mocs 0 uncached

what is this?

>   drm/i915/display: Expose AuxCCS frame buffer modifiers for Xe
> 
>  .../drm/i915/display/skl_universal_plane.c    |   6 -
>  drivers/gpu/drm/xe/display/xe_fb_pin.c        | 159 ++++++++---
>  .../gpu/drm/xe/instructions/xe_gpu_commands.h |   1 +
>  .../gpu/drm/xe/instructions/xe_mi_commands.h  |   6 +
>  drivers/gpu/drm/xe/regs/xe_gt_regs.h          |   1 +
>  drivers/gpu/drm/xe/xe_lrc.c                   |  38 +++
>  drivers/gpu/drm/xe/xe_mocs.c                  | 247 ++++++++++--------
>  drivers/gpu/drm/xe/xe_ring_ops.c              | 164 ++++++------
>  drivers/gpu/drm/xe/xe_ring_ops.h              |   3 +
>  drivers/gpu/drm/xe/xe_ring_ops_types.h        |   2 +-
>  10 files changed, 400 insertions(+), 227 deletions(-)
> 
> -- 
> 2.48.0
>