* [PATCH v2 1/5] drm/i915/irq: drop intel_psr_regs.h include
2025-09-23 14:31 [PATCH v2 0/5] drm/i915/irq: display irq refactoring Jani Nikula
@ 2025-09-23 14:31 ` Jani Nikula
2025-09-23 14:39 ` Ville Syrjälä
2025-09-23 14:31 ` [PATCH v2 2/5] drm/i915/irq: initialize gen2_imr_mask in terms of enable_mask Jani Nikula
` (5 subsequent siblings)
6 siblings, 1 reply; 14+ messages in thread
From: Jani Nikula @ 2025-09-23 14:31 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula, ville.syrjala
i915_irq.c no longer needs display/intel_psr_regs.h. Drop it.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 7c7c6dcbce88..56f231591a3e 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -38,7 +38,6 @@
#include "display/intel_hotplug.h"
#include "display/intel_hotplug_irq.h"
#include "display/intel_lpe_audio.h"
-#include "display/intel_psr_regs.h"
#include "gt/intel_breadcrumbs.h"
#include "gt/intel_gt.h"
--
2.47.3
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v2 1/5] drm/i915/irq: drop intel_psr_regs.h include
2025-09-23 14:31 ` [PATCH v2 1/5] drm/i915/irq: drop intel_psr_regs.h include Jani Nikula
@ 2025-09-23 14:39 ` Ville Syrjälä
0 siblings, 0 replies; 14+ messages in thread
From: Ville Syrjälä @ 2025-09-23 14:39 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe
On Tue, Sep 23, 2025 at 05:31:04PM +0300, Jani Nikula wrote:
> i915_irq.c no longer needs display/intel_psr_regs.h. Drop it.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
My compiler said it's ok. I trust it, most of the time.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_irq.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 7c7c6dcbce88..56f231591a3e 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -38,7 +38,6 @@
> #include "display/intel_hotplug.h"
> #include "display/intel_hotplug_irq.h"
> #include "display/intel_lpe_audio.h"
> -#include "display/intel_psr_regs.h"
>
> #include "gt/intel_breadcrumbs.h"
> #include "gt/intel_gt.h"
> --
> 2.47.3
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2 2/5] drm/i915/irq: initialize gen2_imr_mask in terms of enable_mask
2025-09-23 14:31 [PATCH v2 0/5] drm/i915/irq: display irq refactoring Jani Nikula
2025-09-23 14:31 ` [PATCH v2 1/5] drm/i915/irq: drop intel_psr_regs.h include Jani Nikula
@ 2025-09-23 14:31 ` Jani Nikula
2025-09-23 14:40 ` Ville Syrjälä
2025-09-23 14:31 ` [PATCH v2 3/5] drm/i915/irq: abstract i9xx_display_irq_enable_mask() Jani Nikula
` (4 subsequent siblings)
6 siblings, 1 reply; 14+ messages in thread
From: Jani Nikula @ 2025-09-23 14:31 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula, ville.syrjala
Instead of initializing gen2_imr_mask and enable_mask independently, use
the latter for initializing the former. This also highlights the
differences in the masks, i.e. what's set to enable_mask after it's been
used to initialize gen2_imr_mask.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 34 ++++++++++++---------------------
1 file changed, 12 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 56f231591a3e..04de02fc08d9 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -895,26 +895,20 @@ static void i915_irq_postinstall(struct drm_i915_private *dev_priv)
gen2_error_init(uncore, GEN2_ERROR_REGS, ~i9xx_error_mask(dev_priv));
- dev_priv->gen2_imr_mask =
- ~(I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
- I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
- I915_MASTER_ERROR_INTERRUPT);
-
enable_mask =
I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
- I915_MASTER_ERROR_INTERRUPT |
- I915_USER_INTERRUPT;
+ I915_MASTER_ERROR_INTERRUPT;
- if (DISPLAY_VER(display) >= 3) {
- dev_priv->gen2_imr_mask &= ~I915_ASLE_INTERRUPT;
+ if (DISPLAY_VER(display) >= 3)
enable_mask |= I915_ASLE_INTERRUPT;
- }
- if (HAS_HOTPLUG(display)) {
- dev_priv->gen2_imr_mask &= ~I915_DISPLAY_PORT_INTERRUPT;
+ if (HAS_HOTPLUG(display))
enable_mask |= I915_DISPLAY_PORT_INTERRUPT;
- }
+
+ dev_priv->gen2_imr_mask = ~enable_mask;
+
+ enable_mask |= I915_USER_INTERRUPT;
gen2_irq_init(uncore, GEN2_IRQ_REGS, dev_priv->gen2_imr_mask, enable_mask);
@@ -1016,20 +1010,16 @@ static void i965_irq_postinstall(struct drm_i915_private *dev_priv)
gen2_error_init(uncore, GEN2_ERROR_REGS, ~i965_error_mask(dev_priv));
- dev_priv->gen2_imr_mask =
- ~(I915_ASLE_INTERRUPT |
- I915_DISPLAY_PORT_INTERRUPT |
- I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
- I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
- I915_MASTER_ERROR_INTERRUPT);
-
enable_mask =
I915_ASLE_INTERRUPT |
I915_DISPLAY_PORT_INTERRUPT |
I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
- I915_MASTER_ERROR_INTERRUPT |
- I915_USER_INTERRUPT;
+ I915_MASTER_ERROR_INTERRUPT;
+
+ dev_priv->gen2_imr_mask = ~enable_mask;
+
+ enable_mask |= I915_USER_INTERRUPT;
if (IS_G4X(dev_priv))
enable_mask |= I915_BSD_USER_INTERRUPT;
--
2.47.3
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v2 2/5] drm/i915/irq: initialize gen2_imr_mask in terms of enable_mask
2025-09-23 14:31 ` [PATCH v2 2/5] drm/i915/irq: initialize gen2_imr_mask in terms of enable_mask Jani Nikula
@ 2025-09-23 14:40 ` Ville Syrjälä
0 siblings, 0 replies; 14+ messages in thread
From: Ville Syrjälä @ 2025-09-23 14:40 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe
On Tue, Sep 23, 2025 at 05:31:05PM +0300, Jani Nikula wrote:
> Instead of initializing gen2_imr_mask and enable_mask independently, use
> the latter for initializing the former. This also highlights the
> differences in the masks, i.e. what's set to enable_mask after it's been
> used to initialize gen2_imr_mask.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/i915_irq.c | 34 ++++++++++++---------------------
> 1 file changed, 12 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 56f231591a3e..04de02fc08d9 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -895,26 +895,20 @@ static void i915_irq_postinstall(struct drm_i915_private *dev_priv)
>
> gen2_error_init(uncore, GEN2_ERROR_REGS, ~i9xx_error_mask(dev_priv));
>
> - dev_priv->gen2_imr_mask =
> - ~(I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
> - I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
> - I915_MASTER_ERROR_INTERRUPT);
> -
> enable_mask =
> I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
> I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
> - I915_MASTER_ERROR_INTERRUPT |
> - I915_USER_INTERRUPT;
> + I915_MASTER_ERROR_INTERRUPT;
>
> - if (DISPLAY_VER(display) >= 3) {
> - dev_priv->gen2_imr_mask &= ~I915_ASLE_INTERRUPT;
> + if (DISPLAY_VER(display) >= 3)
> enable_mask |= I915_ASLE_INTERRUPT;
> - }
>
> - if (HAS_HOTPLUG(display)) {
> - dev_priv->gen2_imr_mask &= ~I915_DISPLAY_PORT_INTERRUPT;
> + if (HAS_HOTPLUG(display))
> enable_mask |= I915_DISPLAY_PORT_INTERRUPT;
> - }
> +
> + dev_priv->gen2_imr_mask = ~enable_mask;
> +
> + enable_mask |= I915_USER_INTERRUPT;
This diff is susprisingly hard to read :/
But it *looks* ok to me.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> gen2_irq_init(uncore, GEN2_IRQ_REGS, dev_priv->gen2_imr_mask, enable_mask);
>
> @@ -1016,20 +1010,16 @@ static void i965_irq_postinstall(struct drm_i915_private *dev_priv)
>
> gen2_error_init(uncore, GEN2_ERROR_REGS, ~i965_error_mask(dev_priv));
>
> - dev_priv->gen2_imr_mask =
> - ~(I915_ASLE_INTERRUPT |
> - I915_DISPLAY_PORT_INTERRUPT |
> - I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
> - I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
> - I915_MASTER_ERROR_INTERRUPT);
> -
> enable_mask =
> I915_ASLE_INTERRUPT |
> I915_DISPLAY_PORT_INTERRUPT |
> I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
> I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
> - I915_MASTER_ERROR_INTERRUPT |
> - I915_USER_INTERRUPT;
> + I915_MASTER_ERROR_INTERRUPT;
> +
> + dev_priv->gen2_imr_mask = ~enable_mask;
> +
> + enable_mask |= I915_USER_INTERRUPT;
>
> if (IS_G4X(dev_priv))
> enable_mask |= I915_BSD_USER_INTERRUPT;
> --
> 2.47.3
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2 3/5] drm/i915/irq: abstract i9xx_display_irq_enable_mask()
2025-09-23 14:31 [PATCH v2 0/5] drm/i915/irq: display irq refactoring Jani Nikula
2025-09-23 14:31 ` [PATCH v2 1/5] drm/i915/irq: drop intel_psr_regs.h include Jani Nikula
2025-09-23 14:31 ` [PATCH v2 2/5] drm/i915/irq: initialize gen2_imr_mask in terms of enable_mask Jani Nikula
@ 2025-09-23 14:31 ` Jani Nikula
2025-09-23 14:41 ` Ville Syrjälä
2025-09-23 14:31 ` [PATCH v2 4/5] drm/i915/irq: move check for HAS_HOTPLUG() inside i9xx_hpd_irq_ack() Jani Nikula
` (3 subsequent siblings)
6 siblings, 1 reply; 14+ messages in thread
From: Jani Nikula @ 2025-09-23 14:31 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula, ville.syrjala
Figure out the enable mask for display things in display code. Reuse the
same function for both i915 and i965 code, the end result remains the
same.
This removes a pair of DISPLAY_VER() and HAS_HOTPLUG() checks from core
irq code.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_irq.c | 16 ++++++++++++++++
drivers/gpu/drm/i915/display/intel_display_irq.h | 1 +
drivers/gpu/drm/i915/i915_irq.c | 16 ++--------------
3 files changed, 19 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index c6f367e6159e..4d51900123ea 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -1900,6 +1900,22 @@ void i9xx_display_irq_reset(struct intel_display *display)
i9xx_pipestat_irq_reset(display);
}
+u32 i9xx_display_irq_enable_mask(struct intel_display *display)
+{
+ u32 enable_mask;
+
+ enable_mask = I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
+ I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
+
+ if (DISPLAY_VER(display) >= 3)
+ enable_mask |= I915_ASLE_INTERRUPT;
+
+ if (HAS_HOTPLUG(display))
+ enable_mask |= I915_DISPLAY_PORT_INTERRUPT;
+
+ return enable_mask;
+}
+
void i915_display_irq_postinstall(struct intel_display *display)
{
/*
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
index cee120347064..e44d88e0d7e7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.h
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
@@ -61,6 +61,7 @@ void vlv_display_irq_reset(struct intel_display *display);
void gen8_display_irq_reset(struct intel_display *display);
void gen11_display_irq_reset(struct intel_display *display);
+u32 i9xx_display_irq_enable_mask(struct intel_display *display);
void i915_display_irq_postinstall(struct intel_display *display);
void i965_display_irq_postinstall(struct intel_display *display);
void vlv_display_irq_postinstall(struct intel_display *display);
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 04de02fc08d9..f9fbb88b9e26 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -895,17 +895,9 @@ static void i915_irq_postinstall(struct drm_i915_private *dev_priv)
gen2_error_init(uncore, GEN2_ERROR_REGS, ~i9xx_error_mask(dev_priv));
- enable_mask =
- I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
- I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
+ enable_mask = i9xx_display_irq_enable_mask(display) |
I915_MASTER_ERROR_INTERRUPT;
- if (DISPLAY_VER(display) >= 3)
- enable_mask |= I915_ASLE_INTERRUPT;
-
- if (HAS_HOTPLUG(display))
- enable_mask |= I915_DISPLAY_PORT_INTERRUPT;
-
dev_priv->gen2_imr_mask = ~enable_mask;
enable_mask |= I915_USER_INTERRUPT;
@@ -1010,11 +1002,7 @@ static void i965_irq_postinstall(struct drm_i915_private *dev_priv)
gen2_error_init(uncore, GEN2_ERROR_REGS, ~i965_error_mask(dev_priv));
- enable_mask =
- I915_ASLE_INTERRUPT |
- I915_DISPLAY_PORT_INTERRUPT |
- I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
- I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
+ enable_mask = i9xx_display_irq_enable_mask(display) |
I915_MASTER_ERROR_INTERRUPT;
dev_priv->gen2_imr_mask = ~enable_mask;
--
2.47.3
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v2 3/5] drm/i915/irq: abstract i9xx_display_irq_enable_mask()
2025-09-23 14:31 ` [PATCH v2 3/5] drm/i915/irq: abstract i9xx_display_irq_enable_mask() Jani Nikula
@ 2025-09-23 14:41 ` Ville Syrjälä
0 siblings, 0 replies; 14+ messages in thread
From: Ville Syrjälä @ 2025-09-23 14:41 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe
On Tue, Sep 23, 2025 at 05:31:06PM +0300, Jani Nikula wrote:
> Figure out the enable mask for display things in display code. Reuse the
> same function for both i915 and i965 code, the end result remains the
> same.
>
> This removes a pair of DISPLAY_VER() and HAS_HOTPLUG() checks from core
> irq code.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_irq.c | 16 ++++++++++++++++
> drivers/gpu/drm/i915/display/intel_display_irq.h | 1 +
> drivers/gpu/drm/i915/i915_irq.c | 16 ++--------------
> 3 files changed, 19 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index c6f367e6159e..4d51900123ea 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -1900,6 +1900,22 @@ void i9xx_display_irq_reset(struct intel_display *display)
> i9xx_pipestat_irq_reset(display);
> }
>
> +u32 i9xx_display_irq_enable_mask(struct intel_display *display)
> +{
> + u32 enable_mask;
> +
> + enable_mask = I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
> + I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
> +
> + if (DISPLAY_VER(display) >= 3)
> + enable_mask |= I915_ASLE_INTERRUPT;
> +
> + if (HAS_HOTPLUG(display))
> + enable_mask |= I915_DISPLAY_PORT_INTERRUPT;
> +
> + return enable_mask;
> +}
> +
> void i915_display_irq_postinstall(struct intel_display *display)
> {
> /*
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
> index cee120347064..e44d88e0d7e7 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
> @@ -61,6 +61,7 @@ void vlv_display_irq_reset(struct intel_display *display);
> void gen8_display_irq_reset(struct intel_display *display);
> void gen11_display_irq_reset(struct intel_display *display);
>
> +u32 i9xx_display_irq_enable_mask(struct intel_display *display);
> void i915_display_irq_postinstall(struct intel_display *display);
> void i965_display_irq_postinstall(struct intel_display *display);
> void vlv_display_irq_postinstall(struct intel_display *display);
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 04de02fc08d9..f9fbb88b9e26 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -895,17 +895,9 @@ static void i915_irq_postinstall(struct drm_i915_private *dev_priv)
>
> gen2_error_init(uncore, GEN2_ERROR_REGS, ~i9xx_error_mask(dev_priv));
>
> - enable_mask =
> - I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
> - I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
> + enable_mask = i9xx_display_irq_enable_mask(display) |
> I915_MASTER_ERROR_INTERRUPT;
>
> - if (DISPLAY_VER(display) >= 3)
> - enable_mask |= I915_ASLE_INTERRUPT;
> -
> - if (HAS_HOTPLUG(display))
> - enable_mask |= I915_DISPLAY_PORT_INTERRUPT;
> -
> dev_priv->gen2_imr_mask = ~enable_mask;
>
> enable_mask |= I915_USER_INTERRUPT;
> @@ -1010,11 +1002,7 @@ static void i965_irq_postinstall(struct drm_i915_private *dev_priv)
>
> gen2_error_init(uncore, GEN2_ERROR_REGS, ~i965_error_mask(dev_priv));
>
> - enable_mask =
> - I915_ASLE_INTERRUPT |
> - I915_DISPLAY_PORT_INTERRUPT |
> - I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
> - I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
> + enable_mask = i9xx_display_irq_enable_mask(display) |
> I915_MASTER_ERROR_INTERRUPT;
>
> dev_priv->gen2_imr_mask = ~enable_mask;
> --
> 2.47.3
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2 4/5] drm/i915/irq: move check for HAS_HOTPLUG() inside i9xx_hpd_irq_ack()
2025-09-23 14:31 [PATCH v2 0/5] drm/i915/irq: display irq refactoring Jani Nikula
` (2 preceding siblings ...)
2025-09-23 14:31 ` [PATCH v2 3/5] drm/i915/irq: abstract i9xx_display_irq_enable_mask() Jani Nikula
@ 2025-09-23 14:31 ` Jani Nikula
2025-09-23 14:43 ` Ville Syrjälä
2025-09-23 14:31 ` [PATCH v2 5/5] drm/i915/irq: split ILK display irq handling Jani Nikula
` (2 subsequent siblings)
6 siblings, 1 reply; 14+ messages in thread
From: Jani Nikula @ 2025-09-23 14:31 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula, ville.syrjala
We want to avoid using the display dependent HAS_HOTPLUG() in generic
irq code. Since the enabling of I915_DISPLAY_PORT_INTERRUPT depends on
HAS_HOTPLUG() to begin with, we don't really expect to get the irqs for
!HAS_HOTPLUG(). At least in theory, checking for HAS_HOTPLUG() inside
i9xx_hpd_irq_ack() should not have any impact.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_hotplug_irq.c | 3 +++
drivers/gpu/drm/i915/i915_irq.c | 3 +--
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug_irq.c b/drivers/gpu/drm/i915/display/intel_hotplug_irq.c
index 4f72f3fb9af5..9a4da818ad61 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug_irq.c
@@ -420,6 +420,9 @@ u32 i9xx_hpd_irq_ack(struct intel_display *display)
u32 hotplug_status = 0, hotplug_status_mask;
int i;
+ if (!HAS_HOTPLUG(display))
+ return 0;
+
if (display->platform.g4x ||
display->platform.valleyview || display->platform.cherryview)
hotplug_status_mask = HOTPLUG_INT_STATUS_G4X |
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index f9fbb88b9e26..90174ce9195c 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -931,8 +931,7 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
ret = IRQ_HANDLED;
- if (HAS_HOTPLUG(display) &&
- iir & I915_DISPLAY_PORT_INTERRUPT)
+ if (iir & I915_DISPLAY_PORT_INTERRUPT)
hotplug_status = i9xx_hpd_irq_ack(display);
/* Call regardless, as some status bits might not be
--
2.47.3
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v2 4/5] drm/i915/irq: move check for HAS_HOTPLUG() inside i9xx_hpd_irq_ack()
2025-09-23 14:31 ` [PATCH v2 4/5] drm/i915/irq: move check for HAS_HOTPLUG() inside i9xx_hpd_irq_ack() Jani Nikula
@ 2025-09-23 14:43 ` Ville Syrjälä
0 siblings, 0 replies; 14+ messages in thread
From: Ville Syrjälä @ 2025-09-23 14:43 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe
On Tue, Sep 23, 2025 at 05:31:07PM +0300, Jani Nikula wrote:
> We want to avoid using the display dependent HAS_HOTPLUG() in generic
> irq code. Since the enabling of I915_DISPLAY_PORT_INTERRUPT depends on
> HAS_HOTPLUG() to begin with, we don't really expect to get the irqs for
> !HAS_HOTPLUG(). At least in theory, checking for HAS_HOTPLUG() inside
> i9xx_hpd_irq_ack() should not have any impact.
Yeah, IMR should keep the bit from making an appearance in IIR.
But no real harm in checking I suppose.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_hotplug_irq.c | 3 +++
> drivers/gpu/drm/i915/i915_irq.c | 3 +--
> 2 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hotplug_irq.c b/drivers/gpu/drm/i915/display/intel_hotplug_irq.c
> index 4f72f3fb9af5..9a4da818ad61 100644
> --- a/drivers/gpu/drm/i915/display/intel_hotplug_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_hotplug_irq.c
> @@ -420,6 +420,9 @@ u32 i9xx_hpd_irq_ack(struct intel_display *display)
> u32 hotplug_status = 0, hotplug_status_mask;
> int i;
>
> + if (!HAS_HOTPLUG(display))
> + return 0;
> +
> if (display->platform.g4x ||
> display->platform.valleyview || display->platform.cherryview)
> hotplug_status_mask = HOTPLUG_INT_STATUS_G4X |
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index f9fbb88b9e26..90174ce9195c 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -931,8 +931,7 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
>
> ret = IRQ_HANDLED;
>
> - if (HAS_HOTPLUG(display) &&
> - iir & I915_DISPLAY_PORT_INTERRUPT)
> + if (iir & I915_DISPLAY_PORT_INTERRUPT)
> hotplug_status = i9xx_hpd_irq_ack(display);
>
> /* Call regardless, as some status bits might not be
> --
> 2.47.3
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2 5/5] drm/i915/irq: split ILK display irq handling
2025-09-23 14:31 [PATCH v2 0/5] drm/i915/irq: display irq refactoring Jani Nikula
` (3 preceding siblings ...)
2025-09-23 14:31 ` [PATCH v2 4/5] drm/i915/irq: move check for HAS_HOTPLUG() inside i9xx_hpd_irq_ack() Jani Nikula
@ 2025-09-23 14:31 ` Jani Nikula
2025-09-23 14:45 ` Ville Syrjälä
2025-09-23 15:08 ` ✓ CI.KUnit: success for drm/i915/irq: display irq refactoring (rev2) Patchwork
2025-09-23 17:58 ` ✗ Xe.CI.Full: failure " Patchwork
6 siblings, 1 reply; 14+ messages in thread
From: Jani Nikula @ 2025-09-23 14:31 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula, ville.syrjala
Split out display irq handling on ilk. Since the master IRQ enable is in
DEIIR, we'll need to do this in two parts. First, add
ilk_display_irq_master_disable() to disable master and south interrupts,
and second, add (repurposed) ilk_display_irq_handler() to finish display
irq handling.
It's not the prettiest thing you ever saw, but improves separation of
display irq handling. And removes HAS_PCH_NOP() and DISPLAY_VER() checks
from core irq code.
v2:
- Separate ilk_display_irq_master_enable() (Ville)
- Use _fw mmio accessors (Ville)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
.../gpu/drm/i915/display/intel_display_irq.c | 51 ++++++++++++++++++-
.../gpu/drm/i915/display/intel_display_irq.h | 5 +-
drivers/gpu/drm/i915/i915_irq.c | 31 +++--------
3 files changed, 58 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 4d51900123ea..e1a812f6159b 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -872,7 +872,7 @@ static void ilk_gtt_fault_irq_handler(struct intel_display *display)
}
}
-void ilk_display_irq_handler(struct intel_display *display, u32 de_iir)
+static void _ilk_display_irq_handler(struct intel_display *display, u32 de_iir)
{
enum pipe pipe;
u32 hotplug_trigger = de_iir & DE_DP_A_HOTPLUG;
@@ -923,7 +923,7 @@ void ilk_display_irq_handler(struct intel_display *display, u32 de_iir)
ilk_display_rps_irq_handler(display);
}
-void ivb_display_irq_handler(struct intel_display *display, u32 de_iir)
+static void _ivb_display_irq_handler(struct intel_display *display, u32 de_iir)
{
enum pipe pipe;
u32 hotplug_trigger = de_iir & DE_DP_A_HOTPLUG_IVB;
@@ -972,6 +972,53 @@ void ivb_display_irq_handler(struct intel_display *display, u32 de_iir)
}
}
+void ilk_display_irq_master_disable(struct intel_display *display, u32 *de_ier, u32 *sde_ier)
+{
+ /* disable master interrupt before clearing iir */
+ *de_ier = intel_de_read_fw(display, DEIER);
+ intel_de_write_fw(display, DEIER, *de_ier & ~DE_MASTER_IRQ_CONTROL);
+
+ /*
+ * Disable south interrupts. We'll only write to SDEIIR once, so further
+ * interrupts will be stored on its back queue, and then we'll be able
+ * to process them after we restore SDEIER (as soon as we restore it,
+ * we'll get an interrupt if SDEIIR still has something to process due
+ * to its back queue).
+ */
+ if (!HAS_PCH_NOP(display)) {
+ *sde_ier = intel_de_read_fw(display, SDEIER);
+ intel_de_write_fw(display, SDEIER, 0);
+ } else {
+ *sde_ier = 0;
+ }
+}
+
+void ilk_display_irq_master_enable(struct intel_display *display, u32 de_ier, u32 sde_ier)
+{
+ intel_de_write_fw(display, DEIER, de_ier);
+
+ if (sde_ier)
+ intel_de_write_fw(display, SDEIER, sde_ier);
+}
+
+bool ilk_display_irq_handler(struct intel_display *display)
+{
+ u32 de_iir;
+ bool handled = false;
+
+ de_iir = intel_de_read_fw(display, DEIIR);
+ if (de_iir) {
+ intel_de_write_fw(display, DEIIR, de_iir);
+ if (DISPLAY_VER(display) >= 7)
+ _ivb_display_irq_handler(display, de_iir);
+ else
+ _ilk_display_irq_handler(display, de_iir);
+ handled = true;
+ }
+
+ return handled;
+}
+
static u32 gen8_de_port_aux_mask(struct intel_display *display)
{
u32 mask;
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
index e44d88e0d7e7..84acd31948cf 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.h
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
@@ -47,8 +47,9 @@ void i965_disable_vblank(struct drm_crtc *crtc);
void ilk_disable_vblank(struct drm_crtc *crtc);
void bdw_disable_vblank(struct drm_crtc *crtc);
-void ivb_display_irq_handler(struct intel_display *display, u32 de_iir);
-void ilk_display_irq_handler(struct intel_display *display, u32 de_iir);
+void ilk_display_irq_master_disable(struct intel_display *display, u32 *de_ier, u32 *sde_ier);
+void ilk_display_irq_master_enable(struct intel_display *display, u32 de_ier, u32 sde_ier);
+bool ilk_display_irq_handler(struct intel_display *display);
void gen8_de_irq_handler(struct intel_display *display, u32 master_ctl);
void gen11_display_irq_handler(struct intel_display *display);
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 90174ce9195c..11a727b74849 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -414,7 +414,7 @@ static irqreturn_t ilk_irq_handler(int irq, void *arg)
struct drm_i915_private *i915 = arg;
struct intel_display *display = i915->display;
void __iomem * const regs = intel_uncore_regs(&i915->uncore);
- u32 de_iir, gt_iir, de_ier, sde_ier = 0;
+ u32 gt_iir, de_ier = 0, sde_ier = 0;
irqreturn_t ret = IRQ_NONE;
if (unlikely(!intel_irqs_enabled(i915)))
@@ -423,19 +423,8 @@ static irqreturn_t ilk_irq_handler(int irq, void *arg)
/* IRQs are synced during runtime_suspend, we don't require a wakeref */
disable_rpm_wakeref_asserts(&i915->runtime_pm);
- /* disable master interrupt before clearing iir */
- de_ier = raw_reg_read(regs, DEIER);
- raw_reg_write(regs, DEIER, de_ier & ~DE_MASTER_IRQ_CONTROL);
-
- /* Disable south interrupts. We'll only write to SDEIIR once, so further
- * interrupts will will be stored on its back queue, and then we'll be
- * able to process them after we restore SDEIER (as soon as we restore
- * it, we'll get an interrupt if SDEIIR still has something to process
- * due to its back queue). */
- if (!HAS_PCH_NOP(display)) {
- sde_ier = raw_reg_read(regs, SDEIER);
- raw_reg_write(regs, SDEIER, 0);
- }
+ /* Disable master and south interrupts */
+ ilk_display_irq_master_disable(display, &de_ier, &sde_ier);
/* Find, clear, then process each source of interrupt */
@@ -449,15 +438,8 @@ static irqreturn_t ilk_irq_handler(int irq, void *arg)
ret = IRQ_HANDLED;
}
- de_iir = raw_reg_read(regs, DEIIR);
- if (de_iir) {
- raw_reg_write(regs, DEIIR, de_iir);
- if (DISPLAY_VER(display) >= 7)
- ivb_display_irq_handler(display, de_iir);
- else
- ilk_display_irq_handler(display, de_iir);
+ if (ilk_display_irq_handler(display))
ret = IRQ_HANDLED;
- }
if (GRAPHICS_VER(i915) >= 6) {
u32 pm_iir = raw_reg_read(regs, GEN6_PMIIR);
@@ -468,9 +450,8 @@ static irqreturn_t ilk_irq_handler(int irq, void *arg)
}
}
- raw_reg_write(regs, DEIER, de_ier);
- if (sde_ier)
- raw_reg_write(regs, SDEIER, sde_ier);
+ /* Re-enable master and south interrupts */
+ ilk_display_irq_master_enable(display, de_ier, sde_ier);
pmu_irq_stats(i915, ret);
--
2.47.3
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v2 5/5] drm/i915/irq: split ILK display irq handling
2025-09-23 14:31 ` [PATCH v2 5/5] drm/i915/irq: split ILK display irq handling Jani Nikula
@ 2025-09-23 14:45 ` Ville Syrjälä
2025-09-24 6:47 ` Jani Nikula
0 siblings, 1 reply; 14+ messages in thread
From: Ville Syrjälä @ 2025-09-23 14:45 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe
On Tue, Sep 23, 2025 at 05:31:08PM +0300, Jani Nikula wrote:
> Split out display irq handling on ilk. Since the master IRQ enable is in
> DEIIR, we'll need to do this in two parts. First, add
> ilk_display_irq_master_disable() to disable master and south interrupts,
> and second, add (repurposed) ilk_display_irq_handler() to finish display
> irq handling.
>
> It's not the prettiest thing you ever saw, but improves separation of
> display irq handling. And removes HAS_PCH_NOP() and DISPLAY_VER() checks
> from core irq code.
>
> v2:
> - Separate ilk_display_irq_master_enable() (Ville)
> - Use _fw mmio accessors (Ville)
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> .../gpu/drm/i915/display/intel_display_irq.c | 51 ++++++++++++++++++-
> .../gpu/drm/i915/display/intel_display_irq.h | 5 +-
> drivers/gpu/drm/i915/i915_irq.c | 31 +++--------
> 3 files changed, 58 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index 4d51900123ea..e1a812f6159b 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -872,7 +872,7 @@ static void ilk_gtt_fault_irq_handler(struct intel_display *display)
> }
> }
>
> -void ilk_display_irq_handler(struct intel_display *display, u32 de_iir)
> +static void _ilk_display_irq_handler(struct intel_display *display, u32 de_iir)
> {
> enum pipe pipe;
> u32 hotplug_trigger = de_iir & DE_DP_A_HOTPLUG;
> @@ -923,7 +923,7 @@ void ilk_display_irq_handler(struct intel_display *display, u32 de_iir)
> ilk_display_rps_irq_handler(display);
> }
>
> -void ivb_display_irq_handler(struct intel_display *display, u32 de_iir)
> +static void _ivb_display_irq_handler(struct intel_display *display, u32 de_iir)
> {
> enum pipe pipe;
> u32 hotplug_trigger = de_iir & DE_DP_A_HOTPLUG_IVB;
> @@ -972,6 +972,53 @@ void ivb_display_irq_handler(struct intel_display *display, u32 de_iir)
> }
> }
>
> +void ilk_display_irq_master_disable(struct intel_display *display, u32 *de_ier, u32 *sde_ier)
> +{
> + /* disable master interrupt before clearing iir */
> + *de_ier = intel_de_read_fw(display, DEIER);
> + intel_de_write_fw(display, DEIER, *de_ier & ~DE_MASTER_IRQ_CONTROL);
> +
> + /*
> + * Disable south interrupts. We'll only write to SDEIIR once, so further
> + * interrupts will be stored on its back queue, and then we'll be able
> + * to process them after we restore SDEIER (as soon as we restore it,
> + * we'll get an interrupt if SDEIIR still has something to process due
> + * to its back queue).
> + */
> + if (!HAS_PCH_NOP(display)) {
> + *sde_ier = intel_de_read_fw(display, SDEIER);
> + intel_de_write_fw(display, SDEIER, 0);
> + } else {
> + *sde_ier = 0;
> + }
> +}
> +
> +void ilk_display_irq_master_enable(struct intel_display *display, u32 de_ier, u32 sde_ier)
> +{
> + intel_de_write_fw(display, DEIER, de_ier);
> +
> + if (sde_ier)
> + intel_de_write_fw(display, SDEIER, sde_ier);
> +}
> +
> +bool ilk_display_irq_handler(struct intel_display *display)
> +{
> + u32 de_iir;
> + bool handled = false;
> +
> + de_iir = intel_de_read_fw(display, DEIIR);
> + if (de_iir) {
> + intel_de_write_fw(display, DEIIR, de_iir);
> + if (DISPLAY_VER(display) >= 7)
> + _ivb_display_irq_handler(display, de_iir);
> + else
> + _ilk_display_irq_handler(display, de_iir);
> + handled = true;
> + }
> +
> + return handled;
> +}
> +
> static u32 gen8_de_port_aux_mask(struct intel_display *display)
> {
> u32 mask;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
> index e44d88e0d7e7..84acd31948cf 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
> @@ -47,8 +47,9 @@ void i965_disable_vblank(struct drm_crtc *crtc);
> void ilk_disable_vblank(struct drm_crtc *crtc);
> void bdw_disable_vblank(struct drm_crtc *crtc);
>
> -void ivb_display_irq_handler(struct intel_display *display, u32 de_iir);
> -void ilk_display_irq_handler(struct intel_display *display, u32 de_iir);
> +void ilk_display_irq_master_disable(struct intel_display *display, u32 *de_ier, u32 *sde_ier);
> +void ilk_display_irq_master_enable(struct intel_display *display, u32 de_ier, u32 sde_ier);
> +bool ilk_display_irq_handler(struct intel_display *display);
> void gen8_de_irq_handler(struct intel_display *display, u32 master_ctl);
> void gen11_display_irq_handler(struct intel_display *display);
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 90174ce9195c..11a727b74849 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -414,7 +414,7 @@ static irqreturn_t ilk_irq_handler(int irq, void *arg)
> struct drm_i915_private *i915 = arg;
> struct intel_display *display = i915->display;
> void __iomem * const regs = intel_uncore_regs(&i915->uncore);
> - u32 de_iir, gt_iir, de_ier, sde_ier = 0;
> + u32 gt_iir, de_ier = 0, sde_ier = 0;
> irqreturn_t ret = IRQ_NONE;
>
> if (unlikely(!intel_irqs_enabled(i915)))
> @@ -423,19 +423,8 @@ static irqreturn_t ilk_irq_handler(int irq, void *arg)
> /* IRQs are synced during runtime_suspend, we don't require a wakeref */
> disable_rpm_wakeref_asserts(&i915->runtime_pm);
>
> - /* disable master interrupt before clearing iir */
> - de_ier = raw_reg_read(regs, DEIER);
> - raw_reg_write(regs, DEIER, de_ier & ~DE_MASTER_IRQ_CONTROL);
> -
> - /* Disable south interrupts. We'll only write to SDEIIR once, so further
> - * interrupts will will be stored on its back queue, and then we'll be
> - * able to process them after we restore SDEIER (as soon as we restore
> - * it, we'll get an interrupt if SDEIIR still has something to process
> - * due to its back queue). */
> - if (!HAS_PCH_NOP(display)) {
> - sde_ier = raw_reg_read(regs, SDEIER);
> - raw_reg_write(regs, SDEIER, 0);
> - }
> + /* Disable master and south interrupts */
> + ilk_display_irq_master_disable(display, &de_ier, &sde_ier);
>
> /* Find, clear, then process each source of interrupt */
>
> @@ -449,15 +438,8 @@ static irqreturn_t ilk_irq_handler(int irq, void *arg)
> ret = IRQ_HANDLED;
> }
>
> - de_iir = raw_reg_read(regs, DEIIR);
> - if (de_iir) {
> - raw_reg_write(regs, DEIIR, de_iir);
> - if (DISPLAY_VER(display) >= 7)
> - ivb_display_irq_handler(display, de_iir);
> - else
> - ilk_display_irq_handler(display, de_iir);
> + if (ilk_display_irq_handler(display))
> ret = IRQ_HANDLED;
> - }
>
> if (GRAPHICS_VER(i915) >= 6) {
> u32 pm_iir = raw_reg_read(regs, GEN6_PMIIR);
> @@ -468,9 +450,8 @@ static irqreturn_t ilk_irq_handler(int irq, void *arg)
> }
> }
>
> - raw_reg_write(regs, DEIER, de_ier);
> - if (sde_ier)
> - raw_reg_write(regs, SDEIER, sde_ier);
> + /* Re-enable master and south interrupts */
> + ilk_display_irq_master_enable(display, de_ier, sde_ier);
>
> pmu_irq_stats(i915, ret);
>
> --
> 2.47.3
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v2 5/5] drm/i915/irq: split ILK display irq handling
2025-09-23 14:45 ` Ville Syrjälä
@ 2025-09-24 6:47 ` Jani Nikula
0 siblings, 0 replies; 14+ messages in thread
From: Jani Nikula @ 2025-09-24 6:47 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx, intel-xe
On Tue, 23 Sep 2025, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Tue, Sep 23, 2025 at 05:31:08PM +0300, Jani Nikula wrote:
>> Split out display irq handling on ilk. Since the master IRQ enable is in
>> DEIIR, we'll need to do this in two parts. First, add
>> ilk_display_irq_master_disable() to disable master and south interrupts,
>> and second, add (repurposed) ilk_display_irq_handler() to finish display
>> irq handling.
>>
>> It's not the prettiest thing you ever saw, but improves separation of
>> display irq handling. And removes HAS_PCH_NOP() and DISPLAY_VER() checks
>> from core irq code.
>>
>> v2:
>> - Separate ilk_display_irq_master_enable() (Ville)
>> - Use _fw mmio accessors (Ville)
>>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Thanks for the swift reviews, pushed to din.
Xe CI didn't run on this version, but this does not touch any codepaths
that get run on platforms in Xe CI. And the previous version passed.
BR,
Jani.
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 14+ messages in thread
* ✓ CI.KUnit: success for drm/i915/irq: display irq refactoring (rev2)
2025-09-23 14:31 [PATCH v2 0/5] drm/i915/irq: display irq refactoring Jani Nikula
` (4 preceding siblings ...)
2025-09-23 14:31 ` [PATCH v2 5/5] drm/i915/irq: split ILK display irq handling Jani Nikula
@ 2025-09-23 15:08 ` Patchwork
2025-09-23 17:58 ` ✗ Xe.CI.Full: failure " Patchwork
6 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2025-09-23 15:08 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915/irq: display irq refactoring (rev2)
URL : https://patchwork.freedesktop.org/series/154763/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[15:07:04] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[15:07:08] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[15:07:37] Starting KUnit Kernel (1/1)...
[15:07:37] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[15:07:37] ================== guc_buf (11 subtests) ===================
[15:07:37] [PASSED] test_smallest
[15:07:37] [PASSED] test_largest
[15:07:37] [PASSED] test_granular
[15:07:37] [PASSED] test_unique
[15:07:37] [PASSED] test_overlap
[15:07:37] [PASSED] test_reusable
[15:07:37] [PASSED] test_too_big
[15:07:37] [PASSED] test_flush
[15:07:37] [PASSED] test_lookup
[15:07:37] [PASSED] test_data
[15:07:37] [PASSED] test_class
[15:07:37] ===================== [PASSED] guc_buf =====================
[15:07:37] =================== guc_dbm (7 subtests) ===================
[15:07:37] [PASSED] test_empty
[15:07:37] [PASSED] test_default
[15:07:37] ======================== test_size ========================
[15:07:37] [PASSED] 4
[15:07:37] [PASSED] 8
[15:07:37] [PASSED] 32
[15:07:37] [PASSED] 256
[15:07:37] ==================== [PASSED] test_size ====================
[15:07:37] ======================= test_reuse ========================
[15:07:37] [PASSED] 4
[15:07:37] [PASSED] 8
[15:07:37] [PASSED] 32
[15:07:37] [PASSED] 256
[15:07:37] =================== [PASSED] test_reuse ====================
[15:07:37] =================== test_range_overlap ====================
[15:07:37] [PASSED] 4
[15:07:37] [PASSED] 8
[15:07:37] [PASSED] 32
[15:07:37] [PASSED] 256
[15:07:37] =============== [PASSED] test_range_overlap ================
[15:07:37] =================== test_range_compact ====================
[15:07:37] [PASSED] 4
[15:07:37] [PASSED] 8
[15:07:37] [PASSED] 32
[15:07:37] [PASSED] 256
[15:07:37] =============== [PASSED] test_range_compact ================
[15:07:37] ==================== test_range_spare =====================
[15:07:37] [PASSED] 4
[15:07:37] [PASSED] 8
[15:07:37] [PASSED] 32
[15:07:37] [PASSED] 256
[15:07:37] ================ [PASSED] test_range_spare =================
[15:07:37] ===================== [PASSED] guc_dbm =====================
[15:07:37] =================== guc_idm (6 subtests) ===================
[15:07:37] [PASSED] bad_init
[15:07:37] [PASSED] no_init
[15:07:37] [PASSED] init_fini
[15:07:37] [PASSED] check_used
[15:07:37] [PASSED] check_quota
[15:07:37] [PASSED] check_all
[15:07:37] ===================== [PASSED] guc_idm =====================
[15:07:37] ================== no_relay (3 subtests) ===================
[15:07:37] [PASSED] xe_drops_guc2pf_if_not_ready
[15:07:37] [PASSED] xe_drops_guc2vf_if_not_ready
[15:07:37] [PASSED] xe_rejects_send_if_not_ready
[15:07:37] ==================== [PASSED] no_relay =====================
[15:07:37] ================== pf_relay (14 subtests) ==================
[15:07:37] [PASSED] pf_rejects_guc2pf_too_short
[15:07:38] [PASSED] pf_rejects_guc2pf_too_long
[15:07:38] [PASSED] pf_rejects_guc2pf_no_payload
[15:07:38] [PASSED] pf_fails_no_payload
[15:07:38] [PASSED] pf_fails_bad_origin
[15:07:38] [PASSED] pf_fails_bad_type
[15:07:38] [PASSED] pf_txn_reports_error
[15:07:38] [PASSED] pf_txn_sends_pf2guc
[15:07:38] [PASSED] pf_sends_pf2guc
[15:07:38] [SKIPPED] pf_loopback_nop
[15:07:38] [SKIPPED] pf_loopback_echo
[15:07:38] [SKIPPED] pf_loopback_fail
[15:07:38] [SKIPPED] pf_loopback_busy
[15:07:38] [SKIPPED] pf_loopback_retry
[15:07:38] ==================== [PASSED] pf_relay =====================
[15:07:38] ================== vf_relay (3 subtests) ===================
[15:07:38] [PASSED] vf_rejects_guc2vf_too_short
[15:07:38] [PASSED] vf_rejects_guc2vf_too_long
[15:07:38] [PASSED] vf_rejects_guc2vf_no_payload
[15:07:38] ==================== [PASSED] vf_relay =====================
[15:07:38] ===================== lmtt (1 subtest) =====================
[15:07:38] ======================== test_ops =========================
[15:07:38] [PASSED] 2-level
[15:07:38] [PASSED] multi-level
[15:07:38] ==================== [PASSED] test_ops =====================
[15:07:38] ====================== [PASSED] lmtt =======================
[15:07:38] ================= pf_service (11 subtests) =================
[15:07:38] [PASSED] pf_negotiate_any
[15:07:38] [PASSED] pf_negotiate_base_match
[15:07:38] [PASSED] pf_negotiate_base_newer
[15:07:38] [PASSED] pf_negotiate_base_next
[15:07:38] [SKIPPED] pf_negotiate_base_older
[15:07:38] [PASSED] pf_negotiate_base_prev
[15:07:38] [PASSED] pf_negotiate_latest_match
[15:07:38] [PASSED] pf_negotiate_latest_newer
[15:07:38] [PASSED] pf_negotiate_latest_next
[15:07:38] [SKIPPED] pf_negotiate_latest_older
[15:07:38] [SKIPPED] pf_negotiate_latest_prev
[15:07:38] =================== [PASSED] pf_service ====================
[15:07:38] ================= xe_guc_g2g (2 subtests) ==================
[15:07:38] ============== xe_live_guc_g2g_kunit_default ==============
[15:07:38] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[15:07:38] ============== xe_live_guc_g2g_kunit_allmem ===============
[15:07:38] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[15:07:38] =================== [SKIPPED] xe_guc_g2g ===================
[15:07:38] =================== xe_mocs (2 subtests) ===================
[15:07:38] ================ xe_live_mocs_kernel_kunit ================
[15:07:38] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[15:07:38] ================ xe_live_mocs_reset_kunit =================
[15:07:38] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[15:07:38] ==================== [SKIPPED] xe_mocs =====================
[15:07:38] ================= xe_migrate (2 subtests) ==================
[15:07:38] ================= xe_migrate_sanity_kunit =================
[15:07:38] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[15:07:38] ================== xe_validate_ccs_kunit ==================
[15:07:38] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[15:07:38] =================== [SKIPPED] xe_migrate ===================
[15:07:38] ================== xe_dma_buf (1 subtest) ==================
[15:07:38] ==================== xe_dma_buf_kunit =====================
[15:07:38] ================ [SKIPPED] xe_dma_buf_kunit ================
[15:07:38] =================== [SKIPPED] xe_dma_buf ===================
[15:07:38] ================= xe_bo_shrink (1 subtest) =================
[15:07:38] =================== xe_bo_shrink_kunit ====================
[15:07:38] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[15:07:38] ================== [SKIPPED] xe_bo_shrink ==================
[15:07:38] ==================== xe_bo (2 subtests) ====================
[15:07:38] ================== xe_ccs_migrate_kunit ===================
[15:07:38] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[15:07:38] ==================== xe_bo_evict_kunit ====================
[15:07:38] =============== [SKIPPED] xe_bo_evict_kunit ================
[15:07:38] ===================== [SKIPPED] xe_bo ======================
[15:07:38] ==================== args (11 subtests) ====================
[15:07:38] [PASSED] count_args_test
[15:07:38] [PASSED] call_args_example
[15:07:38] [PASSED] call_args_test
[15:07:38] [PASSED] drop_first_arg_example
[15:07:38] [PASSED] drop_first_arg_test
[15:07:38] [PASSED] first_arg_example
[15:07:38] [PASSED] first_arg_test
[15:07:38] [PASSED] last_arg_example
[15:07:38] [PASSED] last_arg_test
[15:07:38] [PASSED] pick_arg_example
[15:07:38] [PASSED] sep_comma_example
[15:07:38] ====================== [PASSED] args =======================
[15:07:38] =================== xe_pci (3 subtests) ====================
[15:07:38] ==================== check_graphics_ip ====================
[15:07:38] [PASSED] 12.00 Xe_LP
[15:07:38] [PASSED] 12.10 Xe_LP+
[15:07:38] [PASSED] 12.55 Xe_HPG
[15:07:38] [PASSED] 12.60 Xe_HPC
[15:07:38] [PASSED] 12.70 Xe_LPG
[15:07:38] [PASSED] 12.71 Xe_LPG
[15:07:38] [PASSED] 12.74 Xe_LPG+
[15:07:38] [PASSED] 20.01 Xe2_HPG
[15:07:38] [PASSED] 20.02 Xe2_HPG
[15:07:38] [PASSED] 20.04 Xe2_LPG
[15:07:38] [PASSED] 30.00 Xe3_LPG
[15:07:38] [PASSED] 30.01 Xe3_LPG
[15:07:38] [PASSED] 30.03 Xe3_LPG
[15:07:38] ================ [PASSED] check_graphics_ip ================
[15:07:38] ===================== check_media_ip ======================
[15:07:38] [PASSED] 12.00 Xe_M
[15:07:38] [PASSED] 12.55 Xe_HPM
[15:07:38] [PASSED] 13.00 Xe_LPM+
[15:07:38] [PASSED] 13.01 Xe2_HPM
[15:07:38] [PASSED] 20.00 Xe2_LPM
[15:07:38] [PASSED] 30.00 Xe3_LPM
[15:07:38] [PASSED] 30.02 Xe3_LPM
[15:07:38] ================= [PASSED] check_media_ip ==================
[15:07:38] ================= check_platform_gt_count =================
[15:07:38] [PASSED] 0x9A60 (TIGERLAKE)
[15:07:38] [PASSED] 0x9A68 (TIGERLAKE)
[15:07:38] [PASSED] 0x9A70 (TIGERLAKE)
[15:07:38] [PASSED] 0x9A40 (TIGERLAKE)
[15:07:38] [PASSED] 0x9A49 (TIGERLAKE)
[15:07:38] [PASSED] 0x9A59 (TIGERLAKE)
[15:07:38] [PASSED] 0x9A78 (TIGERLAKE)
[15:07:38] [PASSED] 0x9AC0 (TIGERLAKE)
[15:07:38] [PASSED] 0x9AC9 (TIGERLAKE)
[15:07:38] [PASSED] 0x9AD9 (TIGERLAKE)
[15:07:38] [PASSED] 0x9AF8 (TIGERLAKE)
[15:07:38] [PASSED] 0x4C80 (ROCKETLAKE)
[15:07:38] [PASSED] 0x4C8A (ROCKETLAKE)
[15:07:38] [PASSED] 0x4C8B (ROCKETLAKE)
[15:07:38] [PASSED] 0x4C8C (ROCKETLAKE)
[15:07:38] [PASSED] 0x4C90 (ROCKETLAKE)
[15:07:38] [PASSED] 0x4C9A (ROCKETLAKE)
[15:07:38] [PASSED] 0x4680 (ALDERLAKE_S)
[15:07:38] [PASSED] 0x4682 (ALDERLAKE_S)
[15:07:38] [PASSED] 0x4688 (ALDERLAKE_S)
[15:07:38] [PASSED] 0x468A (ALDERLAKE_S)
[15:07:38] [PASSED] 0x468B (ALDERLAKE_S)
[15:07:38] [PASSED] 0x4690 (ALDERLAKE_S)
[15:07:38] [PASSED] 0x4692 (ALDERLAKE_S)
[15:07:38] [PASSED] 0x4693 (ALDERLAKE_S)
[15:07:38] [PASSED] 0x46A0 (ALDERLAKE_P)
[15:07:38] [PASSED] 0x46A1 (ALDERLAKE_P)
[15:07:38] [PASSED] 0x46A2 (ALDERLAKE_P)
[15:07:38] [PASSED] 0x46A3 (ALDERLAKE_P)
[15:07:38] [PASSED] 0x46A6 (ALDERLAKE_P)
[15:07:38] [PASSED] 0x46A8 (ALDERLAKE_P)
[15:07:38] [PASSED] 0x46AA (ALDERLAKE_P)
[15:07:38] [PASSED] 0x462A (ALDERLAKE_P)
[15:07:38] [PASSED] 0x4626 (ALDERLAKE_P)
[15:07:38] [PASSED] 0x4628 (ALDERLAKE_P)
[15:07:38] [PASSED] 0x46B0 (ALDERLAKE_P)
[15:07:38] [PASSED] 0x46B1 (ALDERLAKE_P)
[15:07:38] [PASSED] 0x46B2 (ALDERLAKE_P)
[15:07:38] [PASSED] 0x46B3 (ALDERLAKE_P)
[15:07:38] [PASSED] 0x46C0 (ALDERLAKE_P)
[15:07:38] [PASSED] 0x46C1 (ALDERLAKE_P)
[15:07:38] [PASSED] 0x46C2 (ALDERLAKE_P)
[15:07:38] [PASSED] 0x46C3 (ALDERLAKE_P)
[15:07:38] [PASSED] 0x46D0 (ALDERLAKE_N)
[15:07:38] [PASSED] 0x46D1 (ALDERLAKE_N)
[15:07:38] [PASSED] 0x46D2 (ALDERLAKE_N)
[15:07:38] [PASSED] 0x46D3 (ALDERLAKE_N)
[15:07:38] [PASSED] 0x46D4 (ALDERLAKE_N)
[15:07:38] [PASSED] 0xA721 (ALDERLAKE_P)
[15:07:38] [PASSED] 0xA7A1 (ALDERLAKE_P)
[15:07:38] [PASSED] 0xA7A9 (ALDERLAKE_P)
[15:07:38] [PASSED] 0xA7AC (ALDERLAKE_P)
[15:07:38] [PASSED] 0xA7AD (ALDERLAKE_P)
[15:07:38] [PASSED] 0xA720 (ALDERLAKE_P)
[15:07:38] [PASSED] 0xA7A0 (ALDERLAKE_P)
[15:07:38] [PASSED] 0xA7A8 (ALDERLAKE_P)
[15:07:38] [PASSED] 0xA7AA (ALDERLAKE_P)
[15:07:38] [PASSED] 0xA7AB (ALDERLAKE_P)
[15:07:38] [PASSED] 0xA780 (ALDERLAKE_S)
[15:07:38] [PASSED] 0xA781 (ALDERLAKE_S)
[15:07:38] [PASSED] 0xA782 (ALDERLAKE_S)
[15:07:38] [PASSED] 0xA783 (ALDERLAKE_S)
[15:07:38] [PASSED] 0xA788 (ALDERLAKE_S)
[15:07:38] [PASSED] 0xA789 (ALDERLAKE_S)
[15:07:38] [PASSED] 0xA78A (ALDERLAKE_S)
[15:07:38] [PASSED] 0xA78B (ALDERLAKE_S)
[15:07:38] [PASSED] 0x4905 (DG1)
[15:07:38] [PASSED] 0x4906 (DG1)
[15:07:38] [PASSED] 0x4907 (DG1)
[15:07:38] [PASSED] 0x4908 (DG1)
[15:07:38] [PASSED] 0x4909 (DG1)
[15:07:38] [PASSED] 0x56C0 (DG2)
[15:07:38] [PASSED] 0x56C2 (DG2)
[15:07:38] [PASSED] 0x56C1 (DG2)
[15:07:38] [PASSED] 0x7D51 (METEORLAKE)
[15:07:38] [PASSED] 0x7DD1 (METEORLAKE)
[15:07:38] [PASSED] 0x7D41 (METEORLAKE)
[15:07:38] [PASSED] 0x7D67 (METEORLAKE)
[15:07:38] [PASSED] 0xB640 (METEORLAKE)
[15:07:38] [PASSED] 0x56A0 (DG2)
[15:07:38] [PASSED] 0x56A1 (DG2)
[15:07:38] [PASSED] 0x56A2 (DG2)
[15:07:38] [PASSED] 0x56BE (DG2)
[15:07:38] [PASSED] 0x56BF (DG2)
[15:07:38] [PASSED] 0x5690 (DG2)
[15:07:38] [PASSED] 0x5691 (DG2)
[15:07:38] [PASSED] 0x5692 (DG2)
[15:07:38] [PASSED] 0x56A5 (DG2)
[15:07:38] [PASSED] 0x56A6 (DG2)
[15:07:38] [PASSED] 0x56B0 (DG2)
[15:07:38] [PASSED] 0x56B1 (DG2)
[15:07:38] [PASSED] 0x56BA (DG2)
[15:07:38] [PASSED] 0x56BB (DG2)
[15:07:38] [PASSED] 0x56BC (DG2)
[15:07:38] [PASSED] 0x56BD (DG2)
[15:07:38] [PASSED] 0x5693 (DG2)
[15:07:38] [PASSED] 0x5694 (DG2)
[15:07:38] [PASSED] 0x5695 (DG2)
[15:07:38] [PASSED] 0x56A3 (DG2)
[15:07:38] [PASSED] 0x56A4 (DG2)
[15:07:38] [PASSED] 0x56B2 (DG2)
[15:07:38] [PASSED] 0x56B3 (DG2)
[15:07:38] [PASSED] 0x5696 (DG2)
[15:07:38] [PASSED] 0x5697 (DG2)
[15:07:38] [PASSED] 0xB69 (PVC)
[15:07:38] [PASSED] 0xB6E (PVC)
[15:07:38] [PASSED] 0xBD4 (PVC)
[15:07:38] [PASSED] 0xBD5 (PVC)
[15:07:38] [PASSED] 0xBD6 (PVC)
[15:07:38] [PASSED] 0xBD7 (PVC)
[15:07:38] [PASSED] 0xBD8 (PVC)
[15:07:38] [PASSED] 0xBD9 (PVC)
[15:07:38] [PASSED] 0xBDA (PVC)
[15:07:38] [PASSED] 0xBDB (PVC)
[15:07:38] [PASSED] 0xBE0 (PVC)
[15:07:38] [PASSED] 0xBE1 (PVC)
[15:07:38] [PASSED] 0xBE5 (PVC)
[15:07:38] [PASSED] 0x7D40 (METEORLAKE)
[15:07:38] [PASSED] 0x7D45 (METEORLAKE)
[15:07:38] [PASSED] 0x7D55 (METEORLAKE)
[15:07:38] [PASSED] 0x7D60 (METEORLAKE)
[15:07:38] [PASSED] 0x7DD5 (METEORLAKE)
[15:07:38] [PASSED] 0x6420 (LUNARLAKE)
[15:07:38] [PASSED] 0x64A0 (LUNARLAKE)
[15:07:38] [PASSED] 0x64B0 (LUNARLAKE)
[15:07:38] [PASSED] 0xE202 (BATTLEMAGE)
[15:07:38] [PASSED] 0xE209 (BATTLEMAGE)
[15:07:38] [PASSED] 0xE20B (BATTLEMAGE)
[15:07:38] [PASSED] 0xE20C (BATTLEMAGE)
[15:07:38] [PASSED] 0xE20D (BATTLEMAGE)
[15:07:38] [PASSED] 0xE210 (BATTLEMAGE)
[15:07:38] [PASSED] 0xE211 (BATTLEMAGE)
[15:07:38] [PASSED] 0xE212 (BATTLEMAGE)
[15:07:38] [PASSED] 0xE216 (BATTLEMAGE)
[15:07:38] [PASSED] 0xE220 (BATTLEMAGE)
[15:07:38] [PASSED] 0xE221 (BATTLEMAGE)
[15:07:38] [PASSED] 0xE222 (BATTLEMAGE)
[15:07:38] [PASSED] 0xE223 (BATTLEMAGE)
[15:07:38] [PASSED] 0xB080 (PANTHERLAKE)
[15:07:38] [PASSED] 0xB081 (PANTHERLAKE)
[15:07:38] [PASSED] 0xB082 (PANTHERLAKE)
[15:07:38] [PASSED] 0xB083 (PANTHERLAKE)
[15:07:38] [PASSED] 0xB084 (PANTHERLAKE)
[15:07:38] [PASSED] 0xB085 (PANTHERLAKE)
[15:07:38] [PASSED] 0xB086 (PANTHERLAKE)
[15:07:38] [PASSED] 0xB087 (PANTHERLAKE)
[15:07:38] [PASSED] 0xB08F (PANTHERLAKE)
[15:07:38] [PASSED] 0xB090 (PANTHERLAKE)
[15:07:38] [PASSED] 0xB0A0 (PANTHERLAKE)
[15:07:38] [PASSED] 0xB0B0 (PANTHERLAKE)
[15:07:38] [PASSED] 0xFD80 (PANTHERLAKE)
[15:07:38] [PASSED] 0xFD81 (PANTHERLAKE)
[15:07:38] ============= [PASSED] check_platform_gt_count =============
[15:07:38] ===================== [PASSED] xe_pci ======================
[15:07:38] =================== xe_rtp (2 subtests) ====================
[15:07:38] =============== xe_rtp_process_to_sr_tests ================
[15:07:38] [PASSED] coalesce-same-reg
[15:07:38] [PASSED] no-match-no-add
[15:07:38] [PASSED] match-or
[15:07:38] [PASSED] match-or-xfail
[15:07:38] [PASSED] no-match-no-add-multiple-rules
[15:07:38] [PASSED] two-regs-two-entries
[15:07:38] [PASSED] clr-one-set-other
[15:07:38] [PASSED] set-field
[15:07:38] [PASSED] conflict-duplicate
[15:07:38] [PASSED] conflict-not-disjoint
[15:07:38] [PASSED] conflict-reg-type
[15:07:38] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[15:07:38] ================== xe_rtp_process_tests ===================
[15:07:38] [PASSED] active1
[15:07:38] [PASSED] active2
[15:07:38] [PASSED] active-inactive
[15:07:38] [PASSED] inactive-active
[15:07:38] [PASSED] inactive-1st_or_active-inactive
[15:07:38] [PASSED] inactive-2nd_or_active-inactive
[15:07:38] [PASSED] inactive-last_or_active-inactive
[15:07:38] [PASSED] inactive-no_or_active-inactive
[15:07:38] ============== [PASSED] xe_rtp_process_tests ===============
[15:07:38] ===================== [PASSED] xe_rtp ======================
[15:07:38] ==================== xe_wa (1 subtest) =====================
[15:07:38] ======================== xe_wa_gt =========================
[15:07:38] [PASSED] TIGERLAKE B0
[15:07:38] [PASSED] DG1 A0
[15:07:38] [PASSED] DG1 B0
[15:07:38] [PASSED] ALDERLAKE_S A0
[15:07:38] [PASSED] ALDERLAKE_S B0
stty: 'standard input': Inappropriate ioctl for device
[15:07:38] [PASSED] ALDERLAKE_S C0
[15:07:38] [PASSED] ALDERLAKE_S D0
[15:07:38] [PASSED] ALDERLAKE_P A0
[15:07:38] [PASSED] ALDERLAKE_P B0
[15:07:38] [PASSED] ALDERLAKE_P C0
[15:07:38] [PASSED] ALDERLAKE_S RPLS D0
[15:07:38] [PASSED] ALDERLAKE_P RPLU E0
[15:07:38] [PASSED] DG2 G10 C0
[15:07:38] [PASSED] DG2 G11 B1
[15:07:38] [PASSED] DG2 G12 A1
[15:07:38] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[15:07:38] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[15:07:38] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[15:07:38] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[15:07:38] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[15:07:38] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[15:07:38] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[15:07:38] ==================== [PASSED] xe_wa_gt =====================
[15:07:38] ====================== [PASSED] xe_wa ======================
[15:07:38] ============================================================
[15:07:38] Testing complete. Ran 306 tests: passed: 288, skipped: 18
[15:07:38] Elapsed time: 33.651s total, 4.313s configuring, 28.971s building, 0.325s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[15:07:38] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[15:07:39] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[15:08:03] Starting KUnit Kernel (1/1)...
[15:08:03] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[15:08:03] ============ drm_test_pick_cmdline (2 subtests) ============
[15:08:03] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[15:08:03] =============== drm_test_pick_cmdline_named ===============
[15:08:03] [PASSED] NTSC
[15:08:03] [PASSED] NTSC-J
[15:08:03] [PASSED] PAL
[15:08:03] [PASSED] PAL-M
[15:08:03] =========== [PASSED] drm_test_pick_cmdline_named ===========
[15:08:03] ============== [PASSED] drm_test_pick_cmdline ==============
[15:08:03] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[15:08:03] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[15:08:03] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[15:08:03] =========== drm_validate_clone_mode (2 subtests) ===========
[15:08:03] ============== drm_test_check_in_clone_mode ===============
[15:08:03] [PASSED] in_clone_mode
[15:08:03] [PASSED] not_in_clone_mode
[15:08:03] ========== [PASSED] drm_test_check_in_clone_mode ===========
[15:08:03] =============== drm_test_check_valid_clones ===============
[15:08:03] [PASSED] not_in_clone_mode
[15:08:03] [PASSED] valid_clone
[15:08:03] [PASSED] invalid_clone
[15:08:03] =========== [PASSED] drm_test_check_valid_clones ===========
[15:08:03] ============= [PASSED] drm_validate_clone_mode =============
[15:08:03] ============= drm_validate_modeset (1 subtest) =============
[15:08:03] [PASSED] drm_test_check_connector_changed_modeset
[15:08:03] ============== [PASSED] drm_validate_modeset ===============
[15:08:03] ====== drm_test_bridge_get_current_state (2 subtests) ======
[15:08:03] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[15:08:03] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[15:08:03] ======== [PASSED] drm_test_bridge_get_current_state ========
[15:08:03] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[15:08:03] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[15:08:03] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[15:08:03] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[15:08:03] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[15:08:03] ============== drm_bridge_alloc (2 subtests) ===============
[15:08:03] [PASSED] drm_test_drm_bridge_alloc_basic
[15:08:03] [PASSED] drm_test_drm_bridge_alloc_get_put
[15:08:03] ================ [PASSED] drm_bridge_alloc =================
[15:08:03] ================== drm_buddy (7 subtests) ==================
[15:08:03] [PASSED] drm_test_buddy_alloc_limit
[15:08:03] [PASSED] drm_test_buddy_alloc_optimistic
[15:08:03] [PASSED] drm_test_buddy_alloc_pessimistic
[15:08:03] [PASSED] drm_test_buddy_alloc_pathological
[15:08:03] [PASSED] drm_test_buddy_alloc_contiguous
[15:08:03] [PASSED] drm_test_buddy_alloc_clear
[15:08:03] [PASSED] drm_test_buddy_alloc_range_bias
[15:08:03] ==================== [PASSED] drm_buddy ====================
[15:08:03] ============= drm_cmdline_parser (40 subtests) =============
[15:08:03] [PASSED] drm_test_cmdline_force_d_only
[15:08:03] [PASSED] drm_test_cmdline_force_D_only_dvi
[15:08:03] [PASSED] drm_test_cmdline_force_D_only_hdmi
[15:08:03] [PASSED] drm_test_cmdline_force_D_only_not_digital
[15:08:03] [PASSED] drm_test_cmdline_force_e_only
[15:08:03] [PASSED] drm_test_cmdline_res
[15:08:03] [PASSED] drm_test_cmdline_res_vesa
[15:08:03] [PASSED] drm_test_cmdline_res_vesa_rblank
[15:08:03] [PASSED] drm_test_cmdline_res_rblank
[15:08:03] [PASSED] drm_test_cmdline_res_bpp
[15:08:03] [PASSED] drm_test_cmdline_res_refresh
[15:08:03] [PASSED] drm_test_cmdline_res_bpp_refresh
[15:08:03] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[15:08:03] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[15:08:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[15:08:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[15:08:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[15:08:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[15:08:03] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[15:08:03] [PASSED] drm_test_cmdline_res_margins_force_on
[15:08:03] [PASSED] drm_test_cmdline_res_vesa_margins
[15:08:03] [PASSED] drm_test_cmdline_name
[15:08:03] [PASSED] drm_test_cmdline_name_bpp
[15:08:03] [PASSED] drm_test_cmdline_name_option
[15:08:03] [PASSED] drm_test_cmdline_name_bpp_option
[15:08:03] [PASSED] drm_test_cmdline_rotate_0
[15:08:03] [PASSED] drm_test_cmdline_rotate_90
[15:08:03] [PASSED] drm_test_cmdline_rotate_180
[15:08:03] [PASSED] drm_test_cmdline_rotate_270
[15:08:03] [PASSED] drm_test_cmdline_hmirror
[15:08:03] [PASSED] drm_test_cmdline_vmirror
[15:08:03] [PASSED] drm_test_cmdline_margin_options
[15:08:03] [PASSED] drm_test_cmdline_multiple_options
[15:08:03] [PASSED] drm_test_cmdline_bpp_extra_and_option
[15:08:03] [PASSED] drm_test_cmdline_extra_and_option
[15:08:03] [PASSED] drm_test_cmdline_freestanding_options
[15:08:03] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[15:08:03] [PASSED] drm_test_cmdline_panel_orientation
[15:08:03] ================ drm_test_cmdline_invalid =================
[15:08:03] [PASSED] margin_only
[15:08:03] [PASSED] interlace_only
[15:08:03] [PASSED] res_missing_x
[15:08:03] [PASSED] res_missing_y
[15:08:03] [PASSED] res_bad_y
[15:08:03] [PASSED] res_missing_y_bpp
[15:08:03] [PASSED] res_bad_bpp
[15:08:03] [PASSED] res_bad_refresh
[15:08:03] [PASSED] res_bpp_refresh_force_on_off
[15:08:03] [PASSED] res_invalid_mode
[15:08:03] [PASSED] res_bpp_wrong_place_mode
[15:08:03] [PASSED] name_bpp_refresh
[15:08:03] [PASSED] name_refresh
[15:08:03] [PASSED] name_refresh_wrong_mode
[15:08:03] [PASSED] name_refresh_invalid_mode
[15:08:03] [PASSED] rotate_multiple
[15:08:03] [PASSED] rotate_invalid_val
[15:08:03] [PASSED] rotate_truncated
[15:08:03] [PASSED] invalid_option
[15:08:03] [PASSED] invalid_tv_option
[15:08:03] [PASSED] truncated_tv_option
[15:08:03] ============ [PASSED] drm_test_cmdline_invalid =============
[15:08:03] =============== drm_test_cmdline_tv_options ===============
[15:08:03] [PASSED] NTSC
[15:08:03] [PASSED] NTSC_443
[15:08:03] [PASSED] NTSC_J
[15:08:03] [PASSED] PAL
[15:08:03] [PASSED] PAL_M
[15:08:03] [PASSED] PAL_N
[15:08:03] [PASSED] SECAM
[15:08:03] [PASSED] MONO_525
[15:08:03] [PASSED] MONO_625
[15:08:03] =========== [PASSED] drm_test_cmdline_tv_options ===========
[15:08:03] =============== [PASSED] drm_cmdline_parser ================
[15:08:03] ========== drmm_connector_hdmi_init (20 subtests) ==========
[15:08:03] [PASSED] drm_test_connector_hdmi_init_valid
[15:08:03] [PASSED] drm_test_connector_hdmi_init_bpc_8
[15:08:03] [PASSED] drm_test_connector_hdmi_init_bpc_10
[15:08:03] [PASSED] drm_test_connector_hdmi_init_bpc_12
[15:08:03] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[15:08:03] [PASSED] drm_test_connector_hdmi_init_bpc_null
[15:08:03] [PASSED] drm_test_connector_hdmi_init_formats_empty
[15:08:03] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[15:08:03] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[15:08:03] [PASSED] supported_formats=0x9 yuv420_allowed=1
[15:08:03] [PASSED] supported_formats=0x9 yuv420_allowed=0
[15:08:03] [PASSED] supported_formats=0x3 yuv420_allowed=1
[15:08:03] [PASSED] supported_formats=0x3 yuv420_allowed=0
[15:08:03] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[15:08:03] [PASSED] drm_test_connector_hdmi_init_null_ddc
[15:08:03] [PASSED] drm_test_connector_hdmi_init_null_product
[15:08:03] [PASSED] drm_test_connector_hdmi_init_null_vendor
[15:08:03] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[15:08:03] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[15:08:03] [PASSED] drm_test_connector_hdmi_init_product_valid
[15:08:03] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[15:08:03] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[15:08:03] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[15:08:03] ========= drm_test_connector_hdmi_init_type_valid =========
[15:08:03] [PASSED] HDMI-A
[15:08:03] [PASSED] HDMI-B
[15:08:03] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[15:08:03] ======== drm_test_connector_hdmi_init_type_invalid ========
[15:08:03] [PASSED] Unknown
[15:08:03] [PASSED] VGA
[15:08:03] [PASSED] DVI-I
[15:08:03] [PASSED] DVI-D
[15:08:03] [PASSED] DVI-A
[15:08:03] [PASSED] Composite
[15:08:03] [PASSED] SVIDEO
[15:08:03] [PASSED] LVDS
[15:08:03] [PASSED] Component
[15:08:03] [PASSED] DIN
[15:08:03] [PASSED] DP
[15:08:03] [PASSED] TV
[15:08:03] [PASSED] eDP
[15:08:03] [PASSED] Virtual
[15:08:03] [PASSED] DSI
[15:08:03] [PASSED] DPI
[15:08:03] [PASSED] Writeback
[15:08:03] [PASSED] SPI
[15:08:03] [PASSED] USB
[15:08:03] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[15:08:03] ============ [PASSED] drmm_connector_hdmi_init =============
[15:08:03] ============= drmm_connector_init (3 subtests) =============
[15:08:03] [PASSED] drm_test_drmm_connector_init
[15:08:03] [PASSED] drm_test_drmm_connector_init_null_ddc
[15:08:03] ========= drm_test_drmm_connector_init_type_valid =========
[15:08:03] [PASSED] Unknown
[15:08:03] [PASSED] VGA
[15:08:03] [PASSED] DVI-I
[15:08:03] [PASSED] DVI-D
[15:08:03] [PASSED] DVI-A
[15:08:03] [PASSED] Composite
[15:08:03] [PASSED] SVIDEO
[15:08:03] [PASSED] LVDS
[15:08:03] [PASSED] Component
[15:08:03] [PASSED] DIN
[15:08:03] [PASSED] DP
[15:08:03] [PASSED] HDMI-A
[15:08:03] [PASSED] HDMI-B
[15:08:03] [PASSED] TV
[15:08:03] [PASSED] eDP
[15:08:03] [PASSED] Virtual
[15:08:03] [PASSED] DSI
[15:08:03] [PASSED] DPI
[15:08:03] [PASSED] Writeback
[15:08:03] [PASSED] SPI
[15:08:03] [PASSED] USB
[15:08:03] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[15:08:03] =============== [PASSED] drmm_connector_init ===============
[15:08:03] ========= drm_connector_dynamic_init (6 subtests) ==========
[15:08:03] [PASSED] drm_test_drm_connector_dynamic_init
[15:08:03] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[15:08:03] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[15:08:03] [PASSED] drm_test_drm_connector_dynamic_init_properties
[15:08:03] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[15:08:03] [PASSED] Unknown
[15:08:03] [PASSED] VGA
[15:08:03] [PASSED] DVI-I
[15:08:03] [PASSED] DVI-D
[15:08:03] [PASSED] DVI-A
[15:08:03] [PASSED] Composite
[15:08:03] [PASSED] SVIDEO
[15:08:03] [PASSED] LVDS
[15:08:03] [PASSED] Component
[15:08:03] [PASSED] DIN
[15:08:03] [PASSED] DP
[15:08:03] [PASSED] HDMI-A
[15:08:03] [PASSED] HDMI-B
[15:08:03] [PASSED] TV
[15:08:03] [PASSED] eDP
[15:08:03] [PASSED] Virtual
[15:08:03] [PASSED] DSI
[15:08:03] [PASSED] DPI
[15:08:03] [PASSED] Writeback
[15:08:03] [PASSED] SPI
[15:08:03] [PASSED] USB
[15:08:03] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[15:08:03] ======== drm_test_drm_connector_dynamic_init_name =========
[15:08:03] [PASSED] Unknown
[15:08:03] [PASSED] VGA
[15:08:03] [PASSED] DVI-I
[15:08:03] [PASSED] DVI-D
[15:08:03] [PASSED] DVI-A
[15:08:03] [PASSED] Composite
[15:08:03] [PASSED] SVIDEO
[15:08:03] [PASSED] LVDS
[15:08:03] [PASSED] Component
[15:08:03] [PASSED] DIN
[15:08:03] [PASSED] DP
[15:08:03] [PASSED] HDMI-A
[15:08:03] [PASSED] HDMI-B
[15:08:03] [PASSED] TV
[15:08:03] [PASSED] eDP
[15:08:03] [PASSED] Virtual
[15:08:03] [PASSED] DSI
[15:08:03] [PASSED] DPI
[15:08:03] [PASSED] Writeback
[15:08:03] [PASSED] SPI
[15:08:03] [PASSED] USB
[15:08:03] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[15:08:03] =========== [PASSED] drm_connector_dynamic_init ============
[15:08:03] ==== drm_connector_dynamic_register_early (4 subtests) =====
[15:08:03] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[15:08:03] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[15:08:03] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[15:08:03] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[15:08:03] ====== [PASSED] drm_connector_dynamic_register_early =======
[15:08:03] ======= drm_connector_dynamic_register (7 subtests) ========
[15:08:03] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[15:08:03] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[15:08:03] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[15:08:03] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[15:08:03] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[15:08:03] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[15:08:03] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[15:08:03] ========= [PASSED] drm_connector_dynamic_register ==========
[15:08:03] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[15:08:03] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[15:08:03] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[15:08:03] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[15:08:03] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[15:08:03] ========== drm_test_get_tv_mode_from_name_valid ===========
[15:08:03] [PASSED] NTSC
[15:08:03] [PASSED] NTSC-443
[15:08:03] [PASSED] NTSC-J
[15:08:03] [PASSED] PAL
[15:08:03] [PASSED] PAL-M
[15:08:03] [PASSED] PAL-N
[15:08:03] [PASSED] SECAM
[15:08:03] [PASSED] Mono
[15:08:03] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[15:08:03] [PASSED] drm_test_get_tv_mode_from_name_truncated
[15:08:03] ============ [PASSED] drm_get_tv_mode_from_name ============
[15:08:03] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[15:08:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[15:08:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[15:08:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[15:08:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[15:08:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[15:08:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[15:08:03] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[15:08:03] [PASSED] VIC 96
[15:08:03] [PASSED] VIC 97
[15:08:03] [PASSED] VIC 101
[15:08:03] [PASSED] VIC 102
[15:08:03] [PASSED] VIC 106
[15:08:03] [PASSED] VIC 107
[15:08:03] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[15:08:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[15:08:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[15:08:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[15:08:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[15:08:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[15:08:03] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[15:08:03] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[15:08:03] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[15:08:03] [PASSED] Automatic
[15:08:03] [PASSED] Full
[15:08:03] [PASSED] Limited 16:235
[15:08:03] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[15:08:03] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[15:08:03] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[15:08:03] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[15:08:03] === drm_test_drm_hdmi_connector_get_output_format_name ====
[15:08:03] [PASSED] RGB
[15:08:03] [PASSED] YUV 4:2:0
[15:08:03] [PASSED] YUV 4:2:2
[15:08:03] [PASSED] YUV 4:4:4
[15:08:03] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[15:08:03] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[15:08:03] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[15:08:03] ============= drm_damage_helper (21 subtests) ==============
[15:08:03] [PASSED] drm_test_damage_iter_no_damage
[15:08:03] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[15:08:03] [PASSED] drm_test_damage_iter_no_damage_src_moved
[15:08:03] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[15:08:03] [PASSED] drm_test_damage_iter_no_damage_not_visible
[15:08:03] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[15:08:03] [PASSED] drm_test_damage_iter_no_damage_no_fb
[15:08:03] [PASSED] drm_test_damage_iter_simple_damage
[15:08:03] [PASSED] drm_test_damage_iter_single_damage
[15:08:03] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[15:08:03] [PASSED] drm_test_damage_iter_single_damage_outside_src
[15:08:03] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[15:08:03] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[15:08:03] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[15:08:03] [PASSED] drm_test_damage_iter_single_damage_src_moved
[15:08:03] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[15:08:03] [PASSED] drm_test_damage_iter_damage
[15:08:03] [PASSED] drm_test_damage_iter_damage_one_intersect
[15:08:03] [PASSED] drm_test_damage_iter_damage_one_outside
[15:08:03] [PASSED] drm_test_damage_iter_damage_src_moved
[15:08:03] [PASSED] drm_test_damage_iter_damage_not_visible
[15:08:03] ================ [PASSED] drm_damage_helper ================
[15:08:03] ============== drm_dp_mst_helper (3 subtests) ==============
[15:08:03] ============== drm_test_dp_mst_calc_pbn_mode ==============
[15:08:03] [PASSED] Clock 154000 BPP 30 DSC disabled
[15:08:03] [PASSED] Clock 234000 BPP 30 DSC disabled
[15:08:03] [PASSED] Clock 297000 BPP 24 DSC disabled
[15:08:03] [PASSED] Clock 332880 BPP 24 DSC enabled
[15:08:03] [PASSED] Clock 324540 BPP 24 DSC enabled
[15:08:03] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[15:08:03] ============== drm_test_dp_mst_calc_pbn_div ===============
[15:08:03] [PASSED] Link rate 2000000 lane count 4
[15:08:03] [PASSED] Link rate 2000000 lane count 2
[15:08:03] [PASSED] Link rate 2000000 lane count 1
[15:08:03] [PASSED] Link rate 1350000 lane count 4
[15:08:03] [PASSED] Link rate 1350000 lane count 2
[15:08:03] [PASSED] Link rate 1350000 lane count 1
[15:08:03] [PASSED] Link rate 1000000 lane count 4
[15:08:03] [PASSED] Link rate 1000000 lane count 2
[15:08:03] [PASSED] Link rate 1000000 lane count 1
[15:08:03] [PASSED] Link rate 810000 lane count 4
[15:08:03] [PASSED] Link rate 810000 lane count 2
[15:08:03] [PASSED] Link rate 810000 lane count 1
[15:08:03] [PASSED] Link rate 540000 lane count 4
[15:08:03] [PASSED] Link rate 540000 lane count 2
[15:08:03] [PASSED] Link rate 540000 lane count 1
[15:08:03] [PASSED] Link rate 270000 lane count 4
[15:08:03] [PASSED] Link rate 270000 lane count 2
[15:08:03] [PASSED] Link rate 270000 lane count 1
[15:08:03] [PASSED] Link rate 162000 lane count 4
[15:08:03] [PASSED] Link rate 162000 lane count 2
[15:08:03] [PASSED] Link rate 162000 lane count 1
[15:08:03] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[15:08:03] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[15:08:03] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[15:08:03] [PASSED] DP_POWER_UP_PHY with port number
[15:08:03] [PASSED] DP_POWER_DOWN_PHY with port number
[15:08:03] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[15:08:03] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[15:08:03] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[15:08:03] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[15:08:03] [PASSED] DP_QUERY_PAYLOAD with port number
[15:08:03] [PASSED] DP_QUERY_PAYLOAD with VCPI
[15:08:03] [PASSED] DP_REMOTE_DPCD_READ with port number
[15:08:03] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[15:08:03] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[15:08:03] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[15:08:03] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[15:08:03] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[15:08:03] [PASSED] DP_REMOTE_I2C_READ with port number
[15:08:03] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[15:08:03] [PASSED] DP_REMOTE_I2C_READ with transactions array
[15:08:03] [PASSED] DP_REMOTE_I2C_WRITE with port number
[15:08:03] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[15:08:03] [PASSED] DP_REMOTE_I2C_WRITE with data array
[15:08:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[15:08:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[15:08:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[15:08:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[15:08:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[15:08:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[15:08:03] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[15:08:03] ================ [PASSED] drm_dp_mst_helper ================
[15:08:03] ================== drm_exec (7 subtests) ===================
[15:08:03] [PASSED] sanitycheck
[15:08:03] [PASSED] test_lock
[15:08:03] [PASSED] test_lock_unlock
[15:08:03] [PASSED] test_duplicates
[15:08:03] [PASSED] test_prepare
[15:08:03] [PASSED] test_prepare_array
[15:08:03] [PASSED] test_multiple_loops
[15:08:03] ==================== [PASSED] drm_exec =====================
[15:08:03] =========== drm_format_helper_test (17 subtests) ===========
[15:08:03] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[15:08:03] [PASSED] single_pixel_source_buffer
[15:08:03] [PASSED] single_pixel_clip_rectangle
[15:08:03] [PASSED] well_known_colors
[15:08:03] [PASSED] destination_pitch
[15:08:03] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[15:08:03] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[15:08:03] [PASSED] single_pixel_source_buffer
[15:08:03] [PASSED] single_pixel_clip_rectangle
[15:08:03] [PASSED] well_known_colors
[15:08:03] [PASSED] destination_pitch
[15:08:03] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[15:08:03] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[15:08:03] [PASSED] single_pixel_source_buffer
[15:08:03] [PASSED] single_pixel_clip_rectangle
[15:08:03] [PASSED] well_known_colors
[15:08:03] [PASSED] destination_pitch
[15:08:03] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[15:08:03] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[15:08:03] [PASSED] single_pixel_source_buffer
[15:08:03] [PASSED] single_pixel_clip_rectangle
[15:08:03] [PASSED] well_known_colors
[15:08:03] [PASSED] destination_pitch
[15:08:03] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[15:08:03] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[15:08:03] [PASSED] single_pixel_source_buffer
[15:08:03] [PASSED] single_pixel_clip_rectangle
[15:08:03] [PASSED] well_known_colors
[15:08:03] [PASSED] destination_pitch
[15:08:03] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[15:08:03] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[15:08:03] [PASSED] single_pixel_source_buffer
[15:08:03] [PASSED] single_pixel_clip_rectangle
[15:08:03] [PASSED] well_known_colors
[15:08:03] [PASSED] destination_pitch
[15:08:03] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[15:08:03] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[15:08:03] [PASSED] single_pixel_source_buffer
[15:08:03] [PASSED] single_pixel_clip_rectangle
[15:08:03] [PASSED] well_known_colors
[15:08:03] [PASSED] destination_pitch
[15:08:03] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[15:08:03] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[15:08:03] [PASSED] single_pixel_source_buffer
[15:08:03] [PASSED] single_pixel_clip_rectangle
[15:08:03] [PASSED] well_known_colors
[15:08:03] [PASSED] destination_pitch
[15:08:03] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[15:08:03] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[15:08:03] [PASSED] single_pixel_source_buffer
[15:08:03] [PASSED] single_pixel_clip_rectangle
[15:08:03] [PASSED] well_known_colors
[15:08:03] [PASSED] destination_pitch
[15:08:03] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[15:08:03] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[15:08:03] [PASSED] single_pixel_source_buffer
[15:08:03] [PASSED] single_pixel_clip_rectangle
[15:08:03] [PASSED] well_known_colors
[15:08:03] [PASSED] destination_pitch
[15:08:03] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[15:08:03] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[15:08:03] [PASSED] single_pixel_source_buffer
[15:08:03] [PASSED] single_pixel_clip_rectangle
[15:08:03] [PASSED] well_known_colors
[15:08:03] [PASSED] destination_pitch
[15:08:03] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[15:08:03] ============== drm_test_fb_xrgb8888_to_mono ===============
[15:08:03] [PASSED] single_pixel_source_buffer
[15:08:03] [PASSED] single_pixel_clip_rectangle
[15:08:03] [PASSED] well_known_colors
[15:08:03] [PASSED] destination_pitch
[15:08:03] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[15:08:03] ==================== drm_test_fb_swab =====================
[15:08:03] [PASSED] single_pixel_source_buffer
[15:08:03] [PASSED] single_pixel_clip_rectangle
[15:08:03] [PASSED] well_known_colors
[15:08:03] [PASSED] destination_pitch
[15:08:03] ================ [PASSED] drm_test_fb_swab =================
[15:08:03] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[15:08:03] [PASSED] single_pixel_source_buffer
[15:08:03] [PASSED] single_pixel_clip_rectangle
[15:08:03] [PASSED] well_known_colors
[15:08:03] [PASSED] destination_pitch
[15:08:03] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[15:08:03] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[15:08:03] [PASSED] single_pixel_source_buffer
[15:08:03] [PASSED] single_pixel_clip_rectangle
[15:08:03] [PASSED] well_known_colors
[15:08:03] [PASSED] destination_pitch
[15:08:03] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[15:08:03] ================= drm_test_fb_clip_offset =================
[15:08:03] [PASSED] pass through
[15:08:03] [PASSED] horizontal offset
[15:08:03] [PASSED] vertical offset
[15:08:03] [PASSED] horizontal and vertical offset
[15:08:03] [PASSED] horizontal offset (custom pitch)
[15:08:03] [PASSED] vertical offset (custom pitch)
[15:08:03] [PASSED] horizontal and vertical offset (custom pitch)
[15:08:03] ============= [PASSED] drm_test_fb_clip_offset =============
[15:08:03] =================== drm_test_fb_memcpy ====================
[15:08:03] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[15:08:03] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[15:08:03] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[15:08:03] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[15:08:03] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[15:08:03] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[15:08:03] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[15:08:03] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[15:08:03] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[15:08:03] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[15:08:03] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[15:08:03] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[15:08:03] =============== [PASSED] drm_test_fb_memcpy ================
[15:08:03] ============= [PASSED] drm_format_helper_test ==============
[15:08:03] ================= drm_format (18 subtests) =================
[15:08:03] [PASSED] drm_test_format_block_width_invalid
[15:08:03] [PASSED] drm_test_format_block_width_one_plane
[15:08:03] [PASSED] drm_test_format_block_width_two_plane
[15:08:03] [PASSED] drm_test_format_block_width_three_plane
[15:08:03] [PASSED] drm_test_format_block_width_tiled
[15:08:03] [PASSED] drm_test_format_block_height_invalid
[15:08:03] [PASSED] drm_test_format_block_height_one_plane
[15:08:03] [PASSED] drm_test_format_block_height_two_plane
[15:08:03] [PASSED] drm_test_format_block_height_three_plane
[15:08:03] [PASSED] drm_test_format_block_height_tiled
[15:08:03] [PASSED] drm_test_format_min_pitch_invalid
[15:08:03] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[15:08:03] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[15:08:03] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[15:08:03] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[15:08:03] [PASSED] drm_test_format_min_pitch_two_plane
[15:08:03] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[15:08:03] [PASSED] drm_test_format_min_pitch_tiled
[15:08:03] =================== [PASSED] drm_format ====================
[15:08:03] ============== drm_framebuffer (10 subtests) ===============
[15:08:03] ========== drm_test_framebuffer_check_src_coords ==========
[15:08:03] [PASSED] Success: source fits into fb
[15:08:03] [PASSED] Fail: overflowing fb with x-axis coordinate
[15:08:03] [PASSED] Fail: overflowing fb with y-axis coordinate
[15:08:03] [PASSED] Fail: overflowing fb with source width
[15:08:03] [PASSED] Fail: overflowing fb with source height
[15:08:03] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[15:08:03] [PASSED] drm_test_framebuffer_cleanup
[15:08:03] =============== drm_test_framebuffer_create ===============
[15:08:03] [PASSED] ABGR8888 normal sizes
[15:08:03] [PASSED] ABGR8888 max sizes
[15:08:03] [PASSED] ABGR8888 pitch greater than min required
[15:08:03] [PASSED] ABGR8888 pitch less than min required
[15:08:03] [PASSED] ABGR8888 Invalid width
[15:08:03] [PASSED] ABGR8888 Invalid buffer handle
[15:08:03] [PASSED] No pixel format
[15:08:03] [PASSED] ABGR8888 Width 0
[15:08:03] [PASSED] ABGR8888 Height 0
[15:08:03] [PASSED] ABGR8888 Out of bound height * pitch combination
[15:08:03] [PASSED] ABGR8888 Large buffer offset
[15:08:03] [PASSED] ABGR8888 Buffer offset for inexistent plane
[15:08:03] [PASSED] ABGR8888 Invalid flag
[15:08:03] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[15:08:03] [PASSED] ABGR8888 Valid buffer modifier
[15:08:03] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[15:08:03] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[15:08:03] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[15:08:03] [PASSED] NV12 Normal sizes
[15:08:03] [PASSED] NV12 Max sizes
[15:08:03] [PASSED] NV12 Invalid pitch
[15:08:03] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[15:08:03] [PASSED] NV12 different modifier per-plane
[15:08:03] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[15:08:03] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[15:08:03] [PASSED] NV12 Modifier for inexistent plane
[15:08:03] [PASSED] NV12 Handle for inexistent plane
[15:08:03] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[15:08:03] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[15:08:03] [PASSED] YVU420 Normal sizes
[15:08:03] [PASSED] YVU420 Max sizes
[15:08:03] [PASSED] YVU420 Invalid pitch
[15:08:03] [PASSED] YVU420 Different pitches
[15:08:03] [PASSED] YVU420 Different buffer offsets/pitches
[15:08:03] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[15:08:03] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[15:08:03] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[15:08:03] [PASSED] YVU420 Valid modifier
[15:08:03] [PASSED] YVU420 Different modifiers per plane
[15:08:03] [PASSED] YVU420 Modifier for inexistent plane
[15:08:03] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[15:08:03] [PASSED] X0L2 Normal sizes
[15:08:03] [PASSED] X0L2 Max sizes
[15:08:03] [PASSED] X0L2 Invalid pitch
[15:08:03] [PASSED] X0L2 Pitch greater than minimum required
[15:08:03] [PASSED] X0L2 Handle for inexistent plane
[15:08:03] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[15:08:03] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[15:08:03] [PASSED] X0L2 Valid modifier
[15:08:03] [PASSED] X0L2 Modifier for inexistent plane
[15:08:03] =========== [PASSED] drm_test_framebuffer_create ===========
[15:08:03] [PASSED] drm_test_framebuffer_free
[15:08:03] [PASSED] drm_test_framebuffer_init
[15:08:03] [PASSED] drm_test_framebuffer_init_bad_format
[15:08:03] [PASSED] drm_test_framebuffer_init_dev_mismatch
[15:08:03] [PASSED] drm_test_framebuffer_lookup
[15:08:03] [PASSED] drm_test_framebuffer_lookup_inexistent
[15:08:03] [PASSED] drm_test_framebuffer_modifiers_not_supported
[15:08:03] ================= [PASSED] drm_framebuffer =================
[15:08:03] ================ drm_gem_shmem (8 subtests) ================
[15:08:03] [PASSED] drm_gem_shmem_test_obj_create
[15:08:03] [PASSED] drm_gem_shmem_test_obj_create_private
[15:08:03] [PASSED] drm_gem_shmem_test_pin_pages
[15:08:03] [PASSED] drm_gem_shmem_test_vmap
[15:08:03] [PASSED] drm_gem_shmem_test_get_pages_sgt
[15:08:03] [PASSED] drm_gem_shmem_test_get_sg_table
[15:08:03] [PASSED] drm_gem_shmem_test_madvise
[15:08:03] [PASSED] drm_gem_shmem_test_purge
[15:08:03] ================== [PASSED] drm_gem_shmem ==================
[15:08:03] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[15:08:03] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[15:08:03] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[15:08:03] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[15:08:03] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[15:08:03] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[15:08:03] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[15:08:03] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[15:08:03] [PASSED] Automatic
[15:08:03] [PASSED] Full
[15:08:03] [PASSED] Limited 16:235
[15:08:03] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[15:08:03] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[15:08:03] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[15:08:03] [PASSED] drm_test_check_disable_connector
[15:08:03] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[15:08:03] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[15:08:03] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[15:08:03] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[15:08:03] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[15:08:03] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[15:08:03] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[15:08:03] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[15:08:03] [PASSED] drm_test_check_output_bpc_dvi
[15:08:03] [PASSED] drm_test_check_output_bpc_format_vic_1
[15:08:03] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[15:08:03] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[15:08:03] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[15:08:03] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[15:08:03] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[15:08:03] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[15:08:03] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[15:08:03] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[15:08:03] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[15:08:03] [PASSED] drm_test_check_broadcast_rgb_value
[15:08:03] [PASSED] drm_test_check_bpc_8_value
[15:08:03] [PASSED] drm_test_check_bpc_10_value
[15:08:03] [PASSED] drm_test_check_bpc_12_value
[15:08:03] [PASSED] drm_test_check_format_value
[15:08:03] [PASSED] drm_test_check_tmds_char_value
[15:08:03] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[15:08:03] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[15:08:03] [PASSED] drm_test_check_mode_valid
[15:08:03] [PASSED] drm_test_check_mode_valid_reject
[15:08:03] [PASSED] drm_test_check_mode_valid_reject_rate
[15:08:03] [PASSED] drm_test_check_mode_valid_reject_max_clock
[15:08:03] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[15:08:03] ================= drm_managed (2 subtests) =================
[15:08:03] [PASSED] drm_test_managed_release_action
[15:08:03] [PASSED] drm_test_managed_run_action
[15:08:03] =================== [PASSED] drm_managed ===================
[15:08:03] =================== drm_mm (6 subtests) ====================
[15:08:03] [PASSED] drm_test_mm_init
[15:08:03] [PASSED] drm_test_mm_debug
[15:08:03] [PASSED] drm_test_mm_align32
[15:08:03] [PASSED] drm_test_mm_align64
[15:08:03] [PASSED] drm_test_mm_lowest
[15:08:03] [PASSED] drm_test_mm_highest
[15:08:03] ===================== [PASSED] drm_mm ======================
[15:08:03] ============= drm_modes_analog_tv (5 subtests) =============
[15:08:03] [PASSED] drm_test_modes_analog_tv_mono_576i
[15:08:03] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[15:08:03] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[15:08:03] [PASSED] drm_test_modes_analog_tv_pal_576i
[15:08:03] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[15:08:03] =============== [PASSED] drm_modes_analog_tv ===============
[15:08:03] ============== drm_plane_helper (2 subtests) ===============
[15:08:03] =============== drm_test_check_plane_state ================
[15:08:03] [PASSED] clipping_simple
[15:08:03] [PASSED] clipping_rotate_reflect
[15:08:03] [PASSED] positioning_simple
[15:08:03] [PASSED] upscaling
[15:08:03] [PASSED] downscaling
[15:08:03] [PASSED] rounding1
[15:08:03] [PASSED] rounding2
[15:08:03] [PASSED] rounding3
[15:08:03] [PASSED] rounding4
[15:08:03] =========== [PASSED] drm_test_check_plane_state ============
[15:08:03] =========== drm_test_check_invalid_plane_state ============
[15:08:03] [PASSED] positioning_invalid
[15:08:03] [PASSED] upscaling_invalid
[15:08:03] [PASSED] downscaling_invalid
[15:08:03] ======= [PASSED] drm_test_check_invalid_plane_state ========
[15:08:03] ================ [PASSED] drm_plane_helper =================
[15:08:03] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[15:08:03] ====== drm_test_connector_helper_tv_get_modes_check =======
[15:08:03] [PASSED] None
[15:08:03] [PASSED] PAL
[15:08:03] [PASSED] NTSC
[15:08:03] [PASSED] Both, NTSC Default
[15:08:03] [PASSED] Both, PAL Default
[15:08:03] [PASSED] Both, NTSC Default, with PAL on command-line
[15:08:03] [PASSED] Both, PAL Default, with NTSC on command-line
[15:08:03] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[15:08:03] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[15:08:03] ================== drm_rect (9 subtests) ===================
[15:08:03] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[15:08:03] [PASSED] drm_test_rect_clip_scaled_not_clipped
[15:08:03] [PASSED] drm_test_rect_clip_scaled_clipped
[15:08:03] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[15:08:03] ================= drm_test_rect_intersect =================
[15:08:03] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[15:08:03] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[15:08:03] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[15:08:03] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[15:08:03] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[15:08:03] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[15:08:03] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[15:08:03] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[15:08:03] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[15:08:03] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[15:08:03] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[15:08:03] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[15:08:03] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[15:08:03] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[15:08:03] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[15:08:03] ============= [PASSED] drm_test_rect_intersect =============
[15:08:03] ================ drm_test_rect_calc_hscale ================
[15:08:03] [PASSED] normal use
[15:08:03] [PASSED] out of max range
[15:08:03] [PASSED] out of min range
[15:08:03] [PASSED] zero dst
[15:08:03] [PASSED] negative src
[15:08:03] [PASSED] negative dst
[15:08:03] ============ [PASSED] drm_test_rect_calc_hscale ============
[15:08:03] ================ drm_test_rect_calc_vscale ================
[15:08:03] [PASSED] normal use
[15:08:03] [PASSED] out of max range
[15:08:03] [PASSED] out of min range
[15:08:03] [PASSED] zero dst
[15:08:03] [PASSED] negative src
stty: 'standard input': Inappropriate ioctl for device
[15:08:03] [PASSED] negative dst
[15:08:03] ============ [PASSED] drm_test_rect_calc_vscale ============
[15:08:03] ================== drm_test_rect_rotate ===================
[15:08:03] [PASSED] reflect-x
[15:08:03] [PASSED] reflect-y
[15:08:03] [PASSED] rotate-0
[15:08:03] [PASSED] rotate-90
[15:08:03] [PASSED] rotate-180
[15:08:03] [PASSED] rotate-270
[15:08:03] ============== [PASSED] drm_test_rect_rotate ===============
[15:08:03] ================ drm_test_rect_rotate_inv =================
[15:08:03] [PASSED] reflect-x
[15:08:03] [PASSED] reflect-y
[15:08:03] [PASSED] rotate-0
[15:08:03] [PASSED] rotate-90
[15:08:03] [PASSED] rotate-180
[15:08:03] [PASSED] rotate-270
[15:08:03] ============ [PASSED] drm_test_rect_rotate_inv =============
[15:08:03] ==================== [PASSED] drm_rect =====================
[15:08:03] ============ drm_sysfb_modeset_test (1 subtest) ============
[15:08:03] ============ drm_test_sysfb_build_fourcc_list =============
[15:08:03] [PASSED] no native formats
[15:08:03] [PASSED] XRGB8888 as native format
[15:08:03] [PASSED] remove duplicates
[15:08:03] [PASSED] convert alpha formats
[15:08:03] [PASSED] random formats
[15:08:03] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[15:08:03] ============= [PASSED] drm_sysfb_modeset_test ==============
[15:08:03] ============================================================
[15:08:03] Testing complete. Ran 621 tests: passed: 621
[15:08:03] Elapsed time: 25.588s total, 1.739s configuring, 23.676s building, 0.140s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[15:08:03] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[15:08:05] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[15:08:14] Starting KUnit Kernel (1/1)...
[15:08:14] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[15:08:14] ================= ttm_device (5 subtests) ==================
[15:08:14] [PASSED] ttm_device_init_basic
[15:08:14] [PASSED] ttm_device_init_multiple
[15:08:14] [PASSED] ttm_device_fini_basic
[15:08:14] [PASSED] ttm_device_init_no_vma_man
[15:08:14] ================== ttm_device_init_pools ==================
[15:08:14] [PASSED] No DMA allocations, no DMA32 required
[15:08:14] [PASSED] DMA allocations, DMA32 required
[15:08:14] [PASSED] No DMA allocations, DMA32 required
[15:08:14] [PASSED] DMA allocations, no DMA32 required
[15:08:14] ============== [PASSED] ttm_device_init_pools ==============
[15:08:14] =================== [PASSED] ttm_device ====================
[15:08:14] ================== ttm_pool (8 subtests) ===================
[15:08:14] ================== ttm_pool_alloc_basic ===================
[15:08:14] [PASSED] One page
[15:08:14] [PASSED] More than one page
[15:08:14] [PASSED] Above the allocation limit
[15:08:14] [PASSED] One page, with coherent DMA mappings enabled
[15:08:14] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[15:08:14] ============== [PASSED] ttm_pool_alloc_basic ===============
[15:08:14] ============== ttm_pool_alloc_basic_dma_addr ==============
[15:08:14] [PASSED] One page
[15:08:14] [PASSED] More than one page
[15:08:14] [PASSED] Above the allocation limit
[15:08:14] [PASSED] One page, with coherent DMA mappings enabled
[15:08:14] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[15:08:14] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[15:08:14] [PASSED] ttm_pool_alloc_order_caching_match
[15:08:14] [PASSED] ttm_pool_alloc_caching_mismatch
[15:08:14] [PASSED] ttm_pool_alloc_order_mismatch
[15:08:14] [PASSED] ttm_pool_free_dma_alloc
[15:08:14] [PASSED] ttm_pool_free_no_dma_alloc
[15:08:14] [PASSED] ttm_pool_fini_basic
[15:08:14] ==================== [PASSED] ttm_pool =====================
[15:08:14] ================ ttm_resource (8 subtests) =================
[15:08:14] ================= ttm_resource_init_basic =================
[15:08:14] [PASSED] Init resource in TTM_PL_SYSTEM
[15:08:14] [PASSED] Init resource in TTM_PL_VRAM
[15:08:14] [PASSED] Init resource in a private placement
[15:08:14] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[15:08:14] ============= [PASSED] ttm_resource_init_basic =============
[15:08:14] [PASSED] ttm_resource_init_pinned
[15:08:14] [PASSED] ttm_resource_fini_basic
[15:08:14] [PASSED] ttm_resource_manager_init_basic
[15:08:14] [PASSED] ttm_resource_manager_usage_basic
[15:08:14] [PASSED] ttm_resource_manager_set_used_basic
[15:08:14] [PASSED] ttm_sys_man_alloc_basic
[15:08:14] [PASSED] ttm_sys_man_free_basic
[15:08:14] ================== [PASSED] ttm_resource ===================
[15:08:14] =================== ttm_tt (15 subtests) ===================
[15:08:14] ==================== ttm_tt_init_basic ====================
[15:08:14] [PASSED] Page-aligned size
[15:08:14] [PASSED] Extra pages requested
[15:08:14] ================ [PASSED] ttm_tt_init_basic ================
[15:08:14] [PASSED] ttm_tt_init_misaligned
[15:08:14] [PASSED] ttm_tt_fini_basic
[15:08:14] [PASSED] ttm_tt_fini_sg
[15:08:14] [PASSED] ttm_tt_fini_shmem
[15:08:14] [PASSED] ttm_tt_create_basic
[15:08:14] [PASSED] ttm_tt_create_invalid_bo_type
[15:08:14] [PASSED] ttm_tt_create_ttm_exists
[15:08:14] [PASSED] ttm_tt_create_failed
[15:08:14] [PASSED] ttm_tt_destroy_basic
[15:08:14] [PASSED] ttm_tt_populate_null_ttm
[15:08:14] [PASSED] ttm_tt_populate_populated_ttm
[15:08:14] [PASSED] ttm_tt_unpopulate_basic
[15:08:14] [PASSED] ttm_tt_unpopulate_empty_ttm
[15:08:14] [PASSED] ttm_tt_swapin_basic
[15:08:14] ===================== [PASSED] ttm_tt ======================
[15:08:14] =================== ttm_bo (14 subtests) ===================
[15:08:14] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[15:08:14] [PASSED] Cannot be interrupted and sleeps
[15:08:14] [PASSED] Cannot be interrupted, locks straight away
[15:08:14] [PASSED] Can be interrupted, sleeps
[15:08:14] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[15:08:14] [PASSED] ttm_bo_reserve_locked_no_sleep
[15:08:14] [PASSED] ttm_bo_reserve_no_wait_ticket
[15:08:14] [PASSED] ttm_bo_reserve_double_resv
[15:08:14] [PASSED] ttm_bo_reserve_interrupted
[15:08:14] [PASSED] ttm_bo_reserve_deadlock
[15:08:14] [PASSED] ttm_bo_unreserve_basic
[15:08:14] [PASSED] ttm_bo_unreserve_pinned
[15:08:14] [PASSED] ttm_bo_unreserve_bulk
[15:08:14] [PASSED] ttm_bo_fini_basic
[15:08:14] [PASSED] ttm_bo_fini_shared_resv
[15:08:14] [PASSED] ttm_bo_pin_basic
[15:08:14] [PASSED] ttm_bo_pin_unpin_resource
[15:08:14] [PASSED] ttm_bo_multiple_pin_one_unpin
[15:08:14] ===================== [PASSED] ttm_bo ======================
[15:08:14] ============== ttm_bo_validate (21 subtests) ===============
[15:08:14] ============== ttm_bo_init_reserved_sys_man ===============
[15:08:14] [PASSED] Buffer object for userspace
[15:08:14] [PASSED] Kernel buffer object
[15:08:14] [PASSED] Shared buffer object
[15:08:14] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[15:08:14] ============== ttm_bo_init_reserved_mock_man ==============
[15:08:14] [PASSED] Buffer object for userspace
[15:08:14] [PASSED] Kernel buffer object
[15:08:14] [PASSED] Shared buffer object
[15:08:14] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[15:08:14] [PASSED] ttm_bo_init_reserved_resv
[15:08:14] ================== ttm_bo_validate_basic ==================
[15:08:14] [PASSED] Buffer object for userspace
[15:08:14] [PASSED] Kernel buffer object
[15:08:14] [PASSED] Shared buffer object
[15:08:14] ============== [PASSED] ttm_bo_validate_basic ==============
[15:08:14] [PASSED] ttm_bo_validate_invalid_placement
[15:08:14] ============= ttm_bo_validate_same_placement ==============
[15:08:14] [PASSED] System manager
[15:08:14] [PASSED] VRAM manager
[15:08:14] ========= [PASSED] ttm_bo_validate_same_placement ==========
[15:08:14] [PASSED] ttm_bo_validate_failed_alloc
[15:08:14] [PASSED] ttm_bo_validate_pinned
[15:08:14] [PASSED] ttm_bo_validate_busy_placement
[15:08:14] ================ ttm_bo_validate_multihop =================
[15:08:14] [PASSED] Buffer object for userspace
[15:08:14] [PASSED] Kernel buffer object
[15:08:14] [PASSED] Shared buffer object
[15:08:14] ============ [PASSED] ttm_bo_validate_multihop =============
[15:08:14] ========== ttm_bo_validate_no_placement_signaled ==========
[15:08:14] [PASSED] Buffer object in system domain, no page vector
[15:08:14] [PASSED] Buffer object in system domain with an existing page vector
[15:08:14] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[15:08:14] ======== ttm_bo_validate_no_placement_not_signaled ========
[15:08:14] [PASSED] Buffer object for userspace
[15:08:14] [PASSED] Kernel buffer object
[15:08:14] [PASSED] Shared buffer object
[15:08:14] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[15:08:14] [PASSED] ttm_bo_validate_move_fence_signaled
[15:08:14] ========= ttm_bo_validate_move_fence_not_signaled =========
[15:08:14] [PASSED] Waits for GPU
[15:08:14] [PASSED] Tries to lock straight away
[15:08:14] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[15:08:14] [PASSED] ttm_bo_validate_happy_evict
[15:08:14] [PASSED] ttm_bo_validate_all_pinned_evict
[15:08:14] [PASSED] ttm_bo_validate_allowed_only_evict
[15:08:14] [PASSED] ttm_bo_validate_deleted_evict
[15:08:14] [PASSED] ttm_bo_validate_busy_domain_evict
[15:08:14] [PASSED] ttm_bo_validate_evict_gutting
[15:08:14] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[15:08:14] ================= [PASSED] ttm_bo_validate =================
[15:08:14] ============================================================
[15:08:14] Testing complete. Ran 101 tests: passed: 101
[15:08:14] Elapsed time: 11.065s total, 1.747s configuring, 9.052s building, 0.228s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 14+ messages in thread* ✗ Xe.CI.Full: failure for drm/i915/irq: display irq refactoring (rev2)
2025-09-23 14:31 [PATCH v2 0/5] drm/i915/irq: display irq refactoring Jani Nikula
` (5 preceding siblings ...)
2025-09-23 15:08 ` ✓ CI.KUnit: success for drm/i915/irq: display irq refactoring (rev2) Patchwork
@ 2025-09-23 17:58 ` Patchwork
6 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2025-09-23 17:58 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 375 bytes --]
== Series Details ==
Series: drm/i915/irq: display irq refactoring (rev2)
URL : https://patchwork.freedesktop.org/series/154763/
State : failure
== Summary ==
ERROR: The runconfig 'xe-3816-c1c213674df7fbe8d0e972a7c70fb40f601a32a8_FULL' does not exist in the database
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154763v2/index.html
[-- Attachment #2: Type: text/html, Size: 940 bytes --]
^ permalink raw reply [flat|nested] 14+ messages in thread