Re: [PATCH v2 3/5] drm/i915/irq: abstract i9xx_display_irq_enable_mask()

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Tue, Sep 23, 2025 at 05:31:06PM +0300, Jani Nikula wrote:
> Figure out the enable mask for display things in display code. Reuse the
> same function for both i915 and i965 code, the end result remains the
> same.
> 
> This removes a pair of DISPLAY_VER() and HAS_HOTPLUG() checks from core
> irq code.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display_irq.c | 16 ++++++++++++++++
>  drivers/gpu/drm/i915/display/intel_display_irq.h |  1 +
>  drivers/gpu/drm/i915/i915_irq.c                  | 16 ++--------------
>  3 files changed, 19 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index c6f367e6159e..4d51900123ea 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -1900,6 +1900,22 @@ void i9xx_display_irq_reset(struct intel_display *display)
>  	i9xx_pipestat_irq_reset(display);
>  }
>  
> +u32 i9xx_display_irq_enable_mask(struct intel_display *display)
> +{
> +	u32 enable_mask;
> +
> +	enable_mask = I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
> +		I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
> +
> +	if (DISPLAY_VER(display) >= 3)
> +		enable_mask |= I915_ASLE_INTERRUPT;
> +
> +	if (HAS_HOTPLUG(display))
> +		enable_mask |= I915_DISPLAY_PORT_INTERRUPT;
> +
> +	return enable_mask;
> +}
> +
>  void i915_display_irq_postinstall(struct intel_display *display)
>  {
>  	/*
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
> index cee120347064..e44d88e0d7e7 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
> @@ -61,6 +61,7 @@ void vlv_display_irq_reset(struct intel_display *display);
>  void gen8_display_irq_reset(struct intel_display *display);
>  void gen11_display_irq_reset(struct intel_display *display);
>  
> +u32 i9xx_display_irq_enable_mask(struct intel_display *display);
>  void i915_display_irq_postinstall(struct intel_display *display);
>  void i965_display_irq_postinstall(struct intel_display *display);
>  void vlv_display_irq_postinstall(struct intel_display *display);
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 04de02fc08d9..f9fbb88b9e26 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -895,17 +895,9 @@ static void i915_irq_postinstall(struct drm_i915_private *dev_priv)
>  
>  	gen2_error_init(uncore, GEN2_ERROR_REGS, ~i9xx_error_mask(dev_priv));
>  
> -	enable_mask =
> -		I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
> -		I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
> +	enable_mask = i9xx_display_irq_enable_mask(display) |
>  		I915_MASTER_ERROR_INTERRUPT;
>  
> -	if (DISPLAY_VER(display) >= 3)
> -		enable_mask |= I915_ASLE_INTERRUPT;
> -
> -	if (HAS_HOTPLUG(display))
> -		enable_mask |= I915_DISPLAY_PORT_INTERRUPT;
> -
>  	dev_priv->gen2_imr_mask = ~enable_mask;
>  
>  	enable_mask |= I915_USER_INTERRUPT;
> @@ -1010,11 +1002,7 @@ static void i965_irq_postinstall(struct drm_i915_private *dev_priv)
>  
>  	gen2_error_init(uncore, GEN2_ERROR_REGS, ~i965_error_mask(dev_priv));
>  
> -	enable_mask =
> -		I915_ASLE_INTERRUPT |
> -		I915_DISPLAY_PORT_INTERRUPT |
> -		I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
> -		I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
> +	enable_mask = i9xx_display_irq_enable_mask(display) |
>  		I915_MASTER_ERROR_INTERRUPT;
>  
>  	dev_priv->gen2_imr_mask = ~enable_mask;
> -- 
> 2.47.3

-- 
Ville Syrjälä
Intel