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is there somewhere other than the bspec or architecture document > that we should be looking at to confirm this? I agree that EU stall is not properly documented in the B-Spec. I looked up an HSD for Xe3p to confirm and make this change. Also checked with the architect to confirm this change. > > If you've been working directly with the hardware architects on this > feature, please poke them about documenting this clearly in the bspec > (with proper tagging by IP/platform) so that we can verify this is > handled correctly and also notice if/when the format changes again on > future platforms. Sure, I will follow up with the HW architects to make sure the EU stall data formats are properly documented in the Bspec and are properly tagged. > > > Matt Thank You Harish. > > > > > Cc: Ashutosh Dixit > > Signed-off-by: Harish Chegondi > > Signed-off-by: Lucas De Marchi > > --- > > drivers/gpu/drm/xe/xe_eu_stall.c | 23 +++++++++++++++++++++++ > > 1 file changed, 23 insertions(+) > > > > diff --git a/drivers/gpu/drm/xe/xe_eu_stall.c b/drivers/gpu/drm/xe/xe_eu_stall.c > > index f5cfdf29fde34..2bc6b593ff172 100644 > > --- a/drivers/gpu/drm/xe/xe_eu_stall.c > > +++ b/drivers/gpu/drm/xe/xe_eu_stall.c > > @@ -124,6 +124,27 @@ struct xe_eu_stall_data_xe2 { > > __u64 unused[6]; > > } __packed; > > > > +/* > > + * EU stall data format for Xe3p arch GPUs. > > + */ > > +struct xe_eu_stall_data_xe3p { > > + __u64 ip_addr:61; /* Bits 0 to 60 */ > > + __u64 tdr_count:8; /* Bits 61 to 68 */ > > + __u64 other_count:8; /* Bits 69 to 76 */ > > + __u64 control_count:8; /* Bits 77 to 84 */ > > + __u64 pipestall_count:8; /* Bits 85 to 92 */ > > + __u64 send_count:8; /* Bits 93 to 100 */ > > + __u64 dist_acc_count:8; /* Bits 101 to 108 */ > > + __u64 sbid_count:8; /* Bits 109 to 116 */ > > + __u64 sync_count:8; /* Bits 117 to 124 */ > > + __u64 inst_fetch_count:8; /* Bits 125 to 132 */ > > + __u64 active_count:8; /* Bits 133 to 140 */ > > + __u64 ex_id:3; /* Bits 141 to 143 */ > > + __u64 end_flag:1; /* Bit 144 */ > > + __u64 unused_bits:47; > > + __u64 unused[5]; > > +} __packed; > > + > > const u64 eu_stall_sampling_rates[] = {251, 251 * 2, 251 * 3, 251 * 4, 251 * 5, 251 * 6, 251 * 7}; > > > > /** > > @@ -169,6 +190,8 @@ size_t xe_eu_stall_data_record_size(struct xe_device *xe) > > > > if (xe->info.platform == XE_PVC) > > record_size = sizeof(struct xe_eu_stall_data_pvc); > > + else if (GRAPHICS_VER(xe) >= 35) > > + record_size = sizeof(struct xe_eu_stall_data_xe3p); > > else if (GRAPHICS_VER(xe) >= 20) > > record_size = sizeof(struct xe_eu_stall_data_xe2); > > > > > > -- > > 2.51.0 > > > > -- > Matt Roper > Graphics Software Engineer > Linux GPU Platform Enablement > Intel Corporation