[PATCH 0/4] drm/{i915, xe}/irq: clarify display and parent driver interfaces

[PATCH 0/4] drm/{i915, xe}/irq: clarify display and parent driver interfaces

[Jani Nikula]

Add irq .enabled and .synchronize parent driver calls, and clean up
irq/error init/reset handling.

Jani Nikula (4):
  drm/{i915,xe}/display: move irq calls to parent interface
  drm/{i915,xe}/display: duplicate gen2 irq/error init/reset in display
    irq
  drm/i915/display: convert the display irq interfaces to struct
    intel_display
  drm/i915/display: shorten the intel_display_irq_regs_* function names

 .../gpu/drm/i915/display/intel_display_irq.c  | 198 +++++++++++-------
 .../drm/i915/display/intel_display_power.c    |   5 +-
 .../i915/display/intel_display_power_well.c   |  15 +-
 drivers/gpu/drm/i915/display/intel_gmbus.c    |   9 +-
 drivers/gpu/drm/i915/display/intel_hotplug.c  |   6 +-
 .../gpu/drm/i915/display/intel_lpe_audio.c    |   1 -
 drivers/gpu/drm/i915/display/intel_pipe_crc.c |   6 +-
 drivers/gpu/drm/i915/i915_driver.c            |   1 +
 drivers/gpu/drm/i915/i915_irq.c               |  16 ++
 drivers/gpu/drm/i915/i915_irq.h               |   2 +
 drivers/gpu/drm/xe/Makefile                   |   2 -
 .../gpu/drm/xe/compat-i915-headers/i915_irq.h |   6 -
 drivers/gpu/drm/xe/display/ext/i915_irq.c     |  85 --------
 drivers/gpu/drm/xe/display/xe_display.c       |  18 ++
 include/drm/intel/display_parent_interface.h  |   8 +
 15 files changed, 178 insertions(+), 200 deletions(-)
 delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
 delete mode 100644 drivers/gpu/drm/xe/display/ext/i915_irq.c

-- 
2.47.3

[PATCH 1/4] drm/{i915, xe}/display: move irq calls to parent interface

[Jani Nikula]

Add an irq parent driver interface for the .enabled and .synchronize
calls. This lets us drop the dependency on i915_drv.h and i915_irq.h in
a multiple places.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../gpu/drm/i915/display/intel_display_irq.c  | 36 +++++++------------
 .../drm/i915/display/intel_display_power.c    |  5 ++-
 .../i915/display/intel_display_power_well.c   | 15 +++-----
 drivers/gpu/drm/i915/display/intel_gmbus.c    |  9 +++--
 drivers/gpu/drm/i915/display/intel_hotplug.c  |  6 ++--
 .../gpu/drm/i915/display/intel_lpe_audio.c    |  1 -
 drivers/gpu/drm/i915/display/intel_pipe_crc.c |  6 ++--
 drivers/gpu/drm/i915/i915_driver.c            |  1 +
 drivers/gpu/drm/i915/i915_irq.c               | 16 +++++++++
 drivers/gpu/drm/i915/i915_irq.h               |  2 ++
 drivers/gpu/drm/xe/display/ext/i915_irq.c     | 10 ------
 drivers/gpu/drm/xe/display/xe_display.c       | 18 ++++++++++
 include/drm/intel/display_parent_interface.h  |  8 +++++
 13 files changed, 71 insertions(+), 62 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 43b27deb4a26..11bc47d22aa4 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -5,8 +5,8 @@
 
 #include <drm/drm_print.h>
 #include <drm/drm_vblank.h>
+#include <drm/intel/display_parent_interface.h>
 
-#include "i915_drv.h"
 #include "i915_irq.h"
 #include "i915_reg.h"
 #include "icl_dsi_regs.h"
@@ -135,7 +135,6 @@ intel_handle_vblank(struct intel_display *display, enum pipe pipe)
 void ilk_update_display_irq(struct intel_display *display,
 			    u32 interrupt_mask, u32 enabled_irq_mask)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	u32 new_val;
 
 	lockdep_assert_held(&display->irq.lock);
@@ -146,7 +145,7 @@ void ilk_update_display_irq(struct intel_display *display,
 	new_val |= (~enabled_irq_mask & interrupt_mask);
 
 	if (new_val != display->irq.ilk_de_imr_mask &&
-	    !drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv))) {
+	    !drm_WARN_ON(display->drm, !display->parent->irq->enabled(display->drm))) {
 		display->irq.ilk_de_imr_mask = new_val;
 		intel_de_write(display, DEIMR, display->irq.ilk_de_imr_mask);
 		intel_de_posting_read(display, DEIMR);
@@ -172,7 +171,6 @@ void ilk_disable_display_irq(struct intel_display *display, u32 bits)
 void bdw_update_port_irq(struct intel_display *display,
 			 u32 interrupt_mask, u32 enabled_irq_mask)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	u32 new_val;
 	u32 old_val;
 
@@ -180,7 +178,7 @@ void bdw_update_port_irq(struct intel_display *display,
 
 	drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
 
-	if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
+	if (drm_WARN_ON(display->drm, !display->parent->irq->enabled(display->drm)))
 		return;
 
 	old_val = intel_de_read(display, GEN8_DE_PORT_IMR);
@@ -206,14 +204,13 @@ static void bdw_update_pipe_irq(struct intel_display *display,
 				enum pipe pipe, u32 interrupt_mask,
 				u32 enabled_irq_mask)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	u32 new_val;
 
 	lockdep_assert_held(&display->irq.lock);
 
 	drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
 
-	if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
+	if (drm_WARN_ON(display->drm, !display->parent->irq->enabled(display->drm)))
 		return;
 
 	new_val = display->irq.de_pipe_imr_mask[pipe];
@@ -249,7 +246,6 @@ void ibx_display_interrupt_update(struct intel_display *display,
 				  u32 interrupt_mask,
 				  u32 enabled_irq_mask)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	u32 sdeimr = intel_de_read(display, SDEIMR);
 
 	sdeimr &= ~interrupt_mask;
@@ -259,7 +255,7 @@ void ibx_display_interrupt_update(struct intel_display *display,
 
 	lockdep_assert_held(&display->irq.lock);
 
-	if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
+	if (drm_WARN_ON(display->drm, !display->parent->irq->enabled(display->drm)))
 		return;
 
 	intel_de_write(display, SDEIMR, sdeimr);
@@ -323,7 +319,6 @@ u32 i915_pipestat_enable_mask(struct intel_display *display,
 void i915_enable_pipestat(struct intel_display *display,
 			  enum pipe pipe, u32 status_mask)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	i915_reg_t reg = PIPESTAT(display, pipe);
 	u32 enable_mask;
 
@@ -332,7 +327,7 @@ void i915_enable_pipestat(struct intel_display *display,
 		      pipe_name(pipe), status_mask);
 
 	lockdep_assert_held(&display->irq.lock);
-	drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv));
+	drm_WARN_ON(display->drm, !display->parent->irq->enabled(display->drm));
 
 	if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == status_mask)
 		return;
@@ -347,7 +342,6 @@ void i915_enable_pipestat(struct intel_display *display,
 void i915_disable_pipestat(struct intel_display *display,
 			   enum pipe pipe, u32 status_mask)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	i915_reg_t reg = PIPESTAT(display, pipe);
 	u32 enable_mask;
 
@@ -356,7 +350,7 @@ void i915_disable_pipestat(struct intel_display *display,
 		      pipe_name(pipe), status_mask);
 
 	lockdep_assert_held(&display->irq.lock);
-	drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv));
+	drm_WARN_ON(display->drm, !display->parent->irq->enabled(display->drm));
 
 	if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == 0)
 		return;
@@ -2153,14 +2147,13 @@ void gen11_display_irq_reset(struct intel_display *display)
 void gen8_irq_power_well_post_enable(struct intel_display *display,
 				     u8 pipe_mask)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	u32 extra_ier = GEN8_PIPE_VBLANK | GEN8_PIPE_FIFO_UNDERRUN |
 		gen8_de_pipe_flip_done_mask(display);
 	enum pipe pipe;
 
 	spin_lock_irq(&display->irq.lock);
 
-	if (!intel_irqs_enabled(dev_priv)) {
+	if (!display->parent->irq->enabled(display->drm)) {
 		spin_unlock_irq(&display->irq.lock);
 		return;
 	}
@@ -2176,12 +2169,11 @@ void gen8_irq_power_well_post_enable(struct intel_display *display,
 void gen8_irq_power_well_pre_disable(struct intel_display *display,
 				     u8 pipe_mask)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	enum pipe pipe;
 
 	spin_lock_irq(&display->irq.lock);
 
-	if (!intel_irqs_enabled(dev_priv)) {
+	if (!display->parent->irq->enabled(display->drm)) {
 		spin_unlock_irq(&display->irq.lock);
 		return;
 	}
@@ -2192,7 +2184,7 @@ void gen8_irq_power_well_pre_disable(struct intel_display *display,
 	spin_unlock_irq(&display->irq.lock);
 
 	/* make sure we're done processing display irqs */
-	intel_synchronize_irq(dev_priv);
+	display->parent->irq->synchronize(display->drm);
 }
 
 /*
@@ -2225,8 +2217,6 @@ static void ibx_irq_postinstall(struct intel_display *display)
 
 void valleyview_enable_display_irqs(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
-
 	spin_lock_irq(&display->irq.lock);
 
 	if (display->irq.vlv_display_irqs_enabled)
@@ -2234,7 +2224,7 @@ void valleyview_enable_display_irqs(struct intel_display *display)
 
 	display->irq.vlv_display_irqs_enabled = true;
 
-	if (intel_irqs_enabled(dev_priv)) {
+	if (display->parent->irq->enabled(display->drm)) {
 		_vlv_display_irq_reset(display);
 		_vlv_display_irq_postinstall(display);
 	}
@@ -2245,8 +2235,6 @@ void valleyview_enable_display_irqs(struct intel_display *display)
 
 void valleyview_disable_display_irqs(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
-
 	spin_lock_irq(&display->irq.lock);
 
 	if (!display->irq.vlv_display_irqs_enabled)
@@ -2254,7 +2242,7 @@ void valleyview_disable_display_irqs(struct intel_display *display)
 
 	display->irq.vlv_display_irqs_enabled = false;
 
-	if (intel_irqs_enabled(dev_priv))
+	if (display->parent->irq->enabled(display->drm))
 		_vlv_display_irq_reset(display);
 out:
 	spin_unlock_irq(&display->irq.lock);
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 74fcd9cfe911..7c857291ad4c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -7,11 +7,11 @@
 #include <linux/string_helpers.h>
 
 #include <drm/drm_print.h>
+#include <drm/intel/display_parent_interface.h>
 
 #include "soc/intel_dram.h"
 
 #include "i915_drv.h"
-#include "i915_irq.h"
 #include "i915_reg.h"
 #include "intel_backlight_regs.h"
 #include "intel_cdclk.h"
@@ -1202,7 +1202,6 @@ static void hsw_assert_cdclk(struct intel_display *display)
 
 static void assert_can_disable_lcpll(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	struct intel_crtc *crtc;
 
 	for_each_intel_crtc(display->drm, crtc)
@@ -1247,7 +1246,7 @@ static void assert_can_disable_lcpll(struct intel_display *display)
 	 * gen-specific and since we only disable LCPLL after we fully disable
 	 * the interrupts, the check below should be enough.
 	 */
-	INTEL_DISPLAY_STATE_WARN(display, intel_irqs_enabled(dev_priv),
+	INTEL_DISPLAY_STATE_WARN(display, display->parent->irq->enabled(display->drm),
 				 "IRQs enabled\n");
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
index eab7019f2252..5ae064bc536a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
@@ -6,9 +6,8 @@
 #include <linux/iopoll.h>
 
 #include <drm/drm_print.h>
+#include <drm/intel/display_parent_interface.h>
 
-#include "i915_drv.h"
-#include "i915_irq.h"
 #include "i915_reg.h"
 #include "intel_backlight_regs.h"
 #include "intel_combo_phy.h"
@@ -628,8 +627,6 @@ static bool hsw_power_well_enabled(struct intel_display *display,
 
 static void assert_can_enable_dc9(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
-
 	drm_WARN_ONCE(display->drm,
 		      (intel_de_read(display, DC_STATE_EN) & DC_STATE_EN_DC9),
 		      "DC9 already programmed to be enabled.\n");
@@ -641,7 +638,7 @@ static void assert_can_enable_dc9(struct intel_display *display)
 		      intel_de_read(display, HSW_PWR_WELL_CTL2) &
 		      HSW_PWR_WELL_CTL_REQ(SKL_PW_CTL_IDX_PW_2),
 		      "Power well 2 on.\n");
-	drm_WARN_ONCE(display->drm, intel_irqs_enabled(dev_priv),
+	drm_WARN_ONCE(display->drm, display->parent->irq->enabled(display->drm),
 		      "Interrupts not disabled yet.\n");
 
 	 /*
@@ -655,9 +652,7 @@ static void assert_can_enable_dc9(struct intel_display *display)
 
 static void assert_can_disable_dc9(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
-
-	drm_WARN_ONCE(display->drm, intel_irqs_enabled(dev_priv),
+	drm_WARN_ONCE(display->drm, display->parent->irq->enabled(display->drm),
 		      "Interrupts not disabled yet.\n");
 	drm_WARN_ONCE(display->drm,
 		      intel_de_read(display, DC_STATE_EN) &
@@ -1281,12 +1276,10 @@ static void vlv_display_power_well_init(struct intel_display *display)
 
 static void vlv_display_power_well_deinit(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
-
 	valleyview_disable_display_irqs(display);
 
 	/* make sure we're done processing display irqs */
-	intel_synchronize_irq(dev_priv);
+	display->parent->irq->synchronize(display->drm);
 
 	vlv_pps_reset_all(display);
 
diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
index 82f3a40ecac7..98834cf622d2 100644
--- a/drivers/gpu/drm/i915/display/intel_gmbus.c
+++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
@@ -32,11 +32,11 @@
 #include <linux/i2c.h>
 #include <linux/iopoll.h>
 
-#include <drm/drm_print.h>
 #include <drm/display/drm_hdcp_helper.h>
+#include <drm/drm_print.h>
+#include <drm/drm_print.h>
+#include <drm/intel/display_parent_interface.h>
 
-#include "i915_drv.h"
-#include "i915_irq.h"
 #include "i915_reg.h"
 #include "intel_de.h"
 #include "intel_display_regs.h"
@@ -391,12 +391,11 @@ intel_gpio_setup(struct intel_gmbus *bus, i915_reg_t gpio_reg)
 
 static bool has_gmbus_irq(struct intel_display *display)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
 	/*
 	 * encoder->shutdown() may want to use GMBUS
 	 * after irqs have already been disabled.
 	 */
-	return HAS_GMBUS_IRQ(display) && intel_irqs_enabled(i915);
+	return HAS_GMBUS_IRQ(display) && display->parent->irq->enabled(display->drm);
 }
 
 static int gmbus_wait(struct intel_display *display, u32 status, u32 irq_en)
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
index 235706229ffb..a4254d4e9a4a 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
@@ -26,9 +26,8 @@
 
 #include <drm/drm_print.h>
 #include <drm/drm_probe_helper.h>
+#include <drm/intel/display_parent_interface.h>
 
-#include "i915_drv.h"
-#include "i915_irq.h"
 #include "intel_connector.h"
 #include "intel_display_core.h"
 #include "intel_display_power.h"
@@ -1177,13 +1176,12 @@ bool intel_hpd_schedule_detection(struct intel_display *display)
 static int i915_hpd_storm_ctl_show(struct seq_file *m, void *data)
 {
 	struct intel_display *display = m->private;
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	struct intel_hotplug *hotplug = &display->hotplug;
 
 	/* Synchronize with everything first in case there's been an HPD
 	 * storm, but we haven't finished handling it in the kernel yet
 	 */
-	intel_synchronize_irq(dev_priv);
+	display->parent->irq->synchronize(display->drm);
 	flush_work(&display->hotplug.dig_port_work);
 	flush_delayed_work(&display->hotplug.hotplug_work);
 
diff --git a/drivers/gpu/drm/i915/display/intel_lpe_audio.c b/drivers/gpu/drm/i915/display/intel_lpe_audio.c
index 42284e9928f2..5b41abe1c64d 100644
--- a/drivers/gpu/drm/i915/display/intel_lpe_audio.c
+++ b/drivers/gpu/drm/i915/display/intel_lpe_audio.c
@@ -71,7 +71,6 @@
 #include <drm/drm_print.h>
 #include <drm/intel/intel_lpe_audio.h>
 
-#include "i915_irq.h"
 #include "intel_audio_regs.h"
 #include "intel_de.h"
 #include "intel_lpe_audio.h"
diff --git a/drivers/gpu/drm/i915/display/intel_pipe_crc.c b/drivers/gpu/drm/i915/display/intel_pipe_crc.c
index 1f27643412f1..b782f894cce8 100644
--- a/drivers/gpu/drm/i915/display/intel_pipe_crc.c
+++ b/drivers/gpu/drm/i915/display/intel_pipe_crc.c
@@ -29,9 +29,8 @@
 #include <linux/seq_file.h>
 
 #include <drm/drm_print.h>
+#include <drm/intel/display_parent_interface.h>
 
-#include "i915_drv.h"
-#include "i915_irq.h"
 #include "intel_atomic.h"
 #include "intel_de.h"
 #include "intel_display_irq.h"
@@ -658,7 +657,6 @@ void intel_crtc_enable_pipe_crc(struct intel_crtc *crtc)
 void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc)
 {
 	struct intel_display *display = to_intel_display(crtc);
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	struct intel_pipe_crc *pipe_crc = &crtc->pipe_crc;
 	enum pipe pipe = crtc->pipe;
 
@@ -669,5 +667,5 @@ void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc)
 
 	intel_de_write(display, PIPE_CRC_CTL(display, pipe), 0);
 	intel_de_posting_read(display, PIPE_CRC_CTL(display, pipe));
-	intel_synchronize_irq(dev_priv);
+	display->parent->irq->synchronize(display->drm);
 }
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index c97b76771917..07715aef62d3 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -741,6 +741,7 @@ static void i915_welcome_messages(struct drm_i915_private *dev_priv)
 
 static const struct intel_display_parent_interface parent = {
 	.rpm = &i915_display_rpm_interface,
+	.irq = &i915_display_irq_interface,
 };
 
 const struct intel_display_parent_interface *i915_driver_parent_interface(void)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 1898be4ddc8b..3fe978d4ea53 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -33,6 +33,7 @@
 
 #include <drm/drm_drv.h>
 #include <drm/drm_print.h>
+#include <drm/intel/display_parent_interface.h>
 
 #include "display/intel_display_irq.h"
 #include "display/intel_hotplug.h"
@@ -1252,3 +1253,18 @@ void intel_synchronize_hardirq(struct drm_i915_private *i915)
 {
 	synchronize_hardirq(to_pci_dev(i915->drm.dev)->irq);
 }
+
+static bool _intel_irq_enabled(struct drm_device *drm)
+{
+	return intel_irqs_enabled(to_i915(drm));
+}
+
+static void _intel_irq_synchronize(struct drm_device *drm)
+{
+	return intel_synchronize_irq(to_i915(drm));
+}
+
+const struct intel_display_irq_interface i915_display_irq_interface = {
+	.enabled = _intel_irq_enabled,
+	.synchronize = _intel_irq_synchronize,
+};
diff --git a/drivers/gpu/drm/i915/i915_irq.h b/drivers/gpu/drm/i915/i915_irq.h
index 58789b264575..5c87d6d41c74 100644
--- a/drivers/gpu/drm/i915/i915_irq.h
+++ b/drivers/gpu/drm/i915/i915_irq.h
@@ -51,4 +51,6 @@ void gen2_error_reset(struct intel_uncore *uncore, struct i915_error_regs regs);
 void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
 		     u32 emr_val);
 
+extern const struct intel_display_irq_interface i915_display_irq_interface;
+
 #endif /* __I915_IRQ_H__ */
diff --git a/drivers/gpu/drm/xe/display/ext/i915_irq.c b/drivers/gpu/drm/xe/display/ext/i915_irq.c
index 3c6bca66ddab..b198dd1988bb 100644
--- a/drivers/gpu/drm/xe/display/ext/i915_irq.c
+++ b/drivers/gpu/drm/xe/display/ext/i915_irq.c
@@ -73,13 +73,3 @@ void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
 	intel_uncore_write(uncore, regs.emr, emr_val);
 	intel_uncore_posting_read(uncore, regs.emr);
 }
-
-bool intel_irqs_enabled(struct xe_device *xe)
-{
-	return atomic_read(&xe->irq.enabled);
-}
-
-void intel_synchronize_irq(struct xe_device *xe)
-{
-	synchronize_irq(to_pci_dev(xe->drm.dev)->irq);
-}
diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
index 8b0afa270216..e3320d9e6314 100644
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@ -516,8 +516,26 @@ static void display_device_remove(struct drm_device *dev, void *arg)
 	intel_display_device_remove(display);
 }
 
+static bool irq_enabled(struct drm_device *drm)
+{
+	struct xe_device *xe = to_xe_device(drm);
+
+	return atomic_read(&xe->irq.enabled);
+}
+
+static void irq_synchronize(struct drm_device *drm)
+{
+	synchronize_irq(to_pci_dev(drm->dev)->irq);
+}
+
+static const struct intel_display_irq_interface xe_display_irq_interface = {
+	.enabled = irq_enabled,
+	.synchronize = irq_synchronize,
+};
+
 static const struct intel_display_parent_interface parent = {
 	.rpm = &xe_display_rpm_interface,
+	.irq = &xe_display_irq_interface,
 };
 
 /**
diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
index 26bedc360044..3a008a18eb65 100644
--- a/include/drm/intel/display_parent_interface.h
+++ b/include/drm/intel/display_parent_interface.h
@@ -25,6 +25,11 @@ struct intel_display_rpm_interface {
 	void (*assert_unblock)(const struct drm_device *drm);
 };
 
+struct intel_display_irq_interface {
+	bool (*enabled)(struct drm_device *drm);
+	void (*synchronize)(struct drm_device *drm);
+};
+
 /**
  * struct intel_display_parent_interface - services parent driver provides to display
  *
@@ -40,6 +45,9 @@ struct intel_display_rpm_interface {
 struct intel_display_parent_interface {
 	/** @rpm: Runtime PM functions */
 	const struct intel_display_rpm_interface *rpm;
+
+	/** @irq: IRQ interface */
+	const struct intel_display_irq_interface *irq;
 };
 
 #endif
-- 
2.47.3

[PATCH 2/4] drm/{i915, xe}/display: duplicate gen2 irq/error init/reset in display irq

[Jani Nikula]

Duplicate gen2_irq_reset(), gen2_assert_iir_is_zero(), gen2_irq_init(),
gen2_error_reset(), and gen2_error_init() in intel_display_irq.c.

This allows us to drop the duplicates from xe, drop the display
dependency on i915_drv.h, and subsequently remove the compat i915_irq.h
header. Although duplication is undesirable in general, in this case the
local duplicates are the cleaner alternative.

There's a slight wrinkle in gen2_assert_iir_is_zero(). It uses
uncore->i915->drm. Leave it out for now in the interest of properly
passing in struct intel_display in a separate change.

Suggested-by: Ville Syrjala <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../gpu/drm/i915/display/intel_display_irq.c  | 69 ++++++++++++++++-
 drivers/gpu/drm/xe/Makefile                   |  2 -
 .../gpu/drm/xe/compat-i915-headers/i915_irq.h |  6 --
 drivers/gpu/drm/xe/display/ext/i915_irq.c     | 75 -------------------
 4 files changed, 68 insertions(+), 84 deletions(-)
 delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
 delete mode 100644 drivers/gpu/drm/xe/display/ext/i915_irq.c

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 11bc47d22aa4..62f11fac47bb 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -7,7 +7,6 @@
 #include <drm/drm_vblank.h>
 #include <drm/intel/display_parent_interface.h>
 
-#include "i915_irq.h"
 #include "i915_reg.h"
 #include "icl_dsi_regs.h"
 #include "intel_crtc.h"
@@ -33,6 +32,74 @@
 #include "intel_psr_regs.h"
 #include "intel_uncore.h"
 
+static void gen2_irq_reset(struct intel_uncore *uncore, struct i915_irq_regs regs)
+{
+	intel_uncore_write(uncore, regs.imr, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.imr);
+
+	intel_uncore_write(uncore, regs.ier, 0);
+
+	/* IIR can theoretically queue up two events. Be paranoid. */
+	intel_uncore_write(uncore, regs.iir, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.iir);
+	intel_uncore_write(uncore, regs.iir, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.iir);
+}
+
+/*
+ * We should clear IMR at preinstall/uninstall, and just check at postinstall.
+ */
+static void gen2_assert_iir_is_zero(struct intel_uncore *uncore, i915_reg_t reg)
+{
+	u32 val = intel_uncore_read(uncore, reg);
+
+	if (val == 0)
+		return;
+
+#if 0	/* FIXME */
+	drm_WARN(&uncore->i915->drm, 1,
+		 "Interrupt register 0x%x is not zero: 0x%08x\n",
+		 i915_mmio_reg_offset(reg), val);
+#endif
+	intel_uncore_write(uncore, reg, 0xffffffff);
+	intel_uncore_posting_read(uncore, reg);
+	intel_uncore_write(uncore, reg, 0xffffffff);
+	intel_uncore_posting_read(uncore, reg);
+}
+
+static void gen2_irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
+			  u32 imr_val, u32 ier_val)
+{
+	gen2_assert_iir_is_zero(uncore, regs.iir);
+
+	intel_uncore_write(uncore, regs.ier, ier_val);
+	intel_uncore_write(uncore, regs.imr, imr_val);
+	intel_uncore_posting_read(uncore, regs.imr);
+}
+
+static void gen2_error_reset(struct intel_uncore *uncore, struct i915_error_regs regs)
+{
+	intel_uncore_write(uncore, regs.emr, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.emr);
+
+	intel_uncore_write(uncore, regs.eir, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.eir);
+	intel_uncore_write(uncore, regs.eir, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.eir);
+}
+
+static void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
+			    u32 emr_val)
+{
+	intel_uncore_write(uncore, regs.eir, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.eir);
+	intel_uncore_write(uncore, regs.eir, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.eir);
+
+	intel_uncore_write(uncore, regs.emr, emr_val);
+	intel_uncore_posting_read(uncore, regs.emr);
+}
+
 static void
 intel_display_irq_regs_init(struct intel_display *display, struct i915_irq_regs regs,
 			    u32 imr_val, u32 ier_val)
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 7b4ca591a4ae..3bf64fdcf93a 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -189,7 +189,6 @@ endif
 
 # i915 Display compat #defines and #includes
 subdir-ccflags-$(CONFIG_DRM_XE_DISPLAY) += \
-	-I$(src)/display/ext \
 	-I$(src)/compat-i915-headers \
 	-I$(srctree)/drivers/gpu/drm/i915/display/ \
 	-Ddrm_i915_private=xe_device
@@ -206,7 +205,6 @@ $(obj)/i915-display/%.o: $(srctree)/drivers/gpu/drm/i915/display/%.c FORCE
 
 # Display code specific to xe
 xe-$(CONFIG_DRM_XE_DISPLAY) += \
-	display/ext/i915_irq.o \
 	display/intel_bo.o \
 	display/intel_fb_bo.o \
 	display/intel_fbdev_fb.o \
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
deleted file mode 100644
index 61707a07f91f..000000000000
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#include "../../i915/i915_irq.h"
diff --git a/drivers/gpu/drm/xe/display/ext/i915_irq.c b/drivers/gpu/drm/xe/display/ext/i915_irq.c
deleted file mode 100644
index b198dd1988bb..000000000000
--- a/drivers/gpu/drm/xe/display/ext/i915_irq.c
+++ /dev/null
@@ -1,75 +0,0 @@
-// SPDX-License-Identifier: MIT
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#include "i915_irq.h"
-#include "i915_reg.h"
-#include "intel_uncore.h"
-
-void gen2_irq_reset(struct intel_uncore *uncore, struct i915_irq_regs regs)
-{
-	intel_uncore_write(uncore, regs.imr, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.imr);
-
-	intel_uncore_write(uncore, regs.ier, 0);
-
-	/* IIR can theoretically queue up two events. Be paranoid. */
-	intel_uncore_write(uncore, regs.iir, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.iir);
-	intel_uncore_write(uncore, regs.iir, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.iir);
-}
-
-/*
- * We should clear IMR at preinstall/uninstall, and just check at postinstall.
- */
-void gen2_assert_iir_is_zero(struct intel_uncore *uncore, i915_reg_t reg)
-{
-	struct xe_device *xe = container_of(uncore, struct xe_device, uncore);
-	u32 val = intel_uncore_read(uncore, reg);
-
-	if (val == 0)
-		return;
-
-	drm_WARN(&xe->drm, 1,
-		 "Interrupt register 0x%x is not zero: 0x%08x\n",
-		 i915_mmio_reg_offset(reg), val);
-	intel_uncore_write(uncore, reg, 0xffffffff);
-	intel_uncore_posting_read(uncore, reg);
-	intel_uncore_write(uncore, reg, 0xffffffff);
-	intel_uncore_posting_read(uncore, reg);
-}
-
-void gen2_irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
-		   u32 imr_val, u32 ier_val)
-{
-	gen2_assert_iir_is_zero(uncore, regs.iir);
-
-	intel_uncore_write(uncore, regs.ier, ier_val);
-	intel_uncore_write(uncore, regs.imr, imr_val);
-	intel_uncore_posting_read(uncore, regs.imr);
-}
-
-void gen2_error_reset(struct intel_uncore *uncore, struct i915_error_regs regs)
-{
-	intel_uncore_write(uncore, regs.emr, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.emr);
-
-	intel_uncore_write(uncore, regs.eir, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.eir);
-	intel_uncore_write(uncore, regs.eir, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.eir);
-}
-
-void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
-		     u32 emr_val)
-{
-	intel_uncore_write(uncore, regs.eir, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.eir);
-	intel_uncore_write(uncore, regs.eir, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.eir);
-
-	intel_uncore_write(uncore, regs.emr, emr_val);
-	intel_uncore_posting_read(uncore, regs.emr);
-}
-- 
2.47.3

[PATCH 3/4] drm/i915/display: convert the display irq interfaces to struct intel_display

[Jani Nikula]

Convert the gen2_* irq interfaces from struct intel_uncore to struct
intel_display, and drop the dependency on intel_uncore.h.

Drop the gen2_ prefix while at.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../gpu/drm/i915/display/intel_display_irq.c  | 93 +++++++++----------
 1 file changed, 43 insertions(+), 50 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 62f11fac47bb..c9e7814479f6 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -30,74 +30,71 @@
 #include "intel_pmdemand.h"
 #include "intel_psr.h"
 #include "intel_psr_regs.h"
-#include "intel_uncore.h"
 
-static void gen2_irq_reset(struct intel_uncore *uncore, struct i915_irq_regs regs)
+static void irq_reset(struct intel_display *display, struct i915_irq_regs regs)
 {
-	intel_uncore_write(uncore, regs.imr, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.imr);
+	intel_de_write(display, regs.imr, 0xffffffff);
+	intel_de_posting_read(display, regs.imr);
 
-	intel_uncore_write(uncore, regs.ier, 0);
+	intel_de_write(display, regs.ier, 0);
 
 	/* IIR can theoretically queue up two events. Be paranoid. */
-	intel_uncore_write(uncore, regs.iir, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.iir);
-	intel_uncore_write(uncore, regs.iir, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.iir);
+	intel_de_write(display, regs.iir, 0xffffffff);
+	intel_de_posting_read(display, regs.iir);
+	intel_de_write(display, regs.iir, 0xffffffff);
+	intel_de_posting_read(display, regs.iir);
 }
 
 /*
  * We should clear IMR at preinstall/uninstall, and just check at postinstall.
  */
-static void gen2_assert_iir_is_zero(struct intel_uncore *uncore, i915_reg_t reg)
+static void assert_iir_is_zero(struct intel_display *display, i915_reg_t reg)
 {
-	u32 val = intel_uncore_read(uncore, reg);
+	u32 val = intel_de_read(display, reg);
 
 	if (val == 0)
 		return;
 
-#if 0	/* FIXME */
-	drm_WARN(&uncore->i915->drm, 1,
+	drm_WARN(display->drm, 1,
 		 "Interrupt register 0x%x is not zero: 0x%08x\n",
 		 i915_mmio_reg_offset(reg), val);
-#endif
-	intel_uncore_write(uncore, reg, 0xffffffff);
-	intel_uncore_posting_read(uncore, reg);
-	intel_uncore_write(uncore, reg, 0xffffffff);
-	intel_uncore_posting_read(uncore, reg);
+	intel_de_write(display, reg, 0xffffffff);
+	intel_de_posting_read(display, reg);
+	intel_de_write(display, reg, 0xffffffff);
+	intel_de_posting_read(display, reg);
 }
 
-static void gen2_irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
-			  u32 imr_val, u32 ier_val)
+static void irq_init(struct intel_display *display, struct i915_irq_regs regs,
+		     u32 imr_val, u32 ier_val)
 {
-	gen2_assert_iir_is_zero(uncore, regs.iir);
+	assert_iir_is_zero(display, regs.iir);
 
-	intel_uncore_write(uncore, regs.ier, ier_val);
-	intel_uncore_write(uncore, regs.imr, imr_val);
-	intel_uncore_posting_read(uncore, regs.imr);
+	intel_de_write(display, regs.ier, ier_val);
+	intel_de_write(display, regs.imr, imr_val);
+	intel_de_posting_read(display, regs.imr);
 }
 
-static void gen2_error_reset(struct intel_uncore *uncore, struct i915_error_regs regs)
+static void error_reset(struct intel_display *display, struct i915_error_regs regs)
 {
-	intel_uncore_write(uncore, regs.emr, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.emr);
+	intel_de_write(display, regs.emr, 0xffffffff);
+	intel_de_posting_read(display, regs.emr);
 
-	intel_uncore_write(uncore, regs.eir, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.eir);
-	intel_uncore_write(uncore, regs.eir, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.eir);
+	intel_de_write(display, regs.eir, 0xffffffff);
+	intel_de_posting_read(display, regs.eir);
+	intel_de_write(display, regs.eir, 0xffffffff);
+	intel_de_posting_read(display, regs.eir);
 }
 
-static void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
-			    u32 emr_val)
+static void error_init(struct intel_display *display, struct i915_error_regs regs,
+		       u32 emr_val)
 {
-	intel_uncore_write(uncore, regs.eir, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.eir);
-	intel_uncore_write(uncore, regs.eir, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.eir);
+	intel_de_write(display, regs.eir, 0xffffffff);
+	intel_de_posting_read(display, regs.eir);
+	intel_de_write(display, regs.eir, 0xffffffff);
+	intel_de_posting_read(display, regs.eir);
 
-	intel_uncore_write(uncore, regs.emr, emr_val);
-	intel_uncore_posting_read(uncore, regs.emr);
+	intel_de_write(display, regs.emr, emr_val);
+	intel_de_posting_read(display, regs.emr);
 }
 
 static void
@@ -108,7 +105,7 @@ intel_display_irq_regs_init(struct intel_display *display, struct i915_irq_regs
 	intel_dmc_wl_get(display, regs.ier);
 	intel_dmc_wl_get(display, regs.iir);
 
-	gen2_irq_init(to_intel_uncore(display->drm), regs, imr_val, ier_val);
+	irq_init(display, regs, imr_val, ier_val);
 
 	intel_dmc_wl_put(display, regs.iir);
 	intel_dmc_wl_put(display, regs.ier);
@@ -122,7 +119,7 @@ intel_display_irq_regs_reset(struct intel_display *display, struct i915_irq_regs
 	intel_dmc_wl_get(display, regs.ier);
 	intel_dmc_wl_get(display, regs.iir);
 
-	gen2_irq_reset(to_intel_uncore(display->drm), regs);
+	irq_reset(display, regs);
 
 	intel_dmc_wl_put(display, regs.iir);
 	intel_dmc_wl_put(display, regs.ier);
@@ -134,7 +131,7 @@ intel_display_irq_regs_assert_irr_is_zero(struct intel_display *display, i915_re
 {
 	intel_dmc_wl_get(display, reg);
 
-	gen2_assert_iir_is_zero(to_intel_uncore(display->drm), reg);
+	assert_iir_is_zero(display, reg);
 
 	intel_dmc_wl_put(display, reg);
 }
@@ -1979,8 +1976,7 @@ static void _vlv_display_irq_reset(struct intel_display *display)
 	else
 		intel_de_write(display, DPINVGTT, DPINVGTT_STATUS_MASK_VLV);
 
-	gen2_error_reset(to_intel_uncore(display->drm),
-			 VLV_ERROR_REGS);
+	error_reset(display, VLV_ERROR_REGS);
 
 	i915_hotplug_interrupt_update_locked(display, 0xffffffff, 0);
 	intel_de_rmw(display, PORT_HOTPLUG_STAT(display), 0, 0);
@@ -2075,8 +2071,7 @@ static void _vlv_display_irq_postinstall(struct intel_display *display)
 			       DPINVGTT_STATUS_MASK_VLV |
 			       DPINVGTT_EN_MASK_VLV);
 
-	gen2_error_init(to_intel_uncore(display->drm),
-			VLV_ERROR_REGS, ~vlv_error_mask());
+	error_init(display, VLV_ERROR_REGS, ~vlv_error_mask());
 
 	pipestat_mask = PIPE_CRC_DONE_INTERRUPT_STATUS;
 
@@ -2115,7 +2110,7 @@ static void ibx_display_irq_reset(struct intel_display *display)
 	if (HAS_PCH_NOP(display))
 		return;
 
-	gen2_irq_reset(to_intel_uncore(display->drm), SDE_IRQ_REGS);
+	irq_reset(display, SDE_IRQ_REGS);
 
 	if (HAS_PCH_CPT(display) || HAS_PCH_LPT(display))
 		intel_de_write(display, SERR_INT, 0xffffffff);
@@ -2123,9 +2118,7 @@ static void ibx_display_irq_reset(struct intel_display *display)
 
 void ilk_display_irq_reset(struct intel_display *display)
 {
-	struct intel_uncore *uncore = to_intel_uncore(display->drm);
-
-	gen2_irq_reset(uncore, DE_IRQ_REGS);
+	irq_reset(display, DE_IRQ_REGS);
 	display->irq.ilk_de_imr_mask = ~0u;
 
 	if (DISPLAY_VER(display) == 7)
-- 
2.47.3

[PATCH 4/4] drm/i915/display: shorten the intel_display_irq_regs_* function names

[Jani Nikula]

Shorten the intel_display_irq_regs_* function names to the underlying
function names with a _wl suffix for clarity.

- intel_display_irq_regs_init() -> irq_init_wl()
- intel_display_irq_regs_reset() -> irq_reset_wl()
- intel_display_irq_regs_assert_irr_is_zero() -> assert_iir_is_zero_wl()

This emphasizes the difference is the wakelock. Platforms without the
DMC wakelock mechanism can use the non-wl versions.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../gpu/drm/i915/display/intel_display_irq.c  | 76 +++++++++----------
 1 file changed, 34 insertions(+), 42 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index c9e7814479f6..09036cd92558 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -97,9 +97,8 @@ static void error_init(struct intel_display *display, struct i915_error_regs reg
 	intel_de_posting_read(display, regs.emr);
 }
 
-static void
-intel_display_irq_regs_init(struct intel_display *display, struct i915_irq_regs regs,
-			    u32 imr_val, u32 ier_val)
+static void irq_init_wl(struct intel_display *display, struct i915_irq_regs regs,
+			u32 imr_val, u32 ier_val)
 {
 	intel_dmc_wl_get(display, regs.imr);
 	intel_dmc_wl_get(display, regs.ier);
@@ -112,8 +111,7 @@ intel_display_irq_regs_init(struct intel_display *display, struct i915_irq_regs
 	intel_dmc_wl_put(display, regs.imr);
 }
 
-static void
-intel_display_irq_regs_reset(struct intel_display *display, struct i915_irq_regs regs)
+static void irq_reset_wl(struct intel_display *display, struct i915_irq_regs regs)
 {
 	intel_dmc_wl_get(display, regs.imr);
 	intel_dmc_wl_get(display, regs.ier);
@@ -126,8 +124,7 @@ intel_display_irq_regs_reset(struct intel_display *display, struct i915_irq_regs
 	intel_dmc_wl_put(display, regs.imr);
 }
 
-static void
-intel_display_irq_regs_assert_irr_is_zero(struct intel_display *display, i915_reg_t reg)
+static void assert_iir_is_zero_wl(struct intel_display *display, i915_reg_t reg)
 {
 	intel_dmc_wl_get(display, reg);
 
@@ -1983,7 +1980,7 @@ static void _vlv_display_irq_reset(struct intel_display *display)
 
 	i9xx_pipestat_irq_reset(display);
 
-	intel_display_irq_regs_reset(display, VLV_IRQ_REGS);
+	irq_reset_wl(display, VLV_IRQ_REGS);
 	display->irq.vlv_imr_mask = ~0u;
 }
 
@@ -2094,7 +2091,7 @@ static void _vlv_display_irq_postinstall(struct intel_display *display)
 
 	display->irq.vlv_imr_mask = ~enable_mask;
 
-	intel_display_irq_regs_init(display, VLV_IRQ_REGS, display->irq.vlv_imr_mask, enable_mask);
+	irq_init_wl(display, VLV_IRQ_REGS, display->irq.vlv_imr_mask, enable_mask);
 }
 
 void vlv_display_irq_postinstall(struct intel_display *display)
@@ -2145,10 +2142,10 @@ void gen8_display_irq_reset(struct intel_display *display)
 	for_each_pipe(display, pipe)
 		if (intel_display_power_is_enabled(display,
 						   POWER_DOMAIN_PIPE(pipe)))
-			intel_display_irq_regs_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
+			irq_reset_wl(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
 
-	intel_display_irq_regs_reset(display, GEN8_DE_PORT_IRQ_REGS);
-	intel_display_irq_regs_reset(display, GEN8_DE_MISC_IRQ_REGS);
+	irq_reset_wl(display, GEN8_DE_PORT_IRQ_REGS);
+	irq_reset_wl(display, GEN8_DE_MISC_IRQ_REGS);
 
 	if (HAS_PCH_SPLIT(display))
 		ibx_display_irq_reset(display);
@@ -2190,18 +2187,18 @@ void gen11_display_irq_reset(struct intel_display *display)
 	for_each_pipe(display, pipe)
 		if (intel_display_power_is_enabled(display,
 						   POWER_DOMAIN_PIPE(pipe)))
-			intel_display_irq_regs_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
+			irq_reset_wl(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
 
-	intel_display_irq_regs_reset(display, GEN8_DE_PORT_IRQ_REGS);
-	intel_display_irq_regs_reset(display, GEN8_DE_MISC_IRQ_REGS);
+	irq_reset_wl(display, GEN8_DE_PORT_IRQ_REGS);
+	irq_reset_wl(display, GEN8_DE_MISC_IRQ_REGS);
 
 	if (DISPLAY_VER(display) >= 14)
-		intel_display_irq_regs_reset(display, PICAINTERRUPT_IRQ_REGS);
+		irq_reset_wl(display, PICAINTERRUPT_IRQ_REGS);
 	else
-		intel_display_irq_regs_reset(display, GEN11_DE_HPD_IRQ_REGS);
+		irq_reset_wl(display, GEN11_DE_HPD_IRQ_REGS);
 
 	if (INTEL_PCH_TYPE(display) >= PCH_ICP)
-		intel_display_irq_regs_reset(display, SDE_IRQ_REGS);
+		irq_reset_wl(display, SDE_IRQ_REGS);
 }
 
 void gen8_irq_power_well_post_enable(struct intel_display *display,
@@ -2219,9 +2216,9 @@ void gen8_irq_power_well_post_enable(struct intel_display *display,
 	}
 
 	for_each_pipe_masked(display, pipe, pipe_mask)
-		intel_display_irq_regs_init(display, GEN8_DE_PIPE_IRQ_REGS(pipe),
-					    display->irq.de_pipe_imr_mask[pipe],
-					    ~display->irq.de_pipe_imr_mask[pipe] | extra_ier);
+		irq_init_wl(display, GEN8_DE_PIPE_IRQ_REGS(pipe),
+			    display->irq.de_pipe_imr_mask[pipe],
+			    ~display->irq.de_pipe_imr_mask[pipe] | extra_ier);
 
 	spin_unlock_irq(&display->irq.lock);
 }
@@ -2239,7 +2236,7 @@ void gen8_irq_power_well_pre_disable(struct intel_display *display,
 	}
 
 	for_each_pipe_masked(display, pipe, pipe_mask)
-		intel_display_irq_regs_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
+		irq_reset_wl(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
 
 	spin_unlock_irq(&display->irq.lock);
 
@@ -2272,7 +2269,7 @@ static void ibx_irq_postinstall(struct intel_display *display)
 	else
 		mask = SDE_GMBUS_CPT;
 
-	intel_display_irq_regs_init(display, SDE_IRQ_REGS, ~mask, 0xffffffff);
+	irq_init_wl(display, SDE_IRQ_REGS, ~mask, 0xffffffff);
 }
 
 void valleyview_enable_display_irqs(struct intel_display *display)
@@ -2334,7 +2331,7 @@ void ilk_de_irq_postinstall(struct intel_display *display)
 	}
 
 	if (display->platform.haswell) {
-		intel_display_irq_regs_assert_irr_is_zero(display, EDP_PSR_IIR);
+		assert_iir_is_zero_wl(display, EDP_PSR_IIR);
 		display_mask |= DE_EDP_PSR_INT_HSW;
 	}
 
@@ -2345,8 +2342,8 @@ void ilk_de_irq_postinstall(struct intel_display *display)
 
 	ibx_irq_postinstall(display);
 
-	intel_display_irq_regs_init(display, DE_IRQ_REGS, display->irq.ilk_de_imr_mask,
-				    display_mask | extra_mask);
+	irq_init_wl(display, DE_IRQ_REGS, display->irq.ilk_de_imr_mask,
+		    display_mask | extra_mask);
 }
 
 static void mtp_irq_postinstall(struct intel_display *display);
@@ -2422,11 +2419,10 @@ void gen8_de_irq_postinstall(struct intel_display *display)
 			if (!intel_display_power_is_enabled(display, domain))
 				continue;
 
-			intel_display_irq_regs_assert_irr_is_zero(display,
-								  TRANS_PSR_IIR(display, trans));
+			assert_iir_is_zero_wl(display, TRANS_PSR_IIR(display, trans));
 		}
 	} else {
-		intel_display_irq_regs_assert_irr_is_zero(display, EDP_PSR_IIR);
+		assert_iir_is_zero_wl(display, EDP_PSR_IIR);
 	}
 
 	for_each_pipe(display, pipe) {
@@ -2434,23 +2430,20 @@ void gen8_de_irq_postinstall(struct intel_display *display)
 
 		if (intel_display_power_is_enabled(display,
 						   POWER_DOMAIN_PIPE(pipe)))
-			intel_display_irq_regs_init(display, GEN8_DE_PIPE_IRQ_REGS(pipe),
-						    display->irq.de_pipe_imr_mask[pipe],
-						    de_pipe_enables);
+			irq_init_wl(display, GEN8_DE_PIPE_IRQ_REGS(pipe),
+				    display->irq.de_pipe_imr_mask[pipe],
+				    de_pipe_enables);
 	}
 
-	intel_display_irq_regs_init(display, GEN8_DE_PORT_IRQ_REGS, ~de_port_masked,
-				    de_port_enables);
-	intel_display_irq_regs_init(display, GEN8_DE_MISC_IRQ_REGS, ~de_misc_masked,
-				    de_misc_masked);
+	irq_init_wl(display, GEN8_DE_PORT_IRQ_REGS, ~de_port_masked, de_port_enables);
+	irq_init_wl(display, GEN8_DE_MISC_IRQ_REGS, ~de_misc_masked, de_misc_masked);
 
 	if (IS_DISPLAY_VER(display, 11, 13)) {
 		u32 de_hpd_masked = 0;
 		u32 de_hpd_enables = GEN11_DE_TC_HOTPLUG_MASK |
 				     GEN11_DE_TBT_HOTPLUG_MASK;
 
-		intel_display_irq_regs_init(display, GEN11_DE_HPD_IRQ_REGS, ~de_hpd_masked,
-					    de_hpd_enables);
+		irq_init_wl(display, GEN11_DE_HPD_IRQ_REGS, ~de_hpd_masked, de_hpd_enables);
 	}
 }
 
@@ -2461,17 +2454,16 @@ static void mtp_irq_postinstall(struct intel_display *display)
 	u32 de_hpd_enables = de_hpd_mask | XELPDP_DP_ALT_HOTPLUG_MASK |
 			     XELPDP_TBT_HOTPLUG_MASK;
 
-	intel_display_irq_regs_init(display, PICAINTERRUPT_IRQ_REGS, ~de_hpd_mask,
-				    de_hpd_enables);
+	irq_init_wl(display, PICAINTERRUPT_IRQ_REGS, ~de_hpd_mask, de_hpd_enables);
 
-	intel_display_irq_regs_init(display, SDE_IRQ_REGS, ~sde_mask, 0xffffffff);
+	irq_init_wl(display, SDE_IRQ_REGS, ~sde_mask, 0xffffffff);
 }
 
 static void icp_irq_postinstall(struct intel_display *display)
 {
 	u32 mask = SDE_GMBUS_ICP;
 
-	intel_display_irq_regs_init(display, SDE_IRQ_REGS, ~mask, 0xffffffff);
+	irq_init_wl(display, SDE_IRQ_REGS, ~mask, 0xffffffff);
 }
 
 void gen11_de_irq_postinstall(struct intel_display *display)
-- 
2.47.3

Re: [PATCH 1/4] drm/{i915,xe}/display: move irq calls to parent interface

[Ville Syrjälä]

On Mon, Nov 10, 2025 at 09:31:36PM +0200, Jani Nikula wrote:
> Add an irq parent driver interface for the .enabled and .synchronize
> calls. This lets us drop the dependency on i915_drv.h and i915_irq.h in
> a multiple places.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  .../gpu/drm/i915/display/intel_display_irq.c  | 36 +++++++------------
>  .../drm/i915/display/intel_display_power.c    |  5 ++-
>  .../i915/display/intel_display_power_well.c   | 15 +++-----
>  drivers/gpu/drm/i915/display/intel_gmbus.c    |  9 +++--
>  drivers/gpu/drm/i915/display/intel_hotplug.c  |  6 ++--
>  .../gpu/drm/i915/display/intel_lpe_audio.c    |  1 -
>  drivers/gpu/drm/i915/display/intel_pipe_crc.c |  6 ++--
>  drivers/gpu/drm/i915/i915_driver.c            |  1 +
>  drivers/gpu/drm/i915/i915_irq.c               | 16 +++++++++
>  drivers/gpu/drm/i915/i915_irq.h               |  2 ++
>  drivers/gpu/drm/xe/display/ext/i915_irq.c     | 10 ------
>  drivers/gpu/drm/xe/display/xe_display.c       | 18 ++++++++++
>  include/drm/intel/display_parent_interface.h  |  8 +++++
>  13 files changed, 71 insertions(+), 62 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index 43b27deb4a26..11bc47d22aa4 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -5,8 +5,8 @@
>  
>  #include <drm/drm_print.h>
>  #include <drm/drm_vblank.h>
> +#include <drm/intel/display_parent_interface.h>
>  
> -#include "i915_drv.h"
>  #include "i915_irq.h"
>  #include "i915_reg.h"
>  #include "icl_dsi_regs.h"
> @@ -135,7 +135,6 @@ intel_handle_vblank(struct intel_display *display, enum pipe pipe)
>  void ilk_update_display_irq(struct intel_display *display,
>  			    u32 interrupt_mask, u32 enabled_irq_mask)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	u32 new_val;
>  
>  	lockdep_assert_held(&display->irq.lock);
> @@ -146,7 +145,7 @@ void ilk_update_display_irq(struct intel_display *display,
>  	new_val |= (~enabled_irq_mask & interrupt_mask);
>  
>  	if (new_val != display->irq.ilk_de_imr_mask &&
> -	    !drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv))) {
> +	    !drm_WARN_ON(display->drm, !display->parent->irq->enabled(display->drm))) {

Can't we keep intel_irqs_enabled()/etc. as wrapper functions instead of
open coding all that pointer chasing everywhere?

>  		display->irq.ilk_de_imr_mask = new_val;
>  		intel_de_write(display, DEIMR, display->irq.ilk_de_imr_mask);
>  		intel_de_posting_read(display, DEIMR);
> @@ -172,7 +171,6 @@ void ilk_disable_display_irq(struct intel_display *display, u32 bits)
>  void bdw_update_port_irq(struct intel_display *display,
>  			 u32 interrupt_mask, u32 enabled_irq_mask)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	u32 new_val;
>  	u32 old_val;
>  
> @@ -180,7 +178,7 @@ void bdw_update_port_irq(struct intel_display *display,
>  
>  	drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
>  
> -	if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
> +	if (drm_WARN_ON(display->drm, !display->parent->irq->enabled(display->drm)))
>  		return;
>  
>  	old_val = intel_de_read(display, GEN8_DE_PORT_IMR);
> @@ -206,14 +204,13 @@ static void bdw_update_pipe_irq(struct intel_display *display,
>  				enum pipe pipe, u32 interrupt_mask,
>  				u32 enabled_irq_mask)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	u32 new_val;
>  
>  	lockdep_assert_held(&display->irq.lock);
>  
>  	drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
>  
> -	if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
> +	if (drm_WARN_ON(display->drm, !display->parent->irq->enabled(display->drm)))
>  		return;
>  
>  	new_val = display->irq.de_pipe_imr_mask[pipe];
> @@ -249,7 +246,6 @@ void ibx_display_interrupt_update(struct intel_display *display,
>  				  u32 interrupt_mask,
>  				  u32 enabled_irq_mask)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	u32 sdeimr = intel_de_read(display, SDEIMR);
>  
>  	sdeimr &= ~interrupt_mask;
> @@ -259,7 +255,7 @@ void ibx_display_interrupt_update(struct intel_display *display,
>  
>  	lockdep_assert_held(&display->irq.lock);
>  
> -	if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
> +	if (drm_WARN_ON(display->drm, !display->parent->irq->enabled(display->drm)))
>  		return;
>  
>  	intel_de_write(display, SDEIMR, sdeimr);
> @@ -323,7 +319,6 @@ u32 i915_pipestat_enable_mask(struct intel_display *display,
>  void i915_enable_pipestat(struct intel_display *display,
>  			  enum pipe pipe, u32 status_mask)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	i915_reg_t reg = PIPESTAT(display, pipe);
>  	u32 enable_mask;
>  
> @@ -332,7 +327,7 @@ void i915_enable_pipestat(struct intel_display *display,
>  		      pipe_name(pipe), status_mask);
>  
>  	lockdep_assert_held(&display->irq.lock);
> -	drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv));
> +	drm_WARN_ON(display->drm, !display->parent->irq->enabled(display->drm));
>  
>  	if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == status_mask)
>  		return;
> @@ -347,7 +342,6 @@ void i915_enable_pipestat(struct intel_display *display,
>  void i915_disable_pipestat(struct intel_display *display,
>  			   enum pipe pipe, u32 status_mask)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	i915_reg_t reg = PIPESTAT(display, pipe);
>  	u32 enable_mask;
>  
> @@ -356,7 +350,7 @@ void i915_disable_pipestat(struct intel_display *display,
>  		      pipe_name(pipe), status_mask);
>  
>  	lockdep_assert_held(&display->irq.lock);
> -	drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv));
> +	drm_WARN_ON(display->drm, !display->parent->irq->enabled(display->drm));
>  
>  	if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == 0)
>  		return;
> @@ -2153,14 +2147,13 @@ void gen11_display_irq_reset(struct intel_display *display)
>  void gen8_irq_power_well_post_enable(struct intel_display *display,
>  				     u8 pipe_mask)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	u32 extra_ier = GEN8_PIPE_VBLANK | GEN8_PIPE_FIFO_UNDERRUN |
>  		gen8_de_pipe_flip_done_mask(display);
>  	enum pipe pipe;
>  
>  	spin_lock_irq(&display->irq.lock);
>  
> -	if (!intel_irqs_enabled(dev_priv)) {
> +	if (!display->parent->irq->enabled(display->drm)) {
>  		spin_unlock_irq(&display->irq.lock);
>  		return;
>  	}
> @@ -2176,12 +2169,11 @@ void gen8_irq_power_well_post_enable(struct intel_display *display,
>  void gen8_irq_power_well_pre_disable(struct intel_display *display,
>  				     u8 pipe_mask)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	enum pipe pipe;
>  
>  	spin_lock_irq(&display->irq.lock);
>  
> -	if (!intel_irqs_enabled(dev_priv)) {
> +	if (!display->parent->irq->enabled(display->drm)) {
>  		spin_unlock_irq(&display->irq.lock);
>  		return;
>  	}
> @@ -2192,7 +2184,7 @@ void gen8_irq_power_well_pre_disable(struct intel_display *display,
>  	spin_unlock_irq(&display->irq.lock);
>  
>  	/* make sure we're done processing display irqs */
> -	intel_synchronize_irq(dev_priv);
> +	display->parent->irq->synchronize(display->drm);
>  }
>  
>  /*
> @@ -2225,8 +2217,6 @@ static void ibx_irq_postinstall(struct intel_display *display)
>  
>  void valleyview_enable_display_irqs(struct intel_display *display)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
> -
>  	spin_lock_irq(&display->irq.lock);
>  
>  	if (display->irq.vlv_display_irqs_enabled)
> @@ -2234,7 +2224,7 @@ void valleyview_enable_display_irqs(struct intel_display *display)
>  
>  	display->irq.vlv_display_irqs_enabled = true;
>  
> -	if (intel_irqs_enabled(dev_priv)) {
> +	if (display->parent->irq->enabled(display->drm)) {
>  		_vlv_display_irq_reset(display);
>  		_vlv_display_irq_postinstall(display);
>  	}
> @@ -2245,8 +2235,6 @@ void valleyview_enable_display_irqs(struct intel_display *display)
>  
>  void valleyview_disable_display_irqs(struct intel_display *display)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
> -
>  	spin_lock_irq(&display->irq.lock);
>  
>  	if (!display->irq.vlv_display_irqs_enabled)
> @@ -2254,7 +2242,7 @@ void valleyview_disable_display_irqs(struct intel_display *display)
>  
>  	display->irq.vlv_display_irqs_enabled = false;
>  
> -	if (intel_irqs_enabled(dev_priv))
> +	if (display->parent->irq->enabled(display->drm))
>  		_vlv_display_irq_reset(display);
>  out:
>  	spin_unlock_irq(&display->irq.lock);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 74fcd9cfe911..7c857291ad4c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -7,11 +7,11 @@
>  #include <linux/string_helpers.h>
>  
>  #include <drm/drm_print.h>
> +#include <drm/intel/display_parent_interface.h>
>  
>  #include "soc/intel_dram.h"
>  
>  #include "i915_drv.h"
> -#include "i915_irq.h"
>  #include "i915_reg.h"
>  #include "intel_backlight_regs.h"
>  #include "intel_cdclk.h"
> @@ -1202,7 +1202,6 @@ static void hsw_assert_cdclk(struct intel_display *display)
>  
>  static void assert_can_disable_lcpll(struct intel_display *display)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	struct intel_crtc *crtc;
>  
>  	for_each_intel_crtc(display->drm, crtc)
> @@ -1247,7 +1246,7 @@ static void assert_can_disable_lcpll(struct intel_display *display)
>  	 * gen-specific and since we only disable LCPLL after we fully disable
>  	 * the interrupts, the check below should be enough.
>  	 */
> -	INTEL_DISPLAY_STATE_WARN(display, intel_irqs_enabled(dev_priv),
> +	INTEL_DISPLAY_STATE_WARN(display, display->parent->irq->enabled(display->drm),
>  				 "IRQs enabled\n");
>  }
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> index eab7019f2252..5ae064bc536a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> @@ -6,9 +6,8 @@
>  #include <linux/iopoll.h>
>  
>  #include <drm/drm_print.h>
> +#include <drm/intel/display_parent_interface.h>
>  
> -#include "i915_drv.h"
> -#include "i915_irq.h"
>  #include "i915_reg.h"
>  #include "intel_backlight_regs.h"
>  #include "intel_combo_phy.h"
> @@ -628,8 +627,6 @@ static bool hsw_power_well_enabled(struct intel_display *display,
>  
>  static void assert_can_enable_dc9(struct intel_display *display)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
> -
>  	drm_WARN_ONCE(display->drm,
>  		      (intel_de_read(display, DC_STATE_EN) & DC_STATE_EN_DC9),
>  		      "DC9 already programmed to be enabled.\n");
> @@ -641,7 +638,7 @@ static void assert_can_enable_dc9(struct intel_display *display)
>  		      intel_de_read(display, HSW_PWR_WELL_CTL2) &
>  		      HSW_PWR_WELL_CTL_REQ(SKL_PW_CTL_IDX_PW_2),
>  		      "Power well 2 on.\n");
> -	drm_WARN_ONCE(display->drm, intel_irqs_enabled(dev_priv),
> +	drm_WARN_ONCE(display->drm, display->parent->irq->enabled(display->drm),
>  		      "Interrupts not disabled yet.\n");
>  
>  	 /*
> @@ -655,9 +652,7 @@ static void assert_can_enable_dc9(struct intel_display *display)
>  
>  static void assert_can_disable_dc9(struct intel_display *display)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
> -
> -	drm_WARN_ONCE(display->drm, intel_irqs_enabled(dev_priv),
> +	drm_WARN_ONCE(display->drm, display->parent->irq->enabled(display->drm),
>  		      "Interrupts not disabled yet.\n");
>  	drm_WARN_ONCE(display->drm,
>  		      intel_de_read(display, DC_STATE_EN) &
> @@ -1281,12 +1276,10 @@ static void vlv_display_power_well_init(struct intel_display *display)
>  
>  static void vlv_display_power_well_deinit(struct intel_display *display)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
> -
>  	valleyview_disable_display_irqs(display);
>  
>  	/* make sure we're done processing display irqs */
> -	intel_synchronize_irq(dev_priv);
> +	display->parent->irq->synchronize(display->drm);
>  
>  	vlv_pps_reset_all(display);
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
> index 82f3a40ecac7..98834cf622d2 100644
> --- a/drivers/gpu/drm/i915/display/intel_gmbus.c
> +++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
> @@ -32,11 +32,11 @@
>  #include <linux/i2c.h>
>  #include <linux/iopoll.h>
>  
> -#include <drm/drm_print.h>
>  #include <drm/display/drm_hdcp_helper.h>
> +#include <drm/drm_print.h>
> +#include <drm/drm_print.h>
> +#include <drm/intel/display_parent_interface.h>
>  
> -#include "i915_drv.h"
> -#include "i915_irq.h"
>  #include "i915_reg.h"
>  #include "intel_de.h"
>  #include "intel_display_regs.h"
> @@ -391,12 +391,11 @@ intel_gpio_setup(struct intel_gmbus *bus, i915_reg_t gpio_reg)
>  
>  static bool has_gmbus_irq(struct intel_display *display)
>  {
> -	struct drm_i915_private *i915 = to_i915(display->drm);
>  	/*
>  	 * encoder->shutdown() may want to use GMBUS
>  	 * after irqs have already been disabled.
>  	 */
> -	return HAS_GMBUS_IRQ(display) && intel_irqs_enabled(i915);
> +	return HAS_GMBUS_IRQ(display) && display->parent->irq->enabled(display->drm);
>  }
>  
>  static int gmbus_wait(struct intel_display *display, u32 status, u32 irq_en)
> diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
> index 235706229ffb..a4254d4e9a4a 100644
> --- a/drivers/gpu/drm/i915/display/intel_hotplug.c
> +++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
> @@ -26,9 +26,8 @@
>  
>  #include <drm/drm_print.h>
>  #include <drm/drm_probe_helper.h>
> +#include <drm/intel/display_parent_interface.h>
>  
> -#include "i915_drv.h"
> -#include "i915_irq.h"
>  #include "intel_connector.h"
>  #include "intel_display_core.h"
>  #include "intel_display_power.h"
> @@ -1177,13 +1176,12 @@ bool intel_hpd_schedule_detection(struct intel_display *display)
>  static int i915_hpd_storm_ctl_show(struct seq_file *m, void *data)
>  {
>  	struct intel_display *display = m->private;
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	struct intel_hotplug *hotplug = &display->hotplug;
>  
>  	/* Synchronize with everything first in case there's been an HPD
>  	 * storm, but we haven't finished handling it in the kernel yet
>  	 */
> -	intel_synchronize_irq(dev_priv);
> +	display->parent->irq->synchronize(display->drm);
>  	flush_work(&display->hotplug.dig_port_work);
>  	flush_delayed_work(&display->hotplug.hotplug_work);
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_lpe_audio.c b/drivers/gpu/drm/i915/display/intel_lpe_audio.c
> index 42284e9928f2..5b41abe1c64d 100644
> --- a/drivers/gpu/drm/i915/display/intel_lpe_audio.c
> +++ b/drivers/gpu/drm/i915/display/intel_lpe_audio.c
> @@ -71,7 +71,6 @@
>  #include <drm/drm_print.h>
>  #include <drm/intel/intel_lpe_audio.h>
>  
> -#include "i915_irq.h"
>  #include "intel_audio_regs.h"
>  #include "intel_de.h"
>  #include "intel_lpe_audio.h"
> diff --git a/drivers/gpu/drm/i915/display/intel_pipe_crc.c b/drivers/gpu/drm/i915/display/intel_pipe_crc.c
> index 1f27643412f1..b782f894cce8 100644
> --- a/drivers/gpu/drm/i915/display/intel_pipe_crc.c
> +++ b/drivers/gpu/drm/i915/display/intel_pipe_crc.c
> @@ -29,9 +29,8 @@
>  #include <linux/seq_file.h>
>  
>  #include <drm/drm_print.h>
> +#include <drm/intel/display_parent_interface.h>
>  
> -#include "i915_drv.h"
> -#include "i915_irq.h"
>  #include "intel_atomic.h"
>  #include "intel_de.h"
>  #include "intel_display_irq.h"
> @@ -658,7 +657,6 @@ void intel_crtc_enable_pipe_crc(struct intel_crtc *crtc)
>  void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc)
>  {
>  	struct intel_display *display = to_intel_display(crtc);
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	struct intel_pipe_crc *pipe_crc = &crtc->pipe_crc;
>  	enum pipe pipe = crtc->pipe;
>  
> @@ -669,5 +667,5 @@ void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc)
>  
>  	intel_de_write(display, PIPE_CRC_CTL(display, pipe), 0);
>  	intel_de_posting_read(display, PIPE_CRC_CTL(display, pipe));
> -	intel_synchronize_irq(dev_priv);
> +	display->parent->irq->synchronize(display->drm);
>  }
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index c97b76771917..07715aef62d3 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -741,6 +741,7 @@ static void i915_welcome_messages(struct drm_i915_private *dev_priv)
>  
>  static const struct intel_display_parent_interface parent = {
>  	.rpm = &i915_display_rpm_interface,
> +	.irq = &i915_display_irq_interface,
>  };
>  
>  const struct intel_display_parent_interface *i915_driver_parent_interface(void)
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 1898be4ddc8b..3fe978d4ea53 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -33,6 +33,7 @@
>  
>  #include <drm/drm_drv.h>
>  #include <drm/drm_print.h>
> +#include <drm/intel/display_parent_interface.h>
>  
>  #include "display/intel_display_irq.h"
>  #include "display/intel_hotplug.h"
> @@ -1252,3 +1253,18 @@ void intel_synchronize_hardirq(struct drm_i915_private *i915)
>  {
>  	synchronize_hardirq(to_pci_dev(i915->drm.dev)->irq);
>  }
> +
> +static bool _intel_irq_enabled(struct drm_device *drm)
> +{
> +	return intel_irqs_enabled(to_i915(drm));
> +}
> +
> +static void _intel_irq_synchronize(struct drm_device *drm)
> +{
> +	return intel_synchronize_irq(to_i915(drm));
> +}
> +
> +const struct intel_display_irq_interface i915_display_irq_interface = {
> +	.enabled = _intel_irq_enabled,
> +	.synchronize = _intel_irq_synchronize,
> +};
> diff --git a/drivers/gpu/drm/i915/i915_irq.h b/drivers/gpu/drm/i915/i915_irq.h
> index 58789b264575..5c87d6d41c74 100644
> --- a/drivers/gpu/drm/i915/i915_irq.h
> +++ b/drivers/gpu/drm/i915/i915_irq.h
> @@ -51,4 +51,6 @@ void gen2_error_reset(struct intel_uncore *uncore, struct i915_error_regs regs);
>  void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
>  		     u32 emr_val);
>  
> +extern const struct intel_display_irq_interface i915_display_irq_interface;
> +
>  #endif /* __I915_IRQ_H__ */
> diff --git a/drivers/gpu/drm/xe/display/ext/i915_irq.c b/drivers/gpu/drm/xe/display/ext/i915_irq.c
> index 3c6bca66ddab..b198dd1988bb 100644
> --- a/drivers/gpu/drm/xe/display/ext/i915_irq.c
> +++ b/drivers/gpu/drm/xe/display/ext/i915_irq.c
> @@ -73,13 +73,3 @@ void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
>  	intel_uncore_write(uncore, regs.emr, emr_val);
>  	intel_uncore_posting_read(uncore, regs.emr);
>  }
> -
> -bool intel_irqs_enabled(struct xe_device *xe)
> -{
> -	return atomic_read(&xe->irq.enabled);
> -}
> -
> -void intel_synchronize_irq(struct xe_device *xe)
> -{
> -	synchronize_irq(to_pci_dev(xe->drm.dev)->irq);
> -}
> diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
> index 8b0afa270216..e3320d9e6314 100644
> --- a/drivers/gpu/drm/xe/display/xe_display.c
> +++ b/drivers/gpu/drm/xe/display/xe_display.c
> @@ -516,8 +516,26 @@ static void display_device_remove(struct drm_device *dev, void *arg)
>  	intel_display_device_remove(display);
>  }
>  
> +static bool irq_enabled(struct drm_device *drm)
> +{
> +	struct xe_device *xe = to_xe_device(drm);
> +
> +	return atomic_read(&xe->irq.enabled);
> +}
> +
> +static void irq_synchronize(struct drm_device *drm)
> +{
> +	synchronize_irq(to_pci_dev(drm->dev)->irq);
> +}
> +
> +static const struct intel_display_irq_interface xe_display_irq_interface = {
> +	.enabled = irq_enabled,
> +	.synchronize = irq_synchronize,
> +};
> +
>  static const struct intel_display_parent_interface parent = {
>  	.rpm = &xe_display_rpm_interface,
> +	.irq = &xe_display_irq_interface,
>  };
>  
>  /**
> diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
> index 26bedc360044..3a008a18eb65 100644
> --- a/include/drm/intel/display_parent_interface.h
> +++ b/include/drm/intel/display_parent_interface.h
> @@ -25,6 +25,11 @@ struct intel_display_rpm_interface {
>  	void (*assert_unblock)(const struct drm_device *drm);
>  };
>  
> +struct intel_display_irq_interface {
> +	bool (*enabled)(struct drm_device *drm);
> +	void (*synchronize)(struct drm_device *drm);
> +};
> +
>  /**
>   * struct intel_display_parent_interface - services parent driver provides to display
>   *
> @@ -40,6 +45,9 @@ struct intel_display_rpm_interface {
>  struct intel_display_parent_interface {
>  	/** @rpm: Runtime PM functions */
>  	const struct intel_display_rpm_interface *rpm;
> +
> +	/** @irq: IRQ interface */
> +	const struct intel_display_irq_interface *irq;
>  };
>  
>  #endif
> -- 
> 2.47.3

-- 
Ville Syrjälä
Intel

Re: [PATCH 4/4] drm/i915/display: shorten the intel_display_irq_regs_* function names

[Ville Syrjälä]

On Mon, Nov 10, 2025 at 09:31:39PM +0200, Jani Nikula wrote:
> Shorten the intel_display_irq_regs_* function names to the underlying
> function names with a _wl suffix for clarity.
> 
> - intel_display_irq_regs_init() -> irq_init_wl()
> - intel_display_irq_regs_reset() -> irq_reset_wl()
> - intel_display_irq_regs_assert_irr_is_zero() -> assert_iir_is_zero_wl()
> 
> This emphasizes the difference is the wakelock. Platforms without the
> DMC wakelock mechanism can use the non-wl versions.

These things should just get nuked. You already switched to
intel_de_{read,write}() in the previous patch, and those already
handle the wakelock stuff for you.

> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  .../gpu/drm/i915/display/intel_display_irq.c  | 76 +++++++++----------
>  1 file changed, 34 insertions(+), 42 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index c9e7814479f6..09036cd92558 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -97,9 +97,8 @@ static void error_init(struct intel_display *display, struct i915_error_regs reg
>  	intel_de_posting_read(display, regs.emr);
>  }
>  
> -static void
> -intel_display_irq_regs_init(struct intel_display *display, struct i915_irq_regs regs,
> -			    u32 imr_val, u32 ier_val)
> +static void irq_init_wl(struct intel_display *display, struct i915_irq_regs regs,
> +			u32 imr_val, u32 ier_val)
>  {
>  	intel_dmc_wl_get(display, regs.imr);
>  	intel_dmc_wl_get(display, regs.ier);
> @@ -112,8 +111,7 @@ intel_display_irq_regs_init(struct intel_display *display, struct i915_irq_regs
>  	intel_dmc_wl_put(display, regs.imr);
>  }
>  
> -static void
> -intel_display_irq_regs_reset(struct intel_display *display, struct i915_irq_regs regs)
> +static void irq_reset_wl(struct intel_display *display, struct i915_irq_regs regs)
>  {
>  	intel_dmc_wl_get(display, regs.imr);
>  	intel_dmc_wl_get(display, regs.ier);
> @@ -126,8 +124,7 @@ intel_display_irq_regs_reset(struct intel_display *display, struct i915_irq_regs
>  	intel_dmc_wl_put(display, regs.imr);
>  }
>  
> -static void
> -intel_display_irq_regs_assert_irr_is_zero(struct intel_display *display, i915_reg_t reg)
> +static void assert_iir_is_zero_wl(struct intel_display *display, i915_reg_t reg)
>  {
>  	intel_dmc_wl_get(display, reg);
>  
> @@ -1983,7 +1980,7 @@ static void _vlv_display_irq_reset(struct intel_display *display)
>  
>  	i9xx_pipestat_irq_reset(display);
>  
> -	intel_display_irq_regs_reset(display, VLV_IRQ_REGS);
> +	irq_reset_wl(display, VLV_IRQ_REGS);
>  	display->irq.vlv_imr_mask = ~0u;
>  }
>  
> @@ -2094,7 +2091,7 @@ static void _vlv_display_irq_postinstall(struct intel_display *display)
>  
>  	display->irq.vlv_imr_mask = ~enable_mask;
>  
> -	intel_display_irq_regs_init(display, VLV_IRQ_REGS, display->irq.vlv_imr_mask, enable_mask);
> +	irq_init_wl(display, VLV_IRQ_REGS, display->irq.vlv_imr_mask, enable_mask);
>  }
>  
>  void vlv_display_irq_postinstall(struct intel_display *display)
> @@ -2145,10 +2142,10 @@ void gen8_display_irq_reset(struct intel_display *display)
>  	for_each_pipe(display, pipe)
>  		if (intel_display_power_is_enabled(display,
>  						   POWER_DOMAIN_PIPE(pipe)))
> -			intel_display_irq_regs_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
> +			irq_reset_wl(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
>  
> -	intel_display_irq_regs_reset(display, GEN8_DE_PORT_IRQ_REGS);
> -	intel_display_irq_regs_reset(display, GEN8_DE_MISC_IRQ_REGS);
> +	irq_reset_wl(display, GEN8_DE_PORT_IRQ_REGS);
> +	irq_reset_wl(display, GEN8_DE_MISC_IRQ_REGS);
>  
>  	if (HAS_PCH_SPLIT(display))
>  		ibx_display_irq_reset(display);
> @@ -2190,18 +2187,18 @@ void gen11_display_irq_reset(struct intel_display *display)
>  	for_each_pipe(display, pipe)
>  		if (intel_display_power_is_enabled(display,
>  						   POWER_DOMAIN_PIPE(pipe)))
> -			intel_display_irq_regs_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
> +			irq_reset_wl(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
>  
> -	intel_display_irq_regs_reset(display, GEN8_DE_PORT_IRQ_REGS);
> -	intel_display_irq_regs_reset(display, GEN8_DE_MISC_IRQ_REGS);
> +	irq_reset_wl(display, GEN8_DE_PORT_IRQ_REGS);
> +	irq_reset_wl(display, GEN8_DE_MISC_IRQ_REGS);
>  
>  	if (DISPLAY_VER(display) >= 14)
> -		intel_display_irq_regs_reset(display, PICAINTERRUPT_IRQ_REGS);
> +		irq_reset_wl(display, PICAINTERRUPT_IRQ_REGS);
>  	else
> -		intel_display_irq_regs_reset(display, GEN11_DE_HPD_IRQ_REGS);
> +		irq_reset_wl(display, GEN11_DE_HPD_IRQ_REGS);
>  
>  	if (INTEL_PCH_TYPE(display) >= PCH_ICP)
> -		intel_display_irq_regs_reset(display, SDE_IRQ_REGS);
> +		irq_reset_wl(display, SDE_IRQ_REGS);
>  }
>  
>  void gen8_irq_power_well_post_enable(struct intel_display *display,
> @@ -2219,9 +2216,9 @@ void gen8_irq_power_well_post_enable(struct intel_display *display,
>  	}
>  
>  	for_each_pipe_masked(display, pipe, pipe_mask)
> -		intel_display_irq_regs_init(display, GEN8_DE_PIPE_IRQ_REGS(pipe),
> -					    display->irq.de_pipe_imr_mask[pipe],
> -					    ~display->irq.de_pipe_imr_mask[pipe] | extra_ier);
> +		irq_init_wl(display, GEN8_DE_PIPE_IRQ_REGS(pipe),
> +			    display->irq.de_pipe_imr_mask[pipe],
> +			    ~display->irq.de_pipe_imr_mask[pipe] | extra_ier);
>  
>  	spin_unlock_irq(&display->irq.lock);
>  }
> @@ -2239,7 +2236,7 @@ void gen8_irq_power_well_pre_disable(struct intel_display *display,
>  	}
>  
>  	for_each_pipe_masked(display, pipe, pipe_mask)
> -		intel_display_irq_regs_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
> +		irq_reset_wl(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
>  
>  	spin_unlock_irq(&display->irq.lock);
>  
> @@ -2272,7 +2269,7 @@ static void ibx_irq_postinstall(struct intel_display *display)
>  	else
>  		mask = SDE_GMBUS_CPT;
>  
> -	intel_display_irq_regs_init(display, SDE_IRQ_REGS, ~mask, 0xffffffff);
> +	irq_init_wl(display, SDE_IRQ_REGS, ~mask, 0xffffffff);
>  }
>  
>  void valleyview_enable_display_irqs(struct intel_display *display)
> @@ -2334,7 +2331,7 @@ void ilk_de_irq_postinstall(struct intel_display *display)
>  	}
>  
>  	if (display->platform.haswell) {
> -		intel_display_irq_regs_assert_irr_is_zero(display, EDP_PSR_IIR);
> +		assert_iir_is_zero_wl(display, EDP_PSR_IIR);
>  		display_mask |= DE_EDP_PSR_INT_HSW;
>  	}
>  
> @@ -2345,8 +2342,8 @@ void ilk_de_irq_postinstall(struct intel_display *display)
>  
>  	ibx_irq_postinstall(display);
>  
> -	intel_display_irq_regs_init(display, DE_IRQ_REGS, display->irq.ilk_de_imr_mask,
> -				    display_mask | extra_mask);
> +	irq_init_wl(display, DE_IRQ_REGS, display->irq.ilk_de_imr_mask,
> +		    display_mask | extra_mask);
>  }
>  
>  static void mtp_irq_postinstall(struct intel_display *display);
> @@ -2422,11 +2419,10 @@ void gen8_de_irq_postinstall(struct intel_display *display)
>  			if (!intel_display_power_is_enabled(display, domain))
>  				continue;
>  
> -			intel_display_irq_regs_assert_irr_is_zero(display,
> -								  TRANS_PSR_IIR(display, trans));
> +			assert_iir_is_zero_wl(display, TRANS_PSR_IIR(display, trans));
>  		}
>  	} else {
> -		intel_display_irq_regs_assert_irr_is_zero(display, EDP_PSR_IIR);
> +		assert_iir_is_zero_wl(display, EDP_PSR_IIR);
>  	}
>  
>  	for_each_pipe(display, pipe) {
> @@ -2434,23 +2430,20 @@ void gen8_de_irq_postinstall(struct intel_display *display)
>  
>  		if (intel_display_power_is_enabled(display,
>  						   POWER_DOMAIN_PIPE(pipe)))
> -			intel_display_irq_regs_init(display, GEN8_DE_PIPE_IRQ_REGS(pipe),
> -						    display->irq.de_pipe_imr_mask[pipe],
> -						    de_pipe_enables);
> +			irq_init_wl(display, GEN8_DE_PIPE_IRQ_REGS(pipe),
> +				    display->irq.de_pipe_imr_mask[pipe],
> +				    de_pipe_enables);
>  	}
>  
> -	intel_display_irq_regs_init(display, GEN8_DE_PORT_IRQ_REGS, ~de_port_masked,
> -				    de_port_enables);
> -	intel_display_irq_regs_init(display, GEN8_DE_MISC_IRQ_REGS, ~de_misc_masked,
> -				    de_misc_masked);
> +	irq_init_wl(display, GEN8_DE_PORT_IRQ_REGS, ~de_port_masked, de_port_enables);
> +	irq_init_wl(display, GEN8_DE_MISC_IRQ_REGS, ~de_misc_masked, de_misc_masked);
>  
>  	if (IS_DISPLAY_VER(display, 11, 13)) {
>  		u32 de_hpd_masked = 0;
>  		u32 de_hpd_enables = GEN11_DE_TC_HOTPLUG_MASK |
>  				     GEN11_DE_TBT_HOTPLUG_MASK;
>  
> -		intel_display_irq_regs_init(display, GEN11_DE_HPD_IRQ_REGS, ~de_hpd_masked,
> -					    de_hpd_enables);
> +		irq_init_wl(display, GEN11_DE_HPD_IRQ_REGS, ~de_hpd_masked, de_hpd_enables);
>  	}
>  }
>  
> @@ -2461,17 +2454,16 @@ static void mtp_irq_postinstall(struct intel_display *display)
>  	u32 de_hpd_enables = de_hpd_mask | XELPDP_DP_ALT_HOTPLUG_MASK |
>  			     XELPDP_TBT_HOTPLUG_MASK;
>  
> -	intel_display_irq_regs_init(display, PICAINTERRUPT_IRQ_REGS, ~de_hpd_mask,
> -				    de_hpd_enables);
> +	irq_init_wl(display, PICAINTERRUPT_IRQ_REGS, ~de_hpd_mask, de_hpd_enables);
>  
> -	intel_display_irq_regs_init(display, SDE_IRQ_REGS, ~sde_mask, 0xffffffff);
> +	irq_init_wl(display, SDE_IRQ_REGS, ~sde_mask, 0xffffffff);
>  }
>  
>  static void icp_irq_postinstall(struct intel_display *display)
>  {
>  	u32 mask = SDE_GMBUS_ICP;
>  
> -	intel_display_irq_regs_init(display, SDE_IRQ_REGS, ~mask, 0xffffffff);
> +	irq_init_wl(display, SDE_IRQ_REGS, ~mask, 0xffffffff);
>  }
>  
>  void gen11_de_irq_postinstall(struct intel_display *display)
> -- 
> 2.47.3

-- 
Ville Syrjälä
Intel

✗ CI.checkpatch: warning for drm/{i915, xe}/irq: clarify display and parent driver interfaces

[Patchwork]

== Series Details ==

Series: drm/{i915, xe}/irq: clarify display and parent driver interfaces
URL   : https://patchwork.freedesktop.org/series/157350/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
d9120d4d84745cf011b4b3efb338747e69179dfb
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit ba2812718b9a3d81f01809e67ec2e0bfa0924ffc
Author: Jani Nikula <jani.nikula@intel.com>
Date:   Mon Nov 10 21:31:39 2025 +0200

    drm/i915/display: shorten the intel_display_irq_regs_* function names
    
    Shorten the intel_display_irq_regs_* function names to the underlying
    function names with a _wl suffix for clarity.
    
    - intel_display_irq_regs_init() -> irq_init_wl()
    - intel_display_irq_regs_reset() -> irq_reset_wl()
    - intel_display_irq_regs_assert_irr_is_zero() -> assert_iir_is_zero_wl()
    
    This emphasizes the difference is the wakelock. Platforms without the
    DMC wakelock mechanism can use the non-wl versions.
    
    Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+ /mt/dim checkpatch a9792b1ab75123e4aceaba953a89809e745919c6 drm-intel
0ce42a75ee7a drm/{i915, xe}/display: move irq calls to parent interface
b0302a83c7ac drm/{i915, xe}/display: duplicate gen2 irq/error init/reset in display irq
-:62: WARNING:IF_0: Consider removing the code enclosed by this #if 0 and its #endif
#62: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:59:
+#if 0	/* FIXME */

-:130: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#130: 
deleted file mode 100644

total: 0 errors, 2 warnings, 0 checks, 95 lines checked
13af8d5327e6 drm/i915/display: convert the display irq interfaces to struct intel_display
ba2812718b9a drm/i915/display: shorten the intel_display_irq_regs_* function names

✓ CI.KUnit: success for drm/{i915, xe}/irq: clarify display and parent driver interfaces

[Patchwork]

== Series Details ==

Series: drm/{i915, xe}/irq: clarify display and parent driver interfaces
URL   : https://patchwork.freedesktop.org/series/157350/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[21:01:11] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:01:15] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[21:01:45] Starting KUnit Kernel (1/1)...
[21:01:45] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:01:46] ================== guc_buf (11 subtests) ===================
[21:01:46] [PASSED] test_smallest
[21:01:46] [PASSED] test_largest
[21:01:46] [PASSED] test_granular
[21:01:46] [PASSED] test_unique
[21:01:46] [PASSED] test_overlap
[21:01:46] [PASSED] test_reusable
[21:01:46] [PASSED] test_too_big
[21:01:46] [PASSED] test_flush
[21:01:46] [PASSED] test_lookup
[21:01:46] [PASSED] test_data
[21:01:46] [PASSED] test_class
[21:01:46] ===================== [PASSED] guc_buf =====================
[21:01:46] =================== guc_dbm (7 subtests) ===================
[21:01:46] [PASSED] test_empty
[21:01:46] [PASSED] test_default
[21:01:46] ======================== test_size  ========================
[21:01:46] [PASSED] 4
[21:01:46] [PASSED] 8
[21:01:46] [PASSED] 32
[21:01:46] [PASSED] 256
[21:01:46] ==================== [PASSED] test_size ====================
[21:01:46] ======================= test_reuse  ========================
[21:01:46] [PASSED] 4
[21:01:46] [PASSED] 8
[21:01:46] [PASSED] 32
[21:01:46] [PASSED] 256
[21:01:46] =================== [PASSED] test_reuse ====================
[21:01:46] =================== test_range_overlap  ====================
[21:01:46] [PASSED] 4
[21:01:46] [PASSED] 8
[21:01:46] [PASSED] 32
[21:01:46] [PASSED] 256
[21:01:46] =============== [PASSED] test_range_overlap ================
[21:01:46] =================== test_range_compact  ====================
[21:01:46] [PASSED] 4
[21:01:46] [PASSED] 8
[21:01:46] [PASSED] 32
[21:01:46] [PASSED] 256
[21:01:46] =============== [PASSED] test_range_compact ================
[21:01:46] ==================== test_range_spare  =====================
[21:01:46] [PASSED] 4
[21:01:46] [PASSED] 8
[21:01:46] [PASSED] 32
[21:01:46] [PASSED] 256
[21:01:46] ================ [PASSED] test_range_spare =================
[21:01:46] ===================== [PASSED] guc_dbm =====================
[21:01:46] =================== guc_idm (6 subtests) ===================
[21:01:46] [PASSED] bad_init
[21:01:46] [PASSED] no_init
[21:01:46] [PASSED] init_fini
[21:01:46] [PASSED] check_used
[21:01:46] [PASSED] check_quota
[21:01:46] [PASSED] check_all
[21:01:46] ===================== [PASSED] guc_idm =====================
[21:01:46] ================== no_relay (3 subtests) ===================
[21:01:46] [PASSED] xe_drops_guc2pf_if_not_ready
[21:01:46] [PASSED] xe_drops_guc2vf_if_not_ready
[21:01:46] [PASSED] xe_rejects_send_if_not_ready
[21:01:46] ==================== [PASSED] no_relay =====================
[21:01:46] ================== pf_relay (14 subtests) ==================
[21:01:46] [PASSED] pf_rejects_guc2pf_too_short
[21:01:46] [PASSED] pf_rejects_guc2pf_too_long
[21:01:46] [PASSED] pf_rejects_guc2pf_no_payload
[21:01:46] [PASSED] pf_fails_no_payload
[21:01:46] [PASSED] pf_fails_bad_origin
[21:01:46] [PASSED] pf_fails_bad_type
[21:01:46] [PASSED] pf_txn_reports_error
[21:01:46] [PASSED] pf_txn_sends_pf2guc
[21:01:46] [PASSED] pf_sends_pf2guc
[21:01:46] [SKIPPED] pf_loopback_nop
[21:01:46] [SKIPPED] pf_loopback_echo
[21:01:46] [SKIPPED] pf_loopback_fail
[21:01:46] [SKIPPED] pf_loopback_busy
[21:01:46] [SKIPPED] pf_loopback_retry
[21:01:46] ==================== [PASSED] pf_relay =====================
[21:01:46] ================== vf_relay (3 subtests) ===================
[21:01:46] [PASSED] vf_rejects_guc2vf_too_short
[21:01:46] [PASSED] vf_rejects_guc2vf_too_long
[21:01:46] [PASSED] vf_rejects_guc2vf_no_payload
[21:01:46] ==================== [PASSED] vf_relay =====================
[21:01:46] ================ pf_gt_config (4 subtests) =================
[21:01:46] [PASSED] fair_contexts_1vf
[21:01:46] [PASSED] fair_doorbells_1vf
[21:01:46] ====================== fair_contexts  ======================
[21:01:46] [PASSED] 1 VF
[21:01:46] [PASSED] 2 VFs
[21:01:46] [PASSED] 3 VFs
[21:01:46] [PASSED] 4 VFs
[21:01:46] [PASSED] 5 VFs
[21:01:46] [PASSED] 6 VFs
[21:01:46] [PASSED] 7 VFs
[21:01:46] [PASSED] 8 VFs
[21:01:46] [PASSED] 9 VFs
[21:01:46] [PASSED] 10 VFs
[21:01:46] [PASSED] 11 VFs
[21:01:46] [PASSED] 12 VFs
[21:01:46] [PASSED] 13 VFs
[21:01:46] [PASSED] 14 VFs
[21:01:46] [PASSED] 15 VFs
[21:01:46] [PASSED] 16 VFs
[21:01:46] [PASSED] 17 VFs
[21:01:46] [PASSED] 18 VFs
[21:01:46] [PASSED] 19 VFs
[21:01:46] [PASSED] 20 VFs
[21:01:46] [PASSED] 21 VFs
[21:01:46] [PASSED] 22 VFs
[21:01:46] [PASSED] 23 VFs
[21:01:46] [PASSED] 24 VFs
[21:01:46] [PASSED] 25 VFs
[21:01:46] [PASSED] 26 VFs
[21:01:46] [PASSED] 27 VFs
[21:01:46] [PASSED] 28 VFs
[21:01:46] [PASSED] 29 VFs
[21:01:46] [PASSED] 30 VFs
[21:01:46] [PASSED] 31 VFs
[21:01:46] [PASSED] 32 VFs
[21:01:46] [PASSED] 33 VFs
[21:01:46] [PASSED] 34 VFs
[21:01:46] [PASSED] 35 VFs
[21:01:46] [PASSED] 36 VFs
[21:01:46] [PASSED] 37 VFs
[21:01:46] [PASSED] 38 VFs
[21:01:46] [PASSED] 39 VFs
[21:01:46] [PASSED] 40 VFs
[21:01:46] [PASSED] 41 VFs
[21:01:46] [PASSED] 42 VFs
[21:01:46] [PASSED] 43 VFs
[21:01:46] [PASSED] 44 VFs
[21:01:46] [PASSED] 45 VFs
[21:01:46] [PASSED] 46 VFs
[21:01:46] [PASSED] 47 VFs
[21:01:46] [PASSED] 48 VFs
[21:01:46] [PASSED] 49 VFs
[21:01:46] [PASSED] 50 VFs
[21:01:46] [PASSED] 51 VFs
[21:01:46] [PASSED] 52 VFs
[21:01:46] [PASSED] 53 VFs
[21:01:46] [PASSED] 54 VFs
[21:01:46] [PASSED] 55 VFs
[21:01:46] [PASSED] 56 VFs
[21:01:46] [PASSED] 57 VFs
[21:01:46] [PASSED] 58 VFs
[21:01:46] [PASSED] 59 VFs
[21:01:46] [PASSED] 60 VFs
[21:01:46] [PASSED] 61 VFs
[21:01:46] [PASSED] 62 VFs
[21:01:46] [PASSED] 63 VFs
[21:01:46] ================== [PASSED] fair_contexts ==================
[21:01:46] ===================== fair_doorbells  ======================
[21:01:46] [PASSED] 1 VF
[21:01:46] [PASSED] 2 VFs
[21:01:46] [PASSED] 3 VFs
[21:01:46] [PASSED] 4 VFs
[21:01:46] [PASSED] 5 VFs
[21:01:46] [PASSED] 6 VFs
[21:01:46] [PASSED] 7 VFs
[21:01:46] [PASSED] 8 VFs
[21:01:46] [PASSED] 9 VFs
[21:01:46] [PASSED] 10 VFs
[21:01:46] [PASSED] 11 VFs
[21:01:46] [PASSED] 12 VFs
[21:01:46] [PASSED] 13 VFs
[21:01:46] [PASSED] 14 VFs
[21:01:46] [PASSED] 15 VFs
[21:01:46] [PASSED] 16 VFs
[21:01:46] [PASSED] 17 VFs
[21:01:46] [PASSED] 18 VFs
[21:01:46] [PASSED] 19 VFs
[21:01:46] [PASSED] 20 VFs
[21:01:46] [PASSED] 21 VFs
[21:01:46] [PASSED] 22 VFs
[21:01:46] [PASSED] 23 VFs
[21:01:46] [PASSED] 24 VFs
[21:01:46] [PASSED] 25 VFs
[21:01:46] [PASSED] 26 VFs
[21:01:46] [PASSED] 27 VFs
[21:01:46] [PASSED] 28 VFs
[21:01:46] [PASSED] 29 VFs
[21:01:46] [PASSED] 30 VFs
[21:01:46] [PASSED] 31 VFs
[21:01:46] [PASSED] 32 VFs
[21:01:46] [PASSED] 33 VFs
[21:01:46] [PASSED] 34 VFs
[21:01:46] [PASSED] 35 VFs
[21:01:46] [PASSED] 36 VFs
[21:01:46] [PASSED] 37 VFs
[21:01:46] [PASSED] 38 VFs
[21:01:46] [PASSED] 39 VFs
[21:01:46] [PASSED] 40 VFs
[21:01:46] [PASSED] 41 VFs
[21:01:46] [PASSED] 42 VFs
[21:01:46] [PASSED] 43 VFs
[21:01:46] [PASSED] 44 VFs
[21:01:46] [PASSED] 45 VFs
[21:01:46] [PASSED] 46 VFs
[21:01:46] [PASSED] 47 VFs
[21:01:46] [PASSED] 48 VFs
[21:01:46] [PASSED] 49 VFs
[21:01:46] [PASSED] 50 VFs
[21:01:46] [PASSED] 51 VFs
[21:01:46] [PASSED] 52 VFs
[21:01:46] [PASSED] 53 VFs
[21:01:46] [PASSED] 54 VFs
[21:01:46] [PASSED] 55 VFs
[21:01:46] [PASSED] 56 VFs
[21:01:46] [PASSED] 57 VFs
[21:01:46] [PASSED] 58 VFs
[21:01:46] [PASSED] 59 VFs
[21:01:46] [PASSED] 60 VFs
[21:01:46] [PASSED] 61 VFs
[21:01:46] [PASSED] 62 VFs
[21:01:46] [PASSED] 63 VFs
[21:01:46] ================= [PASSED] fair_doorbells ==================
[21:01:46] ================== [PASSED] pf_gt_config ===================
[21:01:46] ===================== lmtt (1 subtest) =====================
[21:01:46] ======================== test_ops  =========================
[21:01:46] [PASSED] 2-level
[21:01:46] [PASSED] multi-level
[21:01:46] ==================== [PASSED] test_ops =====================
[21:01:46] ====================== [PASSED] lmtt =======================
[21:01:46] ================= pf_service (11 subtests) =================
[21:01:46] [PASSED] pf_negotiate_any
[21:01:46] [PASSED] pf_negotiate_base_match
[21:01:46] [PASSED] pf_negotiate_base_newer
[21:01:46] [PASSED] pf_negotiate_base_next
[21:01:46] [SKIPPED] pf_negotiate_base_older
[21:01:46] [PASSED] pf_negotiate_base_prev
[21:01:46] [PASSED] pf_negotiate_latest_match
[21:01:46] [PASSED] pf_negotiate_latest_newer
[21:01:46] [PASSED] pf_negotiate_latest_next
[21:01:46] [SKIPPED] pf_negotiate_latest_older
[21:01:46] [SKIPPED] pf_negotiate_latest_prev
[21:01:46] =================== [PASSED] pf_service ====================
[21:01:46] ================= xe_guc_g2g (2 subtests) ==================
[21:01:46] ============== xe_live_guc_g2g_kunit_default  ==============
[21:01:46] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[21:01:46] ============== xe_live_guc_g2g_kunit_allmem  ===============
[21:01:46] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[21:01:46] =================== [SKIPPED] xe_guc_g2g ===================
[21:01:46] =================== xe_mocs (2 subtests) ===================
[21:01:46] ================ xe_live_mocs_kernel_kunit  ================
[21:01:46] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[21:01:46] ================ xe_live_mocs_reset_kunit  =================
[21:01:46] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[21:01:46] ==================== [SKIPPED] xe_mocs =====================
[21:01:46] ================= xe_migrate (2 subtests) ==================
[21:01:46] ================= xe_migrate_sanity_kunit  =================
[21:01:46] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[21:01:46] ================== xe_validate_ccs_kunit  ==================
[21:01:46] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[21:01:46] =================== [SKIPPED] xe_migrate ===================
[21:01:46] ================== xe_dma_buf (1 subtest) ==================
[21:01:46] ==================== xe_dma_buf_kunit  =====================
[21:01:46] ================ [SKIPPED] xe_dma_buf_kunit ================
[21:01:46] =================== [SKIPPED] xe_dma_buf ===================
[21:01:46] ================= xe_bo_shrink (1 subtest) =================
[21:01:46] =================== xe_bo_shrink_kunit  ====================
[21:01:46] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[21:01:46] ================== [SKIPPED] xe_bo_shrink ==================
[21:01:46] ==================== xe_bo (2 subtests) ====================
[21:01:46] ================== xe_ccs_migrate_kunit  ===================
[21:01:46] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[21:01:46] ==================== xe_bo_evict_kunit  ====================
[21:01:46] =============== [SKIPPED] xe_bo_evict_kunit ================
[21:01:46] ===================== [SKIPPED] xe_bo ======================
[21:01:46] ==================== args (11 subtests) ====================
[21:01:46] [PASSED] count_args_test
[21:01:46] [PASSED] call_args_example
[21:01:46] [PASSED] call_args_test
[21:01:46] [PASSED] drop_first_arg_example
[21:01:46] [PASSED] drop_first_arg_test
[21:01:46] [PASSED] first_arg_example
[21:01:46] [PASSED] first_arg_test
[21:01:46] [PASSED] last_arg_example
[21:01:46] [PASSED] last_arg_test
[21:01:46] [PASSED] pick_arg_example
[21:01:46] [PASSED] sep_comma_example
[21:01:46] ====================== [PASSED] args =======================
[21:01:46] =================== xe_pci (3 subtests) ====================
[21:01:46] ==================== check_graphics_ip  ====================
[21:01:46] [PASSED] 12.00 Xe_LP
[21:01:46] [PASSED] 12.10 Xe_LP+
[21:01:46] [PASSED] 12.55 Xe_HPG
[21:01:46] [PASSED] 12.60 Xe_HPC
[21:01:46] [PASSED] 12.70 Xe_LPG
[21:01:46] [PASSED] 12.71 Xe_LPG
[21:01:46] [PASSED] 12.74 Xe_LPG+
[21:01:46] [PASSED] 20.01 Xe2_HPG
[21:01:46] [PASSED] 20.02 Xe2_HPG
[21:01:46] [PASSED] 20.04 Xe2_LPG
[21:01:46] [PASSED] 30.00 Xe3_LPG
[21:01:46] [PASSED] 30.01 Xe3_LPG
[21:01:46] [PASSED] 30.03 Xe3_LPG
[21:01:46] [PASSED] 30.04 Xe3_LPG
[21:01:46] [PASSED] 30.05 Xe3_LPG
[21:01:46] [PASSED] 35.11 Xe3p_XPC
[21:01:46] ================ [PASSED] check_graphics_ip ================
[21:01:46] ===================== check_media_ip  ======================
[21:01:46] [PASSED] 12.00 Xe_M
[21:01:46] [PASSED] 12.55 Xe_HPM
[21:01:46] [PASSED] 13.00 Xe_LPM+
[21:01:46] [PASSED] 13.01 Xe2_HPM
[21:01:46] [PASSED] 20.00 Xe2_LPM
[21:01:46] [PASSED] 30.00 Xe3_LPM
[21:01:46] [PASSED] 30.02 Xe3_LPM
[21:01:46] [PASSED] 35.00 Xe3p_LPM
[21:01:46] [PASSED] 35.03 Xe3p_HPM
[21:01:46] ================= [PASSED] check_media_ip ==================
[21:01:46] =================== check_platform_desc  ===================
[21:01:46] [PASSED] 0x9A60 (TIGERLAKE)
[21:01:46] [PASSED] 0x9A68 (TIGERLAKE)
[21:01:46] [PASSED] 0x9A70 (TIGERLAKE)
[21:01:46] [PASSED] 0x9A40 (TIGERLAKE)
[21:01:46] [PASSED] 0x9A49 (TIGERLAKE)
[21:01:46] [PASSED] 0x9A59 (TIGERLAKE)
[21:01:46] [PASSED] 0x9A78 (TIGERLAKE)
[21:01:46] [PASSED] 0x9AC0 (TIGERLAKE)
[21:01:46] [PASSED] 0x9AC9 (TIGERLAKE)
[21:01:46] [PASSED] 0x9AD9 (TIGERLAKE)
[21:01:46] [PASSED] 0x9AF8 (TIGERLAKE)
[21:01:46] [PASSED] 0x4C80 (ROCKETLAKE)
[21:01:46] [PASSED] 0x4C8A (ROCKETLAKE)
[21:01:46] [PASSED] 0x4C8B (ROCKETLAKE)
[21:01:46] [PASSED] 0x4C8C (ROCKETLAKE)
[21:01:46] [PASSED] 0x4C90 (ROCKETLAKE)
[21:01:46] [PASSED] 0x4C9A (ROCKETLAKE)
[21:01:46] [PASSED] 0x4680 (ALDERLAKE_S)
[21:01:46] [PASSED] 0x4682 (ALDERLAKE_S)
[21:01:46] [PASSED] 0x4688 (ALDERLAKE_S)
[21:01:46] [PASSED] 0x468A (ALDERLAKE_S)
[21:01:46] [PASSED] 0x468B (ALDERLAKE_S)
[21:01:46] [PASSED] 0x4690 (ALDERLAKE_S)
[21:01:46] [PASSED] 0x4692 (ALDERLAKE_S)
[21:01:46] [PASSED] 0x4693 (ALDERLAKE_S)
[21:01:46] [PASSED] 0x46A0 (ALDERLAKE_P)
[21:01:46] [PASSED] 0x46A1 (ALDERLAKE_P)
[21:01:46] [PASSED] 0x46A2 (ALDERLAKE_P)
[21:01:46] [PASSED] 0x46A3 (ALDERLAKE_P)
[21:01:46] [PASSED] 0x46A6 (ALDERLAKE_P)
[21:01:46] [PASSED] 0x46A8 (ALDERLAKE_P)
[21:01:46] [PASSED] 0x46AA (ALDERLAKE_P)
[21:01:46] [PASSED] 0x462A (ALDERLAKE_P)
[21:01:46] [PASSED] 0x4626 (ALDERLAKE_P)
[21:01:46] [PASSED] 0x4628 (ALDERLAKE_P)
[21:01:46] [PASSED] 0x46B0 (ALDERLAKE_P)
[21:01:46] [PASSED] 0x46B1 (ALDERLAKE_P)
[21:01:46] [PASSED] 0x46B2 (ALDERLAKE_P)
[21:01:46] [PASSED] 0x46B3 (ALDERLAKE_P)
[21:01:46] [PASSED] 0x46C0 (ALDERLAKE_P)
[21:01:46] [PASSED] 0x46C1 (ALDERLAKE_P)
[21:01:46] [PASSED] 0x46C2 (ALDERLAKE_P)
[21:01:46] [PASSED] 0x46C3 (ALDERLAKE_P)
[21:01:46] [PASSED] 0x46D0 (ALDERLAKE_N)
[21:01:46] [PASSED] 0x46D1 (ALDERLAKE_N)
[21:01:46] [PASSED] 0x46D2 (ALDERLAKE_N)
[21:01:46] [PASSED] 0x46D3 (ALDERLAKE_N)
[21:01:46] [PASSED] 0x46D4 (ALDERLAKE_N)
[21:01:46] [PASSED] 0xA721 (ALDERLAKE_P)
[21:01:46] [PASSED] 0xA7A1 (ALDERLAKE_P)
[21:01:46] [PASSED] 0xA7A9 (ALDERLAKE_P)
[21:01:46] [PASSED] 0xA7AC (ALDERLAKE_P)
[21:01:46] [PASSED] 0xA7AD (ALDERLAKE_P)
[21:01:46] [PASSED] 0xA720 (ALDERLAKE_P)
[21:01:46] [PASSED] 0xA7A0 (ALDERLAKE_P)
[21:01:46] [PASSED] 0xA7A8 (ALDERLAKE_P)
[21:01:46] [PASSED] 0xA7AA (ALDERLAKE_P)
[21:01:46] [PASSED] 0xA7AB (ALDERLAKE_P)
[21:01:46] [PASSED] 0xA780 (ALDERLAKE_S)
[21:01:46] [PASSED] 0xA781 (ALDERLAKE_S)
[21:01:46] [PASSED] 0xA782 (ALDERLAKE_S)
[21:01:46] [PASSED] 0xA783 (ALDERLAKE_S)
[21:01:46] [PASSED] 0xA788 (ALDERLAKE_S)
[21:01:46] [PASSED] 0xA789 (ALDERLAKE_S)
[21:01:46] [PASSED] 0xA78A (ALDERLAKE_S)
[21:01:46] [PASSED] 0xA78B (ALDERLAKE_S)
[21:01:46] [PASSED] 0x4905 (DG1)
[21:01:46] [PASSED] 0x4906 (DG1)
[21:01:46] [PASSED] 0x4907 (DG1)
[21:01:46] [PASSED] 0x4908 (DG1)
[21:01:46] [PASSED] 0x4909 (DG1)
[21:01:46] [PASSED] 0x56C0 (DG2)
[21:01:46] [PASSED] 0x56C2 (DG2)
[21:01:46] [PASSED] 0x56C1 (DG2)
[21:01:46] [PASSED] 0x7D51 (METEORLAKE)
[21:01:46] [PASSED] 0x7DD1 (METEORLAKE)
[21:01:46] [PASSED] 0x7D41 (METEORLAKE)
[21:01:46] [PASSED] 0x7D67 (METEORLAKE)
[21:01:46] [PASSED] 0xB640 (METEORLAKE)
[21:01:46] [PASSED] 0x56A0 (DG2)
[21:01:46] [PASSED] 0x56A1 (DG2)
[21:01:46] [PASSED] 0x56A2 (DG2)
[21:01:46] [PASSED] 0x56BE (DG2)
[21:01:46] [PASSED] 0x56BF (DG2)
[21:01:46] [PASSED] 0x5690 (DG2)
stty: 'standard input': Inappropriate ioctl for device
[21:01:46] [PASSED] 0x5691 (DG2)
[21:01:46] [PASSED] 0x5692 (DG2)
[21:01:46] [PASSED] 0x56A5 (DG2)
[21:01:46] [PASSED] 0x56A6 (DG2)
[21:01:46] [PASSED] 0x56B0 (DG2)
[21:01:46] [PASSED] 0x56B1 (DG2)
[21:01:46] [PASSED] 0x56BA (DG2)
[21:01:46] [PASSED] 0x56BB (DG2)
[21:01:46] [PASSED] 0x56BC (DG2)
[21:01:46] [PASSED] 0x56BD (DG2)
[21:01:46] [PASSED] 0x5693 (DG2)
[21:01:46] [PASSED] 0x5694 (DG2)
[21:01:46] [PASSED] 0x5695 (DG2)
[21:01:46] [PASSED] 0x56A3 (DG2)
[21:01:46] [PASSED] 0x56A4 (DG2)
[21:01:46] [PASSED] 0x56B2 (DG2)
[21:01:46] [PASSED] 0x56B3 (DG2)
[21:01:46] [PASSED] 0x5696 (DG2)
[21:01:46] [PASSED] 0x5697 (DG2)
[21:01:46] [PASSED] 0xB69 (PVC)
[21:01:46] [PASSED] 0xB6E (PVC)
[21:01:46] [PASSED] 0xBD4 (PVC)
[21:01:46] [PASSED] 0xBD5 (PVC)
[21:01:46] [PASSED] 0xBD6 (PVC)
[21:01:46] [PASSED] 0xBD7 (PVC)
[21:01:46] [PASSED] 0xBD8 (PVC)
[21:01:46] [PASSED] 0xBD9 (PVC)
[21:01:46] [PASSED] 0xBDA (PVC)
[21:01:46] [PASSED] 0xBDB (PVC)
[21:01:46] [PASSED] 0xBE0 (PVC)
[21:01:46] [PASSED] 0xBE1 (PVC)
[21:01:46] [PASSED] 0xBE5 (PVC)
[21:01:46] [PASSED] 0x7D40 (METEORLAKE)
[21:01:46] [PASSED] 0x7D45 (METEORLAKE)
[21:01:46] [PASSED] 0x7D55 (METEORLAKE)
[21:01:46] [PASSED] 0x7D60 (METEORLAKE)
[21:01:46] [PASSED] 0x7DD5 (METEORLAKE)
[21:01:46] [PASSED] 0x6420 (LUNARLAKE)
[21:01:46] [PASSED] 0x64A0 (LUNARLAKE)
[21:01:46] [PASSED] 0x64B0 (LUNARLAKE)
[21:01:46] [PASSED] 0xE202 (BATTLEMAGE)
[21:01:46] [PASSED] 0xE209 (BATTLEMAGE)
[21:01:46] [PASSED] 0xE20B (BATTLEMAGE)
[21:01:46] [PASSED] 0xE20C (BATTLEMAGE)
[21:01:46] [PASSED] 0xE20D (BATTLEMAGE)
[21:01:46] [PASSED] 0xE210 (BATTLEMAGE)
[21:01:46] [PASSED] 0xE211 (BATTLEMAGE)
[21:01:46] [PASSED] 0xE212 (BATTLEMAGE)
[21:01:46] [PASSED] 0xE216 (BATTLEMAGE)
[21:01:46] [PASSED] 0xE220 (BATTLEMAGE)
[21:01:46] [PASSED] 0xE221 (BATTLEMAGE)
[21:01:46] [PASSED] 0xE222 (BATTLEMAGE)
[21:01:46] [PASSED] 0xE223 (BATTLEMAGE)
[21:01:46] [PASSED] 0xB080 (PANTHERLAKE)
[21:01:46] [PASSED] 0xB081 (PANTHERLAKE)
[21:01:46] [PASSED] 0xB082 (PANTHERLAKE)
[21:01:46] [PASSED] 0xB083 (PANTHERLAKE)
[21:01:46] [PASSED] 0xB084 (PANTHERLAKE)
[21:01:46] [PASSED] 0xB085 (PANTHERLAKE)
[21:01:46] [PASSED] 0xB086 (PANTHERLAKE)
[21:01:46] [PASSED] 0xB087 (PANTHERLAKE)
[21:01:46] [PASSED] 0xB08F (PANTHERLAKE)
[21:01:46] [PASSED] 0xB090 (PANTHERLAKE)
[21:01:46] [PASSED] 0xB0A0 (PANTHERLAKE)
[21:01:46] [PASSED] 0xB0B0 (PANTHERLAKE)
[21:01:46] [PASSED] 0xD740 (NOVALAKE_S)
[21:01:46] [PASSED] 0xD741 (NOVALAKE_S)
[21:01:46] [PASSED] 0xD742 (NOVALAKE_S)
[21:01:46] [PASSED] 0xD743 (NOVALAKE_S)
[21:01:46] [PASSED] 0xD744 (NOVALAKE_S)
[21:01:46] [PASSED] 0xD745 (NOVALAKE_S)
[21:01:46] [PASSED] 0x674C (CRESCENTISLAND)
[21:01:46] [PASSED] 0xFD80 (PANTHERLAKE)
[21:01:46] [PASSED] 0xFD81 (PANTHERLAKE)
[21:01:46] =============== [PASSED] check_platform_desc ===============
[21:01:46] ===================== [PASSED] xe_pci ======================
[21:01:46] =================== xe_rtp (2 subtests) ====================
[21:01:46] =============== xe_rtp_process_to_sr_tests  ================
[21:01:46] [PASSED] coalesce-same-reg
[21:01:46] [PASSED] no-match-no-add
[21:01:46] [PASSED] match-or
[21:01:46] [PASSED] match-or-xfail
[21:01:46] [PASSED] no-match-no-add-multiple-rules
[21:01:46] [PASSED] two-regs-two-entries
[21:01:46] [PASSED] clr-one-set-other
[21:01:46] [PASSED] set-field
[21:01:46] [PASSED] conflict-duplicate
[21:01:46] [PASSED] conflict-not-disjoint
[21:01:46] [PASSED] conflict-reg-type
[21:01:46] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[21:01:46] ================== xe_rtp_process_tests  ===================
[21:01:46] [PASSED] active1
[21:01:46] [PASSED] active2
[21:01:46] [PASSED] active-inactive
[21:01:46] [PASSED] inactive-active
[21:01:46] [PASSED] inactive-1st_or_active-inactive
[21:01:46] [PASSED] inactive-2nd_or_active-inactive
[21:01:46] [PASSED] inactive-last_or_active-inactive
[21:01:46] [PASSED] inactive-no_or_active-inactive
[21:01:46] ============== [PASSED] xe_rtp_process_tests ===============
[21:01:46] ===================== [PASSED] xe_rtp ======================
[21:01:46] ==================== xe_wa (1 subtest) =====================
[21:01:46] ======================== xe_wa_gt  =========================
[21:01:46] [PASSED] TIGERLAKE B0
[21:01:46] [PASSED] DG1 A0
[21:01:46] [PASSED] DG1 B0
[21:01:46] [PASSED] ALDERLAKE_S A0
[21:01:46] [PASSED] ALDERLAKE_S B0
[21:01:46] [PASSED] ALDERLAKE_S C0
[21:01:46] [PASSED] ALDERLAKE_S D0
[21:01:46] [PASSED] ALDERLAKE_P A0
[21:01:46] [PASSED] ALDERLAKE_P B0
[21:01:46] [PASSED] ALDERLAKE_P C0
[21:01:46] [PASSED] ALDERLAKE_S RPLS D0
[21:01:46] [PASSED] ALDERLAKE_P RPLU E0
[21:01:46] [PASSED] DG2 G10 C0
[21:01:46] [PASSED] DG2 G11 B1
[21:01:46] [PASSED] DG2 G12 A1
[21:01:46] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[21:01:46] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[21:01:46] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[21:01:46] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[21:01:46] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[21:01:46] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[21:01:46] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[21:01:46] ==================== [PASSED] xe_wa_gt =====================
[21:01:46] ====================== [PASSED] xe_wa ======================
[21:01:46] ============================================================
[21:01:46] Testing complete. Ran 446 tests: passed: 428, skipped: 18
[21:01:46] Elapsed time: 35.267s total, 4.180s configuring, 30.621s building, 0.430s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[21:01:46] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:01:48] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[21:02:12] Starting KUnit Kernel (1/1)...
[21:02:12] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:02:13] ============ drm_test_pick_cmdline (2 subtests) ============
[21:02:13] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[21:02:13] =============== drm_test_pick_cmdline_named  ===============
[21:02:13] [PASSED] NTSC
[21:02:13] [PASSED] NTSC-J
[21:02:13] [PASSED] PAL
[21:02:13] [PASSED] PAL-M
[21:02:13] =========== [PASSED] drm_test_pick_cmdline_named ===========
[21:02:13] ============== [PASSED] drm_test_pick_cmdline ==============
[21:02:13] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[21:02:13] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[21:02:13] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[21:02:13] =========== drm_validate_clone_mode (2 subtests) ===========
[21:02:13] ============== drm_test_check_in_clone_mode  ===============
[21:02:13] [PASSED] in_clone_mode
[21:02:13] [PASSED] not_in_clone_mode
[21:02:13] ========== [PASSED] drm_test_check_in_clone_mode ===========
[21:02:13] =============== drm_test_check_valid_clones  ===============
[21:02:13] [PASSED] not_in_clone_mode
[21:02:13] [PASSED] valid_clone
[21:02:13] [PASSED] invalid_clone
[21:02:13] =========== [PASSED] drm_test_check_valid_clones ===========
[21:02:13] ============= [PASSED] drm_validate_clone_mode =============
[21:02:13] ============= drm_validate_modeset (1 subtest) =============
[21:02:13] [PASSED] drm_test_check_connector_changed_modeset
[21:02:13] ============== [PASSED] drm_validate_modeset ===============
[21:02:13] ====== drm_test_bridge_get_current_state (2 subtests) ======
[21:02:13] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[21:02:13] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[21:02:13] ======== [PASSED] drm_test_bridge_get_current_state ========
[21:02:13] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[21:02:13] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[21:02:13] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[21:02:13] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[21:02:13] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[21:02:13] ============== drm_bridge_alloc (2 subtests) ===============
[21:02:13] [PASSED] drm_test_drm_bridge_alloc_basic
[21:02:13] [PASSED] drm_test_drm_bridge_alloc_get_put
[21:02:13] ================ [PASSED] drm_bridge_alloc =================
[21:02:13] ================== drm_buddy (8 subtests) ==================
[21:02:13] [PASSED] drm_test_buddy_alloc_limit
[21:02:13] [PASSED] drm_test_buddy_alloc_optimistic
[21:02:13] [PASSED] drm_test_buddy_alloc_pessimistic
[21:02:13] [PASSED] drm_test_buddy_alloc_pathological
[21:02:13] [PASSED] drm_test_buddy_alloc_contiguous
[21:02:13] [PASSED] drm_test_buddy_alloc_clear
[21:02:13] [PASSED] drm_test_buddy_alloc_range_bias
[21:02:13] [PASSED] drm_test_buddy_fragmentation_performance
[21:02:13] ==================== [PASSED] drm_buddy ====================
[21:02:13] ============= drm_cmdline_parser (40 subtests) =============
[21:02:13] [PASSED] drm_test_cmdline_force_d_only
[21:02:13] [PASSED] drm_test_cmdline_force_D_only_dvi
[21:02:13] [PASSED] drm_test_cmdline_force_D_only_hdmi
[21:02:13] [PASSED] drm_test_cmdline_force_D_only_not_digital
[21:02:13] [PASSED] drm_test_cmdline_force_e_only
[21:02:13] [PASSED] drm_test_cmdline_res
[21:02:13] [PASSED] drm_test_cmdline_res_vesa
[21:02:13] [PASSED] drm_test_cmdline_res_vesa_rblank
[21:02:13] [PASSED] drm_test_cmdline_res_rblank
[21:02:13] [PASSED] drm_test_cmdline_res_bpp
[21:02:13] [PASSED] drm_test_cmdline_res_refresh
[21:02:13] [PASSED] drm_test_cmdline_res_bpp_refresh
[21:02:13] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[21:02:13] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[21:02:13] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[21:02:13] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[21:02:13] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[21:02:13] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[21:02:13] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[21:02:13] [PASSED] drm_test_cmdline_res_margins_force_on
[21:02:13] [PASSED] drm_test_cmdline_res_vesa_margins
[21:02:13] [PASSED] drm_test_cmdline_name
[21:02:13] [PASSED] drm_test_cmdline_name_bpp
[21:02:13] [PASSED] drm_test_cmdline_name_option
[21:02:13] [PASSED] drm_test_cmdline_name_bpp_option
[21:02:13] [PASSED] drm_test_cmdline_rotate_0
[21:02:13] [PASSED] drm_test_cmdline_rotate_90
[21:02:13] [PASSED] drm_test_cmdline_rotate_180
[21:02:13] [PASSED] drm_test_cmdline_rotate_270
[21:02:13] [PASSED] drm_test_cmdline_hmirror
[21:02:13] [PASSED] drm_test_cmdline_vmirror
[21:02:13] [PASSED] drm_test_cmdline_margin_options
[21:02:13] [PASSED] drm_test_cmdline_multiple_options
[21:02:13] [PASSED] drm_test_cmdline_bpp_extra_and_option
[21:02:13] [PASSED] drm_test_cmdline_extra_and_option
[21:02:13] [PASSED] drm_test_cmdline_freestanding_options
[21:02:13] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[21:02:13] [PASSED] drm_test_cmdline_panel_orientation
[21:02:13] ================ drm_test_cmdline_invalid  =================
[21:02:13] [PASSED] margin_only
[21:02:13] [PASSED] interlace_only
[21:02:13] [PASSED] res_missing_x
[21:02:13] [PASSED] res_missing_y
[21:02:13] [PASSED] res_bad_y
[21:02:13] [PASSED] res_missing_y_bpp
[21:02:13] [PASSED] res_bad_bpp
[21:02:13] [PASSED] res_bad_refresh
[21:02:13] [PASSED] res_bpp_refresh_force_on_off
[21:02:13] [PASSED] res_invalid_mode
[21:02:13] [PASSED] res_bpp_wrong_place_mode
[21:02:13] [PASSED] name_bpp_refresh
[21:02:13] [PASSED] name_refresh
[21:02:13] [PASSED] name_refresh_wrong_mode
[21:02:13] [PASSED] name_refresh_invalid_mode
[21:02:13] [PASSED] rotate_multiple
[21:02:13] [PASSED] rotate_invalid_val
[21:02:13] [PASSED] rotate_truncated
[21:02:13] [PASSED] invalid_option
[21:02:13] [PASSED] invalid_tv_option
[21:02:13] [PASSED] truncated_tv_option
[21:02:13] ============ [PASSED] drm_test_cmdline_invalid =============
[21:02:13] =============== drm_test_cmdline_tv_options  ===============
[21:02:13] [PASSED] NTSC
[21:02:13] [PASSED] NTSC_443
[21:02:13] [PASSED] NTSC_J
[21:02:13] [PASSED] PAL
[21:02:13] [PASSED] PAL_M
[21:02:13] [PASSED] PAL_N
[21:02:13] [PASSED] SECAM
[21:02:13] [PASSED] MONO_525
[21:02:13] [PASSED] MONO_625
[21:02:13] =========== [PASSED] drm_test_cmdline_tv_options ===========
[21:02:13] =============== [PASSED] drm_cmdline_parser ================
[21:02:13] ========== drmm_connector_hdmi_init (20 subtests) ==========
[21:02:13] [PASSED] drm_test_connector_hdmi_init_valid
[21:02:13] [PASSED] drm_test_connector_hdmi_init_bpc_8
[21:02:13] [PASSED] drm_test_connector_hdmi_init_bpc_10
[21:02:13] [PASSED] drm_test_connector_hdmi_init_bpc_12
[21:02:13] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[21:02:13] [PASSED] drm_test_connector_hdmi_init_bpc_null
[21:02:13] [PASSED] drm_test_connector_hdmi_init_formats_empty
[21:02:13] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[21:02:13] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[21:02:13] [PASSED] supported_formats=0x9 yuv420_allowed=1
[21:02:13] [PASSED] supported_formats=0x9 yuv420_allowed=0
[21:02:13] [PASSED] supported_formats=0x3 yuv420_allowed=1
[21:02:13] [PASSED] supported_formats=0x3 yuv420_allowed=0
[21:02:13] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[21:02:13] [PASSED] drm_test_connector_hdmi_init_null_ddc
[21:02:13] [PASSED] drm_test_connector_hdmi_init_null_product
[21:02:13] [PASSED] drm_test_connector_hdmi_init_null_vendor
[21:02:13] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[21:02:13] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[21:02:13] [PASSED] drm_test_connector_hdmi_init_product_valid
[21:02:13] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[21:02:13] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[21:02:13] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[21:02:13] ========= drm_test_connector_hdmi_init_type_valid  =========
[21:02:13] [PASSED] HDMI-A
[21:02:13] [PASSED] HDMI-B
[21:02:13] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[21:02:13] ======== drm_test_connector_hdmi_init_type_invalid  ========
[21:02:13] [PASSED] Unknown
[21:02:13] [PASSED] VGA
[21:02:13] [PASSED] DVI-I
[21:02:13] [PASSED] DVI-D
[21:02:13] [PASSED] DVI-A
[21:02:13] [PASSED] Composite
[21:02:13] [PASSED] SVIDEO
[21:02:13] [PASSED] LVDS
[21:02:13] [PASSED] Component
[21:02:13] [PASSED] DIN
[21:02:13] [PASSED] DP
[21:02:13] [PASSED] TV
[21:02:13] [PASSED] eDP
[21:02:13] [PASSED] Virtual
[21:02:13] [PASSED] DSI
[21:02:13] [PASSED] DPI
[21:02:13] [PASSED] Writeback
[21:02:13] [PASSED] SPI
[21:02:13] [PASSED] USB
[21:02:13] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[21:02:13] ============ [PASSED] drmm_connector_hdmi_init =============
[21:02:13] ============= drmm_connector_init (3 subtests) =============
[21:02:13] [PASSED] drm_test_drmm_connector_init
[21:02:13] [PASSED] drm_test_drmm_connector_init_null_ddc
[21:02:13] ========= drm_test_drmm_connector_init_type_valid  =========
[21:02:13] [PASSED] Unknown
[21:02:13] [PASSED] VGA
[21:02:13] [PASSED] DVI-I
[21:02:13] [PASSED] DVI-D
[21:02:13] [PASSED] DVI-A
[21:02:13] [PASSED] Composite
[21:02:13] [PASSED] SVIDEO
[21:02:13] [PASSED] LVDS
[21:02:13] [PASSED] Component
[21:02:13] [PASSED] DIN
[21:02:13] [PASSED] DP
[21:02:13] [PASSED] HDMI-A
[21:02:13] [PASSED] HDMI-B
[21:02:13] [PASSED] TV
[21:02:13] [PASSED] eDP
[21:02:13] [PASSED] Virtual
[21:02:13] [PASSED] DSI
[21:02:13] [PASSED] DPI
[21:02:13] [PASSED] Writeback
[21:02:13] [PASSED] SPI
[21:02:13] [PASSED] USB
[21:02:13] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[21:02:13] =============== [PASSED] drmm_connector_init ===============
[21:02:13] ========= drm_connector_dynamic_init (6 subtests) ==========
[21:02:13] [PASSED] drm_test_drm_connector_dynamic_init
[21:02:13] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[21:02:13] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[21:02:13] [PASSED] drm_test_drm_connector_dynamic_init_properties
[21:02:13] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[21:02:13] [PASSED] Unknown
[21:02:13] [PASSED] VGA
[21:02:13] [PASSED] DVI-I
[21:02:13] [PASSED] DVI-D
[21:02:13] [PASSED] DVI-A
[21:02:13] [PASSED] Composite
[21:02:13] [PASSED] SVIDEO
[21:02:13] [PASSED] LVDS
[21:02:13] [PASSED] Component
[21:02:13] [PASSED] DIN
[21:02:13] [PASSED] DP
[21:02:13] [PASSED] HDMI-A
[21:02:13] [PASSED] HDMI-B
[21:02:13] [PASSED] TV
[21:02:13] [PASSED] eDP
[21:02:13] [PASSED] Virtual
[21:02:13] [PASSED] DSI
[21:02:13] [PASSED] DPI
[21:02:13] [PASSED] Writeback
[21:02:13] [PASSED] SPI
[21:02:13] [PASSED] USB
[21:02:13] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[21:02:13] ======== drm_test_drm_connector_dynamic_init_name  =========
[21:02:13] [PASSED] Unknown
[21:02:13] [PASSED] VGA
[21:02:13] [PASSED] DVI-I
[21:02:13] [PASSED] DVI-D
[21:02:13] [PASSED] DVI-A
[21:02:13] [PASSED] Composite
[21:02:13] [PASSED] SVIDEO
[21:02:13] [PASSED] LVDS
[21:02:13] [PASSED] Component
[21:02:13] [PASSED] DIN
[21:02:13] [PASSED] DP
[21:02:13] [PASSED] HDMI-A
[21:02:13] [PASSED] HDMI-B
[21:02:13] [PASSED] TV
[21:02:13] [PASSED] eDP
[21:02:13] [PASSED] Virtual
[21:02:13] [PASSED] DSI
[21:02:13] [PASSED] DPI
[21:02:13] [PASSED] Writeback
[21:02:13] [PASSED] SPI
[21:02:13] [PASSED] USB
[21:02:13] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[21:02:13] =========== [PASSED] drm_connector_dynamic_init ============
[21:02:13] ==== drm_connector_dynamic_register_early (4 subtests) =====
[21:02:13] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[21:02:13] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[21:02:13] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[21:02:13] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[21:02:13] ====== [PASSED] drm_connector_dynamic_register_early =======
[21:02:13] ======= drm_connector_dynamic_register (7 subtests) ========
[21:02:13] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[21:02:13] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[21:02:13] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[21:02:13] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[21:02:13] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[21:02:13] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[21:02:13] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[21:02:13] ========= [PASSED] drm_connector_dynamic_register ==========
[21:02:13] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[21:02:13] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[21:02:13] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[21:02:13] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[21:02:13] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[21:02:13] ========== drm_test_get_tv_mode_from_name_valid  ===========
[21:02:13] [PASSED] NTSC
[21:02:13] [PASSED] NTSC-443
[21:02:13] [PASSED] NTSC-J
[21:02:13] [PASSED] PAL
[21:02:13] [PASSED] PAL-M
[21:02:13] [PASSED] PAL-N
[21:02:13] [PASSED] SECAM
[21:02:13] [PASSED] Mono
[21:02:13] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[21:02:13] [PASSED] drm_test_get_tv_mode_from_name_truncated
[21:02:13] ============ [PASSED] drm_get_tv_mode_from_name ============
[21:02:13] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[21:02:13] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[21:02:13] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[21:02:13] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[21:02:13] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[21:02:13] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[21:02:13] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[21:02:13] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[21:02:13] [PASSED] VIC 96
[21:02:13] [PASSED] VIC 97
[21:02:13] [PASSED] VIC 101
[21:02:13] [PASSED] VIC 102
[21:02:13] [PASSED] VIC 106
[21:02:13] [PASSED] VIC 107
[21:02:13] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[21:02:13] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[21:02:13] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[21:02:13] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[21:02:13] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[21:02:13] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[21:02:13] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[21:02:13] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[21:02:13] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[21:02:13] [PASSED] Automatic
[21:02:13] [PASSED] Full
[21:02:13] [PASSED] Limited 16:235
[21:02:13] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[21:02:13] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[21:02:13] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[21:02:13] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[21:02:13] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[21:02:13] [PASSED] RGB
[21:02:13] [PASSED] YUV 4:2:0
[21:02:13] [PASSED] YUV 4:2:2
[21:02:13] [PASSED] YUV 4:4:4
[21:02:13] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[21:02:13] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[21:02:13] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[21:02:13] ============= drm_damage_helper (21 subtests) ==============
[21:02:13] [PASSED] drm_test_damage_iter_no_damage
[21:02:13] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[21:02:13] [PASSED] drm_test_damage_iter_no_damage_src_moved
[21:02:13] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[21:02:13] [PASSED] drm_test_damage_iter_no_damage_not_visible
[21:02:13] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[21:02:13] [PASSED] drm_test_damage_iter_no_damage_no_fb
[21:02:13] [PASSED] drm_test_damage_iter_simple_damage
[21:02:13] [PASSED] drm_test_damage_iter_single_damage
[21:02:13] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[21:02:13] [PASSED] drm_test_damage_iter_single_damage_outside_src
[21:02:13] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[21:02:13] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[21:02:13] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[21:02:13] [PASSED] drm_test_damage_iter_single_damage_src_moved
[21:02:13] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[21:02:13] [PASSED] drm_test_damage_iter_damage
[21:02:13] [PASSED] drm_test_damage_iter_damage_one_intersect
[21:02:13] [PASSED] drm_test_damage_iter_damage_one_outside
[21:02:13] [PASSED] drm_test_damage_iter_damage_src_moved
[21:02:13] [PASSED] drm_test_damage_iter_damage_not_visible
[21:02:13] ================ [PASSED] drm_damage_helper ================
[21:02:13] ============== drm_dp_mst_helper (3 subtests) ==============
[21:02:13] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[21:02:13] [PASSED] Clock 154000 BPP 30 DSC disabled
[21:02:13] [PASSED] Clock 234000 BPP 30 DSC disabled
[21:02:13] [PASSED] Clock 297000 BPP 24 DSC disabled
[21:02:13] [PASSED] Clock 332880 BPP 24 DSC enabled
[21:02:13] [PASSED] Clock 324540 BPP 24 DSC enabled
[21:02:13] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[21:02:13] ============== drm_test_dp_mst_calc_pbn_div  ===============
[21:02:13] [PASSED] Link rate 2000000 lane count 4
[21:02:13] [PASSED] Link rate 2000000 lane count 2
[21:02:13] [PASSED] Link rate 2000000 lane count 1
[21:02:13] [PASSED] Link rate 1350000 lane count 4
[21:02:13] [PASSED] Link rate 1350000 lane count 2
[21:02:13] [PASSED] Link rate 1350000 lane count 1
[21:02:13] [PASSED] Link rate 1000000 lane count 4
[21:02:13] [PASSED] Link rate 1000000 lane count 2
[21:02:13] [PASSED] Link rate 1000000 lane count 1
[21:02:13] [PASSED] Link rate 810000 lane count 4
[21:02:13] [PASSED] Link rate 810000 lane count 2
[21:02:13] [PASSED] Link rate 810000 lane count 1
[21:02:13] [PASSED] Link rate 540000 lane count 4
[21:02:13] [PASSED] Link rate 540000 lane count 2
[21:02:13] [PASSED] Link rate 540000 lane count 1
[21:02:13] [PASSED] Link rate 270000 lane count 4
[21:02:13] [PASSED] Link rate 270000 lane count 2
[21:02:13] [PASSED] Link rate 270000 lane count 1
[21:02:13] [PASSED] Link rate 162000 lane count 4
[21:02:13] [PASSED] Link rate 162000 lane count 2
[21:02:13] [PASSED] Link rate 162000 lane count 1
[21:02:13] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[21:02:13] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[21:02:13] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[21:02:13] [PASSED] DP_POWER_UP_PHY with port number
[21:02:13] [PASSED] DP_POWER_DOWN_PHY with port number
[21:02:13] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[21:02:13] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[21:02:13] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[21:02:13] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[21:02:13] [PASSED] DP_QUERY_PAYLOAD with port number
[21:02:13] [PASSED] DP_QUERY_PAYLOAD with VCPI
[21:02:13] [PASSED] DP_REMOTE_DPCD_READ with port number
[21:02:13] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[21:02:13] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[21:02:13] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[21:02:13] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[21:02:13] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[21:02:13] [PASSED] DP_REMOTE_I2C_READ with port number
[21:02:13] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[21:02:13] [PASSED] DP_REMOTE_I2C_READ with transactions array
[21:02:13] [PASSED] DP_REMOTE_I2C_WRITE with port number
[21:02:13] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[21:02:13] [PASSED] DP_REMOTE_I2C_WRITE with data array
[21:02:13] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[21:02:13] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[21:02:13] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[21:02:13] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[21:02:13] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[21:02:13] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[21:02:13] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[21:02:13] ================ [PASSED] drm_dp_mst_helper ================
[21:02:13] ================== drm_exec (7 subtests) ===================
[21:02:13] [PASSED] sanitycheck
[21:02:13] [PASSED] test_lock
[21:02:13] [PASSED] test_lock_unlock
[21:02:13] [PASSED] test_duplicates
[21:02:13] [PASSED] test_prepare
[21:02:13] [PASSED] test_prepare_array
[21:02:13] [PASSED] test_multiple_loops
[21:02:13] ==================== [PASSED] drm_exec =====================
[21:02:13] =========== drm_format_helper_test (17 subtests) ===========
[21:02:13] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[21:02:13] [PASSED] single_pixel_source_buffer
[21:02:13] [PASSED] single_pixel_clip_rectangle
[21:02:13] [PASSED] well_known_colors
[21:02:13] [PASSED] destination_pitch
[21:02:13] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[21:02:13] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[21:02:13] [PASSED] single_pixel_source_buffer
[21:02:13] [PASSED] single_pixel_clip_rectangle
[21:02:13] [PASSED] well_known_colors
[21:02:13] [PASSED] destination_pitch
[21:02:13] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[21:02:13] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[21:02:13] [PASSED] single_pixel_source_buffer
[21:02:13] [PASSED] single_pixel_clip_rectangle
[21:02:13] [PASSED] well_known_colors
[21:02:13] [PASSED] destination_pitch
[21:02:13] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[21:02:13] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[21:02:13] [PASSED] single_pixel_source_buffer
[21:02:13] [PASSED] single_pixel_clip_rectangle
[21:02:13] [PASSED] well_known_colors
[21:02:13] [PASSED] destination_pitch
[21:02:13] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[21:02:13] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[21:02:13] [PASSED] single_pixel_source_buffer
[21:02:13] [PASSED] single_pixel_clip_rectangle
[21:02:13] [PASSED] well_known_colors
[21:02:13] [PASSED] destination_pitch
[21:02:13] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[21:02:13] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[21:02:13] [PASSED] single_pixel_source_buffer
[21:02:13] [PASSED] single_pixel_clip_rectangle
[21:02:13] [PASSED] well_known_colors
[21:02:13] [PASSED] destination_pitch
[21:02:13] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[21:02:13] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[21:02:13] [PASSED] single_pixel_source_buffer
[21:02:13] [PASSED] single_pixel_clip_rectangle
[21:02:13] [PASSED] well_known_colors
[21:02:13] [PASSED] destination_pitch
[21:02:13] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[21:02:13] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[21:02:13] [PASSED] single_pixel_source_buffer
[21:02:13] [PASSED] single_pixel_clip_rectangle
[21:02:13] [PASSED] well_known_colors
[21:02:13] [PASSED] destination_pitch
[21:02:13] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[21:02:13] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[21:02:13] [PASSED] single_pixel_source_buffer
[21:02:13] [PASSED] single_pixel_clip_rectangle
[21:02:13] [PASSED] well_known_colors
[21:02:13] [PASSED] destination_pitch
[21:02:13] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[21:02:13] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[21:02:13] [PASSED] single_pixel_source_buffer
[21:02:13] [PASSED] single_pixel_clip_rectangle
[21:02:13] [PASSED] well_known_colors
[21:02:13] [PASSED] destination_pitch
[21:02:13] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[21:02:13] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[21:02:13] [PASSED] single_pixel_source_buffer
[21:02:13] [PASSED] single_pixel_clip_rectangle
[21:02:13] [PASSED] well_known_colors
[21:02:13] [PASSED] destination_pitch
[21:02:13] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[21:02:13] ============== drm_test_fb_xrgb8888_to_mono  ===============
[21:02:13] [PASSED] single_pixel_source_buffer
[21:02:13] [PASSED] single_pixel_clip_rectangle
[21:02:13] [PASSED] well_known_colors
[21:02:13] [PASSED] destination_pitch
[21:02:13] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[21:02:13] ==================== drm_test_fb_swab  =====================
[21:02:13] [PASSED] single_pixel_source_buffer
[21:02:13] [PASSED] single_pixel_clip_rectangle
[21:02:13] [PASSED] well_known_colors
[21:02:13] [PASSED] destination_pitch
[21:02:13] ================ [PASSED] drm_test_fb_swab =================
[21:02:13] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[21:02:13] [PASSED] single_pixel_source_buffer
[21:02:13] [PASSED] single_pixel_clip_rectangle
[21:02:13] [PASSED] well_known_colors
[21:02:13] [PASSED] destination_pitch
[21:02:13] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[21:02:13] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[21:02:13] [PASSED] single_pixel_source_buffer
[21:02:13] [PASSED] single_pixel_clip_rectangle
[21:02:13] [PASSED] well_known_colors
[21:02:13] [PASSED] destination_pitch
[21:02:13] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[21:02:13] ================= drm_test_fb_clip_offset  =================
[21:02:13] [PASSED] pass through
[21:02:13] [PASSED] horizontal offset
[21:02:13] [PASSED] vertical offset
[21:02:13] [PASSED] horizontal and vertical offset
[21:02:13] [PASSED] horizontal offset (custom pitch)
[21:02:13] [PASSED] vertical offset (custom pitch)
[21:02:13] [PASSED] horizontal and vertical offset (custom pitch)
[21:02:13] ============= [PASSED] drm_test_fb_clip_offset =============
[21:02:13] =================== drm_test_fb_memcpy  ====================
[21:02:13] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[21:02:13] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[21:02:13] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[21:02:13] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[21:02:13] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[21:02:13] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[21:02:13] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[21:02:13] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[21:02:13] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[21:02:13] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[21:02:13] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[21:02:13] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[21:02:13] =============== [PASSED] drm_test_fb_memcpy ================
[21:02:13] ============= [PASSED] drm_format_helper_test ==============
[21:02:13] ================= drm_format (18 subtests) =================
[21:02:13] [PASSED] drm_test_format_block_width_invalid
[21:02:13] [PASSED] drm_test_format_block_width_one_plane
[21:02:13] [PASSED] drm_test_format_block_width_two_plane
[21:02:13] [PASSED] drm_test_format_block_width_three_plane
[21:02:13] [PASSED] drm_test_format_block_width_tiled
[21:02:13] [PASSED] drm_test_format_block_height_invalid
[21:02:13] [PASSED] drm_test_format_block_height_one_plane
[21:02:13] [PASSED] drm_test_format_block_height_two_plane
[21:02:13] [PASSED] drm_test_format_block_height_three_plane
[21:02:13] [PASSED] drm_test_format_block_height_tiled
[21:02:13] [PASSED] drm_test_format_min_pitch_invalid
[21:02:13] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[21:02:13] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[21:02:13] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[21:02:13] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[21:02:13] [PASSED] drm_test_format_min_pitch_two_plane
[21:02:13] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[21:02:13] [PASSED] drm_test_format_min_pitch_tiled
[21:02:13] =================== [PASSED] drm_format ====================
[21:02:13] ============== drm_framebuffer (10 subtests) ===============
[21:02:13] ========== drm_test_framebuffer_check_src_coords  ==========
[21:02:13] [PASSED] Success: source fits into fb
[21:02:13] [PASSED] Fail: overflowing fb with x-axis coordinate
[21:02:13] [PASSED] Fail: overflowing fb with y-axis coordinate
[21:02:13] [PASSED] Fail: overflowing fb with source width
[21:02:13] [PASSED] Fail: overflowing fb with source height
[21:02:13] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[21:02:13] [PASSED] drm_test_framebuffer_cleanup
[21:02:13] =============== drm_test_framebuffer_create  ===============
[21:02:13] [PASSED] ABGR8888 normal sizes
[21:02:13] [PASSED] ABGR8888 max sizes
[21:02:13] [PASSED] ABGR8888 pitch greater than min required
[21:02:13] [PASSED] ABGR8888 pitch less than min required
[21:02:13] [PASSED] ABGR8888 Invalid width
[21:02:13] [PASSED] ABGR8888 Invalid buffer handle
[21:02:13] [PASSED] No pixel format
[21:02:13] [PASSED] ABGR8888 Width 0
[21:02:13] [PASSED] ABGR8888 Height 0
[21:02:13] [PASSED] ABGR8888 Out of bound height * pitch combination
[21:02:13] [PASSED] ABGR8888 Large buffer offset
[21:02:13] [PASSED] ABGR8888 Buffer offset for inexistent plane
[21:02:13] [PASSED] ABGR8888 Invalid flag
[21:02:13] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[21:02:13] [PASSED] ABGR8888 Valid buffer modifier
[21:02:13] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[21:02:13] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[21:02:13] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[21:02:13] [PASSED] NV12 Normal sizes
[21:02:13] [PASSED] NV12 Max sizes
[21:02:13] [PASSED] NV12 Invalid pitch
[21:02:13] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[21:02:13] [PASSED] NV12 different  modifier per-plane
[21:02:13] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[21:02:13] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[21:02:13] [PASSED] NV12 Modifier for inexistent plane
[21:02:13] [PASSED] NV12 Handle for inexistent plane
[21:02:13] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[21:02:13] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[21:02:13] [PASSED] YVU420 Normal sizes
[21:02:13] [PASSED] YVU420 Max sizes
[21:02:13] [PASSED] YVU420 Invalid pitch
[21:02:13] [PASSED] YVU420 Different pitches
[21:02:13] [PASSED] YVU420 Different buffer offsets/pitches
[21:02:13] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[21:02:13] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[21:02:13] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[21:02:13] [PASSED] YVU420 Valid modifier
[21:02:13] [PASSED] YVU420 Different modifiers per plane
[21:02:13] [PASSED] YVU420 Modifier for inexistent plane
[21:02:13] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[21:02:13] [PASSED] X0L2 Normal sizes
[21:02:13] [PASSED] X0L2 Max sizes
[21:02:13] [PASSED] X0L2 Invalid pitch
[21:02:13] [PASSED] X0L2 Pitch greater than minimum required
[21:02:13] [PASSED] X0L2 Handle for inexistent plane
[21:02:13] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[21:02:13] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[21:02:13] [PASSED] X0L2 Valid modifier
[21:02:13] [PASSED] X0L2 Modifier for inexistent plane
[21:02:13] =========== [PASSED] drm_test_framebuffer_create ===========
[21:02:13] [PASSED] drm_test_framebuffer_free
[21:02:13] [PASSED] drm_test_framebuffer_init
[21:02:13] [PASSED] drm_test_framebuffer_init_bad_format
[21:02:13] [PASSED] drm_test_framebuffer_init_dev_mismatch
[21:02:13] [PASSED] drm_test_framebuffer_lookup
[21:02:13] [PASSED] drm_test_framebuffer_lookup_inexistent
[21:02:13] [PASSED] drm_test_framebuffer_modifiers_not_supported
[21:02:13] ================= [PASSED] drm_framebuffer =================
[21:02:13] ================ drm_gem_shmem (8 subtests) ================
[21:02:13] [PASSED] drm_gem_shmem_test_obj_create
[21:02:13] [PASSED] drm_gem_shmem_test_obj_create_private
[21:02:13] [PASSED] drm_gem_shmem_test_pin_pages
[21:02:13] [PASSED] drm_gem_shmem_test_vmap
[21:02:13] [PASSED] drm_gem_shmem_test_get_pages_sgt
[21:02:13] [PASSED] drm_gem_shmem_test_get_sg_table
[21:02:13] [PASSED] drm_gem_shmem_test_madvise
[21:02:13] [PASSED] drm_gem_shmem_test_purge
[21:02:13] ================== [PASSED] drm_gem_shmem ==================
[21:02:13] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[21:02:13] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[21:02:13] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[21:02:13] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[21:02:13] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[21:02:13] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[21:02:13] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[21:02:13] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[21:02:13] [PASSED] Automatic
[21:02:13] [PASSED] Full
[21:02:13] [PASSED] Limited 16:235
[21:02:13] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[21:02:13] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[21:02:13] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[21:02:13] [PASSED] drm_test_check_disable_connector
[21:02:13] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[21:02:13] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[21:02:13] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[21:02:13] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[21:02:13] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[21:02:13] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[21:02:13] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[21:02:13] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[21:02:13] [PASSED] drm_test_check_output_bpc_dvi
[21:02:13] [PASSED] drm_test_check_output_bpc_format_vic_1
[21:02:13] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[21:02:13] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[21:02:13] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[21:02:13] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[21:02:13] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[21:02:13] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[21:02:13] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[21:02:13] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[21:02:13] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[21:02:13] [PASSED] drm_test_check_broadcast_rgb_value
[21:02:13] [PASSED] drm_test_check_bpc_8_value
[21:02:13] [PASSED] drm_test_check_bpc_10_value
[21:02:13] [PASSED] drm_test_check_bpc_12_value
[21:02:13] [PASSED] drm_test_check_format_value
[21:02:13] [PASSED] drm_test_check_tmds_char_value
[21:02:13] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[21:02:13] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[21:02:13] [PASSED] drm_test_check_mode_valid
[21:02:13] [PASSED] drm_test_check_mode_valid_reject
[21:02:13] [PASSED] drm_test_check_mode_valid_reject_rate
[21:02:13] [PASSED] drm_test_check_mode_valid_reject_max_clock
[21:02:13] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[21:02:13] ================= drm_managed (2 subtests) =================
[21:02:13] [PASSED] drm_test_managed_release_action
[21:02:13] [PASSED] drm_test_managed_run_action
[21:02:13] =================== [PASSED] drm_managed ===================
[21:02:13] =================== drm_mm (6 subtests) ====================
[21:02:13] [PASSED] drm_test_mm_init
[21:02:13] [PASSED] drm_test_mm_debug
[21:02:13] [PASSED] drm_test_mm_align32
[21:02:13] [PASSED] drm_test_mm_align64
[21:02:13] [PASSED] drm_test_mm_lowest
[21:02:13] [PASSED] drm_test_mm_highest
[21:02:13] ===================== [PASSED] drm_mm ======================
[21:02:13] ============= drm_modes_analog_tv (5 subtests) =============
[21:02:13] [PASSED] drm_test_modes_analog_tv_mono_576i
[21:02:13] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[21:02:13] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[21:02:13] [PASSED] drm_test_modes_analog_tv_pal_576i
[21:02:13] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[21:02:13] =============== [PASSED] drm_modes_analog_tv ===============
[21:02:13] ============== drm_plane_helper (2 subtests) ===============
[21:02:13] =============== drm_test_check_plane_state  ================
[21:02:13] [PASSED] clipping_simple
[21:02:13] [PASSED] clipping_rotate_reflect
[21:02:13] [PASSED] positioning_simple
[21:02:13] [PASSED] upscaling
[21:02:13] [PASSED] downscaling
[21:02:13] [PASSED] rounding1
[21:02:13] [PASSED] rounding2
[21:02:13] [PASSED] rounding3
[21:02:13] [PASSED] rounding4
[21:02:13] =========== [PASSED] drm_test_check_plane_state ============
[21:02:13] =========== drm_test_check_invalid_plane_state  ============
[21:02:13] [PASSED] positioning_invalid
[21:02:13] [PASSED] upscaling_invalid
[21:02:13] [PASSED] downscaling_invalid
[21:02:13] ======= [PASSED] drm_test_check_invalid_plane_state ========
[21:02:13] ================ [PASSED] drm_plane_helper =================
[21:02:13] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[21:02:13] ====== drm_test_connector_helper_tv_get_modes_check  =======
[21:02:13] [PASSED] None
[21:02:13] [PASSED] PAL
[21:02:13] [PASSED] NTSC
[21:02:13] [PASSED] Both, NTSC Default
[21:02:13] [PASSED] Both, PAL Default
[21:02:13] [PASSED] Both, NTSC Default, with PAL on command-line
[21:02:13] [PASSED] Both, PAL Default, with NTSC on command-line
[21:02:13] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[21:02:13] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[21:02:13] ================== drm_rect (9 subtests) ===================
[21:02:13] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[21:02:13] [PASSED] drm_test_rect_clip_scaled_not_clipped
[21:02:13] [PASSED] drm_test_rect_clip_scaled_clipped
[21:02:13] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[21:02:13] ================= drm_test_rect_intersect  =================
[21:02:13] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[21:02:13] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[21:02:13] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[21:02:13] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[21:02:13] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[21:02:13] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[21:02:13] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[21:02:13] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[21:02:13] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[21:02:13] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[21:02:13] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[21:02:13] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[21:02:13] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[21:02:13] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[21:02:13] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[21:02:13] ============= [PASSED] drm_test_rect_intersect =============
[21:02:13] ================ drm_test_rect_calc_hscale  ================
[21:02:13] [PASSED] normal use
[21:02:13] [PASSED] out of max range
[21:02:13] [PASSED] out of min range
[21:02:13] [PASSED] zero dst
[21:02:13] [PASSED] negative src
[21:02:13] [PASSED] negative dst
[21:02:13] ============ [PASSED] drm_test_rect_calc_hscale ============
[21:02:13] ================ drm_test_rect_calc_vscale  ================
[21:02:13] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[21:02:13] [PASSED] out of max range
[21:02:13] [PASSED] out of min range
[21:02:13] [PASSED] zero dst
[21:02:13] [PASSED] negative src
[21:02:13] [PASSED] negative dst
[21:02:13] ============ [PASSED] drm_test_rect_calc_vscale ============
[21:02:13] ================== drm_test_rect_rotate  ===================
[21:02:13] [PASSED] reflect-x
[21:02:13] [PASSED] reflect-y
[21:02:13] [PASSED] rotate-0
[21:02:13] [PASSED] rotate-90
[21:02:13] [PASSED] rotate-180
[21:02:13] [PASSED] rotate-270
[21:02:13] ============== [PASSED] drm_test_rect_rotate ===============
[21:02:13] ================ drm_test_rect_rotate_inv  =================
[21:02:13] [PASSED] reflect-x
[21:02:13] [PASSED] reflect-y
[21:02:13] [PASSED] rotate-0
[21:02:13] [PASSED] rotate-90
[21:02:13] [PASSED] rotate-180
[21:02:13] [PASSED] rotate-270
[21:02:13] ============ [PASSED] drm_test_rect_rotate_inv =============
[21:02:13] ==================== [PASSED] drm_rect =====================
[21:02:13] ============ drm_sysfb_modeset_test (1 subtest) ============
[21:02:13] ============ drm_test_sysfb_build_fourcc_list  =============
[21:02:13] [PASSED] no native formats
[21:02:13] [PASSED] XRGB8888 as native format
[21:02:13] [PASSED] remove duplicates
[21:02:13] [PASSED] convert alpha formats
[21:02:13] [PASSED] random formats
[21:02:13] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[21:02:13] ============= [PASSED] drm_sysfb_modeset_test ==============
[21:02:13] ============================================================
[21:02:13] Testing complete. Ran 622 tests: passed: 622
[21:02:13] Elapsed time: 26.867s total, 1.740s configuring, 24.656s building, 0.425s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[21:02:13] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:02:15] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[21:02:24] Starting KUnit Kernel (1/1)...
[21:02:24] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:02:24] ================= ttm_device (5 subtests) ==================
[21:02:24] [PASSED] ttm_device_init_basic
[21:02:24] [PASSED] ttm_device_init_multiple
[21:02:24] [PASSED] ttm_device_fini_basic
[21:02:24] [PASSED] ttm_device_init_no_vma_man
[21:02:24] ================== ttm_device_init_pools  ==================
[21:02:24] [PASSED] No DMA allocations, no DMA32 required
[21:02:24] [PASSED] DMA allocations, DMA32 required
[21:02:24] [PASSED] No DMA allocations, DMA32 required
[21:02:24] [PASSED] DMA allocations, no DMA32 required
[21:02:24] ============== [PASSED] ttm_device_init_pools ==============
[21:02:24] =================== [PASSED] ttm_device ====================
[21:02:24] ================== ttm_pool (8 subtests) ===================
[21:02:24] ================== ttm_pool_alloc_basic  ===================
[21:02:24] [PASSED] One page
[21:02:24] [PASSED] More than one page
[21:02:24] [PASSED] Above the allocation limit
[21:02:24] [PASSED] One page, with coherent DMA mappings enabled
[21:02:24] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[21:02:24] ============== [PASSED] ttm_pool_alloc_basic ===============
[21:02:24] ============== ttm_pool_alloc_basic_dma_addr  ==============
[21:02:24] [PASSED] One page
[21:02:24] [PASSED] More than one page
[21:02:24] [PASSED] Above the allocation limit
[21:02:24] [PASSED] One page, with coherent DMA mappings enabled
[21:02:24] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[21:02:24] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[21:02:24] [PASSED] ttm_pool_alloc_order_caching_match
[21:02:24] [PASSED] ttm_pool_alloc_caching_mismatch
[21:02:24] [PASSED] ttm_pool_alloc_order_mismatch
[21:02:24] [PASSED] ttm_pool_free_dma_alloc
[21:02:24] [PASSED] ttm_pool_free_no_dma_alloc
[21:02:24] [PASSED] ttm_pool_fini_basic
[21:02:24] ==================== [PASSED] ttm_pool =====================
[21:02:24] ================ ttm_resource (8 subtests) =================
[21:02:24] ================= ttm_resource_init_basic  =================
[21:02:24] [PASSED] Init resource in TTM_PL_SYSTEM
[21:02:24] [PASSED] Init resource in TTM_PL_VRAM
[21:02:24] [PASSED] Init resource in a private placement
[21:02:24] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[21:02:24] ============= [PASSED] ttm_resource_init_basic =============
[21:02:24] [PASSED] ttm_resource_init_pinned
[21:02:24] [PASSED] ttm_resource_fini_basic
[21:02:24] [PASSED] ttm_resource_manager_init_basic
[21:02:24] [PASSED] ttm_resource_manager_usage_basic
[21:02:24] [PASSED] ttm_resource_manager_set_used_basic
[21:02:24] [PASSED] ttm_sys_man_alloc_basic
[21:02:24] [PASSED] ttm_sys_man_free_basic
[21:02:24] ================== [PASSED] ttm_resource ===================
[21:02:24] =================== ttm_tt (15 subtests) ===================
[21:02:24] ==================== ttm_tt_init_basic  ====================
[21:02:24] [PASSED] Page-aligned size
[21:02:24] [PASSED] Extra pages requested
[21:02:24] ================ [PASSED] ttm_tt_init_basic ================
[21:02:24] [PASSED] ttm_tt_init_misaligned
[21:02:24] [PASSED] ttm_tt_fini_basic
[21:02:24] [PASSED] ttm_tt_fini_sg
[21:02:24] [PASSED] ttm_tt_fini_shmem
[21:02:24] [PASSED] ttm_tt_create_basic
[21:02:24] [PASSED] ttm_tt_create_invalid_bo_type
[21:02:24] [PASSED] ttm_tt_create_ttm_exists
[21:02:24] [PASSED] ttm_tt_create_failed
[21:02:24] [PASSED] ttm_tt_destroy_basic
[21:02:24] [PASSED] ttm_tt_populate_null_ttm
[21:02:24] [PASSED] ttm_tt_populate_populated_ttm
[21:02:24] [PASSED] ttm_tt_unpopulate_basic
[21:02:24] [PASSED] ttm_tt_unpopulate_empty_ttm
[21:02:24] [PASSED] ttm_tt_swapin_basic
[21:02:24] ===================== [PASSED] ttm_tt ======================
[21:02:24] =================== ttm_bo (14 subtests) ===================
[21:02:24] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[21:02:24] [PASSED] Cannot be interrupted and sleeps
[21:02:24] [PASSED] Cannot be interrupted, locks straight away
[21:02:24] [PASSED] Can be interrupted, sleeps
[21:02:24] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[21:02:24] [PASSED] ttm_bo_reserve_locked_no_sleep
[21:02:24] [PASSED] ttm_bo_reserve_no_wait_ticket
[21:02:24] [PASSED] ttm_bo_reserve_double_resv
[21:02:24] [PASSED] ttm_bo_reserve_interrupted
[21:02:24] [PASSED] ttm_bo_reserve_deadlock
[21:02:24] [PASSED] ttm_bo_unreserve_basic
[21:02:24] [PASSED] ttm_bo_unreserve_pinned
[21:02:24] [PASSED] ttm_bo_unreserve_bulk
[21:02:24] [PASSED] ttm_bo_fini_basic
[21:02:24] [PASSED] ttm_bo_fini_shared_resv
[21:02:24] [PASSED] ttm_bo_pin_basic
[21:02:24] [PASSED] ttm_bo_pin_unpin_resource
[21:02:24] [PASSED] ttm_bo_multiple_pin_one_unpin
[21:02:24] ===================== [PASSED] ttm_bo ======================
[21:02:24] ============== ttm_bo_validate (21 subtests) ===============
[21:02:24] ============== ttm_bo_init_reserved_sys_man  ===============
[21:02:24] [PASSED] Buffer object for userspace
[21:02:24] [PASSED] Kernel buffer object
[21:02:24] [PASSED] Shared buffer object
[21:02:24] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[21:02:24] ============== ttm_bo_init_reserved_mock_man  ==============
[21:02:24] [PASSED] Buffer object for userspace
[21:02:24] [PASSED] Kernel buffer object
[21:02:24] [PASSED] Shared buffer object
[21:02:24] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[21:02:24] [PASSED] ttm_bo_init_reserved_resv
[21:02:24] ================== ttm_bo_validate_basic  ==================
[21:02:24] [PASSED] Buffer object for userspace
[21:02:24] [PASSED] Kernel buffer object
[21:02:24] [PASSED] Shared buffer object
[21:02:24] ============== [PASSED] ttm_bo_validate_basic ==============
[21:02:24] [PASSED] ttm_bo_validate_invalid_placement
[21:02:24] ============= ttm_bo_validate_same_placement  ==============
[21:02:24] [PASSED] System manager
[21:02:24] [PASSED] VRAM manager
[21:02:24] ========= [PASSED] ttm_bo_validate_same_placement ==========
[21:02:24] [PASSED] ttm_bo_validate_failed_alloc
[21:02:24] [PASSED] ttm_bo_validate_pinned
[21:02:24] [PASSED] ttm_bo_validate_busy_placement
[21:02:24] ================ ttm_bo_validate_multihop  =================
[21:02:24] [PASSED] Buffer object for userspace
[21:02:24] [PASSED] Kernel buffer object
[21:02:24] [PASSED] Shared buffer object
[21:02:24] ============ [PASSED] ttm_bo_validate_multihop =============
[21:02:24] ========== ttm_bo_validate_no_placement_signaled  ==========
[21:02:24] [PASSED] Buffer object in system domain, no page vector
[21:02:24] [PASSED] Buffer object in system domain with an existing page vector
[21:02:24] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[21:02:24] ======== ttm_bo_validate_no_placement_not_signaled  ========
[21:02:24] [PASSED] Buffer object for userspace
[21:02:24] [PASSED] Kernel buffer object
[21:02:24] [PASSED] Shared buffer object
[21:02:24] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[21:02:24] [PASSED] ttm_bo_validate_move_fence_signaled
[21:02:24] ========= ttm_bo_validate_move_fence_not_signaled  =========
[21:02:24] [PASSED] Waits for GPU
[21:02:24] [PASSED] Tries to lock straight away
[21:02:24] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[21:02:24] [PASSED] ttm_bo_validate_happy_evict
[21:02:24] [PASSED] ttm_bo_validate_all_pinned_evict
[21:02:24] [PASSED] ttm_bo_validate_allowed_only_evict
[21:02:24] [PASSED] ttm_bo_validate_deleted_evict
[21:02:24] [PASSED] ttm_bo_validate_busy_domain_evict
[21:02:24] [PASSED] ttm_bo_validate_evict_gutting
[21:02:24] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[21:02:24] ================= [PASSED] ttm_bo_validate =================
[21:02:24] ============================================================
[21:02:24] Testing complete. Ran 101 tests: passed: 101
[21:02:24] Elapsed time: 11.367s total, 1.695s configuring, 9.406s building, 0.217s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ CI.checksparse: warning for drm/{i915, xe}/irq: clarify display and parent driver interfaces

[Patchwork]

== Series Details ==

Series: drm/{i915, xe}/irq: clarify display and parent driver interfaces
URL   : https://patchwork.freedesktop.org/series/157350/
State : warning

== Summary ==

+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast a9792b1ab75123e4aceaba953a89809e745919c6
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel_display_types.h:2073:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_hotplug.c: note: in included file:
+drivers/gpu/drm/i915/gt/intel_reset.c:1569:12: warning: context imbalance in '_intel_gt_reset_lock' - different lock contexts for basic block
+drivers/gpu/drm/i915/i915_irq.c:467:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:467:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:475:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:475:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:480:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:480:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:480:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:518:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:518:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:526:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:526:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:531:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:531:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:531:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:575:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:575:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:578:15: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:578:15: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:582:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:582:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:589:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:589:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:589:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:589:9: warning: unreplaced symbol '<noident>'

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/{i915, xe}/irq: clarify display and parent driver interfaces

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 1878 bytes --]

== Series Details ==

Series: drm/{i915, xe}/irq: clarify display and parent driver interfaces
URL   : https://patchwork.freedesktop.org/series/157350/
State : success

== Summary ==

CI Bug Log - changes from xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6_BAT -> xe-pw-157350v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-157350v1_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@xe_waitfence@engine:
    - bat-dg2-oem2:       [PASS][1] -> [FAIL][2] ([Intel XE#6519])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/bat-dg2-oem2/igt@xe_waitfence@engine.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/bat-dg2-oem2/igt@xe_waitfence@engine.html

  
#### Possible fixes ####

  * igt@xe_waitfence@reltime:
    - bat-dg2-oem2:       [FAIL][3] ([Intel XE#6520]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/bat-dg2-oem2/igt@xe_waitfence@reltime.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/bat-dg2-oem2/igt@xe_waitfence@reltime.html

  
  [Intel XE#6519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6519
  [Intel XE#6520]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6520


Build changes
-------------

  * Linux: xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6 -> xe-pw-157350v1

  IGT_8618: 8618
  xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6: a9792b1ab75123e4aceaba953a89809e745919c6
  xe-pw-157350v1: 157350v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/index.html

[-- Attachment #2: Type: text/html, Size: 2465 bytes --]

✓ Xe.CI.Full: success for drm/{i915, xe}/irq: clarify display and parent driver interfaces

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 36874 bytes --]

== Series Details ==

Series: drm/{i915, xe}/irq: clarify display and parent driver interfaces
URL   : https://patchwork.freedesktop.org/series/157350/
State : success

== Summary ==

CI Bug Log - changes from xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6_FULL -> xe-pw-157350v1_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-157350v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_atomic_transition@plane-use-after-nonblocking-unbind:
    - shard-adlp:         [PASS][1] -> [DMESG-WARN][2] ([Intel XE#2953] / [Intel XE#4173]) +5 other tests dmesg-warn
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-adlp-9/igt@kms_atomic_transition@plane-use-after-nonblocking-unbind.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-adlp-4/igt@kms_atomic_transition@plane-use-after-nonblocking-unbind.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][3] ([Intel XE#2327])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
    - shard-adlp:         [PASS][4] -> [DMESG-FAIL][5] ([Intel XE#4543])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-adlp-2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-adlp-2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html

  * igt@kms_big_fb@yf-tiled-16bpp-rotate-180:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#1124]) +2 other tests skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_big_fb@yf-tiled-16bpp-rotate-180.html

  * igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p:
    - shard-bmg:          [PASS][7] -> [SKIP][8] ([Intel XE#2314] / [Intel XE#2894]) +1 other test skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-8/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html

  * igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#2314] / [Intel XE#2894])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-dg2-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#2887]) +1 other test skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [INCOMPLETE][11] ([Intel XE#1727] / [Intel XE#3113])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-6.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
    - shard-dg2-set2:     [PASS][12] -> [INCOMPLETE][13] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
    - shard-dg2-set2:     [PASS][14] -> [INCOMPLETE][15] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4:
    - shard-dg2-set2:     [PASS][16] -> [INCOMPLETE][17] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4.html
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4:
    - shard-dg2-set2:     [PASS][18] -> [INCOMPLETE][19] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4.html
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4.html

  * igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#2652] / [Intel XE#787]) +7 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-4/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2.html

  * igt@kms_chamelium_color@ctm-green-to-red:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#2325]) +1 other test skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_chamelium_color@ctm-green-to-red.html

  * igt@kms_chamelium_frames@hdmi-crc-planes-random:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#2252])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_chamelium_frames@hdmi-crc-planes-random.html

  * igt@kms_content_protection@atomic-dpms:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#2341])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_content_protection@atomic-dpms.html

  * igt@kms_content_protection@legacy@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][24] ([Intel XE#1178])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-2/igt@kms_content_protection@legacy@pipe-a-dp-2.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#2321])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
    - shard-bmg:          [PASS][26] -> [SKIP][27] ([Intel XE#2291]) +1 other test skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-8/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-bmg:          [PASS][28] -> [FAIL][29] ([Intel XE#1475])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-6/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-8/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@single-bo:
    - shard-bmg:          [PASS][30] -> [DMESG-WARN][31] ([Intel XE#5354]) +1 other test dmesg-warn
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-6/igt@kms_cursor_legacy@single-bo.html
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-7/igt@kms_cursor_legacy@single-bo.html

  * igt@kms_flip@2x-flip-vs-dpms-on-nop:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#2316]) +2 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-on-nop.html

  * igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
    - shard-bmg:          [PASS][33] -> [SKIP][34] ([Intel XE#2316]) +4 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-8/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1:
    - shard-adlp:         [PASS][35] -> [DMESG-WARN][36] ([Intel XE#4543]) +8 other tests dmesg-warn
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-adlp-4/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1.html
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-adlp-6/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#2293]) +1 other test skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#2293] / [Intel XE#2380]) +1 other test skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#2312]) +10 other tests skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-rgb565-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#2311]) +3 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-rgb565-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#2313]) +1 other test skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-bmg:          [PASS][42] -> [SKIP][43] ([Intel XE#3012])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-8/igt@kms_joiner@basic-force-big-joiner.html
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_plane_multiple@2x-tiling-x:
    - shard-bmg:          [PASS][44] -> [SKIP][45] ([Intel XE#4596])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-8/igt@kms_plane_multiple@2x-tiling-x.html
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-x.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-a:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#2763]) +4 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-a.html

  * igt@kms_pm_dc@dc5-retention-flops:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#3309])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_pm_dc@dc5-retention-flops.html

  * igt@kms_pm_rpm@universal-planes:
    - shard-adlp:         [PASS][48] -> [DMESG-WARN][49] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#5750])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-adlp-9/igt@kms_pm_rpm@universal-planes.html
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-adlp-4/igt@kms_pm_rpm@universal-planes.html

  * igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#1406] / [Intel XE#1489]) +1 other test skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr@psr-no-drrs:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_psr@psr-no-drrs.html

  * igt@kms_setmode@basic@pipe-b-dp-2-pipe-a-hdmi-a-3:
    - shard-bmg:          [PASS][52] -> [FAIL][53] ([Intel XE#6361]) +1 other test fail
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-4/igt@kms_setmode@basic@pipe-b-dp-2-pipe-a-hdmi-a-3.html
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-1/igt@kms_setmode@basic@pipe-b-dp-2-pipe-a-hdmi-a-3.html

  * igt@kms_setmode@clone-exclusive-crtc:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#1435])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_setmode@clone-exclusive-crtc.html

  * igt@kms_vrr@seamless-rr-switch-drrs:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#1499])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_vrr@seamless-rr-switch-drrs.html

  * igt@xe_eudebug@basic-vm-access-faultable:
    - shard-bmg:          NOTRUN -> [SKIP][56] ([Intel XE#4837]) +2 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@xe_eudebug@basic-vm-access-faultable.html

  * igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][57] ([Intel XE#2322]) +2 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate.html

  * igt@xe_exec_system_allocator@many-64k-mmap-new-huge:
    - shard-bmg:          NOTRUN -> [SKIP][58] ([Intel XE#5007])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@xe_exec_system_allocator@many-64k-mmap-new-huge.html

  * igt@xe_exec_system_allocator@twice-large-mmap-new-huge:
    - shard-bmg:          NOTRUN -> [SKIP][59] ([Intel XE#4943]) +6 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@xe_exec_system_allocator@twice-large-mmap-new-huge.html

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv:
    - shard-dg2-set2:     [PASS][60] -> [DMESG-WARN][61] ([Intel XE#5893])
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-dg2-432/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-dg2-434/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html

  * igt@xe_pm@s2idle-vm-bind-unbind-all:
    - shard-adlp:         [PASS][62] -> [DMESG-WARN][63] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#4504])
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-adlp-1/igt@xe_pm@s2idle-vm-bind-unbind-all.html
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-adlp-1/igt@xe_pm@s2idle-vm-bind-unbind-all.html

  * igt@xe_pxp@pxp-stale-bo-exec-post-rpm:
    - shard-bmg:          NOTRUN -> [SKIP][64] ([Intel XE#4733])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@xe_pxp@pxp-stale-bo-exec-post-rpm.html

  * igt@xe_query@multigpu-query-pxp-status:
    - shard-bmg:          NOTRUN -> [SKIP][65] ([Intel XE#944])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@xe_query@multigpu-query-pxp-status.html

  * igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random:
    - shard-adlp:         [PASS][66] -> [ABORT][67] ([Intel XE#5466]) +1 other test abort
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-adlp-6/igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random.html
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-adlp-3/igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random.html

  
#### Possible fixes ####

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
    - shard-adlp:         [FAIL][68] ([Intel XE#3908]) -> [PASS][69] +1 other test pass
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-adlp-6/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-adlp-9/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-adlp:         [DMESG-FAIL][70] ([Intel XE#4543]) -> [PASS][71]
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-adlp-1/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-adlp-9/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p:
    - shard-bmg:          [SKIP][72] ([Intel XE#2314] / [Intel XE#2894]) -> [PASS][73] +1 other test pass
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-8/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     [INCOMPLETE][74] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) -> [PASS][75]
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6.html
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
    - shard-bmg:          [SKIP][76] ([Intel XE#2291]) -> [PASS][77] +7 other tests pass
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-2/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html

  * igt@kms_dp_aux_dev:
    - shard-bmg:          [SKIP][78] ([Intel XE#3009]) -> [PASS][79]
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-6/igt@kms_dp_aux_dev.html
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-8/igt@kms_dp_aux_dev.html

  * igt@kms_dp_linktrain_fallback@dp-fallback:
    - shard-bmg:          [SKIP][80] ([Intel XE#4294]) -> [PASS][81]
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-6/igt@kms_dp_linktrain_fallback@dp-fallback.html
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-4/igt@kms_dp_linktrain_fallback@dp-fallback.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
    - shard-bmg:          [FAIL][82] ([Intel XE#3321]) -> [PASS][83] +1 other test pass
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-5/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-2/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@2x-flip-vs-modeset-vs-hang:
    - shard-bmg:          [SKIP][84] ([Intel XE#2316]) -> [PASS][85] +7 other tests pass
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-6/igt@kms_flip@2x-flip-vs-modeset-vs-hang.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-8/igt@kms_flip@2x-flip-vs-modeset-vs-hang.html

  * igt@kms_flip@2x-wf_vblank-ts-check:
    - shard-bmg:          [FAIL][86] ([Intel XE#3098] / [Intel XE#5338] / [Intel XE#6266]) -> [PASS][87]
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-4/igt@kms_flip@2x-wf_vblank-ts-check.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-1/igt@kms_flip@2x-wf_vblank-ts-check.html

  * igt@kms_flip@2x-wf_vblank-ts-check@ab-dp2-hdmi-a3:
    - shard-bmg:          [FAIL][88] ([Intel XE#3098]) -> [PASS][89]
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-4/igt@kms_flip@2x-wf_vblank-ts-check@ab-dp2-hdmi-a3.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-1/igt@kms_flip@2x-wf_vblank-ts-check@ab-dp2-hdmi-a3.html

  * igt@kms_flip@2x-wf_vblank-ts-check@ac-dp2-hdmi-a3:
    - shard-bmg:          [FAIL][90] ([Intel XE#5338] / [Intel XE#6266]) -> [PASS][91]
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-4/igt@kms_flip@2x-wf_vblank-ts-check@ac-dp2-hdmi-a3.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-1/igt@kms_flip@2x-wf_vblank-ts-check@ac-dp2-hdmi-a3.html

  * igt@kms_flip@blocking-wf_vblank:
    - shard-lnl:          [FAIL][92] ([Intel XE#6266]) -> [PASS][93] +1 other test pass
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-lnl-8/igt@kms_flip@blocking-wf_vblank.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-lnl-2/igt@kms_flip@blocking-wf_vblank.html

  * igt@kms_flip@plain-flip-ts-check@d-hdmi-a1:
    - shard-adlp:         [DMESG-WARN][94] ([Intel XE#4543]) -> [PASS][95]
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-adlp-9/igt@kms_flip@plain-flip-ts-check@d-hdmi-a1.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-adlp-4/igt@kms_flip@plain-flip-ts-check@d-hdmi-a1.html

  * igt@kms_hdr@invalid-hdr:
    - shard-dg2-set2:     [SKIP][96] ([Intel XE#455]) -> [PASS][97]
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-dg2-434/igt@kms_hdr@invalid-hdr.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-dg2-463/igt@kms_hdr@invalid-hdr.html

  * igt@kms_hdr@static-swap:
    - shard-bmg:          [SKIP][98] ([Intel XE#1503]) -> [PASS][99]
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-6/igt@kms_hdr@static-swap.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-7/igt@kms_hdr@static-swap.html

  * igt@kms_joiner@invalid-modeset-force-big-joiner:
    - shard-bmg:          [SKIP][100] ([Intel XE#3012]) -> [PASS][101]
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-6/igt@kms_joiner@invalid-modeset-force-big-joiner.html
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-8/igt@kms_joiner@invalid-modeset-force-big-joiner.html

  * igt@kms_plane_multiple@2x-tiling-4:
    - shard-bmg:          [SKIP][102] ([Intel XE#4596]) -> [PASS][103] +1 other test pass
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-4.html
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-4/igt@kms_plane_multiple@2x-tiling-4.html

  * igt@kms_setmode@basic@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     [FAIL][104] ([Intel XE#6361]) -> [PASS][105] +6 other tests pass
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-dg2-432/igt@kms_setmode@basic@pipe-a-hdmi-a-6.html
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-dg2-466/igt@kms_setmode@basic@pipe-a-hdmi-a-6.html

  * igt@kms_setmode@invalid-clone-single-crtc-stealing:
    - shard-bmg:          [SKIP][106] ([Intel XE#1435]) -> [PASS][107]
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-6/igt@kms_setmode@invalid-clone-single-crtc-stealing.html
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-7/igt@kms_setmode@invalid-clone-single-crtc-stealing.html

  * igt@xe_pm@s2idle-vm-bind-userptr:
    - shard-adlp:         [DMESG-WARN][108] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#4504]) -> [PASS][109]
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-adlp-2/igt@xe_pm@s2idle-vm-bind-userptr.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-adlp-2/igt@xe_pm@s2idle-vm-bind-userptr.html

  * igt@xe_survivability@runtime-survivability:
    - shard-bmg:          [DMESG-WARN][110] -> [PASS][111]
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-5/igt@xe_survivability@runtime-survivability.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-7/igt@xe_survivability@runtime-survivability.html

  
#### Warnings ####

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs:
    - shard-dg2-set2:     [INCOMPLETE][112] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522]) -> [INCOMPLETE][113] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4345])
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html

  * igt@kms_content_protection@legacy:
    - shard-bmg:          [SKIP][114] ([Intel XE#2341]) -> [FAIL][115] ([Intel XE#1178])
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-6/igt@kms_content_protection@legacy.html
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-2/igt@kms_content_protection@legacy.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-pgflip-blt:
    - shard-bmg:          [SKIP][116] ([Intel XE#2311]) -> [SKIP][117] ([Intel XE#2312]) +13 other tests skip
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-pgflip-blt.html
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt:
    - shard-bmg:          [SKIP][118] ([Intel XE#2312]) -> [SKIP][119] ([Intel XE#5390]) +7 other tests skip
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt:
    - shard-bmg:          [SKIP][120] ([Intel XE#5390]) -> [SKIP][121] ([Intel XE#2312]) +6 other tests skip
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][122] ([Intel XE#2312]) -> [SKIP][123] ([Intel XE#2311]) +19 other tests skip
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt:
    - shard-bmg:          [SKIP][124] ([Intel XE#2313]) -> [SKIP][125] ([Intel XE#2312]) +9 other tests skip
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt.html
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-onoff:
    - shard-bmg:          [SKIP][126] ([Intel XE#2312]) -> [SKIP][127] ([Intel XE#2313]) +19 other tests skip
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-onoff.html
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-onoff.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-dg2-set2:     [SKIP][128] ([Intel XE#1500]) -> [SKIP][129] ([Intel XE#362])
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-dg2-434/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@xe_sriov_scheduling@equal-throughput:
    - shard-adlp:         [DMESG-FAIL][130] ([Intel XE#3868] / [Intel XE#5213] / [Intel XE#5545]) -> [DMESG-FAIL][131] ([Intel XE#3868] / [Intel XE#5213]) +1 other test dmesg-fail
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6/shard-adlp-1/igt@xe_sriov_scheduling@equal-throughput.html
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/shard-adlp-9/igt@xe_sriov_scheduling@equal-throughput.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1475]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1475
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1500]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1500
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
  [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
  [Intel XE#3009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3009
  [Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
  [Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
  [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
  [Intel XE#3309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3309
  [Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
  [Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
  [Intel XE#3868]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3868
  [Intel XE#3908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3908
  [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
  [Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
  [Intel XE#4294]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4294
  [Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
  [Intel XE#4504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4504
  [Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5007
  [Intel XE#5213]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5213
  [Intel XE#5338]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5338
  [Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
  [Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
  [Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#5750]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5750
  [Intel XE#5893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5893
  [Intel XE#6266]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6266
  [Intel XE#6361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6361
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6 -> xe-pw-157350v1

  IGT_8618: 8618
  xe-4084-a9792b1ab75123e4aceaba953a89809e745919c6: a9792b1ab75123e4aceaba953a89809e745919c6
  xe-pw-157350v1: 157350v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v1/index.html

[-- Attachment #2: Type: text/html, Size: 44286 bytes --]

Re: [PATCH 1/4] drm/{i915,xe}/display: move irq calls to parent interface

[Jani Nikula]

On Mon, 10 Nov 2025, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Mon, Nov 10, 2025 at 09:31:36PM +0200, Jani Nikula wrote:
>> @@ -146,7 +145,7 @@ void ilk_update_display_irq(struct intel_display *display,
>>  	new_val |= (~enabled_irq_mask & interrupt_mask);
>>  
>>  	if (new_val != display->irq.ilk_de_imr_mask &&
>> -	    !drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv))) {
>> +	    !drm_WARN_ON(display->drm, !display->parent->irq->enabled(display->drm))) {
>
> Can't we keep intel_irqs_enabled()/etc. as wrapper functions instead of
> open coding all that pointer chasing everywhere?

I opted for a compromise in v2, keeping the static wrappers inside
intel_display_irq.c, the most common caller of the interface, and
pointer chasing everywhere else.

I'm still a bit undecided how to deal with this in general. Currently
intel_display_rpm.c wraps the calls for rpm. But should we have
dedicated file(s) for the wrappers, with uniform naming conventions for
both the files and the wrappers? And do they *all* need a wrapper, even
when there's just one caller?

BR,
Jani.


-- 
Jani Nikula, Intel

Re: [PATCH 4/4] drm/i915/display: shorten the intel_display_irq_regs_* function names

[Jani Nikula]

On Mon, 10 Nov 2025, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Mon, Nov 10, 2025 at 09:31:39PM +0200, Jani Nikula wrote:
>> Shorten the intel_display_irq_regs_* function names to the underlying
>> function names with a _wl suffix for clarity.
>> 
>> - intel_display_irq_regs_init() -> irq_init_wl()
>> - intel_display_irq_regs_reset() -> irq_reset_wl()
>> - intel_display_irq_regs_assert_irr_is_zero() -> assert_iir_is_zero_wl()
>> 
>> This emphasizes the difference is the wakelock. Platforms without the
>> DMC wakelock mechanism can use the non-wl versions.
>
> These things should just get nuked. You already switched to
> intel_de_{read,write}() in the previous patch, and those already
> handle the wakelock stuff for you.

Oh where's my brown paper bag when I need it.


-- 
Jani Nikula, Intel