* [PATCH v2 1/3] drm/{i915, xe}/display: duplicate gen2 irq/error init/reset in display irq
2025-11-11 7:34 [PATCH v2 0/3] drm/{i915, xe}/irq: clarify display and parent driver interfaces Jani Nikula
@ 2025-11-11 7:34 ` Jani Nikula
2025-11-11 15:48 ` [PATCH v2 1/3] drm/{i915,xe}/display: " Ville Syrjälä
2025-11-11 7:34 ` [PATCH v2 2/3] drm/i915/display: convert the display irq interfaces to struct intel_display Jani Nikula
` (9 subsequent siblings)
10 siblings, 1 reply; 18+ messages in thread
From: Jani Nikula @ 2025-11-11 7:34 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula, ville.syrjala
Duplicate gen2_irq_reset(), gen2_assert_iir_is_zero(), gen2_irq_init(),
gen2_error_reset(), and gen2_error_init() in intel_display_irq.c.
This allows us to drop the duplicates from xe, and prepares for future
cleanups. Although duplication is undesirable in general, in this case
the local duplicates lead to a cleaner end result.
There's a slight wrinkle in gen2_assert_iir_is_zero(). We need to use
non-device based logging until we pass in struct intel_display in a
separate change.
v2:
- Keep xe compat stuff due to series reorder and rebase
- Keep the WARN as regular WARN
- Rename the functions in the same go
Suggested-by: Ville Syrjala <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
Note: 'git show --color-moved' helps review
---
.../gpu/drm/i915/display/intel_display_irq.c | 82 +++++++++++++++++--
drivers/gpu/drm/xe/display/ext/i915_irq.c | 67 ---------------
2 files changed, 73 insertions(+), 76 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 43b27deb4a26..acfaff13c3ba 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -33,6 +33,72 @@
#include "intel_psr_regs.h"
#include "intel_uncore.h"
+static void irq_reset(struct intel_uncore *uncore, struct i915_irq_regs regs)
+{
+ intel_uncore_write(uncore, regs.imr, 0xffffffff);
+ intel_uncore_posting_read(uncore, regs.imr);
+
+ intel_uncore_write(uncore, regs.ier, 0);
+
+ /* IIR can theoretically queue up two events. Be paranoid. */
+ intel_uncore_write(uncore, regs.iir, 0xffffffff);
+ intel_uncore_posting_read(uncore, regs.iir);
+ intel_uncore_write(uncore, regs.iir, 0xffffffff);
+ intel_uncore_posting_read(uncore, regs.iir);
+}
+
+/*
+ * We should clear IMR at preinstall/uninstall, and just check at postinstall.
+ */
+static void assert_iir_is_zero(struct intel_uncore *uncore, i915_reg_t reg)
+{
+ u32 val = intel_uncore_read(uncore, reg);
+
+ if (val == 0)
+ return;
+
+ WARN(1,
+ "Interrupt register 0x%x is not zero: 0x%08x\n",
+ i915_mmio_reg_offset(reg), val);
+ intel_uncore_write(uncore, reg, 0xffffffff);
+ intel_uncore_posting_read(uncore, reg);
+ intel_uncore_write(uncore, reg, 0xffffffff);
+ intel_uncore_posting_read(uncore, reg);
+}
+
+static void irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
+ u32 imr_val, u32 ier_val)
+{
+ assert_iir_is_zero(uncore, regs.iir);
+
+ intel_uncore_write(uncore, regs.ier, ier_val);
+ intel_uncore_write(uncore, regs.imr, imr_val);
+ intel_uncore_posting_read(uncore, regs.imr);
+}
+
+static void error_reset(struct intel_uncore *uncore, struct i915_error_regs regs)
+{
+ intel_uncore_write(uncore, regs.emr, 0xffffffff);
+ intel_uncore_posting_read(uncore, regs.emr);
+
+ intel_uncore_write(uncore, regs.eir, 0xffffffff);
+ intel_uncore_posting_read(uncore, regs.eir);
+ intel_uncore_write(uncore, regs.eir, 0xffffffff);
+ intel_uncore_posting_read(uncore, regs.eir);
+}
+
+static void error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
+ u32 emr_val)
+{
+ intel_uncore_write(uncore, regs.eir, 0xffffffff);
+ intel_uncore_posting_read(uncore, regs.eir);
+ intel_uncore_write(uncore, regs.eir, 0xffffffff);
+ intel_uncore_posting_read(uncore, regs.eir);
+
+ intel_uncore_write(uncore, regs.emr, emr_val);
+ intel_uncore_posting_read(uncore, regs.emr);
+}
+
static void
intel_display_irq_regs_init(struct intel_display *display, struct i915_irq_regs regs,
u32 imr_val, u32 ier_val)
@@ -41,7 +107,7 @@ intel_display_irq_regs_init(struct intel_display *display, struct i915_irq_regs
intel_dmc_wl_get(display, regs.ier);
intel_dmc_wl_get(display, regs.iir);
- gen2_irq_init(to_intel_uncore(display->drm), regs, imr_val, ier_val);
+ irq_init(to_intel_uncore(display->drm), regs, imr_val, ier_val);
intel_dmc_wl_put(display, regs.iir);
intel_dmc_wl_put(display, regs.ier);
@@ -55,7 +121,7 @@ intel_display_irq_regs_reset(struct intel_display *display, struct i915_irq_regs
intel_dmc_wl_get(display, regs.ier);
intel_dmc_wl_get(display, regs.iir);
- gen2_irq_reset(to_intel_uncore(display->drm), regs);
+ irq_reset(to_intel_uncore(display->drm), regs);
intel_dmc_wl_put(display, regs.iir);
intel_dmc_wl_put(display, regs.ier);
@@ -67,7 +133,7 @@ intel_display_irq_regs_assert_irr_is_zero(struct intel_display *display, i915_re
{
intel_dmc_wl_get(display, reg);
- gen2_assert_iir_is_zero(to_intel_uncore(display->drm), reg);
+ assert_iir_is_zero(to_intel_uncore(display->drm), reg);
intel_dmc_wl_put(display, reg);
}
@@ -1918,8 +1984,7 @@ static void _vlv_display_irq_reset(struct intel_display *display)
else
intel_de_write(display, DPINVGTT, DPINVGTT_STATUS_MASK_VLV);
- gen2_error_reset(to_intel_uncore(display->drm),
- VLV_ERROR_REGS);
+ error_reset(to_intel_uncore(display->drm), VLV_ERROR_REGS);
i915_hotplug_interrupt_update_locked(display, 0xffffffff, 0);
intel_de_rmw(display, PORT_HOTPLUG_STAT(display), 0, 0);
@@ -2014,8 +2079,7 @@ static void _vlv_display_irq_postinstall(struct intel_display *display)
DPINVGTT_STATUS_MASK_VLV |
DPINVGTT_EN_MASK_VLV);
- gen2_error_init(to_intel_uncore(display->drm),
- VLV_ERROR_REGS, ~vlv_error_mask());
+ error_init(to_intel_uncore(display->drm), VLV_ERROR_REGS, ~vlv_error_mask());
pipestat_mask = PIPE_CRC_DONE_INTERRUPT_STATUS;
@@ -2054,7 +2118,7 @@ static void ibx_display_irq_reset(struct intel_display *display)
if (HAS_PCH_NOP(display))
return;
- gen2_irq_reset(to_intel_uncore(display->drm), SDE_IRQ_REGS);
+ irq_reset(to_intel_uncore(display->drm), SDE_IRQ_REGS);
if (HAS_PCH_CPT(display) || HAS_PCH_LPT(display))
intel_de_write(display, SERR_INT, 0xffffffff);
@@ -2064,7 +2128,7 @@ void ilk_display_irq_reset(struct intel_display *display)
{
struct intel_uncore *uncore = to_intel_uncore(display->drm);
- gen2_irq_reset(uncore, DE_IRQ_REGS);
+ irq_reset(uncore, DE_IRQ_REGS);
display->irq.ilk_de_imr_mask = ~0u;
if (DISPLAY_VER(display) == 7)
diff --git a/drivers/gpu/drm/xe/display/ext/i915_irq.c b/drivers/gpu/drm/xe/display/ext/i915_irq.c
index 3c6bca66ddab..1011c1c754d0 100644
--- a/drivers/gpu/drm/xe/display/ext/i915_irq.c
+++ b/drivers/gpu/drm/xe/display/ext/i915_irq.c
@@ -7,73 +7,6 @@
#include "i915_reg.h"
#include "intel_uncore.h"
-void gen2_irq_reset(struct intel_uncore *uncore, struct i915_irq_regs regs)
-{
- intel_uncore_write(uncore, regs.imr, 0xffffffff);
- intel_uncore_posting_read(uncore, regs.imr);
-
- intel_uncore_write(uncore, regs.ier, 0);
-
- /* IIR can theoretically queue up two events. Be paranoid. */
- intel_uncore_write(uncore, regs.iir, 0xffffffff);
- intel_uncore_posting_read(uncore, regs.iir);
- intel_uncore_write(uncore, regs.iir, 0xffffffff);
- intel_uncore_posting_read(uncore, regs.iir);
-}
-
-/*
- * We should clear IMR at preinstall/uninstall, and just check at postinstall.
- */
-void gen2_assert_iir_is_zero(struct intel_uncore *uncore, i915_reg_t reg)
-{
- struct xe_device *xe = container_of(uncore, struct xe_device, uncore);
- u32 val = intel_uncore_read(uncore, reg);
-
- if (val == 0)
- return;
-
- drm_WARN(&xe->drm, 1,
- "Interrupt register 0x%x is not zero: 0x%08x\n",
- i915_mmio_reg_offset(reg), val);
- intel_uncore_write(uncore, reg, 0xffffffff);
- intel_uncore_posting_read(uncore, reg);
- intel_uncore_write(uncore, reg, 0xffffffff);
- intel_uncore_posting_read(uncore, reg);
-}
-
-void gen2_irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
- u32 imr_val, u32 ier_val)
-{
- gen2_assert_iir_is_zero(uncore, regs.iir);
-
- intel_uncore_write(uncore, regs.ier, ier_val);
- intel_uncore_write(uncore, regs.imr, imr_val);
- intel_uncore_posting_read(uncore, regs.imr);
-}
-
-void gen2_error_reset(struct intel_uncore *uncore, struct i915_error_regs regs)
-{
- intel_uncore_write(uncore, regs.emr, 0xffffffff);
- intel_uncore_posting_read(uncore, regs.emr);
-
- intel_uncore_write(uncore, regs.eir, 0xffffffff);
- intel_uncore_posting_read(uncore, regs.eir);
- intel_uncore_write(uncore, regs.eir, 0xffffffff);
- intel_uncore_posting_read(uncore, regs.eir);
-}
-
-void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
- u32 emr_val)
-{
- intel_uncore_write(uncore, regs.eir, 0xffffffff);
- intel_uncore_posting_read(uncore, regs.eir);
- intel_uncore_write(uncore, regs.eir, 0xffffffff);
- intel_uncore_posting_read(uncore, regs.eir);
-
- intel_uncore_write(uncore, regs.emr, emr_val);
- intel_uncore_posting_read(uncore, regs.emr);
-}
-
bool intel_irqs_enabled(struct xe_device *xe)
{
return atomic_read(&xe->irq.enabled);
--
2.47.3
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH v2 1/3] drm/{i915,xe}/display: duplicate gen2 irq/error init/reset in display irq
2025-11-11 7:34 ` [PATCH v2 1/3] drm/{i915, xe}/display: duplicate gen2 irq/error init/reset in display irq Jani Nikula
@ 2025-11-11 15:48 ` Ville Syrjälä
0 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjälä @ 2025-11-11 15:48 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe
On Tue, Nov 11, 2025 at 09:34:02AM +0200, Jani Nikula wrote:
> Duplicate gen2_irq_reset(), gen2_assert_iir_is_zero(), gen2_irq_init(),
> gen2_error_reset(), and gen2_error_init() in intel_display_irq.c.
>
> This allows us to drop the duplicates from xe, and prepares for future
> cleanups. Although duplication is undesirable in general, in this case
> the local duplicates lead to a cleaner end result.
>
> There's a slight wrinkle in gen2_assert_iir_is_zero(). We need to use
> non-device based logging until we pass in struct intel_display in a
> separate change.
>
> v2:
> - Keep xe compat stuff due to series reorder and rebase
> - Keep the WARN as regular WARN
> - Rename the functions in the same go
>
> Suggested-by: Ville Syrjala <ville.syrjala@linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> ---
>
> Note: 'git show --color-moved' helps review
> ---
> .../gpu/drm/i915/display/intel_display_irq.c | 82 +++++++++++++++++--
> drivers/gpu/drm/xe/display/ext/i915_irq.c | 67 ---------------
> 2 files changed, 73 insertions(+), 76 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index 43b27deb4a26..acfaff13c3ba 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -33,6 +33,72 @@
> #include "intel_psr_regs.h"
> #include "intel_uncore.h"
>
> +static void irq_reset(struct intel_uncore *uncore, struct i915_irq_regs regs)
> +{
> + intel_uncore_write(uncore, regs.imr, 0xffffffff);
> + intel_uncore_posting_read(uncore, regs.imr);
> +
> + intel_uncore_write(uncore, regs.ier, 0);
> +
> + /* IIR can theoretically queue up two events. Be paranoid. */
> + intel_uncore_write(uncore, regs.iir, 0xffffffff);
> + intel_uncore_posting_read(uncore, regs.iir);
> + intel_uncore_write(uncore, regs.iir, 0xffffffff);
> + intel_uncore_posting_read(uncore, regs.iir);
> +}
> +
> +/*
> + * We should clear IMR at preinstall/uninstall, and just check at postinstall.
> + */
> +static void assert_iir_is_zero(struct intel_uncore *uncore, i915_reg_t reg)
> +{
> + u32 val = intel_uncore_read(uncore, reg);
> +
> + if (val == 0)
> + return;
> +
> + WARN(1,
> + "Interrupt register 0x%x is not zero: 0x%08x\n",
> + i915_mmio_reg_offset(reg), val);
> + intel_uncore_write(uncore, reg, 0xffffffff);
> + intel_uncore_posting_read(uncore, reg);
> + intel_uncore_write(uncore, reg, 0xffffffff);
> + intel_uncore_posting_read(uncore, reg);
> +}
> +
> +static void irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
> + u32 imr_val, u32 ier_val)
> +{
> + assert_iir_is_zero(uncore, regs.iir);
> +
> + intel_uncore_write(uncore, regs.ier, ier_val);
> + intel_uncore_write(uncore, regs.imr, imr_val);
> + intel_uncore_posting_read(uncore, regs.imr);
> +}
> +
> +static void error_reset(struct intel_uncore *uncore, struct i915_error_regs regs)
> +{
> + intel_uncore_write(uncore, regs.emr, 0xffffffff);
> + intel_uncore_posting_read(uncore, regs.emr);
> +
> + intel_uncore_write(uncore, regs.eir, 0xffffffff);
> + intel_uncore_posting_read(uncore, regs.eir);
> + intel_uncore_write(uncore, regs.eir, 0xffffffff);
> + intel_uncore_posting_read(uncore, regs.eir);
> +}
> +
> +static void error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
> + u32 emr_val)
> +{
> + intel_uncore_write(uncore, regs.eir, 0xffffffff);
> + intel_uncore_posting_read(uncore, regs.eir);
> + intel_uncore_write(uncore, regs.eir, 0xffffffff);
> + intel_uncore_posting_read(uncore, regs.eir);
> +
> + intel_uncore_write(uncore, regs.emr, emr_val);
> + intel_uncore_posting_read(uncore, regs.emr);
> +}
> +
> static void
> intel_display_irq_regs_init(struct intel_display *display, struct i915_irq_regs regs,
> u32 imr_val, u32 ier_val)
> @@ -41,7 +107,7 @@ intel_display_irq_regs_init(struct intel_display *display, struct i915_irq_regs
> intel_dmc_wl_get(display, regs.ier);
> intel_dmc_wl_get(display, regs.iir);
>
> - gen2_irq_init(to_intel_uncore(display->drm), regs, imr_val, ier_val);
> + irq_init(to_intel_uncore(display->drm), regs, imr_val, ier_val);
>
> intel_dmc_wl_put(display, regs.iir);
> intel_dmc_wl_put(display, regs.ier);
> @@ -55,7 +121,7 @@ intel_display_irq_regs_reset(struct intel_display *display, struct i915_irq_regs
> intel_dmc_wl_get(display, regs.ier);
> intel_dmc_wl_get(display, regs.iir);
>
> - gen2_irq_reset(to_intel_uncore(display->drm), regs);
> + irq_reset(to_intel_uncore(display->drm), regs);
>
> intel_dmc_wl_put(display, regs.iir);
> intel_dmc_wl_put(display, regs.ier);
> @@ -67,7 +133,7 @@ intel_display_irq_regs_assert_irr_is_zero(struct intel_display *display, i915_re
> {
> intel_dmc_wl_get(display, reg);
>
> - gen2_assert_iir_is_zero(to_intel_uncore(display->drm), reg);
> + assert_iir_is_zero(to_intel_uncore(display->drm), reg);
>
> intel_dmc_wl_put(display, reg);
> }
> @@ -1918,8 +1984,7 @@ static void _vlv_display_irq_reset(struct intel_display *display)
> else
> intel_de_write(display, DPINVGTT, DPINVGTT_STATUS_MASK_VLV);
>
> - gen2_error_reset(to_intel_uncore(display->drm),
> - VLV_ERROR_REGS);
> + error_reset(to_intel_uncore(display->drm), VLV_ERROR_REGS);
>
> i915_hotplug_interrupt_update_locked(display, 0xffffffff, 0);
> intel_de_rmw(display, PORT_HOTPLUG_STAT(display), 0, 0);
> @@ -2014,8 +2079,7 @@ static void _vlv_display_irq_postinstall(struct intel_display *display)
> DPINVGTT_STATUS_MASK_VLV |
> DPINVGTT_EN_MASK_VLV);
>
> - gen2_error_init(to_intel_uncore(display->drm),
> - VLV_ERROR_REGS, ~vlv_error_mask());
> + error_init(to_intel_uncore(display->drm), VLV_ERROR_REGS, ~vlv_error_mask());
>
> pipestat_mask = PIPE_CRC_DONE_INTERRUPT_STATUS;
>
> @@ -2054,7 +2118,7 @@ static void ibx_display_irq_reset(struct intel_display *display)
> if (HAS_PCH_NOP(display))
> return;
>
> - gen2_irq_reset(to_intel_uncore(display->drm), SDE_IRQ_REGS);
> + irq_reset(to_intel_uncore(display->drm), SDE_IRQ_REGS);
>
> if (HAS_PCH_CPT(display) || HAS_PCH_LPT(display))
> intel_de_write(display, SERR_INT, 0xffffffff);
> @@ -2064,7 +2128,7 @@ void ilk_display_irq_reset(struct intel_display *display)
> {
> struct intel_uncore *uncore = to_intel_uncore(display->drm);
>
> - gen2_irq_reset(uncore, DE_IRQ_REGS);
> + irq_reset(uncore, DE_IRQ_REGS);
> display->irq.ilk_de_imr_mask = ~0u;
>
> if (DISPLAY_VER(display) == 7)
> diff --git a/drivers/gpu/drm/xe/display/ext/i915_irq.c b/drivers/gpu/drm/xe/display/ext/i915_irq.c
> index 3c6bca66ddab..1011c1c754d0 100644
> --- a/drivers/gpu/drm/xe/display/ext/i915_irq.c
> +++ b/drivers/gpu/drm/xe/display/ext/i915_irq.c
> @@ -7,73 +7,6 @@
> #include "i915_reg.h"
> #include "intel_uncore.h"
>
> -void gen2_irq_reset(struct intel_uncore *uncore, struct i915_irq_regs regs)
> -{
> - intel_uncore_write(uncore, regs.imr, 0xffffffff);
> - intel_uncore_posting_read(uncore, regs.imr);
> -
> - intel_uncore_write(uncore, regs.ier, 0);
> -
> - /* IIR can theoretically queue up two events. Be paranoid. */
> - intel_uncore_write(uncore, regs.iir, 0xffffffff);
> - intel_uncore_posting_read(uncore, regs.iir);
> - intel_uncore_write(uncore, regs.iir, 0xffffffff);
> - intel_uncore_posting_read(uncore, regs.iir);
> -}
> -
> -/*
> - * We should clear IMR at preinstall/uninstall, and just check at postinstall.
> - */
> -void gen2_assert_iir_is_zero(struct intel_uncore *uncore, i915_reg_t reg)
> -{
> - struct xe_device *xe = container_of(uncore, struct xe_device, uncore);
> - u32 val = intel_uncore_read(uncore, reg);
> -
> - if (val == 0)
> - return;
> -
> - drm_WARN(&xe->drm, 1,
> - "Interrupt register 0x%x is not zero: 0x%08x\n",
> - i915_mmio_reg_offset(reg), val);
> - intel_uncore_write(uncore, reg, 0xffffffff);
> - intel_uncore_posting_read(uncore, reg);
> - intel_uncore_write(uncore, reg, 0xffffffff);
> - intel_uncore_posting_read(uncore, reg);
> -}
> -
> -void gen2_irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
> - u32 imr_val, u32 ier_val)
> -{
> - gen2_assert_iir_is_zero(uncore, regs.iir);
> -
> - intel_uncore_write(uncore, regs.ier, ier_val);
> - intel_uncore_write(uncore, regs.imr, imr_val);
> - intel_uncore_posting_read(uncore, regs.imr);
> -}
> -
> -void gen2_error_reset(struct intel_uncore *uncore, struct i915_error_regs regs)
> -{
> - intel_uncore_write(uncore, regs.emr, 0xffffffff);
> - intel_uncore_posting_read(uncore, regs.emr);
> -
> - intel_uncore_write(uncore, regs.eir, 0xffffffff);
> - intel_uncore_posting_read(uncore, regs.eir);
> - intel_uncore_write(uncore, regs.eir, 0xffffffff);
> - intel_uncore_posting_read(uncore, regs.eir);
> -}
> -
> -void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
> - u32 emr_val)
> -{
> - intel_uncore_write(uncore, regs.eir, 0xffffffff);
> - intel_uncore_posting_read(uncore, regs.eir);
> - intel_uncore_write(uncore, regs.eir, 0xffffffff);
> - intel_uncore_posting_read(uncore, regs.eir);
> -
> - intel_uncore_write(uncore, regs.emr, emr_val);
> - intel_uncore_posting_read(uncore, regs.emr);
> -}
> -
> bool intel_irqs_enabled(struct xe_device *xe)
> {
> return atomic_read(&xe->irq.enabled);
> --
> 2.47.3
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v2 2/3] drm/i915/display: convert the display irq interfaces to struct intel_display
2025-11-11 7:34 [PATCH v2 0/3] drm/{i915, xe}/irq: clarify display and parent driver interfaces Jani Nikula
2025-11-11 7:34 ` [PATCH v2 1/3] drm/{i915, xe}/display: duplicate gen2 irq/error init/reset in display irq Jani Nikula
@ 2025-11-11 7:34 ` Jani Nikula
2025-11-11 15:48 ` Ville Syrjälä
2025-11-11 7:34 ` [PATCH v2 3/3] drm/{i915, xe}/display: move irq calls to parent interface Jani Nikula
` (8 subsequent siblings)
10 siblings, 1 reply; 18+ messages in thread
From: Jani Nikula @ 2025-11-11 7:34 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula, ville.syrjala
Convert the irq/error init/reset interfaces from struct intel_uncore to
struct intel_display, and drop the dependency on intel_uncore.h.
Since the intel_de_*() calls handle the DMC wakelock internally, we can
drop the wrappers handling wakelocks completely.
v2: Drop the wakelock wrappers (Ville)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
.../gpu/drm/i915/display/intel_display_irq.c | 184 +++++++-----------
1 file changed, 68 insertions(+), 116 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index acfaff13c3ba..2a92ca6c2f82 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -19,7 +19,6 @@
#include "intel_display_trace.h"
#include "intel_display_types.h"
#include "intel_dmc.h"
-#include "intel_dmc_wl.h"
#include "intel_dp_aux.h"
#include "intel_dsb.h"
#include "intel_fdi_regs.h"
@@ -31,111 +30,71 @@
#include "intel_pmdemand.h"
#include "intel_psr.h"
#include "intel_psr_regs.h"
-#include "intel_uncore.h"
-static void irq_reset(struct intel_uncore *uncore, struct i915_irq_regs regs)
+static void irq_reset(struct intel_display *display, struct i915_irq_regs regs)
{
- intel_uncore_write(uncore, regs.imr, 0xffffffff);
- intel_uncore_posting_read(uncore, regs.imr);
+ intel_de_write(display, regs.imr, 0xffffffff);
+ intel_de_posting_read(display, regs.imr);
- intel_uncore_write(uncore, regs.ier, 0);
+ intel_de_write(display, regs.ier, 0);
/* IIR can theoretically queue up two events. Be paranoid. */
- intel_uncore_write(uncore, regs.iir, 0xffffffff);
- intel_uncore_posting_read(uncore, regs.iir);
- intel_uncore_write(uncore, regs.iir, 0xffffffff);
- intel_uncore_posting_read(uncore, regs.iir);
+ intel_de_write(display, regs.iir, 0xffffffff);
+ intel_de_posting_read(display, regs.iir);
+ intel_de_write(display, regs.iir, 0xffffffff);
+ intel_de_posting_read(display, regs.iir);
}
/*
* We should clear IMR at preinstall/uninstall, and just check at postinstall.
*/
-static void assert_iir_is_zero(struct intel_uncore *uncore, i915_reg_t reg)
+static void assert_iir_is_zero(struct intel_display *display, i915_reg_t reg)
{
- u32 val = intel_uncore_read(uncore, reg);
+ u32 val = intel_de_read(display, reg);
if (val == 0)
return;
- WARN(1,
+ drm_WARN(display->drm, 1,
"Interrupt register 0x%x is not zero: 0x%08x\n",
i915_mmio_reg_offset(reg), val);
- intel_uncore_write(uncore, reg, 0xffffffff);
- intel_uncore_posting_read(uncore, reg);
- intel_uncore_write(uncore, reg, 0xffffffff);
- intel_uncore_posting_read(uncore, reg);
+ intel_de_write(display, reg, 0xffffffff);
+ intel_de_posting_read(display, reg);
+ intel_de_write(display, reg, 0xffffffff);
+ intel_de_posting_read(display, reg);
}
-static void irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
+static void irq_init(struct intel_display *display, struct i915_irq_regs regs,
u32 imr_val, u32 ier_val)
{
- assert_iir_is_zero(uncore, regs.iir);
+ assert_iir_is_zero(display, regs.iir);
- intel_uncore_write(uncore, regs.ier, ier_val);
- intel_uncore_write(uncore, regs.imr, imr_val);
- intel_uncore_posting_read(uncore, regs.imr);
+ intel_de_write(display, regs.ier, ier_val);
+ intel_de_write(display, regs.imr, imr_val);
+ intel_de_posting_read(display, regs.imr);
}
-static void error_reset(struct intel_uncore *uncore, struct i915_error_regs regs)
+static void error_reset(struct intel_display *display, struct i915_error_regs regs)
{
- intel_uncore_write(uncore, regs.emr, 0xffffffff);
- intel_uncore_posting_read(uncore, regs.emr);
+ intel_de_write(display, regs.emr, 0xffffffff);
+ intel_de_posting_read(display, regs.emr);
- intel_uncore_write(uncore, regs.eir, 0xffffffff);
- intel_uncore_posting_read(uncore, regs.eir);
- intel_uncore_write(uncore, regs.eir, 0xffffffff);
- intel_uncore_posting_read(uncore, regs.eir);
+ intel_de_write(display, regs.eir, 0xffffffff);
+ intel_de_posting_read(display, regs.eir);
+ intel_de_write(display, regs.eir, 0xffffffff);
+ intel_de_posting_read(display, regs.eir);
}
-static void error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
+static void error_init(struct intel_display *display, struct i915_error_regs regs,
u32 emr_val)
{
- intel_uncore_write(uncore, regs.eir, 0xffffffff);
- intel_uncore_posting_read(uncore, regs.eir);
- intel_uncore_write(uncore, regs.eir, 0xffffffff);
- intel_uncore_posting_read(uncore, regs.eir);
+ intel_de_write(display, regs.eir, 0xffffffff);
+ intel_de_posting_read(display, regs.eir);
+ intel_de_write(display, regs.eir, 0xffffffff);
+ intel_de_posting_read(display, regs.eir);
- intel_uncore_write(uncore, regs.emr, emr_val);
- intel_uncore_posting_read(uncore, regs.emr);
-}
-
-static void
-intel_display_irq_regs_init(struct intel_display *display, struct i915_irq_regs regs,
- u32 imr_val, u32 ier_val)
-{
- intel_dmc_wl_get(display, regs.imr);
- intel_dmc_wl_get(display, regs.ier);
- intel_dmc_wl_get(display, regs.iir);
-
- irq_init(to_intel_uncore(display->drm), regs, imr_val, ier_val);
-
- intel_dmc_wl_put(display, regs.iir);
- intel_dmc_wl_put(display, regs.ier);
- intel_dmc_wl_put(display, regs.imr);
-}
-
-static void
-intel_display_irq_regs_reset(struct intel_display *display, struct i915_irq_regs regs)
-{
- intel_dmc_wl_get(display, regs.imr);
- intel_dmc_wl_get(display, regs.ier);
- intel_dmc_wl_get(display, regs.iir);
-
- irq_reset(to_intel_uncore(display->drm), regs);
-
- intel_dmc_wl_put(display, regs.iir);
- intel_dmc_wl_put(display, regs.ier);
- intel_dmc_wl_put(display, regs.imr);
-}
-
-static void
-intel_display_irq_regs_assert_irr_is_zero(struct intel_display *display, i915_reg_t reg)
-{
- intel_dmc_wl_get(display, reg);
-
- assert_iir_is_zero(to_intel_uncore(display->drm), reg);
-
- intel_dmc_wl_put(display, reg);
+ intel_de_write(display, regs.emr, emr_val);
+ intel_de_posting_read(display, regs.emr);
}
struct pipe_fault_handler {
@@ -1984,14 +1943,14 @@ static void _vlv_display_irq_reset(struct intel_display *display)
else
intel_de_write(display, DPINVGTT, DPINVGTT_STATUS_MASK_VLV);
- error_reset(to_intel_uncore(display->drm), VLV_ERROR_REGS);
+ error_reset(display, VLV_ERROR_REGS);
i915_hotplug_interrupt_update_locked(display, 0xffffffff, 0);
intel_de_rmw(display, PORT_HOTPLUG_STAT(display), 0, 0);
i9xx_pipestat_irq_reset(display);
- intel_display_irq_regs_reset(display, VLV_IRQ_REGS);
+ irq_reset(display, VLV_IRQ_REGS);
display->irq.vlv_imr_mask = ~0u;
}
@@ -2079,7 +2038,7 @@ static void _vlv_display_irq_postinstall(struct intel_display *display)
DPINVGTT_STATUS_MASK_VLV |
DPINVGTT_EN_MASK_VLV);
- error_init(to_intel_uncore(display->drm), VLV_ERROR_REGS, ~vlv_error_mask());
+ error_init(display, VLV_ERROR_REGS, ~vlv_error_mask());
pipestat_mask = PIPE_CRC_DONE_INTERRUPT_STATUS;
@@ -2102,7 +2061,7 @@ static void _vlv_display_irq_postinstall(struct intel_display *display)
display->irq.vlv_imr_mask = ~enable_mask;
- intel_display_irq_regs_init(display, VLV_IRQ_REGS, display->irq.vlv_imr_mask, enable_mask);
+ irq_init(display, VLV_IRQ_REGS, display->irq.vlv_imr_mask, enable_mask);
}
void vlv_display_irq_postinstall(struct intel_display *display)
@@ -2118,7 +2077,7 @@ static void ibx_display_irq_reset(struct intel_display *display)
if (HAS_PCH_NOP(display))
return;
- irq_reset(to_intel_uncore(display->drm), SDE_IRQ_REGS);
+ irq_reset(display, SDE_IRQ_REGS);
if (HAS_PCH_CPT(display) || HAS_PCH_LPT(display))
intel_de_write(display, SERR_INT, 0xffffffff);
@@ -2126,9 +2085,7 @@ static void ibx_display_irq_reset(struct intel_display *display)
void ilk_display_irq_reset(struct intel_display *display)
{
- struct intel_uncore *uncore = to_intel_uncore(display->drm);
-
- irq_reset(uncore, DE_IRQ_REGS);
+ irq_reset(display, DE_IRQ_REGS);
display->irq.ilk_de_imr_mask = ~0u;
if (DISPLAY_VER(display) == 7)
@@ -2155,10 +2112,10 @@ void gen8_display_irq_reset(struct intel_display *display)
for_each_pipe(display, pipe)
if (intel_display_power_is_enabled(display,
POWER_DOMAIN_PIPE(pipe)))
- intel_display_irq_regs_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
+ irq_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
- intel_display_irq_regs_reset(display, GEN8_DE_PORT_IRQ_REGS);
- intel_display_irq_regs_reset(display, GEN8_DE_MISC_IRQ_REGS);
+ irq_reset(display, GEN8_DE_PORT_IRQ_REGS);
+ irq_reset(display, GEN8_DE_MISC_IRQ_REGS);
if (HAS_PCH_SPLIT(display))
ibx_display_irq_reset(display);
@@ -2200,18 +2157,18 @@ void gen11_display_irq_reset(struct intel_display *display)
for_each_pipe(display, pipe)
if (intel_display_power_is_enabled(display,
POWER_DOMAIN_PIPE(pipe)))
- intel_display_irq_regs_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
+ irq_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
- intel_display_irq_regs_reset(display, GEN8_DE_PORT_IRQ_REGS);
- intel_display_irq_regs_reset(display, GEN8_DE_MISC_IRQ_REGS);
+ irq_reset(display, GEN8_DE_PORT_IRQ_REGS);
+ irq_reset(display, GEN8_DE_MISC_IRQ_REGS);
if (DISPLAY_VER(display) >= 14)
- intel_display_irq_regs_reset(display, PICAINTERRUPT_IRQ_REGS);
+ irq_reset(display, PICAINTERRUPT_IRQ_REGS);
else
- intel_display_irq_regs_reset(display, GEN11_DE_HPD_IRQ_REGS);
+ irq_reset(display, GEN11_DE_HPD_IRQ_REGS);
if (INTEL_PCH_TYPE(display) >= PCH_ICP)
- intel_display_irq_regs_reset(display, SDE_IRQ_REGS);
+ irq_reset(display, SDE_IRQ_REGS);
}
void gen8_irq_power_well_post_enable(struct intel_display *display,
@@ -2230,9 +2187,9 @@ void gen8_irq_power_well_post_enable(struct intel_display *display,
}
for_each_pipe_masked(display, pipe, pipe_mask)
- intel_display_irq_regs_init(display, GEN8_DE_PIPE_IRQ_REGS(pipe),
- display->irq.de_pipe_imr_mask[pipe],
- ~display->irq.de_pipe_imr_mask[pipe] | extra_ier);
+ irq_init(display, GEN8_DE_PIPE_IRQ_REGS(pipe),
+ display->irq.de_pipe_imr_mask[pipe],
+ ~display->irq.de_pipe_imr_mask[pipe] | extra_ier);
spin_unlock_irq(&display->irq.lock);
}
@@ -2251,7 +2208,7 @@ void gen8_irq_power_well_pre_disable(struct intel_display *display,
}
for_each_pipe_masked(display, pipe, pipe_mask)
- intel_display_irq_regs_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
+ irq_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
spin_unlock_irq(&display->irq.lock);
@@ -2284,7 +2241,7 @@ static void ibx_irq_postinstall(struct intel_display *display)
else
mask = SDE_GMBUS_CPT;
- intel_display_irq_regs_init(display, SDE_IRQ_REGS, ~mask, 0xffffffff);
+ irq_init(display, SDE_IRQ_REGS, ~mask, 0xffffffff);
}
void valleyview_enable_display_irqs(struct intel_display *display)
@@ -2350,7 +2307,7 @@ void ilk_de_irq_postinstall(struct intel_display *display)
}
if (display->platform.haswell) {
- intel_display_irq_regs_assert_irr_is_zero(display, EDP_PSR_IIR);
+ assert_iir_is_zero(display, EDP_PSR_IIR);
display_mask |= DE_EDP_PSR_INT_HSW;
}
@@ -2361,8 +2318,8 @@ void ilk_de_irq_postinstall(struct intel_display *display)
ibx_irq_postinstall(display);
- intel_display_irq_regs_init(display, DE_IRQ_REGS, display->irq.ilk_de_imr_mask,
- display_mask | extra_mask);
+ irq_init(display, DE_IRQ_REGS, display->irq.ilk_de_imr_mask,
+ display_mask | extra_mask);
}
static void mtp_irq_postinstall(struct intel_display *display);
@@ -2438,11 +2395,10 @@ void gen8_de_irq_postinstall(struct intel_display *display)
if (!intel_display_power_is_enabled(display, domain))
continue;
- intel_display_irq_regs_assert_irr_is_zero(display,
- TRANS_PSR_IIR(display, trans));
+ assert_iir_is_zero(display, TRANS_PSR_IIR(display, trans));
}
} else {
- intel_display_irq_regs_assert_irr_is_zero(display, EDP_PSR_IIR);
+ assert_iir_is_zero(display, EDP_PSR_IIR);
}
for_each_pipe(display, pipe) {
@@ -2450,23 +2406,20 @@ void gen8_de_irq_postinstall(struct intel_display *display)
if (intel_display_power_is_enabled(display,
POWER_DOMAIN_PIPE(pipe)))
- intel_display_irq_regs_init(display, GEN8_DE_PIPE_IRQ_REGS(pipe),
- display->irq.de_pipe_imr_mask[pipe],
- de_pipe_enables);
+ irq_init(display, GEN8_DE_PIPE_IRQ_REGS(pipe),
+ display->irq.de_pipe_imr_mask[pipe],
+ de_pipe_enables);
}
- intel_display_irq_regs_init(display, GEN8_DE_PORT_IRQ_REGS, ~de_port_masked,
- de_port_enables);
- intel_display_irq_regs_init(display, GEN8_DE_MISC_IRQ_REGS, ~de_misc_masked,
- de_misc_masked);
+ irq_init(display, GEN8_DE_PORT_IRQ_REGS, ~de_port_masked, de_port_enables);
+ irq_init(display, GEN8_DE_MISC_IRQ_REGS, ~de_misc_masked, de_misc_masked);
if (IS_DISPLAY_VER(display, 11, 13)) {
u32 de_hpd_masked = 0;
u32 de_hpd_enables = GEN11_DE_TC_HOTPLUG_MASK |
GEN11_DE_TBT_HOTPLUG_MASK;
- intel_display_irq_regs_init(display, GEN11_DE_HPD_IRQ_REGS, ~de_hpd_masked,
- de_hpd_enables);
+ irq_init(display, GEN11_DE_HPD_IRQ_REGS, ~de_hpd_masked, de_hpd_enables);
}
}
@@ -2477,17 +2430,16 @@ static void mtp_irq_postinstall(struct intel_display *display)
u32 de_hpd_enables = de_hpd_mask | XELPDP_DP_ALT_HOTPLUG_MASK |
XELPDP_TBT_HOTPLUG_MASK;
- intel_display_irq_regs_init(display, PICAINTERRUPT_IRQ_REGS, ~de_hpd_mask,
- de_hpd_enables);
+ irq_init(display, PICAINTERRUPT_IRQ_REGS, ~de_hpd_mask, de_hpd_enables);
- intel_display_irq_regs_init(display, SDE_IRQ_REGS, ~sde_mask, 0xffffffff);
+ irq_init(display, SDE_IRQ_REGS, ~sde_mask, 0xffffffff);
}
static void icp_irq_postinstall(struct intel_display *display)
{
u32 mask = SDE_GMBUS_ICP;
- intel_display_irq_regs_init(display, SDE_IRQ_REGS, ~mask, 0xffffffff);
+ irq_init(display, SDE_IRQ_REGS, ~mask, 0xffffffff);
}
void gen11_de_irq_postinstall(struct intel_display *display)
--
2.47.3
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH v2 2/3] drm/i915/display: convert the display irq interfaces to struct intel_display
2025-11-11 7:34 ` [PATCH v2 2/3] drm/i915/display: convert the display irq interfaces to struct intel_display Jani Nikula
@ 2025-11-11 15:48 ` Ville Syrjälä
0 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjälä @ 2025-11-11 15:48 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe
On Tue, Nov 11, 2025 at 09:34:03AM +0200, Jani Nikula wrote:
> Convert the irq/error init/reset interfaces from struct intel_uncore to
> struct intel_display, and drop the dependency on intel_uncore.h.
>
> Since the intel_de_*() calls handle the DMC wakelock internally, we can
> drop the wrappers handling wakelocks completely.
>
> v2: Drop the wakelock wrappers (Ville)
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> .../gpu/drm/i915/display/intel_display_irq.c | 184 +++++++-----------
> 1 file changed, 68 insertions(+), 116 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index acfaff13c3ba..2a92ca6c2f82 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -19,7 +19,6 @@
> #include "intel_display_trace.h"
> #include "intel_display_types.h"
> #include "intel_dmc.h"
> -#include "intel_dmc_wl.h"
> #include "intel_dp_aux.h"
> #include "intel_dsb.h"
> #include "intel_fdi_regs.h"
> @@ -31,111 +30,71 @@
> #include "intel_pmdemand.h"
> #include "intel_psr.h"
> #include "intel_psr_regs.h"
> -#include "intel_uncore.h"
>
> -static void irq_reset(struct intel_uncore *uncore, struct i915_irq_regs regs)
> +static void irq_reset(struct intel_display *display, struct i915_irq_regs regs)
> {
> - intel_uncore_write(uncore, regs.imr, 0xffffffff);
> - intel_uncore_posting_read(uncore, regs.imr);
> + intel_de_write(display, regs.imr, 0xffffffff);
> + intel_de_posting_read(display, regs.imr);
>
> - intel_uncore_write(uncore, regs.ier, 0);
> + intel_de_write(display, regs.ier, 0);
>
> /* IIR can theoretically queue up two events. Be paranoid. */
> - intel_uncore_write(uncore, regs.iir, 0xffffffff);
> - intel_uncore_posting_read(uncore, regs.iir);
> - intel_uncore_write(uncore, regs.iir, 0xffffffff);
> - intel_uncore_posting_read(uncore, regs.iir);
> + intel_de_write(display, regs.iir, 0xffffffff);
> + intel_de_posting_read(display, regs.iir);
> + intel_de_write(display, regs.iir, 0xffffffff);
> + intel_de_posting_read(display, regs.iir);
> }
>
> /*
> * We should clear IMR at preinstall/uninstall, and just check at postinstall.
> */
> -static void assert_iir_is_zero(struct intel_uncore *uncore, i915_reg_t reg)
> +static void assert_iir_is_zero(struct intel_display *display, i915_reg_t reg)
> {
> - u32 val = intel_uncore_read(uncore, reg);
> + u32 val = intel_de_read(display, reg);
>
> if (val == 0)
> return;
>
> - WARN(1,
> + drm_WARN(display->drm, 1,
> "Interrupt register 0x%x is not zero: 0x%08x\n",
> i915_mmio_reg_offset(reg), val);
> - intel_uncore_write(uncore, reg, 0xffffffff);
> - intel_uncore_posting_read(uncore, reg);
> - intel_uncore_write(uncore, reg, 0xffffffff);
> - intel_uncore_posting_read(uncore, reg);
> + intel_de_write(display, reg, 0xffffffff);
> + intel_de_posting_read(display, reg);
> + intel_de_write(display, reg, 0xffffffff);
> + intel_de_posting_read(display, reg);
> }
>
> -static void irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
> +static void irq_init(struct intel_display *display, struct i915_irq_regs regs,
> u32 imr_val, u32 ier_val)
> {
> - assert_iir_is_zero(uncore, regs.iir);
> + assert_iir_is_zero(display, regs.iir);
>
> - intel_uncore_write(uncore, regs.ier, ier_val);
> - intel_uncore_write(uncore, regs.imr, imr_val);
> - intel_uncore_posting_read(uncore, regs.imr);
> + intel_de_write(display, regs.ier, ier_val);
> + intel_de_write(display, regs.imr, imr_val);
> + intel_de_posting_read(display, regs.imr);
> }
>
> -static void error_reset(struct intel_uncore *uncore, struct i915_error_regs regs)
> +static void error_reset(struct intel_display *display, struct i915_error_regs regs)
> {
> - intel_uncore_write(uncore, regs.emr, 0xffffffff);
> - intel_uncore_posting_read(uncore, regs.emr);
> + intel_de_write(display, regs.emr, 0xffffffff);
> + intel_de_posting_read(display, regs.emr);
>
> - intel_uncore_write(uncore, regs.eir, 0xffffffff);
> - intel_uncore_posting_read(uncore, regs.eir);
> - intel_uncore_write(uncore, regs.eir, 0xffffffff);
> - intel_uncore_posting_read(uncore, regs.eir);
> + intel_de_write(display, regs.eir, 0xffffffff);
> + intel_de_posting_read(display, regs.eir);
> + intel_de_write(display, regs.eir, 0xffffffff);
> + intel_de_posting_read(display, regs.eir);
> }
>
> -static void error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
> +static void error_init(struct intel_display *display, struct i915_error_regs regs,
> u32 emr_val)
> {
> - intel_uncore_write(uncore, regs.eir, 0xffffffff);
> - intel_uncore_posting_read(uncore, regs.eir);
> - intel_uncore_write(uncore, regs.eir, 0xffffffff);
> - intel_uncore_posting_read(uncore, regs.eir);
> + intel_de_write(display, regs.eir, 0xffffffff);
> + intel_de_posting_read(display, regs.eir);
> + intel_de_write(display, regs.eir, 0xffffffff);
> + intel_de_posting_read(display, regs.eir);
>
> - intel_uncore_write(uncore, regs.emr, emr_val);
> - intel_uncore_posting_read(uncore, regs.emr);
> -}
> -
> -static void
> -intel_display_irq_regs_init(struct intel_display *display, struct i915_irq_regs regs,
> - u32 imr_val, u32 ier_val)
> -{
> - intel_dmc_wl_get(display, regs.imr);
> - intel_dmc_wl_get(display, regs.ier);
> - intel_dmc_wl_get(display, regs.iir);
> -
> - irq_init(to_intel_uncore(display->drm), regs, imr_val, ier_val);
> -
> - intel_dmc_wl_put(display, regs.iir);
> - intel_dmc_wl_put(display, regs.ier);
> - intel_dmc_wl_put(display, regs.imr);
> -}
> -
> -static void
> -intel_display_irq_regs_reset(struct intel_display *display, struct i915_irq_regs regs)
> -{
> - intel_dmc_wl_get(display, regs.imr);
> - intel_dmc_wl_get(display, regs.ier);
> - intel_dmc_wl_get(display, regs.iir);
> -
> - irq_reset(to_intel_uncore(display->drm), regs);
> -
> - intel_dmc_wl_put(display, regs.iir);
> - intel_dmc_wl_put(display, regs.ier);
> - intel_dmc_wl_put(display, regs.imr);
> -}
> -
> -static void
> -intel_display_irq_regs_assert_irr_is_zero(struct intel_display *display, i915_reg_t reg)
> -{
> - intel_dmc_wl_get(display, reg);
> -
> - assert_iir_is_zero(to_intel_uncore(display->drm), reg);
> -
> - intel_dmc_wl_put(display, reg);
> + intel_de_write(display, regs.emr, emr_val);
> + intel_de_posting_read(display, regs.emr);
> }
>
> struct pipe_fault_handler {
> @@ -1984,14 +1943,14 @@ static void _vlv_display_irq_reset(struct intel_display *display)
> else
> intel_de_write(display, DPINVGTT, DPINVGTT_STATUS_MASK_VLV);
>
> - error_reset(to_intel_uncore(display->drm), VLV_ERROR_REGS);
> + error_reset(display, VLV_ERROR_REGS);
>
> i915_hotplug_interrupt_update_locked(display, 0xffffffff, 0);
> intel_de_rmw(display, PORT_HOTPLUG_STAT(display), 0, 0);
>
> i9xx_pipestat_irq_reset(display);
>
> - intel_display_irq_regs_reset(display, VLV_IRQ_REGS);
> + irq_reset(display, VLV_IRQ_REGS);
> display->irq.vlv_imr_mask = ~0u;
> }
>
> @@ -2079,7 +2038,7 @@ static void _vlv_display_irq_postinstall(struct intel_display *display)
> DPINVGTT_STATUS_MASK_VLV |
> DPINVGTT_EN_MASK_VLV);
>
> - error_init(to_intel_uncore(display->drm), VLV_ERROR_REGS, ~vlv_error_mask());
> + error_init(display, VLV_ERROR_REGS, ~vlv_error_mask());
>
> pipestat_mask = PIPE_CRC_DONE_INTERRUPT_STATUS;
>
> @@ -2102,7 +2061,7 @@ static void _vlv_display_irq_postinstall(struct intel_display *display)
>
> display->irq.vlv_imr_mask = ~enable_mask;
>
> - intel_display_irq_regs_init(display, VLV_IRQ_REGS, display->irq.vlv_imr_mask, enable_mask);
> + irq_init(display, VLV_IRQ_REGS, display->irq.vlv_imr_mask, enable_mask);
> }
>
> void vlv_display_irq_postinstall(struct intel_display *display)
> @@ -2118,7 +2077,7 @@ static void ibx_display_irq_reset(struct intel_display *display)
> if (HAS_PCH_NOP(display))
> return;
>
> - irq_reset(to_intel_uncore(display->drm), SDE_IRQ_REGS);
> + irq_reset(display, SDE_IRQ_REGS);
>
> if (HAS_PCH_CPT(display) || HAS_PCH_LPT(display))
> intel_de_write(display, SERR_INT, 0xffffffff);
> @@ -2126,9 +2085,7 @@ static void ibx_display_irq_reset(struct intel_display *display)
>
> void ilk_display_irq_reset(struct intel_display *display)
> {
> - struct intel_uncore *uncore = to_intel_uncore(display->drm);
> -
> - irq_reset(uncore, DE_IRQ_REGS);
> + irq_reset(display, DE_IRQ_REGS);
> display->irq.ilk_de_imr_mask = ~0u;
>
> if (DISPLAY_VER(display) == 7)
> @@ -2155,10 +2112,10 @@ void gen8_display_irq_reset(struct intel_display *display)
> for_each_pipe(display, pipe)
> if (intel_display_power_is_enabled(display,
> POWER_DOMAIN_PIPE(pipe)))
> - intel_display_irq_regs_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
> + irq_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
>
> - intel_display_irq_regs_reset(display, GEN8_DE_PORT_IRQ_REGS);
> - intel_display_irq_regs_reset(display, GEN8_DE_MISC_IRQ_REGS);
> + irq_reset(display, GEN8_DE_PORT_IRQ_REGS);
> + irq_reset(display, GEN8_DE_MISC_IRQ_REGS);
>
> if (HAS_PCH_SPLIT(display))
> ibx_display_irq_reset(display);
> @@ -2200,18 +2157,18 @@ void gen11_display_irq_reset(struct intel_display *display)
> for_each_pipe(display, pipe)
> if (intel_display_power_is_enabled(display,
> POWER_DOMAIN_PIPE(pipe)))
> - intel_display_irq_regs_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
> + irq_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
>
> - intel_display_irq_regs_reset(display, GEN8_DE_PORT_IRQ_REGS);
> - intel_display_irq_regs_reset(display, GEN8_DE_MISC_IRQ_REGS);
> + irq_reset(display, GEN8_DE_PORT_IRQ_REGS);
> + irq_reset(display, GEN8_DE_MISC_IRQ_REGS);
>
> if (DISPLAY_VER(display) >= 14)
> - intel_display_irq_regs_reset(display, PICAINTERRUPT_IRQ_REGS);
> + irq_reset(display, PICAINTERRUPT_IRQ_REGS);
> else
> - intel_display_irq_regs_reset(display, GEN11_DE_HPD_IRQ_REGS);
> + irq_reset(display, GEN11_DE_HPD_IRQ_REGS);
>
> if (INTEL_PCH_TYPE(display) >= PCH_ICP)
> - intel_display_irq_regs_reset(display, SDE_IRQ_REGS);
> + irq_reset(display, SDE_IRQ_REGS);
> }
>
> void gen8_irq_power_well_post_enable(struct intel_display *display,
> @@ -2230,9 +2187,9 @@ void gen8_irq_power_well_post_enable(struct intel_display *display,
> }
>
> for_each_pipe_masked(display, pipe, pipe_mask)
> - intel_display_irq_regs_init(display, GEN8_DE_PIPE_IRQ_REGS(pipe),
> - display->irq.de_pipe_imr_mask[pipe],
> - ~display->irq.de_pipe_imr_mask[pipe] | extra_ier);
> + irq_init(display, GEN8_DE_PIPE_IRQ_REGS(pipe),
> + display->irq.de_pipe_imr_mask[pipe],
> + ~display->irq.de_pipe_imr_mask[pipe] | extra_ier);
>
> spin_unlock_irq(&display->irq.lock);
> }
> @@ -2251,7 +2208,7 @@ void gen8_irq_power_well_pre_disable(struct intel_display *display,
> }
>
> for_each_pipe_masked(display, pipe, pipe_mask)
> - intel_display_irq_regs_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
> + irq_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
>
> spin_unlock_irq(&display->irq.lock);
>
> @@ -2284,7 +2241,7 @@ static void ibx_irq_postinstall(struct intel_display *display)
> else
> mask = SDE_GMBUS_CPT;
>
> - intel_display_irq_regs_init(display, SDE_IRQ_REGS, ~mask, 0xffffffff);
> + irq_init(display, SDE_IRQ_REGS, ~mask, 0xffffffff);
> }
>
> void valleyview_enable_display_irqs(struct intel_display *display)
> @@ -2350,7 +2307,7 @@ void ilk_de_irq_postinstall(struct intel_display *display)
> }
>
> if (display->platform.haswell) {
> - intel_display_irq_regs_assert_irr_is_zero(display, EDP_PSR_IIR);
> + assert_iir_is_zero(display, EDP_PSR_IIR);
> display_mask |= DE_EDP_PSR_INT_HSW;
> }
>
> @@ -2361,8 +2318,8 @@ void ilk_de_irq_postinstall(struct intel_display *display)
>
> ibx_irq_postinstall(display);
>
> - intel_display_irq_regs_init(display, DE_IRQ_REGS, display->irq.ilk_de_imr_mask,
> - display_mask | extra_mask);
> + irq_init(display, DE_IRQ_REGS, display->irq.ilk_de_imr_mask,
> + display_mask | extra_mask);
> }
>
> static void mtp_irq_postinstall(struct intel_display *display);
> @@ -2438,11 +2395,10 @@ void gen8_de_irq_postinstall(struct intel_display *display)
> if (!intel_display_power_is_enabled(display, domain))
> continue;
>
> - intel_display_irq_regs_assert_irr_is_zero(display,
> - TRANS_PSR_IIR(display, trans));
> + assert_iir_is_zero(display, TRANS_PSR_IIR(display, trans));
> }
> } else {
> - intel_display_irq_regs_assert_irr_is_zero(display, EDP_PSR_IIR);
> + assert_iir_is_zero(display, EDP_PSR_IIR);
> }
>
> for_each_pipe(display, pipe) {
> @@ -2450,23 +2406,20 @@ void gen8_de_irq_postinstall(struct intel_display *display)
>
> if (intel_display_power_is_enabled(display,
> POWER_DOMAIN_PIPE(pipe)))
> - intel_display_irq_regs_init(display, GEN8_DE_PIPE_IRQ_REGS(pipe),
> - display->irq.de_pipe_imr_mask[pipe],
> - de_pipe_enables);
> + irq_init(display, GEN8_DE_PIPE_IRQ_REGS(pipe),
> + display->irq.de_pipe_imr_mask[pipe],
> + de_pipe_enables);
> }
>
> - intel_display_irq_regs_init(display, GEN8_DE_PORT_IRQ_REGS, ~de_port_masked,
> - de_port_enables);
> - intel_display_irq_regs_init(display, GEN8_DE_MISC_IRQ_REGS, ~de_misc_masked,
> - de_misc_masked);
> + irq_init(display, GEN8_DE_PORT_IRQ_REGS, ~de_port_masked, de_port_enables);
> + irq_init(display, GEN8_DE_MISC_IRQ_REGS, ~de_misc_masked, de_misc_masked);
>
> if (IS_DISPLAY_VER(display, 11, 13)) {
> u32 de_hpd_masked = 0;
> u32 de_hpd_enables = GEN11_DE_TC_HOTPLUG_MASK |
> GEN11_DE_TBT_HOTPLUG_MASK;
>
> - intel_display_irq_regs_init(display, GEN11_DE_HPD_IRQ_REGS, ~de_hpd_masked,
> - de_hpd_enables);
> + irq_init(display, GEN11_DE_HPD_IRQ_REGS, ~de_hpd_masked, de_hpd_enables);
> }
> }
>
> @@ -2477,17 +2430,16 @@ static void mtp_irq_postinstall(struct intel_display *display)
> u32 de_hpd_enables = de_hpd_mask | XELPDP_DP_ALT_HOTPLUG_MASK |
> XELPDP_TBT_HOTPLUG_MASK;
>
> - intel_display_irq_regs_init(display, PICAINTERRUPT_IRQ_REGS, ~de_hpd_mask,
> - de_hpd_enables);
> + irq_init(display, PICAINTERRUPT_IRQ_REGS, ~de_hpd_mask, de_hpd_enables);
>
> - intel_display_irq_regs_init(display, SDE_IRQ_REGS, ~sde_mask, 0xffffffff);
> + irq_init(display, SDE_IRQ_REGS, ~sde_mask, 0xffffffff);
> }
>
> static void icp_irq_postinstall(struct intel_display *display)
> {
> u32 mask = SDE_GMBUS_ICP;
>
> - intel_display_irq_regs_init(display, SDE_IRQ_REGS, ~mask, 0xffffffff);
> + irq_init(display, SDE_IRQ_REGS, ~mask, 0xffffffff);
> }
>
> void gen11_de_irq_postinstall(struct intel_display *display)
> --
> 2.47.3
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v2 3/3] drm/{i915, xe}/display: move irq calls to parent interface
2025-11-11 7:34 [PATCH v2 0/3] drm/{i915, xe}/irq: clarify display and parent driver interfaces Jani Nikula
2025-11-11 7:34 ` [PATCH v2 1/3] drm/{i915, xe}/display: duplicate gen2 irq/error init/reset in display irq Jani Nikula
2025-11-11 7:34 ` [PATCH v2 2/3] drm/i915/display: convert the display irq interfaces to struct intel_display Jani Nikula
@ 2025-11-11 7:34 ` Jani Nikula
2025-11-11 15:50 ` [PATCH v2 3/3] drm/{i915,xe}/display: " Ville Syrjälä
2025-11-12 14:18 ` [PATCH v3] " Jani Nikula
2025-11-11 7:40 ` ✗ CI.checkpatch: warning for drm/{i915, xe}/irq: clarify display and parent driver interfaces (rev2) Patchwork
` (7 subsequent siblings)
10 siblings, 2 replies; 18+ messages in thread
From: Jani Nikula @ 2025-11-11 7:34 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula, ville.syrjala
Add an irq parent driver interface for the .enabled and .synchronize
calls. This lets us drop the dependency on i915_drv.h and i915_irq.h in
multiple places, and subsequently remove the compat i915_irq.h and
i915_irq.c files along with the display/ext directory from xe
altogether.
Use intel_irqs_enabled() and intel_synchronize_irq() static wrappers for
parent interface calls in intel_display_irq.c while chasing the function
pointers everywhere else. It's still a bit uncertain if we should
universally have wrappers for the parent interface calls or not.
v2: Keep static wrappers in intel_display_irq.c (Ville)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
.../gpu/drm/i915/display/intel_display_irq.c | 47 +++++++++----------
.../drm/i915/display/intel_display_power.c | 5 +-
.../i915/display/intel_display_power_well.c | 15 ++----
drivers/gpu/drm/i915/display/intel_gmbus.c | 9 ++--
drivers/gpu/drm/i915/display/intel_hotplug.c | 6 +--
.../gpu/drm/i915/display/intel_lpe_audio.c | 1 -
drivers/gpu/drm/i915/display/intel_pipe_crc.c | 6 +--
drivers/gpu/drm/i915/i915_driver.c | 1 +
drivers/gpu/drm/i915/i915_irq.c | 16 +++++++
drivers/gpu/drm/i915/i915_irq.h | 2 +
drivers/gpu/drm/xe/Makefile | 2 -
| 6 ---
drivers/gpu/drm/xe/display/ext/i915_irq.c | 18 -------
drivers/gpu/drm/xe/display/xe_display.c | 18 +++++++
include/drm/intel/display_parent_interface.h | 8 ++++
15 files changed, 81 insertions(+), 79 deletions(-)
delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
delete mode 100644 drivers/gpu/drm/xe/display/ext/i915_irq.c
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 2a92ca6c2f82..c6b1683a367b 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -5,9 +5,8 @@
#include <drm/drm_print.h>
#include <drm/drm_vblank.h>
+#include <drm/intel/display_parent_interface.h>
-#include "i915_drv.h"
-#include "i915_irq.h"
#include "i915_reg.h"
#include "icl_dsi_regs.h"
#include "intel_crtc.h"
@@ -31,6 +30,16 @@
#include "intel_psr.h"
#include "intel_psr_regs.h"
+static bool intel_irqs_enabled(struct intel_display *display)
+{
+ return display->parent->irq->enabled(display->drm);
+}
+
+static void intel_synchronize_irq(struct intel_display *display)
+{
+ display->parent->irq->synchronize(display->drm);
+}
+
static void irq_reset(struct intel_display *display, struct i915_irq_regs regs)
{
intel_de_write(display, regs.imr, 0xffffffff);
@@ -160,7 +169,6 @@ intel_handle_vblank(struct intel_display *display, enum pipe pipe)
void ilk_update_display_irq(struct intel_display *display,
u32 interrupt_mask, u32 enabled_irq_mask)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
u32 new_val;
lockdep_assert_held(&display->irq.lock);
@@ -171,7 +179,7 @@ void ilk_update_display_irq(struct intel_display *display,
new_val |= (~enabled_irq_mask & interrupt_mask);
if (new_val != display->irq.ilk_de_imr_mask &&
- !drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv))) {
+ !drm_WARN_ON(display->drm, !intel_irqs_enabled(display))) {
display->irq.ilk_de_imr_mask = new_val;
intel_de_write(display, DEIMR, display->irq.ilk_de_imr_mask);
intel_de_posting_read(display, DEIMR);
@@ -197,7 +205,6 @@ void ilk_disable_display_irq(struct intel_display *display, u32 bits)
void bdw_update_port_irq(struct intel_display *display,
u32 interrupt_mask, u32 enabled_irq_mask)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
u32 new_val;
u32 old_val;
@@ -205,7 +212,7 @@ void bdw_update_port_irq(struct intel_display *display,
drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
- if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
+ if (drm_WARN_ON(display->drm, !intel_irqs_enabled(display)))
return;
old_val = intel_de_read(display, GEN8_DE_PORT_IMR);
@@ -231,14 +238,13 @@ static void bdw_update_pipe_irq(struct intel_display *display,
enum pipe pipe, u32 interrupt_mask,
u32 enabled_irq_mask)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
u32 new_val;
lockdep_assert_held(&display->irq.lock);
drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
- if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
+ if (drm_WARN_ON(display->drm, !intel_irqs_enabled(display)))
return;
new_val = display->irq.de_pipe_imr_mask[pipe];
@@ -274,7 +280,6 @@ void ibx_display_interrupt_update(struct intel_display *display,
u32 interrupt_mask,
u32 enabled_irq_mask)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
u32 sdeimr = intel_de_read(display, SDEIMR);
sdeimr &= ~interrupt_mask;
@@ -284,7 +289,7 @@ void ibx_display_interrupt_update(struct intel_display *display,
lockdep_assert_held(&display->irq.lock);
- if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
+ if (drm_WARN_ON(display->drm, !intel_irqs_enabled(display)))
return;
intel_de_write(display, SDEIMR, sdeimr);
@@ -348,7 +353,6 @@ u32 i915_pipestat_enable_mask(struct intel_display *display,
void i915_enable_pipestat(struct intel_display *display,
enum pipe pipe, u32 status_mask)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
i915_reg_t reg = PIPESTAT(display, pipe);
u32 enable_mask;
@@ -357,7 +361,7 @@ void i915_enable_pipestat(struct intel_display *display,
pipe_name(pipe), status_mask);
lockdep_assert_held(&display->irq.lock);
- drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv));
+ drm_WARN_ON(display->drm, !intel_irqs_enabled(display));
if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == status_mask)
return;
@@ -372,7 +376,6 @@ void i915_enable_pipestat(struct intel_display *display,
void i915_disable_pipestat(struct intel_display *display,
enum pipe pipe, u32 status_mask)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
i915_reg_t reg = PIPESTAT(display, pipe);
u32 enable_mask;
@@ -381,7 +384,7 @@ void i915_disable_pipestat(struct intel_display *display,
pipe_name(pipe), status_mask);
lockdep_assert_held(&display->irq.lock);
- drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv));
+ drm_WARN_ON(display->drm, !intel_irqs_enabled(display));
if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == 0)
return;
@@ -2174,14 +2177,13 @@ void gen11_display_irq_reset(struct intel_display *display)
void gen8_irq_power_well_post_enable(struct intel_display *display,
u8 pipe_mask)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
u32 extra_ier = GEN8_PIPE_VBLANK | GEN8_PIPE_FIFO_UNDERRUN |
gen8_de_pipe_flip_done_mask(display);
enum pipe pipe;
spin_lock_irq(&display->irq.lock);
- if (!intel_irqs_enabled(dev_priv)) {
+ if (!intel_irqs_enabled(display)) {
spin_unlock_irq(&display->irq.lock);
return;
}
@@ -2197,12 +2199,11 @@ void gen8_irq_power_well_post_enable(struct intel_display *display,
void gen8_irq_power_well_pre_disable(struct intel_display *display,
u8 pipe_mask)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
enum pipe pipe;
spin_lock_irq(&display->irq.lock);
- if (!intel_irqs_enabled(dev_priv)) {
+ if (!intel_irqs_enabled(display)) {
spin_unlock_irq(&display->irq.lock);
return;
}
@@ -2213,7 +2214,7 @@ void gen8_irq_power_well_pre_disable(struct intel_display *display,
spin_unlock_irq(&display->irq.lock);
/* make sure we're done processing display irqs */
- intel_synchronize_irq(dev_priv);
+ intel_synchronize_irq(display);
}
/*
@@ -2246,8 +2247,6 @@ static void ibx_irq_postinstall(struct intel_display *display)
void valleyview_enable_display_irqs(struct intel_display *display)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
-
spin_lock_irq(&display->irq.lock);
if (display->irq.vlv_display_irqs_enabled)
@@ -2255,7 +2254,7 @@ void valleyview_enable_display_irqs(struct intel_display *display)
display->irq.vlv_display_irqs_enabled = true;
- if (intel_irqs_enabled(dev_priv)) {
+ if (intel_irqs_enabled(display)) {
_vlv_display_irq_reset(display);
_vlv_display_irq_postinstall(display);
}
@@ -2266,8 +2265,6 @@ void valleyview_enable_display_irqs(struct intel_display *display)
void valleyview_disable_display_irqs(struct intel_display *display)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
-
spin_lock_irq(&display->irq.lock);
if (!display->irq.vlv_display_irqs_enabled)
@@ -2275,7 +2272,7 @@ void valleyview_disable_display_irqs(struct intel_display *display)
display->irq.vlv_display_irqs_enabled = false;
- if (intel_irqs_enabled(dev_priv))
+ if (intel_irqs_enabled(display))
_vlv_display_irq_reset(display);
out:
spin_unlock_irq(&display->irq.lock);
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 74fcd9cfe911..7c857291ad4c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -7,11 +7,11 @@
#include <linux/string_helpers.h>
#include <drm/drm_print.h>
+#include <drm/intel/display_parent_interface.h>
#include "soc/intel_dram.h"
#include "i915_drv.h"
-#include "i915_irq.h"
#include "i915_reg.h"
#include "intel_backlight_regs.h"
#include "intel_cdclk.h"
@@ -1202,7 +1202,6 @@ static void hsw_assert_cdclk(struct intel_display *display)
static void assert_can_disable_lcpll(struct intel_display *display)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_crtc *crtc;
for_each_intel_crtc(display->drm, crtc)
@@ -1247,7 +1246,7 @@ static void assert_can_disable_lcpll(struct intel_display *display)
* gen-specific and since we only disable LCPLL after we fully disable
* the interrupts, the check below should be enough.
*/
- INTEL_DISPLAY_STATE_WARN(display, intel_irqs_enabled(dev_priv),
+ INTEL_DISPLAY_STATE_WARN(display, display->parent->irq->enabled(display->drm),
"IRQs enabled\n");
}
diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
index eab7019f2252..5ae064bc536a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
@@ -6,9 +6,8 @@
#include <linux/iopoll.h>
#include <drm/drm_print.h>
+#include <drm/intel/display_parent_interface.h>
-#include "i915_drv.h"
-#include "i915_irq.h"
#include "i915_reg.h"
#include "intel_backlight_regs.h"
#include "intel_combo_phy.h"
@@ -628,8 +627,6 @@ static bool hsw_power_well_enabled(struct intel_display *display,
static void assert_can_enable_dc9(struct intel_display *display)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
-
drm_WARN_ONCE(display->drm,
(intel_de_read(display, DC_STATE_EN) & DC_STATE_EN_DC9),
"DC9 already programmed to be enabled.\n");
@@ -641,7 +638,7 @@ static void assert_can_enable_dc9(struct intel_display *display)
intel_de_read(display, HSW_PWR_WELL_CTL2) &
HSW_PWR_WELL_CTL_REQ(SKL_PW_CTL_IDX_PW_2),
"Power well 2 on.\n");
- drm_WARN_ONCE(display->drm, intel_irqs_enabled(dev_priv),
+ drm_WARN_ONCE(display->drm, display->parent->irq->enabled(display->drm),
"Interrupts not disabled yet.\n");
/*
@@ -655,9 +652,7 @@ static void assert_can_enable_dc9(struct intel_display *display)
static void assert_can_disable_dc9(struct intel_display *display)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
-
- drm_WARN_ONCE(display->drm, intel_irqs_enabled(dev_priv),
+ drm_WARN_ONCE(display->drm, display->parent->irq->enabled(display->drm),
"Interrupts not disabled yet.\n");
drm_WARN_ONCE(display->drm,
intel_de_read(display, DC_STATE_EN) &
@@ -1281,12 +1276,10 @@ static void vlv_display_power_well_init(struct intel_display *display)
static void vlv_display_power_well_deinit(struct intel_display *display)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
-
valleyview_disable_display_irqs(display);
/* make sure we're done processing display irqs */
- intel_synchronize_irq(dev_priv);
+ display->parent->irq->synchronize(display->drm);
vlv_pps_reset_all(display);
diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
index 82f3a40ecac7..98834cf622d2 100644
--- a/drivers/gpu/drm/i915/display/intel_gmbus.c
+++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
@@ -32,11 +32,11 @@
#include <linux/i2c.h>
#include <linux/iopoll.h>
-#include <drm/drm_print.h>
#include <drm/display/drm_hdcp_helper.h>
+#include <drm/drm_print.h>
+#include <drm/drm_print.h>
+#include <drm/intel/display_parent_interface.h>
-#include "i915_drv.h"
-#include "i915_irq.h"
#include "i915_reg.h"
#include "intel_de.h"
#include "intel_display_regs.h"
@@ -391,12 +391,11 @@ intel_gpio_setup(struct intel_gmbus *bus, i915_reg_t gpio_reg)
static bool has_gmbus_irq(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
/*
* encoder->shutdown() may want to use GMBUS
* after irqs have already been disabled.
*/
- return HAS_GMBUS_IRQ(display) && intel_irqs_enabled(i915);
+ return HAS_GMBUS_IRQ(display) && display->parent->irq->enabled(display->drm);
}
static int gmbus_wait(struct intel_display *display, u32 status, u32 irq_en)
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
index 235706229ffb..a4254d4e9a4a 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
@@ -26,9 +26,8 @@
#include <drm/drm_print.h>
#include <drm/drm_probe_helper.h>
+#include <drm/intel/display_parent_interface.h>
-#include "i915_drv.h"
-#include "i915_irq.h"
#include "intel_connector.h"
#include "intel_display_core.h"
#include "intel_display_power.h"
@@ -1177,13 +1176,12 @@ bool intel_hpd_schedule_detection(struct intel_display *display)
static int i915_hpd_storm_ctl_show(struct seq_file *m, void *data)
{
struct intel_display *display = m->private;
- struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_hotplug *hotplug = &display->hotplug;
/* Synchronize with everything first in case there's been an HPD
* storm, but we haven't finished handling it in the kernel yet
*/
- intel_synchronize_irq(dev_priv);
+ display->parent->irq->synchronize(display->drm);
flush_work(&display->hotplug.dig_port_work);
flush_delayed_work(&display->hotplug.hotplug_work);
diff --git a/drivers/gpu/drm/i915/display/intel_lpe_audio.c b/drivers/gpu/drm/i915/display/intel_lpe_audio.c
index 42284e9928f2..5b41abe1c64d 100644
--- a/drivers/gpu/drm/i915/display/intel_lpe_audio.c
+++ b/drivers/gpu/drm/i915/display/intel_lpe_audio.c
@@ -71,7 +71,6 @@
#include <drm/drm_print.h>
#include <drm/intel/intel_lpe_audio.h>
-#include "i915_irq.h"
#include "intel_audio_regs.h"
#include "intel_de.h"
#include "intel_lpe_audio.h"
diff --git a/drivers/gpu/drm/i915/display/intel_pipe_crc.c b/drivers/gpu/drm/i915/display/intel_pipe_crc.c
index 1f27643412f1..b782f894cce8 100644
--- a/drivers/gpu/drm/i915/display/intel_pipe_crc.c
+++ b/drivers/gpu/drm/i915/display/intel_pipe_crc.c
@@ -29,9 +29,8 @@
#include <linux/seq_file.h>
#include <drm/drm_print.h>
+#include <drm/intel/display_parent_interface.h>
-#include "i915_drv.h"
-#include "i915_irq.h"
#include "intel_atomic.h"
#include "intel_de.h"
#include "intel_display_irq.h"
@@ -658,7 +657,6 @@ void intel_crtc_enable_pipe_crc(struct intel_crtc *crtc)
void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc)
{
struct intel_display *display = to_intel_display(crtc);
- struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_pipe_crc *pipe_crc = &crtc->pipe_crc;
enum pipe pipe = crtc->pipe;
@@ -669,5 +667,5 @@ void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc)
intel_de_write(display, PIPE_CRC_CTL(display, pipe), 0);
intel_de_posting_read(display, PIPE_CRC_CTL(display, pipe));
- intel_synchronize_irq(dev_priv);
+ display->parent->irq->synchronize(display->drm);
}
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index c97b76771917..07715aef62d3 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -741,6 +741,7 @@ static void i915_welcome_messages(struct drm_i915_private *dev_priv)
static const struct intel_display_parent_interface parent = {
.rpm = &i915_display_rpm_interface,
+ .irq = &i915_display_irq_interface,
};
const struct intel_display_parent_interface *i915_driver_parent_interface(void)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 1898be4ddc8b..3fe978d4ea53 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -33,6 +33,7 @@
#include <drm/drm_drv.h>
#include <drm/drm_print.h>
+#include <drm/intel/display_parent_interface.h>
#include "display/intel_display_irq.h"
#include "display/intel_hotplug.h"
@@ -1252,3 +1253,18 @@ void intel_synchronize_hardirq(struct drm_i915_private *i915)
{
synchronize_hardirq(to_pci_dev(i915->drm.dev)->irq);
}
+
+static bool _intel_irq_enabled(struct drm_device *drm)
+{
+ return intel_irqs_enabled(to_i915(drm));
+}
+
+static void _intel_irq_synchronize(struct drm_device *drm)
+{
+ return intel_synchronize_irq(to_i915(drm));
+}
+
+const struct intel_display_irq_interface i915_display_irq_interface = {
+ .enabled = _intel_irq_enabled,
+ .synchronize = _intel_irq_synchronize,
+};
diff --git a/drivers/gpu/drm/i915/i915_irq.h b/drivers/gpu/drm/i915/i915_irq.h
index 58789b264575..5c87d6d41c74 100644
--- a/drivers/gpu/drm/i915/i915_irq.h
+++ b/drivers/gpu/drm/i915/i915_irq.h
@@ -51,4 +51,6 @@ void gen2_error_reset(struct intel_uncore *uncore, struct i915_error_regs regs);
void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
u32 emr_val);
+extern const struct intel_display_irq_interface i915_display_irq_interface;
+
#endif /* __I915_IRQ_H__ */
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 7b4ca591a4ae..3bf64fdcf93a 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -189,7 +189,6 @@ endif
# i915 Display compat #defines and #includes
subdir-ccflags-$(CONFIG_DRM_XE_DISPLAY) += \
- -I$(src)/display/ext \
-I$(src)/compat-i915-headers \
-I$(srctree)/drivers/gpu/drm/i915/display/ \
-Ddrm_i915_private=xe_device
@@ -206,7 +205,6 @@ $(obj)/i915-display/%.o: $(srctree)/drivers/gpu/drm/i915/display/%.c FORCE
# Display code specific to xe
xe-$(CONFIG_DRM_XE_DISPLAY) += \
- display/ext/i915_irq.o \
display/intel_bo.o \
display/intel_fb_bo.o \
display/intel_fbdev_fb.o \
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
deleted file mode 100644
index 61707a07f91f..000000000000
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#include "../../i915/i915_irq.h"
diff --git a/drivers/gpu/drm/xe/display/ext/i915_irq.c b/drivers/gpu/drm/xe/display/ext/i915_irq.c
deleted file mode 100644
index 1011c1c754d0..000000000000
--- a/drivers/gpu/drm/xe/display/ext/i915_irq.c
+++ /dev/null
@@ -1,18 +0,0 @@
-// SPDX-License-Identifier: MIT
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#include "i915_irq.h"
-#include "i915_reg.h"
-#include "intel_uncore.h"
-
-bool intel_irqs_enabled(struct xe_device *xe)
-{
- return atomic_read(&xe->irq.enabled);
-}
-
-void intel_synchronize_irq(struct xe_device *xe)
-{
- synchronize_irq(to_pci_dev(xe->drm.dev)->irq);
-}
diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
index 8b0afa270216..e3320d9e6314 100644
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@ -516,8 +516,26 @@ static void display_device_remove(struct drm_device *dev, void *arg)
intel_display_device_remove(display);
}
+static bool irq_enabled(struct drm_device *drm)
+{
+ struct xe_device *xe = to_xe_device(drm);
+
+ return atomic_read(&xe->irq.enabled);
+}
+
+static void irq_synchronize(struct drm_device *drm)
+{
+ synchronize_irq(to_pci_dev(drm->dev)->irq);
+}
+
+static const struct intel_display_irq_interface xe_display_irq_interface = {
+ .enabled = irq_enabled,
+ .synchronize = irq_synchronize,
+};
+
static const struct intel_display_parent_interface parent = {
.rpm = &xe_display_rpm_interface,
+ .irq = &xe_display_irq_interface,
};
/**
diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
index 26bedc360044..3a008a18eb65 100644
--- a/include/drm/intel/display_parent_interface.h
+++ b/include/drm/intel/display_parent_interface.h
@@ -25,6 +25,11 @@ struct intel_display_rpm_interface {
void (*assert_unblock)(const struct drm_device *drm);
};
+struct intel_display_irq_interface {
+ bool (*enabled)(struct drm_device *drm);
+ void (*synchronize)(struct drm_device *drm);
+};
+
/**
* struct intel_display_parent_interface - services parent driver provides to display
*
@@ -40,6 +45,9 @@ struct intel_display_rpm_interface {
struct intel_display_parent_interface {
/** @rpm: Runtime PM functions */
const struct intel_display_rpm_interface *rpm;
+
+ /** @irq: IRQ interface */
+ const struct intel_display_irq_interface *irq;
};
#endif
--
2.47.3
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH v2 3/3] drm/{i915,xe}/display: move irq calls to parent interface
2025-11-11 7:34 ` [PATCH v2 3/3] drm/{i915, xe}/display: move irq calls to parent interface Jani Nikula
@ 2025-11-11 15:50 ` Ville Syrjälä
2025-11-12 9:50 ` Jani Nikula
2025-11-12 14:18 ` [PATCH v3] " Jani Nikula
1 sibling, 1 reply; 18+ messages in thread
From: Ville Syrjälä @ 2025-11-11 15:50 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe
On Tue, Nov 11, 2025 at 09:34:04AM +0200, Jani Nikula wrote:
> Add an irq parent driver interface for the .enabled and .synchronize
> calls. This lets us drop the dependency on i915_drv.h and i915_irq.h in
> multiple places, and subsequently remove the compat i915_irq.h and
> i915_irq.c files along with the display/ext directory from xe
> altogether.
>
> Use intel_irqs_enabled() and intel_synchronize_irq() static wrappers for
> parent interface calls in intel_display_irq.c while chasing the function
> pointers everywhere else. It's still a bit uncertain if we should
> universally have wrappers for the parent interface calls or not.
Why would we want those ugly pointer chains anywhere (except perhaps
for single use cases)?
>
> v2: Keep static wrappers in intel_display_irq.c (Ville)
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> .../gpu/drm/i915/display/intel_display_irq.c | 47 +++++++++----------
> .../drm/i915/display/intel_display_power.c | 5 +-
> .../i915/display/intel_display_power_well.c | 15 ++----
> drivers/gpu/drm/i915/display/intel_gmbus.c | 9 ++--
> drivers/gpu/drm/i915/display/intel_hotplug.c | 6 +--
> .../gpu/drm/i915/display/intel_lpe_audio.c | 1 -
> drivers/gpu/drm/i915/display/intel_pipe_crc.c | 6 +--
> drivers/gpu/drm/i915/i915_driver.c | 1 +
> drivers/gpu/drm/i915/i915_irq.c | 16 +++++++
> drivers/gpu/drm/i915/i915_irq.h | 2 +
> drivers/gpu/drm/xe/Makefile | 2 -
> .../gpu/drm/xe/compat-i915-headers/i915_irq.h | 6 ---
> drivers/gpu/drm/xe/display/ext/i915_irq.c | 18 -------
> drivers/gpu/drm/xe/display/xe_display.c | 18 +++++++
> include/drm/intel/display_parent_interface.h | 8 ++++
> 15 files changed, 81 insertions(+), 79 deletions(-)
> delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
> delete mode 100644 drivers/gpu/drm/xe/display/ext/i915_irq.c
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index 2a92ca6c2f82..c6b1683a367b 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -5,9 +5,8 @@
>
> #include <drm/drm_print.h>
> #include <drm/drm_vblank.h>
> +#include <drm/intel/display_parent_interface.h>
>
> -#include "i915_drv.h"
> -#include "i915_irq.h"
> #include "i915_reg.h"
> #include "icl_dsi_regs.h"
> #include "intel_crtc.h"
> @@ -31,6 +30,16 @@
> #include "intel_psr.h"
> #include "intel_psr_regs.h"
>
> +static bool intel_irqs_enabled(struct intel_display *display)
> +{
> + return display->parent->irq->enabled(display->drm);
> +}
> +
> +static void intel_synchronize_irq(struct intel_display *display)
> +{
> + display->parent->irq->synchronize(display->drm);
> +}
> +
> static void irq_reset(struct intel_display *display, struct i915_irq_regs regs)
> {
> intel_de_write(display, regs.imr, 0xffffffff);
> @@ -160,7 +169,6 @@ intel_handle_vblank(struct intel_display *display, enum pipe pipe)
> void ilk_update_display_irq(struct intel_display *display,
> u32 interrupt_mask, u32 enabled_irq_mask)
> {
> - struct drm_i915_private *dev_priv = to_i915(display->drm);
> u32 new_val;
>
> lockdep_assert_held(&display->irq.lock);
> @@ -171,7 +179,7 @@ void ilk_update_display_irq(struct intel_display *display,
> new_val |= (~enabled_irq_mask & interrupt_mask);
>
> if (new_val != display->irq.ilk_de_imr_mask &&
> - !drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv))) {
> + !drm_WARN_ON(display->drm, !intel_irqs_enabled(display))) {
> display->irq.ilk_de_imr_mask = new_val;
> intel_de_write(display, DEIMR, display->irq.ilk_de_imr_mask);
> intel_de_posting_read(display, DEIMR);
> @@ -197,7 +205,6 @@ void ilk_disable_display_irq(struct intel_display *display, u32 bits)
> void bdw_update_port_irq(struct intel_display *display,
> u32 interrupt_mask, u32 enabled_irq_mask)
> {
> - struct drm_i915_private *dev_priv = to_i915(display->drm);
> u32 new_val;
> u32 old_val;
>
> @@ -205,7 +212,7 @@ void bdw_update_port_irq(struct intel_display *display,
>
> drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
>
> - if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
> + if (drm_WARN_ON(display->drm, !intel_irqs_enabled(display)))
> return;
>
> old_val = intel_de_read(display, GEN8_DE_PORT_IMR);
> @@ -231,14 +238,13 @@ static void bdw_update_pipe_irq(struct intel_display *display,
> enum pipe pipe, u32 interrupt_mask,
> u32 enabled_irq_mask)
> {
> - struct drm_i915_private *dev_priv = to_i915(display->drm);
> u32 new_val;
>
> lockdep_assert_held(&display->irq.lock);
>
> drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
>
> - if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
> + if (drm_WARN_ON(display->drm, !intel_irqs_enabled(display)))
> return;
>
> new_val = display->irq.de_pipe_imr_mask[pipe];
> @@ -274,7 +280,6 @@ void ibx_display_interrupt_update(struct intel_display *display,
> u32 interrupt_mask,
> u32 enabled_irq_mask)
> {
> - struct drm_i915_private *dev_priv = to_i915(display->drm);
> u32 sdeimr = intel_de_read(display, SDEIMR);
>
> sdeimr &= ~interrupt_mask;
> @@ -284,7 +289,7 @@ void ibx_display_interrupt_update(struct intel_display *display,
>
> lockdep_assert_held(&display->irq.lock);
>
> - if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
> + if (drm_WARN_ON(display->drm, !intel_irqs_enabled(display)))
> return;
>
> intel_de_write(display, SDEIMR, sdeimr);
> @@ -348,7 +353,6 @@ u32 i915_pipestat_enable_mask(struct intel_display *display,
> void i915_enable_pipestat(struct intel_display *display,
> enum pipe pipe, u32 status_mask)
> {
> - struct drm_i915_private *dev_priv = to_i915(display->drm);
> i915_reg_t reg = PIPESTAT(display, pipe);
> u32 enable_mask;
>
> @@ -357,7 +361,7 @@ void i915_enable_pipestat(struct intel_display *display,
> pipe_name(pipe), status_mask);
>
> lockdep_assert_held(&display->irq.lock);
> - drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv));
> + drm_WARN_ON(display->drm, !intel_irqs_enabled(display));
>
> if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == status_mask)
> return;
> @@ -372,7 +376,6 @@ void i915_enable_pipestat(struct intel_display *display,
> void i915_disable_pipestat(struct intel_display *display,
> enum pipe pipe, u32 status_mask)
> {
> - struct drm_i915_private *dev_priv = to_i915(display->drm);
> i915_reg_t reg = PIPESTAT(display, pipe);
> u32 enable_mask;
>
> @@ -381,7 +384,7 @@ void i915_disable_pipestat(struct intel_display *display,
> pipe_name(pipe), status_mask);
>
> lockdep_assert_held(&display->irq.lock);
> - drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv));
> + drm_WARN_ON(display->drm, !intel_irqs_enabled(display));
>
> if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == 0)
> return;
> @@ -2174,14 +2177,13 @@ void gen11_display_irq_reset(struct intel_display *display)
> void gen8_irq_power_well_post_enable(struct intel_display *display,
> u8 pipe_mask)
> {
> - struct drm_i915_private *dev_priv = to_i915(display->drm);
> u32 extra_ier = GEN8_PIPE_VBLANK | GEN8_PIPE_FIFO_UNDERRUN |
> gen8_de_pipe_flip_done_mask(display);
> enum pipe pipe;
>
> spin_lock_irq(&display->irq.lock);
>
> - if (!intel_irqs_enabled(dev_priv)) {
> + if (!intel_irqs_enabled(display)) {
> spin_unlock_irq(&display->irq.lock);
> return;
> }
> @@ -2197,12 +2199,11 @@ void gen8_irq_power_well_post_enable(struct intel_display *display,
> void gen8_irq_power_well_pre_disable(struct intel_display *display,
> u8 pipe_mask)
> {
> - struct drm_i915_private *dev_priv = to_i915(display->drm);
> enum pipe pipe;
>
> spin_lock_irq(&display->irq.lock);
>
> - if (!intel_irqs_enabled(dev_priv)) {
> + if (!intel_irqs_enabled(display)) {
> spin_unlock_irq(&display->irq.lock);
> return;
> }
> @@ -2213,7 +2214,7 @@ void gen8_irq_power_well_pre_disable(struct intel_display *display,
> spin_unlock_irq(&display->irq.lock);
>
> /* make sure we're done processing display irqs */
> - intel_synchronize_irq(dev_priv);
> + intel_synchronize_irq(display);
> }
>
> /*
> @@ -2246,8 +2247,6 @@ static void ibx_irq_postinstall(struct intel_display *display)
>
> void valleyview_enable_display_irqs(struct intel_display *display)
> {
> - struct drm_i915_private *dev_priv = to_i915(display->drm);
> -
> spin_lock_irq(&display->irq.lock);
>
> if (display->irq.vlv_display_irqs_enabled)
> @@ -2255,7 +2254,7 @@ void valleyview_enable_display_irqs(struct intel_display *display)
>
> display->irq.vlv_display_irqs_enabled = true;
>
> - if (intel_irqs_enabled(dev_priv)) {
> + if (intel_irqs_enabled(display)) {
> _vlv_display_irq_reset(display);
> _vlv_display_irq_postinstall(display);
> }
> @@ -2266,8 +2265,6 @@ void valleyview_enable_display_irqs(struct intel_display *display)
>
> void valleyview_disable_display_irqs(struct intel_display *display)
> {
> - struct drm_i915_private *dev_priv = to_i915(display->drm);
> -
> spin_lock_irq(&display->irq.lock);
>
> if (!display->irq.vlv_display_irqs_enabled)
> @@ -2275,7 +2272,7 @@ void valleyview_disable_display_irqs(struct intel_display *display)
>
> display->irq.vlv_display_irqs_enabled = false;
>
> - if (intel_irqs_enabled(dev_priv))
> + if (intel_irqs_enabled(display))
> _vlv_display_irq_reset(display);
> out:
> spin_unlock_irq(&display->irq.lock);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 74fcd9cfe911..7c857291ad4c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -7,11 +7,11 @@
> #include <linux/string_helpers.h>
>
> #include <drm/drm_print.h>
> +#include <drm/intel/display_parent_interface.h>
>
> #include "soc/intel_dram.h"
>
> #include "i915_drv.h"
> -#include "i915_irq.h"
> #include "i915_reg.h"
> #include "intel_backlight_regs.h"
> #include "intel_cdclk.h"
> @@ -1202,7 +1202,6 @@ static void hsw_assert_cdclk(struct intel_display *display)
>
> static void assert_can_disable_lcpll(struct intel_display *display)
> {
> - struct drm_i915_private *dev_priv = to_i915(display->drm);
> struct intel_crtc *crtc;
>
> for_each_intel_crtc(display->drm, crtc)
> @@ -1247,7 +1246,7 @@ static void assert_can_disable_lcpll(struct intel_display *display)
> * gen-specific and since we only disable LCPLL after we fully disable
> * the interrupts, the check below should be enough.
> */
> - INTEL_DISPLAY_STATE_WARN(display, intel_irqs_enabled(dev_priv),
> + INTEL_DISPLAY_STATE_WARN(display, display->parent->irq->enabled(display->drm),
> "IRQs enabled\n");
> }
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> index eab7019f2252..5ae064bc536a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> @@ -6,9 +6,8 @@
> #include <linux/iopoll.h>
>
> #include <drm/drm_print.h>
> +#include <drm/intel/display_parent_interface.h>
>
> -#include "i915_drv.h"
> -#include "i915_irq.h"
> #include "i915_reg.h"
> #include "intel_backlight_regs.h"
> #include "intel_combo_phy.h"
> @@ -628,8 +627,6 @@ static bool hsw_power_well_enabled(struct intel_display *display,
>
> static void assert_can_enable_dc9(struct intel_display *display)
> {
> - struct drm_i915_private *dev_priv = to_i915(display->drm);
> -
> drm_WARN_ONCE(display->drm,
> (intel_de_read(display, DC_STATE_EN) & DC_STATE_EN_DC9),
> "DC9 already programmed to be enabled.\n");
> @@ -641,7 +638,7 @@ static void assert_can_enable_dc9(struct intel_display *display)
> intel_de_read(display, HSW_PWR_WELL_CTL2) &
> HSW_PWR_WELL_CTL_REQ(SKL_PW_CTL_IDX_PW_2),
> "Power well 2 on.\n");
> - drm_WARN_ONCE(display->drm, intel_irqs_enabled(dev_priv),
> + drm_WARN_ONCE(display->drm, display->parent->irq->enabled(display->drm),
> "Interrupts not disabled yet.\n");
>
> /*
> @@ -655,9 +652,7 @@ static void assert_can_enable_dc9(struct intel_display *display)
>
> static void assert_can_disable_dc9(struct intel_display *display)
> {
> - struct drm_i915_private *dev_priv = to_i915(display->drm);
> -
> - drm_WARN_ONCE(display->drm, intel_irqs_enabled(dev_priv),
> + drm_WARN_ONCE(display->drm, display->parent->irq->enabled(display->drm),
> "Interrupts not disabled yet.\n");
> drm_WARN_ONCE(display->drm,
> intel_de_read(display, DC_STATE_EN) &
> @@ -1281,12 +1276,10 @@ static void vlv_display_power_well_init(struct intel_display *display)
>
> static void vlv_display_power_well_deinit(struct intel_display *display)
> {
> - struct drm_i915_private *dev_priv = to_i915(display->drm);
> -
> valleyview_disable_display_irqs(display);
>
> /* make sure we're done processing display irqs */
> - intel_synchronize_irq(dev_priv);
> + display->parent->irq->synchronize(display->drm);
>
> vlv_pps_reset_all(display);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
> index 82f3a40ecac7..98834cf622d2 100644
> --- a/drivers/gpu/drm/i915/display/intel_gmbus.c
> +++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
> @@ -32,11 +32,11 @@
> #include <linux/i2c.h>
> #include <linux/iopoll.h>
>
> -#include <drm/drm_print.h>
> #include <drm/display/drm_hdcp_helper.h>
> +#include <drm/drm_print.h>
> +#include <drm/drm_print.h>
> +#include <drm/intel/display_parent_interface.h>
>
> -#include "i915_drv.h"
> -#include "i915_irq.h"
> #include "i915_reg.h"
> #include "intel_de.h"
> #include "intel_display_regs.h"
> @@ -391,12 +391,11 @@ intel_gpio_setup(struct intel_gmbus *bus, i915_reg_t gpio_reg)
>
> static bool has_gmbus_irq(struct intel_display *display)
> {
> - struct drm_i915_private *i915 = to_i915(display->drm);
> /*
> * encoder->shutdown() may want to use GMBUS
> * after irqs have already been disabled.
> */
> - return HAS_GMBUS_IRQ(display) && intel_irqs_enabled(i915);
> + return HAS_GMBUS_IRQ(display) && display->parent->irq->enabled(display->drm);
> }
>
> static int gmbus_wait(struct intel_display *display, u32 status, u32 irq_en)
> diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
> index 235706229ffb..a4254d4e9a4a 100644
> --- a/drivers/gpu/drm/i915/display/intel_hotplug.c
> +++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
> @@ -26,9 +26,8 @@
>
> #include <drm/drm_print.h>
> #include <drm/drm_probe_helper.h>
> +#include <drm/intel/display_parent_interface.h>
>
> -#include "i915_drv.h"
> -#include "i915_irq.h"
> #include "intel_connector.h"
> #include "intel_display_core.h"
> #include "intel_display_power.h"
> @@ -1177,13 +1176,12 @@ bool intel_hpd_schedule_detection(struct intel_display *display)
> static int i915_hpd_storm_ctl_show(struct seq_file *m, void *data)
> {
> struct intel_display *display = m->private;
> - struct drm_i915_private *dev_priv = to_i915(display->drm);
> struct intel_hotplug *hotplug = &display->hotplug;
>
> /* Synchronize with everything first in case there's been an HPD
> * storm, but we haven't finished handling it in the kernel yet
> */
> - intel_synchronize_irq(dev_priv);
> + display->parent->irq->synchronize(display->drm);
> flush_work(&display->hotplug.dig_port_work);
> flush_delayed_work(&display->hotplug.hotplug_work);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_lpe_audio.c b/drivers/gpu/drm/i915/display/intel_lpe_audio.c
> index 42284e9928f2..5b41abe1c64d 100644
> --- a/drivers/gpu/drm/i915/display/intel_lpe_audio.c
> +++ b/drivers/gpu/drm/i915/display/intel_lpe_audio.c
> @@ -71,7 +71,6 @@
> #include <drm/drm_print.h>
> #include <drm/intel/intel_lpe_audio.h>
>
> -#include "i915_irq.h"
> #include "intel_audio_regs.h"
> #include "intel_de.h"
> #include "intel_lpe_audio.h"
> diff --git a/drivers/gpu/drm/i915/display/intel_pipe_crc.c b/drivers/gpu/drm/i915/display/intel_pipe_crc.c
> index 1f27643412f1..b782f894cce8 100644
> --- a/drivers/gpu/drm/i915/display/intel_pipe_crc.c
> +++ b/drivers/gpu/drm/i915/display/intel_pipe_crc.c
> @@ -29,9 +29,8 @@
> #include <linux/seq_file.h>
>
> #include <drm/drm_print.h>
> +#include <drm/intel/display_parent_interface.h>
>
> -#include "i915_drv.h"
> -#include "i915_irq.h"
> #include "intel_atomic.h"
> #include "intel_de.h"
> #include "intel_display_irq.h"
> @@ -658,7 +657,6 @@ void intel_crtc_enable_pipe_crc(struct intel_crtc *crtc)
> void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc)
> {
> struct intel_display *display = to_intel_display(crtc);
> - struct drm_i915_private *dev_priv = to_i915(display->drm);
> struct intel_pipe_crc *pipe_crc = &crtc->pipe_crc;
> enum pipe pipe = crtc->pipe;
>
> @@ -669,5 +667,5 @@ void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc)
>
> intel_de_write(display, PIPE_CRC_CTL(display, pipe), 0);
> intel_de_posting_read(display, PIPE_CRC_CTL(display, pipe));
> - intel_synchronize_irq(dev_priv);
> + display->parent->irq->synchronize(display->drm);
> }
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index c97b76771917..07715aef62d3 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -741,6 +741,7 @@ static void i915_welcome_messages(struct drm_i915_private *dev_priv)
>
> static const struct intel_display_parent_interface parent = {
> .rpm = &i915_display_rpm_interface,
> + .irq = &i915_display_irq_interface,
> };
>
> const struct intel_display_parent_interface *i915_driver_parent_interface(void)
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 1898be4ddc8b..3fe978d4ea53 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -33,6 +33,7 @@
>
> #include <drm/drm_drv.h>
> #include <drm/drm_print.h>
> +#include <drm/intel/display_parent_interface.h>
>
> #include "display/intel_display_irq.h"
> #include "display/intel_hotplug.h"
> @@ -1252,3 +1253,18 @@ void intel_synchronize_hardirq(struct drm_i915_private *i915)
> {
> synchronize_hardirq(to_pci_dev(i915->drm.dev)->irq);
> }
> +
> +static bool _intel_irq_enabled(struct drm_device *drm)
> +{
> + return intel_irqs_enabled(to_i915(drm));
> +}
> +
> +static void _intel_irq_synchronize(struct drm_device *drm)
> +{
> + return intel_synchronize_irq(to_i915(drm));
> +}
> +
> +const struct intel_display_irq_interface i915_display_irq_interface = {
> + .enabled = _intel_irq_enabled,
> + .synchronize = _intel_irq_synchronize,
> +};
> diff --git a/drivers/gpu/drm/i915/i915_irq.h b/drivers/gpu/drm/i915/i915_irq.h
> index 58789b264575..5c87d6d41c74 100644
> --- a/drivers/gpu/drm/i915/i915_irq.h
> +++ b/drivers/gpu/drm/i915/i915_irq.h
> @@ -51,4 +51,6 @@ void gen2_error_reset(struct intel_uncore *uncore, struct i915_error_regs regs);
> void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
> u32 emr_val);
>
> +extern const struct intel_display_irq_interface i915_display_irq_interface;
> +
> #endif /* __I915_IRQ_H__ */
> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> index 7b4ca591a4ae..3bf64fdcf93a 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -189,7 +189,6 @@ endif
>
> # i915 Display compat #defines and #includes
> subdir-ccflags-$(CONFIG_DRM_XE_DISPLAY) += \
> - -I$(src)/display/ext \
> -I$(src)/compat-i915-headers \
> -I$(srctree)/drivers/gpu/drm/i915/display/ \
> -Ddrm_i915_private=xe_device
> @@ -206,7 +205,6 @@ $(obj)/i915-display/%.o: $(srctree)/drivers/gpu/drm/i915/display/%.c FORCE
>
> # Display code specific to xe
> xe-$(CONFIG_DRM_XE_DISPLAY) += \
> - display/ext/i915_irq.o \
> display/intel_bo.o \
> display/intel_fb_bo.o \
> display/intel_fbdev_fb.o \
> diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
> deleted file mode 100644
> index 61707a07f91f..000000000000
> --- a/drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
> +++ /dev/null
> @@ -1,6 +0,0 @@
> -/* SPDX-License-Identifier: MIT */
> -/*
> - * Copyright © 2023 Intel Corporation
> - */
> -
> -#include "../../i915/i915_irq.h"
> diff --git a/drivers/gpu/drm/xe/display/ext/i915_irq.c b/drivers/gpu/drm/xe/display/ext/i915_irq.c
> deleted file mode 100644
> index 1011c1c754d0..000000000000
> --- a/drivers/gpu/drm/xe/display/ext/i915_irq.c
> +++ /dev/null
> @@ -1,18 +0,0 @@
> -// SPDX-License-Identifier: MIT
> -/*
> - * Copyright © 2023 Intel Corporation
> - */
> -
> -#include "i915_irq.h"
> -#include "i915_reg.h"
> -#include "intel_uncore.h"
> -
> -bool intel_irqs_enabled(struct xe_device *xe)
> -{
> - return atomic_read(&xe->irq.enabled);
> -}
> -
> -void intel_synchronize_irq(struct xe_device *xe)
> -{
> - synchronize_irq(to_pci_dev(xe->drm.dev)->irq);
> -}
> diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
> index 8b0afa270216..e3320d9e6314 100644
> --- a/drivers/gpu/drm/xe/display/xe_display.c
> +++ b/drivers/gpu/drm/xe/display/xe_display.c
> @@ -516,8 +516,26 @@ static void display_device_remove(struct drm_device *dev, void *arg)
> intel_display_device_remove(display);
> }
>
> +static bool irq_enabled(struct drm_device *drm)
> +{
> + struct xe_device *xe = to_xe_device(drm);
> +
> + return atomic_read(&xe->irq.enabled);
> +}
> +
> +static void irq_synchronize(struct drm_device *drm)
> +{
> + synchronize_irq(to_pci_dev(drm->dev)->irq);
> +}
> +
> +static const struct intel_display_irq_interface xe_display_irq_interface = {
> + .enabled = irq_enabled,
> + .synchronize = irq_synchronize,
> +};
> +
> static const struct intel_display_parent_interface parent = {
> .rpm = &xe_display_rpm_interface,
> + .irq = &xe_display_irq_interface,
> };
>
> /**
> diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
> index 26bedc360044..3a008a18eb65 100644
> --- a/include/drm/intel/display_parent_interface.h
> +++ b/include/drm/intel/display_parent_interface.h
> @@ -25,6 +25,11 @@ struct intel_display_rpm_interface {
> void (*assert_unblock)(const struct drm_device *drm);
> };
>
> +struct intel_display_irq_interface {
> + bool (*enabled)(struct drm_device *drm);
> + void (*synchronize)(struct drm_device *drm);
> +};
> +
> /**
> * struct intel_display_parent_interface - services parent driver provides to display
> *
> @@ -40,6 +45,9 @@ struct intel_display_rpm_interface {
> struct intel_display_parent_interface {
> /** @rpm: Runtime PM functions */
> const struct intel_display_rpm_interface *rpm;
> +
> + /** @irq: IRQ interface */
> + const struct intel_display_irq_interface *irq;
> };
>
> #endif
> --
> 2.47.3
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH v2 3/3] drm/{i915,xe}/display: move irq calls to parent interface
2025-11-11 15:50 ` [PATCH v2 3/3] drm/{i915,xe}/display: " Ville Syrjälä
@ 2025-11-12 9:50 ` Jani Nikula
2025-11-12 14:19 ` Jani Nikula
0 siblings, 1 reply; 18+ messages in thread
From: Jani Nikula @ 2025-11-12 9:50 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx, intel-xe
On Tue, 11 Nov 2025, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Tue, Nov 11, 2025 at 09:34:04AM +0200, Jani Nikula wrote:
>> Add an irq parent driver interface for the .enabled and .synchronize
>> calls. This lets us drop the dependency on i915_drv.h and i915_irq.h in
>> multiple places, and subsequently remove the compat i915_irq.h and
>> i915_irq.c files along with the display/ext directory from xe
>> altogether.
>>
>> Use intel_irqs_enabled() and intel_synchronize_irq() static wrappers for
>> parent interface calls in intel_display_irq.c while chasing the function
>> pointers everywhere else. It's still a bit uncertain if we should
>> universally have wrappers for the parent interface calls or not.
>
> Why would we want those ugly pointer chains anywhere (except perhaps
> for single use cases)?
I guess my main point is, I'm not yet sure how those wrappers should be
organized, and I'm simply postponing the decision. But let's discuss.
I'm leaning towards putting them in files that are separate from the
implementation, i.e. intel_irqs_enabled() and intel_synchronize_irq()
would *not* be in intel_display_irq.[ch] but rather in
something_parent_something.[ch]. Because it's not so much about the
functionality, it's all about calling the parent interface.
Maybe just one file grouping *all* parent interface access, similar to
how include/drm/intel/display_parent_interface.h defines the interface.
And then should the naming indicate it's calling the parent? I think
there's value in knowing where the call ends up when reading the
code. But then do the function names end up being unweildy?
If you simply translate display->parent->irq->enabled to a function
name, it would be display_parent_irq_enabled(). Or perhaps
intel_parent_irq_enabled(). And you'd have the naming scheme right
there, always 1:1 without further thinking.
intel_display_rpm.[ch] has it all in a dedicated file now. But there's
really nothing runtime pm specific there anymore, it's just mechanical
calling of the interface and relaying parameters and return values.
I think we have too much "intel_display_something_something.[ch]" so
maybe intel_parent.[ch] and intel_parent_<SUBSTRUCT>_<FUNCTION>()?
BR,
Jani.
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH v2 3/3] drm/{i915,xe}/display: move irq calls to parent interface
2025-11-12 9:50 ` Jani Nikula
@ 2025-11-12 14:19 ` Jani Nikula
0 siblings, 0 replies; 18+ messages in thread
From: Jani Nikula @ 2025-11-12 14:19 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx, intel-xe
On Wed, 12 Nov 2025, Jani Nikula <jani.nikula@intel.com> wrote:
> On Tue, 11 Nov 2025, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
>> On Tue, Nov 11, 2025 at 09:34:04AM +0200, Jani Nikula wrote:
>>> Add an irq parent driver interface for the .enabled and .synchronize
>>> calls. This lets us drop the dependency on i915_drv.h and i915_irq.h in
>>> multiple places, and subsequently remove the compat i915_irq.h and
>>> i915_irq.c files along with the display/ext directory from xe
>>> altogether.
>>>
>>> Use intel_irqs_enabled() and intel_synchronize_irq() static wrappers for
>>> parent interface calls in intel_display_irq.c while chasing the function
>>> pointers everywhere else. It's still a bit uncertain if we should
>>> universally have wrappers for the parent interface calls or not.
>>
>> Why would we want those ugly pointer chains anywhere (except perhaps
>> for single use cases)?
>
> I guess my main point is, I'm not yet sure how those wrappers should be
> organized, and I'm simply postponing the decision. But let's discuss.
>
> I'm leaning towards putting them in files that are separate from the
> implementation, i.e. intel_irqs_enabled() and intel_synchronize_irq()
> would *not* be in intel_display_irq.[ch] but rather in
> something_parent_something.[ch]. Because it's not so much about the
> functionality, it's all about calling the parent interface.
>
> Maybe just one file grouping *all* parent interface access, similar to
> how include/drm/intel/display_parent_interface.h defines the interface.
>
> And then should the naming indicate it's calling the parent? I think
> there's value in knowing where the call ends up when reading the
> code. But then do the function names end up being unweildy?
>
> If you simply translate display->parent->irq->enabled to a function
> name, it would be display_parent_irq_enabled(). Or perhaps
> intel_parent_irq_enabled(). And you'd have the naming scheme right
> there, always 1:1 without further thinking.
>
> intel_display_rpm.[ch] has it all in a dedicated file now. But there's
> really nothing runtime pm specific there anymore, it's just mechanical
> calling of the interface and relaying parameters and return values.
>
> I think we have too much "intel_display_something_something.[ch]" so
> maybe intel_parent.[ch] and intel_parent_<SUBSTRUCT>_<FUNCTION>()?
Typed it up, I like it, sent as v3.
BR,
Jani.
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v3] drm/{i915,xe}/display: move irq calls to parent interface
2025-11-11 7:34 ` [PATCH v2 3/3] drm/{i915, xe}/display: move irq calls to parent interface Jani Nikula
2025-11-11 15:50 ` [PATCH v2 3/3] drm/{i915,xe}/display: " Ville Syrjälä
@ 2025-11-12 14:18 ` Jani Nikula
1 sibling, 0 replies; 18+ messages in thread
From: Jani Nikula @ 2025-11-12 14:18 UTC (permalink / raw)
To: Jani Nikula, intel-gfx, intel-xe; +Cc: ville.syrjala
Add an irq parent driver interface for the .enabled and .synchronize
calls. This lets us drop the dependency on i915_drv.h and i915_irq.h in
multiple places, and subsequently remove the compat i915_irq.h and
i915_irq.c files along with the display/ext directory from xe
altogether.
Introduce new intel_parent.[ch] as the wrapper layer to chase the
function pointers and convert between generic and more specific display
types.
v2: Keep static wrappers in intel_display_irq.c (Ville)
v3: Full blown wrappers in intel_parent.[ch] (Ville)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/Makefile | 1 +
.../gpu/drm/i915/display/intel_display_irq.c | 37 ++++++-------------
.../drm/i915/display/intel_display_power.c | 5 +--
.../i915/display/intel_display_power_well.c | 15 ++------
drivers/gpu/drm/i915/display/intel_gmbus.c | 6 +--
drivers/gpu/drm/i915/display/intel_hotplug.c | 6 +--
.../gpu/drm/i915/display/intel_lpe_audio.c | 1 -
drivers/gpu/drm/i915/display/intel_parent.c | 33 +++++++++++++++++
drivers/gpu/drm/i915/display/intel_parent.h | 14 +++++++
drivers/gpu/drm/i915/display/intel_pipe_crc.c | 6 +--
drivers/gpu/drm/i915/i915_driver.c | 1 +
drivers/gpu/drm/i915/i915_irq.c | 16 ++++++++
drivers/gpu/drm/i915/i915_irq.h | 2 +
drivers/gpu/drm/xe/Makefile | 5 +--
| 6 ---
drivers/gpu/drm/xe/display/ext/i915_irq.c | 18 ---------
drivers/gpu/drm/xe/display/xe_display.c | 18 +++++++++
include/drm/intel/display_parent_interface.h | 8 ++++
18 files changed, 119 insertions(+), 79 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_parent.c
create mode 100644 drivers/gpu/drm/i915/display/intel_parent.h
delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
delete mode 100644 drivers/gpu/drm/xe/display/ext/i915_irq.c
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 7c89e5e0a277..9a4f89c9a1cd 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -292,6 +292,7 @@ i915-y += \
display/intel_modeset_verify.o \
display/intel_overlay.o \
display/intel_panic.o \
+ display/intel_parent.o \
display/intel_pch.o \
display/intel_pch_display.o \
display/intel_pch_refclk.o \
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 2a92ca6c2f82..d2933ac3acb4 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -6,8 +6,6 @@
#include <drm/drm_print.h>
#include <drm/drm_vblank.h>
-#include "i915_drv.h"
-#include "i915_irq.h"
#include "i915_reg.h"
#include "icl_dsi_regs.h"
#include "intel_crtc.h"
@@ -25,6 +23,7 @@
#include "intel_fifo_underrun.h"
#include "intel_gmbus.h"
#include "intel_hotplug_irq.h"
+#include "intel_parent.h"
#include "intel_pipe_crc_regs.h"
#include "intel_plane.h"
#include "intel_pmdemand.h"
@@ -160,7 +159,6 @@ intel_handle_vblank(struct intel_display *display, enum pipe pipe)
void ilk_update_display_irq(struct intel_display *display,
u32 interrupt_mask, u32 enabled_irq_mask)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
u32 new_val;
lockdep_assert_held(&display->irq.lock);
@@ -171,7 +169,7 @@ void ilk_update_display_irq(struct intel_display *display,
new_val |= (~enabled_irq_mask & interrupt_mask);
if (new_val != display->irq.ilk_de_imr_mask &&
- !drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv))) {
+ !drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display))) {
display->irq.ilk_de_imr_mask = new_val;
intel_de_write(display, DEIMR, display->irq.ilk_de_imr_mask);
intel_de_posting_read(display, DEIMR);
@@ -197,7 +195,6 @@ void ilk_disable_display_irq(struct intel_display *display, u32 bits)
void bdw_update_port_irq(struct intel_display *display,
u32 interrupt_mask, u32 enabled_irq_mask)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
u32 new_val;
u32 old_val;
@@ -205,7 +202,7 @@ void bdw_update_port_irq(struct intel_display *display,
drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
- if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
+ if (drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display)))
return;
old_val = intel_de_read(display, GEN8_DE_PORT_IMR);
@@ -231,14 +228,13 @@ static void bdw_update_pipe_irq(struct intel_display *display,
enum pipe pipe, u32 interrupt_mask,
u32 enabled_irq_mask)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
u32 new_val;
lockdep_assert_held(&display->irq.lock);
drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
- if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
+ if (drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display)))
return;
new_val = display->irq.de_pipe_imr_mask[pipe];
@@ -274,7 +270,6 @@ void ibx_display_interrupt_update(struct intel_display *display,
u32 interrupt_mask,
u32 enabled_irq_mask)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
u32 sdeimr = intel_de_read(display, SDEIMR);
sdeimr &= ~interrupt_mask;
@@ -284,7 +279,7 @@ void ibx_display_interrupt_update(struct intel_display *display,
lockdep_assert_held(&display->irq.lock);
- if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
+ if (drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display)))
return;
intel_de_write(display, SDEIMR, sdeimr);
@@ -348,7 +343,6 @@ u32 i915_pipestat_enable_mask(struct intel_display *display,
void i915_enable_pipestat(struct intel_display *display,
enum pipe pipe, u32 status_mask)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
i915_reg_t reg = PIPESTAT(display, pipe);
u32 enable_mask;
@@ -357,7 +351,7 @@ void i915_enable_pipestat(struct intel_display *display,
pipe_name(pipe), status_mask);
lockdep_assert_held(&display->irq.lock);
- drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv));
+ drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display));
if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == status_mask)
return;
@@ -372,7 +366,6 @@ void i915_enable_pipestat(struct intel_display *display,
void i915_disable_pipestat(struct intel_display *display,
enum pipe pipe, u32 status_mask)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
i915_reg_t reg = PIPESTAT(display, pipe);
u32 enable_mask;
@@ -381,7 +374,7 @@ void i915_disable_pipestat(struct intel_display *display,
pipe_name(pipe), status_mask);
lockdep_assert_held(&display->irq.lock);
- drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv));
+ drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display));
if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == 0)
return;
@@ -2174,14 +2167,13 @@ void gen11_display_irq_reset(struct intel_display *display)
void gen8_irq_power_well_post_enable(struct intel_display *display,
u8 pipe_mask)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
u32 extra_ier = GEN8_PIPE_VBLANK | GEN8_PIPE_FIFO_UNDERRUN |
gen8_de_pipe_flip_done_mask(display);
enum pipe pipe;
spin_lock_irq(&display->irq.lock);
- if (!intel_irqs_enabled(dev_priv)) {
+ if (!intel_parent_irq_enabled(display)) {
spin_unlock_irq(&display->irq.lock);
return;
}
@@ -2197,12 +2189,11 @@ void gen8_irq_power_well_post_enable(struct intel_display *display,
void gen8_irq_power_well_pre_disable(struct intel_display *display,
u8 pipe_mask)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
enum pipe pipe;
spin_lock_irq(&display->irq.lock);
- if (!intel_irqs_enabled(dev_priv)) {
+ if (!intel_parent_irq_enabled(display)) {
spin_unlock_irq(&display->irq.lock);
return;
}
@@ -2213,7 +2204,7 @@ void gen8_irq_power_well_pre_disable(struct intel_display *display,
spin_unlock_irq(&display->irq.lock);
/* make sure we're done processing display irqs */
- intel_synchronize_irq(dev_priv);
+ intel_parent_irq_synchronize(display);
}
/*
@@ -2246,8 +2237,6 @@ static void ibx_irq_postinstall(struct intel_display *display)
void valleyview_enable_display_irqs(struct intel_display *display)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
-
spin_lock_irq(&display->irq.lock);
if (display->irq.vlv_display_irqs_enabled)
@@ -2255,7 +2244,7 @@ void valleyview_enable_display_irqs(struct intel_display *display)
display->irq.vlv_display_irqs_enabled = true;
- if (intel_irqs_enabled(dev_priv)) {
+ if (intel_parent_irq_enabled(display)) {
_vlv_display_irq_reset(display);
_vlv_display_irq_postinstall(display);
}
@@ -2266,8 +2255,6 @@ void valleyview_enable_display_irqs(struct intel_display *display)
void valleyview_disable_display_irqs(struct intel_display *display)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
-
spin_lock_irq(&display->irq.lock);
if (!display->irq.vlv_display_irqs_enabled)
@@ -2275,7 +2262,7 @@ void valleyview_disable_display_irqs(struct intel_display *display)
display->irq.vlv_display_irqs_enabled = false;
- if (intel_irqs_enabled(dev_priv))
+ if (intel_parent_irq_enabled(display))
_vlv_display_irq_reset(display);
out:
spin_unlock_irq(&display->irq.lock);
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 2a4cc1dcc293..a383ef23391d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -11,7 +11,6 @@
#include "soc/intel_dram.h"
#include "i915_drv.h"
-#include "i915_irq.h"
#include "i915_reg.h"
#include "intel_backlight_regs.h"
#include "intel_cdclk.h"
@@ -27,6 +26,7 @@
#include "intel_display_utils.h"
#include "intel_dmc.h"
#include "intel_mchbar_regs.h"
+#include "intel_parent.h"
#include "intel_pch_refclk.h"
#include "intel_pcode.h"
#include "intel_pmdemand.h"
@@ -1202,7 +1202,6 @@ static void hsw_assert_cdclk(struct intel_display *display)
static void assert_can_disable_lcpll(struct intel_display *display)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_crtc *crtc;
for_each_intel_crtc(display->drm, crtc)
@@ -1247,7 +1246,7 @@ static void assert_can_disable_lcpll(struct intel_display *display)
* gen-specific and since we only disable LCPLL after we fully disable
* the interrupts, the check below should be enough.
*/
- INTEL_DISPLAY_STATE_WARN(display, intel_irqs_enabled(dev_priv),
+ INTEL_DISPLAY_STATE_WARN(display, intel_parent_irq_enabled(display),
"IRQs enabled\n");
}
diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
index f4f7e73acc87..719f58e43269 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
@@ -7,8 +7,6 @@
#include <drm/drm_print.h>
-#include "i915_drv.h"
-#include "i915_irq.h"
#include "i915_reg.h"
#include "intel_backlight_regs.h"
#include "intel_combo_phy.h"
@@ -28,6 +26,7 @@
#include "intel_dpio_phy.h"
#include "intel_dpll.h"
#include "intel_hotplug.h"
+#include "intel_parent.h"
#include "intel_pcode.h"
#include "intel_pps.h"
#include "intel_psr.h"
@@ -628,8 +627,6 @@ static bool hsw_power_well_enabled(struct intel_display *display,
static void assert_can_enable_dc9(struct intel_display *display)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
-
drm_WARN_ONCE(display->drm,
(intel_de_read(display, DC_STATE_EN) & DC_STATE_EN_DC9),
"DC9 already programmed to be enabled.\n");
@@ -641,7 +638,7 @@ static void assert_can_enable_dc9(struct intel_display *display)
intel_de_read(display, HSW_PWR_WELL_CTL2) &
HSW_PWR_WELL_CTL_REQ(SKL_PW_CTL_IDX_PW_2),
"Power well 2 on.\n");
- drm_WARN_ONCE(display->drm, intel_irqs_enabled(dev_priv),
+ drm_WARN_ONCE(display->drm, intel_parent_irq_enabled(display),
"Interrupts not disabled yet.\n");
/*
@@ -655,9 +652,7 @@ static void assert_can_enable_dc9(struct intel_display *display)
static void assert_can_disable_dc9(struct intel_display *display)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
-
- drm_WARN_ONCE(display->drm, intel_irqs_enabled(dev_priv),
+ drm_WARN_ONCE(display->drm, intel_parent_irq_enabled(display),
"Interrupts not disabled yet.\n");
drm_WARN_ONCE(display->drm,
intel_de_read(display, DC_STATE_EN) &
@@ -1281,12 +1276,10 @@ static void vlv_display_power_well_init(struct intel_display *display)
static void vlv_display_power_well_deinit(struct intel_display *display)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
-
valleyview_disable_display_irqs(display);
/* make sure we're done processing display irqs */
- intel_synchronize_irq(dev_priv);
+ intel_parent_irq_synchronize(display);
vlv_pps_reset_all(display);
diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
index 795012d7c24c..acc85853b2a7 100644
--- a/drivers/gpu/drm/i915/display/intel_gmbus.c
+++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
@@ -35,8 +35,6 @@
#include <drm/drm_print.h>
#include <drm/display/drm_hdcp_helper.h>
-#include "i915_drv.h"
-#include "i915_irq.h"
#include "i915_reg.h"
#include "intel_de.h"
#include "intel_display_regs.h"
@@ -44,6 +42,7 @@
#include "intel_display_wa.h"
#include "intel_gmbus.h"
#include "intel_gmbus_regs.h"
+#include "intel_parent.h"
struct intel_gmbus {
struct i2c_adapter adapter;
@@ -391,12 +390,11 @@ intel_gpio_setup(struct intel_gmbus *bus, i915_reg_t gpio_reg)
static bool has_gmbus_irq(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
/*
* encoder->shutdown() may want to use GMBUS
* after irqs have already been disabled.
*/
- return HAS_GMBUS_IRQ(display) && intel_irqs_enabled(i915);
+ return HAS_GMBUS_IRQ(display) && intel_parent_irq_enabled(display);
}
static int gmbus_wait(struct intel_display *display, u32 status, u32 irq_en)
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
index 235706229ffb..7575a063f7be 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
@@ -27,8 +27,6 @@
#include <drm/drm_print.h>
#include <drm/drm_probe_helper.h>
-#include "i915_drv.h"
-#include "i915_irq.h"
#include "intel_connector.h"
#include "intel_display_core.h"
#include "intel_display_power.h"
@@ -39,6 +37,7 @@
#include "intel_hdcp.h"
#include "intel_hotplug.h"
#include "intel_hotplug_irq.h"
+#include "intel_parent.h"
/**
* DOC: Hotplug
@@ -1177,13 +1176,12 @@ bool intel_hpd_schedule_detection(struct intel_display *display)
static int i915_hpd_storm_ctl_show(struct seq_file *m, void *data)
{
struct intel_display *display = m->private;
- struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_hotplug *hotplug = &display->hotplug;
/* Synchronize with everything first in case there's been an HPD
* storm, but we haven't finished handling it in the kernel yet
*/
- intel_synchronize_irq(dev_priv);
+ intel_parent_irq_synchronize(display);
flush_work(&display->hotplug.dig_port_work);
flush_delayed_work(&display->hotplug.hotplug_work);
diff --git a/drivers/gpu/drm/i915/display/intel_lpe_audio.c b/drivers/gpu/drm/i915/display/intel_lpe_audio.c
index 42284e9928f2..5b41abe1c64d 100644
--- a/drivers/gpu/drm/i915/display/intel_lpe_audio.c
+++ b/drivers/gpu/drm/i915/display/intel_lpe_audio.c
@@ -71,7 +71,6 @@
#include <drm/drm_print.h>
#include <drm/intel/intel_lpe_audio.h>
-#include "i915_irq.h"
#include "intel_audio_regs.h"
#include "intel_de.h"
#include "intel_lpe_audio.h"
diff --git a/drivers/gpu/drm/i915/display/intel_parent.c b/drivers/gpu/drm/i915/display/intel_parent.c
new file mode 100644
index 000000000000..375713f6f411
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_parent.c
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: MIT
+/* Copyright © 2025 Intel Corporation */
+
+/*
+ * Convenience wrapper functions to call the parent interface functions:
+ *
+ * - display->parent->SUBSTRUCT->FUNCTION()
+ * - display->parent->FUNCTION()
+ *
+ * All functions here should be named accordingly:
+ *
+ * - intel_parent_SUBSTRUCT_FUNCTION()
+ * - intel_parent_FUNCTION()
+ *
+ * These functions may use display driver specific types for parameters and
+ * return values, translating them to and from the generic types used in the
+ * function pointer interface.
+ */
+
+#include <drm/intel/display_parent_interface.h>
+
+#include "intel_display_core.h"
+#include "intel_parent.h"
+
+bool intel_parent_irq_enabled(struct intel_display *display)
+{
+ return display->parent->irq->enabled(display->drm);
+}
+
+void intel_parent_irq_synchronize(struct intel_display *display)
+{
+ display->parent->irq->synchronize(display->drm);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_parent.h b/drivers/gpu/drm/i915/display/intel_parent.h
new file mode 100644
index 000000000000..3ade493f1008
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_parent.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: MIT */
+/* Copyright © 2025 Intel Corporation */
+
+#ifndef __INTEL_PARENT_H__
+#define __INTEL_PARENT_H__
+
+#include <linux/types.h>
+
+struct intel_display;
+
+bool intel_parent_irq_enabled(struct intel_display *display);
+void intel_parent_irq_synchronize(struct intel_display *display);
+
+#endif /* __INTEL_PARENT_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_pipe_crc.c b/drivers/gpu/drm/i915/display/intel_pipe_crc.c
index 1f27643412f1..71cb0178c8b1 100644
--- a/drivers/gpu/drm/i915/display/intel_pipe_crc.c
+++ b/drivers/gpu/drm/i915/display/intel_pipe_crc.c
@@ -30,13 +30,12 @@
#include <drm/drm_print.h>
-#include "i915_drv.h"
-#include "i915_irq.h"
#include "intel_atomic.h"
#include "intel_de.h"
#include "intel_display_irq.h"
#include "intel_display_regs.h"
#include "intel_display_types.h"
+#include "intel_parent.h"
#include "intel_pipe_crc.h"
#include "intel_pipe_crc_regs.h"
@@ -658,7 +657,6 @@ void intel_crtc_enable_pipe_crc(struct intel_crtc *crtc)
void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc)
{
struct intel_display *display = to_intel_display(crtc);
- struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_pipe_crc *pipe_crc = &crtc->pipe_crc;
enum pipe pipe = crtc->pipe;
@@ -669,5 +667,5 @@ void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc)
intel_de_write(display, PIPE_CRC_CTL(display, pipe), 0);
intel_de_posting_read(display, PIPE_CRC_CTL(display, pipe));
- intel_synchronize_irq(dev_priv);
+ intel_parent_irq_synchronize(display);
}
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index c97b76771917..07715aef62d3 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -741,6 +741,7 @@ static void i915_welcome_messages(struct drm_i915_private *dev_priv)
static const struct intel_display_parent_interface parent = {
.rpm = &i915_display_rpm_interface,
+ .irq = &i915_display_irq_interface,
};
const struct intel_display_parent_interface *i915_driver_parent_interface(void)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 1898be4ddc8b..3fe978d4ea53 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -33,6 +33,7 @@
#include <drm/drm_drv.h>
#include <drm/drm_print.h>
+#include <drm/intel/display_parent_interface.h>
#include "display/intel_display_irq.h"
#include "display/intel_hotplug.h"
@@ -1252,3 +1253,18 @@ void intel_synchronize_hardirq(struct drm_i915_private *i915)
{
synchronize_hardirq(to_pci_dev(i915->drm.dev)->irq);
}
+
+static bool _intel_irq_enabled(struct drm_device *drm)
+{
+ return intel_irqs_enabled(to_i915(drm));
+}
+
+static void _intel_irq_synchronize(struct drm_device *drm)
+{
+ return intel_synchronize_irq(to_i915(drm));
+}
+
+const struct intel_display_irq_interface i915_display_irq_interface = {
+ .enabled = _intel_irq_enabled,
+ .synchronize = _intel_irq_synchronize,
+};
diff --git a/drivers/gpu/drm/i915/i915_irq.h b/drivers/gpu/drm/i915/i915_irq.h
index 58789b264575..5c87d6d41c74 100644
--- a/drivers/gpu/drm/i915/i915_irq.h
+++ b/drivers/gpu/drm/i915/i915_irq.h
@@ -51,4 +51,6 @@ void gen2_error_reset(struct intel_uncore *uncore, struct i915_error_regs regs);
void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
u32 emr_val);
+extern const struct intel_display_irq_interface i915_display_irq_interface;
+
#endif /* __I915_IRQ_H__ */
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 7b4ca591a4ae..9d0da4d95f53 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -189,7 +189,6 @@ endif
# i915 Display compat #defines and #includes
subdir-ccflags-$(CONFIG_DRM_XE_DISPLAY) += \
- -I$(src)/display/ext \
-I$(src)/compat-i915-headers \
-I$(srctree)/drivers/gpu/drm/i915/display/ \
-Ddrm_i915_private=xe_device
@@ -206,7 +205,6 @@ $(obj)/i915-display/%.o: $(srctree)/drivers/gpu/drm/i915/display/%.c FORCE
# Display code specific to xe
xe-$(CONFIG_DRM_XE_DISPLAY) += \
- display/ext/i915_irq.o \
display/intel_bo.o \
display/intel_fb_bo.o \
display/intel_fbdev_fb.o \
@@ -302,10 +300,11 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
i915-display/intel_modeset_setup.o \
i915-display/intel_modeset_verify.o \
i915-display/intel_panel.o \
+ i915-display/intel_parent.o \
+ i915-display/intel_pch.o \
i915-display/intel_pfit.o \
i915-display/intel_plane.o \
i915-display/intel_pmdemand.o \
- i915-display/intel_pch.o \
i915-display/intel_pps.o \
i915-display/intel_psr.o \
i915-display/intel_qp_tables.o \
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
deleted file mode 100644
index 61707a07f91f..000000000000
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#include "../../i915/i915_irq.h"
diff --git a/drivers/gpu/drm/xe/display/ext/i915_irq.c b/drivers/gpu/drm/xe/display/ext/i915_irq.c
deleted file mode 100644
index 1011c1c754d0..000000000000
--- a/drivers/gpu/drm/xe/display/ext/i915_irq.c
+++ /dev/null
@@ -1,18 +0,0 @@
-// SPDX-License-Identifier: MIT
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#include "i915_irq.h"
-#include "i915_reg.h"
-#include "intel_uncore.h"
-
-bool intel_irqs_enabled(struct xe_device *xe)
-{
- return atomic_read(&xe->irq.enabled);
-}
-
-void intel_synchronize_irq(struct xe_device *xe)
-{
- synchronize_irq(to_pci_dev(xe->drm.dev)->irq);
-}
diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
index 8b0afa270216..e3320d9e6314 100644
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@ -516,8 +516,26 @@ static void display_device_remove(struct drm_device *dev, void *arg)
intel_display_device_remove(display);
}
+static bool irq_enabled(struct drm_device *drm)
+{
+ struct xe_device *xe = to_xe_device(drm);
+
+ return atomic_read(&xe->irq.enabled);
+}
+
+static void irq_synchronize(struct drm_device *drm)
+{
+ synchronize_irq(to_pci_dev(drm->dev)->irq);
+}
+
+static const struct intel_display_irq_interface xe_display_irq_interface = {
+ .enabled = irq_enabled,
+ .synchronize = irq_synchronize,
+};
+
static const struct intel_display_parent_interface parent = {
.rpm = &xe_display_rpm_interface,
+ .irq = &xe_display_irq_interface,
};
/**
diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
index 26bedc360044..3a008a18eb65 100644
--- a/include/drm/intel/display_parent_interface.h
+++ b/include/drm/intel/display_parent_interface.h
@@ -25,6 +25,11 @@ struct intel_display_rpm_interface {
void (*assert_unblock)(const struct drm_device *drm);
};
+struct intel_display_irq_interface {
+ bool (*enabled)(struct drm_device *drm);
+ void (*synchronize)(struct drm_device *drm);
+};
+
/**
* struct intel_display_parent_interface - services parent driver provides to display
*
@@ -40,6 +45,9 @@ struct intel_display_rpm_interface {
struct intel_display_parent_interface {
/** @rpm: Runtime PM functions */
const struct intel_display_rpm_interface *rpm;
+
+ /** @irq: IRQ interface */
+ const struct intel_display_irq_interface *irq;
};
#endif
--
2.47.3
^ permalink raw reply related [flat|nested] 18+ messages in thread
* ✗ CI.checkpatch: warning for drm/{i915, xe}/irq: clarify display and parent driver interfaces (rev2)
2025-11-11 7:34 [PATCH v2 0/3] drm/{i915, xe}/irq: clarify display and parent driver interfaces Jani Nikula
` (2 preceding siblings ...)
2025-11-11 7:34 ` [PATCH v2 3/3] drm/{i915, xe}/display: move irq calls to parent interface Jani Nikula
@ 2025-11-11 7:40 ` Patchwork
2025-11-11 7:41 ` ✓ CI.KUnit: success " Patchwork
` (6 subsequent siblings)
10 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2025-11-11 7:40 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/{i915, xe}/irq: clarify display and parent driver interfaces (rev2)
URL : https://patchwork.freedesktop.org/series/157350/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
d9120d4d84745cf011b4b3efb338747e69179dfb
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 4c9ce8e8ac6fa9f6168c88d7e8dc7c66eea007ea
Author: Jani Nikula <jani.nikula@intel.com>
Date: Tue Nov 11 09:34:04 2025 +0200
drm/{i915, xe}/display: move irq calls to parent interface
Add an irq parent driver interface for the .enabled and .synchronize
calls. This lets us drop the dependency on i915_drv.h and i915_irq.h in
multiple places, and subsequently remove the compat i915_irq.h and
i915_irq.c files along with the display/ext directory from xe
altogether.
Use intel_irqs_enabled() and intel_synchronize_irq() static wrappers for
parent interface calls in intel_display_irq.c while chasing the function
pointers everywhere else. It's still a bit uncertain if we should
universally have wrappers for the parent interface calls or not.
v2: Keep static wrappers in intel_display_irq.c (Ville)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+ /mt/dim checkpatch 4ce351022716985e9c1dd18583acd4d3d149cb5b drm-intel
a5d8522d18e9 drm/{i915, xe}/display: duplicate gen2 irq/error init/reset in display irq
-:59: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#59: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:61:
+ WARN(1,
+ "Interrupt register 0x%x is not zero: 0x%08x\n",
total: 0 errors, 0 warnings, 1 checks, 203 lines checked
a7997a261b5e drm/i915/display: convert the display irq interfaces to struct intel_display
4c9ce8e8ac6f drm/{i915, xe}/display: move irq calls to parent interface
-:501: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#501:
deleted file mode 100644
total: 0 errors, 1 warnings, 0 checks, 439 lines checked
^ permalink raw reply [flat|nested] 18+ messages in thread* ✓ CI.KUnit: success for drm/{i915, xe}/irq: clarify display and parent driver interfaces (rev2)
2025-11-11 7:34 [PATCH v2 0/3] drm/{i915, xe}/irq: clarify display and parent driver interfaces Jani Nikula
` (3 preceding siblings ...)
2025-11-11 7:40 ` ✗ CI.checkpatch: warning for drm/{i915, xe}/irq: clarify display and parent driver interfaces (rev2) Patchwork
@ 2025-11-11 7:41 ` Patchwork
2025-11-11 8:23 ` ✓ Xe.CI.BAT: " Patchwork
` (5 subsequent siblings)
10 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2025-11-11 7:41 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/{i915, xe}/irq: clarify display and parent driver interfaces (rev2)
URL : https://patchwork.freedesktop.org/series/157350/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[07:40:14] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:40:18] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:40:49] Starting KUnit Kernel (1/1)...
[07:40:49] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:40:49] ================== guc_buf (11 subtests) ===================
[07:40:49] [PASSED] test_smallest
[07:40:49] [PASSED] test_largest
[07:40:49] [PASSED] test_granular
[07:40:49] [PASSED] test_unique
[07:40:49] [PASSED] test_overlap
[07:40:49] [PASSED] test_reusable
[07:40:49] [PASSED] test_too_big
[07:40:49] [PASSED] test_flush
[07:40:49] [PASSED] test_lookup
[07:40:49] [PASSED] test_data
[07:40:49] [PASSED] test_class
[07:40:49] ===================== [PASSED] guc_buf =====================
[07:40:49] =================== guc_dbm (7 subtests) ===================
[07:40:49] [PASSED] test_empty
[07:40:49] [PASSED] test_default
[07:40:49] ======================== test_size ========================
[07:40:49] [PASSED] 4
[07:40:49] [PASSED] 8
[07:40:49] [PASSED] 32
[07:40:49] [PASSED] 256
[07:40:49] ==================== [PASSED] test_size ====================
[07:40:49] ======================= test_reuse ========================
[07:40:49] [PASSED] 4
[07:40:49] [PASSED] 8
[07:40:49] [PASSED] 32
[07:40:49] [PASSED] 256
[07:40:49] =================== [PASSED] test_reuse ====================
[07:40:49] =================== test_range_overlap ====================
[07:40:49] [PASSED] 4
[07:40:49] [PASSED] 8
[07:40:49] [PASSED] 32
[07:40:49] [PASSED] 256
[07:40:49] =============== [PASSED] test_range_overlap ================
[07:40:49] =================== test_range_compact ====================
[07:40:49] [PASSED] 4
[07:40:49] [PASSED] 8
[07:40:49] [PASSED] 32
[07:40:49] [PASSED] 256
[07:40:49] =============== [PASSED] test_range_compact ================
[07:40:49] ==================== test_range_spare =====================
[07:40:49] [PASSED] 4
[07:40:49] [PASSED] 8
[07:40:49] [PASSED] 32
[07:40:49] [PASSED] 256
[07:40:49] ================ [PASSED] test_range_spare =================
[07:40:49] ===================== [PASSED] guc_dbm =====================
[07:40:49] =================== guc_idm (6 subtests) ===================
[07:40:49] [PASSED] bad_init
[07:40:49] [PASSED] no_init
[07:40:49] [PASSED] init_fini
[07:40:49] [PASSED] check_used
[07:40:49] [PASSED] check_quota
[07:40:49] [PASSED] check_all
[07:40:49] ===================== [PASSED] guc_idm =====================
[07:40:49] ================== no_relay (3 subtests) ===================
[07:40:49] [PASSED] xe_drops_guc2pf_if_not_ready
[07:40:49] [PASSED] xe_drops_guc2vf_if_not_ready
[07:40:49] [PASSED] xe_rejects_send_if_not_ready
[07:40:49] ==================== [PASSED] no_relay =====================
[07:40:49] ================== pf_relay (14 subtests) ==================
[07:40:49] [PASSED] pf_rejects_guc2pf_too_short
[07:40:49] [PASSED] pf_rejects_guc2pf_too_long
[07:40:49] [PASSED] pf_rejects_guc2pf_no_payload
[07:40:49] [PASSED] pf_fails_no_payload
[07:40:49] [PASSED] pf_fails_bad_origin
[07:40:49] [PASSED] pf_fails_bad_type
[07:40:49] [PASSED] pf_txn_reports_error
[07:40:49] [PASSED] pf_txn_sends_pf2guc
[07:40:49] [PASSED] pf_sends_pf2guc
[07:40:49] [SKIPPED] pf_loopback_nop
[07:40:49] [SKIPPED] pf_loopback_echo
[07:40:49] [SKIPPED] pf_loopback_fail
[07:40:49] [SKIPPED] pf_loopback_busy
[07:40:49] [SKIPPED] pf_loopback_retry
[07:40:49] ==================== [PASSED] pf_relay =====================
[07:40:49] ================== vf_relay (3 subtests) ===================
[07:40:49] [PASSED] vf_rejects_guc2vf_too_short
[07:40:49] [PASSED] vf_rejects_guc2vf_too_long
[07:40:49] [PASSED] vf_rejects_guc2vf_no_payload
[07:40:49] ==================== [PASSED] vf_relay =====================
[07:40:49] ================ pf_gt_config (4 subtests) =================
[07:40:49] [PASSED] fair_contexts_1vf
[07:40:49] [PASSED] fair_doorbells_1vf
[07:40:49] ====================== fair_contexts ======================
[07:40:49] [PASSED] 1 VF
[07:40:49] [PASSED] 2 VFs
[07:40:49] [PASSED] 3 VFs
[07:40:49] [PASSED] 4 VFs
[07:40:49] [PASSED] 5 VFs
[07:40:49] [PASSED] 6 VFs
[07:40:49] [PASSED] 7 VFs
[07:40:49] [PASSED] 8 VFs
[07:40:49] [PASSED] 9 VFs
[07:40:49] [PASSED] 10 VFs
[07:40:49] [PASSED] 11 VFs
[07:40:49] [PASSED] 12 VFs
[07:40:49] [PASSED] 13 VFs
[07:40:49] [PASSED] 14 VFs
[07:40:49] [PASSED] 15 VFs
[07:40:49] [PASSED] 16 VFs
[07:40:49] [PASSED] 17 VFs
[07:40:49] [PASSED] 18 VFs
[07:40:49] [PASSED] 19 VFs
[07:40:49] [PASSED] 20 VFs
[07:40:49] [PASSED] 21 VFs
[07:40:49] [PASSED] 22 VFs
[07:40:49] [PASSED] 23 VFs
[07:40:49] [PASSED] 24 VFs
[07:40:49] [PASSED] 25 VFs
[07:40:49] [PASSED] 26 VFs
[07:40:49] [PASSED] 27 VFs
[07:40:49] [PASSED] 28 VFs
[07:40:49] [PASSED] 29 VFs
[07:40:49] [PASSED] 30 VFs
[07:40:49] [PASSED] 31 VFs
[07:40:49] [PASSED] 32 VFs
[07:40:49] [PASSED] 33 VFs
[07:40:49] [PASSED] 34 VFs
[07:40:49] [PASSED] 35 VFs
[07:40:49] [PASSED] 36 VFs
[07:40:49] [PASSED] 37 VFs
[07:40:49] [PASSED] 38 VFs
[07:40:49] [PASSED] 39 VFs
[07:40:49] [PASSED] 40 VFs
[07:40:49] [PASSED] 41 VFs
[07:40:49] [PASSED] 42 VFs
[07:40:49] [PASSED] 43 VFs
[07:40:49] [PASSED] 44 VFs
[07:40:49] [PASSED] 45 VFs
[07:40:49] [PASSED] 46 VFs
[07:40:49] [PASSED] 47 VFs
[07:40:49] [PASSED] 48 VFs
[07:40:49] [PASSED] 49 VFs
[07:40:49] [PASSED] 50 VFs
[07:40:49] [PASSED] 51 VFs
[07:40:49] [PASSED] 52 VFs
[07:40:49] [PASSED] 53 VFs
[07:40:49] [PASSED] 54 VFs
[07:40:49] [PASSED] 55 VFs
[07:40:49] [PASSED] 56 VFs
[07:40:49] [PASSED] 57 VFs
[07:40:49] [PASSED] 58 VFs
[07:40:49] [PASSED] 59 VFs
[07:40:49] [PASSED] 60 VFs
[07:40:49] [PASSED] 61 VFs
[07:40:49] [PASSED] 62 VFs
[07:40:49] [PASSED] 63 VFs
[07:40:49] ================== [PASSED] fair_contexts ==================
[07:40:49] ===================== fair_doorbells ======================
[07:40:49] [PASSED] 1 VF
[07:40:49] [PASSED] 2 VFs
[07:40:49] [PASSED] 3 VFs
[07:40:49] [PASSED] 4 VFs
[07:40:49] [PASSED] 5 VFs
[07:40:49] [PASSED] 6 VFs
[07:40:49] [PASSED] 7 VFs
[07:40:49] [PASSED] 8 VFs
[07:40:49] [PASSED] 9 VFs
[07:40:49] [PASSED] 10 VFs
[07:40:49] [PASSED] 11 VFs
[07:40:49] [PASSED] 12 VFs
[07:40:49] [PASSED] 13 VFs
[07:40:49] [PASSED] 14 VFs
[07:40:49] [PASSED] 15 VFs
[07:40:49] [PASSED] 16 VFs
[07:40:49] [PASSED] 17 VFs
[07:40:49] [PASSED] 18 VFs
[07:40:49] [PASSED] 19 VFs
[07:40:49] [PASSED] 20 VFs
[07:40:49] [PASSED] 21 VFs
[07:40:49] [PASSED] 22 VFs
[07:40:49] [PASSED] 23 VFs
[07:40:49] [PASSED] 24 VFs
[07:40:49] [PASSED] 25 VFs
[07:40:49] [PASSED] 26 VFs
[07:40:49] [PASSED] 27 VFs
[07:40:49] [PASSED] 28 VFs
[07:40:49] [PASSED] 29 VFs
[07:40:49] [PASSED] 30 VFs
[07:40:49] [PASSED] 31 VFs
[07:40:49] [PASSED] 32 VFs
[07:40:49] [PASSED] 33 VFs
[07:40:49] [PASSED] 34 VFs
[07:40:49] [PASSED] 35 VFs
[07:40:49] [PASSED] 36 VFs
[07:40:49] [PASSED] 37 VFs
[07:40:49] [PASSED] 38 VFs
[07:40:49] [PASSED] 39 VFs
[07:40:49] [PASSED] 40 VFs
[07:40:49] [PASSED] 41 VFs
[07:40:49] [PASSED] 42 VFs
[07:40:49] [PASSED] 43 VFs
[07:40:49] [PASSED] 44 VFs
[07:40:49] [PASSED] 45 VFs
[07:40:49] [PASSED] 46 VFs
[07:40:49] [PASSED] 47 VFs
[07:40:49] [PASSED] 48 VFs
[07:40:49] [PASSED] 49 VFs
[07:40:49] [PASSED] 50 VFs
[07:40:49] [PASSED] 51 VFs
[07:40:49] [PASSED] 52 VFs
[07:40:49] [PASSED] 53 VFs
[07:40:49] [PASSED] 54 VFs
[07:40:49] [PASSED] 55 VFs
[07:40:49] [PASSED] 56 VFs
[07:40:49] [PASSED] 57 VFs
[07:40:49] [PASSED] 58 VFs
[07:40:49] [PASSED] 59 VFs
[07:40:49] [PASSED] 60 VFs
[07:40:49] [PASSED] 61 VFs
[07:40:49] [PASSED] 62 VFs
[07:40:49] [PASSED] 63 VFs
[07:40:49] ================= [PASSED] fair_doorbells ==================
[07:40:49] ================== [PASSED] pf_gt_config ===================
[07:40:49] ===================== lmtt (1 subtest) =====================
[07:40:49] ======================== test_ops =========================
[07:40:49] [PASSED] 2-level
[07:40:49] [PASSED] multi-level
[07:40:49] ==================== [PASSED] test_ops =====================
[07:40:49] ====================== [PASSED] lmtt =======================
[07:40:49] ================= pf_service (11 subtests) =================
[07:40:49] [PASSED] pf_negotiate_any
[07:40:49] [PASSED] pf_negotiate_base_match
[07:40:49] [PASSED] pf_negotiate_base_newer
[07:40:49] [PASSED] pf_negotiate_base_next
[07:40:49] [SKIPPED] pf_negotiate_base_older
[07:40:49] [PASSED] pf_negotiate_base_prev
[07:40:49] [PASSED] pf_negotiate_latest_match
[07:40:49] [PASSED] pf_negotiate_latest_newer
[07:40:49] [PASSED] pf_negotiate_latest_next
[07:40:49] [SKIPPED] pf_negotiate_latest_older
[07:40:49] [SKIPPED] pf_negotiate_latest_prev
[07:40:49] =================== [PASSED] pf_service ====================
[07:40:49] ================= xe_guc_g2g (2 subtests) ==================
[07:40:49] ============== xe_live_guc_g2g_kunit_default ==============
[07:40:49] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[07:40:49] ============== xe_live_guc_g2g_kunit_allmem ===============
[07:40:49] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[07:40:49] =================== [SKIPPED] xe_guc_g2g ===================
[07:40:49] =================== xe_mocs (2 subtests) ===================
[07:40:49] ================ xe_live_mocs_kernel_kunit ================
[07:40:49] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[07:40:49] ================ xe_live_mocs_reset_kunit =================
[07:40:49] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[07:40:49] ==================== [SKIPPED] xe_mocs =====================
[07:40:49] ================= xe_migrate (2 subtests) ==================
[07:40:49] ================= xe_migrate_sanity_kunit =================
[07:40:49] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[07:40:49] ================== xe_validate_ccs_kunit ==================
[07:40:49] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[07:40:49] =================== [SKIPPED] xe_migrate ===================
[07:40:49] ================== xe_dma_buf (1 subtest) ==================
[07:40:49] ==================== xe_dma_buf_kunit =====================
[07:40:49] ================ [SKIPPED] xe_dma_buf_kunit ================
[07:40:49] =================== [SKIPPED] xe_dma_buf ===================
[07:40:49] ================= xe_bo_shrink (1 subtest) =================
[07:40:49] =================== xe_bo_shrink_kunit ====================
[07:40:49] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[07:40:49] ================== [SKIPPED] xe_bo_shrink ==================
[07:40:49] ==================== xe_bo (2 subtests) ====================
[07:40:49] ================== xe_ccs_migrate_kunit ===================
[07:40:49] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[07:40:49] ==================== xe_bo_evict_kunit ====================
[07:40:49] =============== [SKIPPED] xe_bo_evict_kunit ================
[07:40:49] ===================== [SKIPPED] xe_bo ======================
[07:40:49] ==================== args (11 subtests) ====================
[07:40:49] [PASSED] count_args_test
[07:40:49] [PASSED] call_args_example
[07:40:49] [PASSED] call_args_test
[07:40:49] [PASSED] drop_first_arg_example
[07:40:49] [PASSED] drop_first_arg_test
[07:40:49] [PASSED] first_arg_example
[07:40:49] [PASSED] first_arg_test
[07:40:49] [PASSED] last_arg_example
[07:40:49] [PASSED] last_arg_test
[07:40:49] [PASSED] pick_arg_example
[07:40:49] [PASSED] sep_comma_example
[07:40:49] ====================== [PASSED] args =======================
[07:40:49] =================== xe_pci (3 subtests) ====================
[07:40:49] ==================== check_graphics_ip ====================
[07:40:49] [PASSED] 12.00 Xe_LP
[07:40:49] [PASSED] 12.10 Xe_LP+
[07:40:49] [PASSED] 12.55 Xe_HPG
[07:40:49] [PASSED] 12.60 Xe_HPC
[07:40:49] [PASSED] 12.70 Xe_LPG
[07:40:49] [PASSED] 12.71 Xe_LPG
[07:40:49] [PASSED] 12.74 Xe_LPG+
[07:40:49] [PASSED] 20.01 Xe2_HPG
[07:40:49] [PASSED] 20.02 Xe2_HPG
[07:40:49] [PASSED] 20.04 Xe2_LPG
[07:40:49] [PASSED] 30.00 Xe3_LPG
[07:40:49] [PASSED] 30.01 Xe3_LPG
[07:40:49] [PASSED] 30.03 Xe3_LPG
[07:40:49] [PASSED] 30.04 Xe3_LPG
[07:40:49] [PASSED] 30.05 Xe3_LPG
[07:40:49] [PASSED] 35.11 Xe3p_XPC
[07:40:49] ================ [PASSED] check_graphics_ip ================
[07:40:49] ===================== check_media_ip ======================
[07:40:49] [PASSED] 12.00 Xe_M
[07:40:49] [PASSED] 12.55 Xe_HPM
[07:40:49] [PASSED] 13.00 Xe_LPM+
[07:40:49] [PASSED] 13.01 Xe2_HPM
[07:40:49] [PASSED] 20.00 Xe2_LPM
[07:40:49] [PASSED] 30.00 Xe3_LPM
[07:40:49] [PASSED] 30.02 Xe3_LPM
[07:40:49] [PASSED] 35.00 Xe3p_LPM
[07:40:49] [PASSED] 35.03 Xe3p_HPM
[07:40:49] ================= [PASSED] check_media_ip ==================
[07:40:49] =================== check_platform_desc ===================
[07:40:49] [PASSED] 0x9A60 (TIGERLAKE)
[07:40:49] [PASSED] 0x9A68 (TIGERLAKE)
[07:40:49] [PASSED] 0x9A70 (TIGERLAKE)
[07:40:49] [PASSED] 0x9A40 (TIGERLAKE)
[07:40:49] [PASSED] 0x9A49 (TIGERLAKE)
[07:40:49] [PASSED] 0x9A59 (TIGERLAKE)
[07:40:49] [PASSED] 0x9A78 (TIGERLAKE)
[07:40:49] [PASSED] 0x9AC0 (TIGERLAKE)
[07:40:49] [PASSED] 0x9AC9 (TIGERLAKE)
[07:40:49] [PASSED] 0x9AD9 (TIGERLAKE)
[07:40:49] [PASSED] 0x9AF8 (TIGERLAKE)
[07:40:49] [PASSED] 0x4C80 (ROCKETLAKE)
[07:40:49] [PASSED] 0x4C8A (ROCKETLAKE)
[07:40:49] [PASSED] 0x4C8B (ROCKETLAKE)
[07:40:49] [PASSED] 0x4C8C (ROCKETLAKE)
[07:40:49] [PASSED] 0x4C90 (ROCKETLAKE)
[07:40:49] [PASSED] 0x4C9A (ROCKETLAKE)
[07:40:49] [PASSED] 0x4680 (ALDERLAKE_S)
[07:40:49] [PASSED] 0x4682 (ALDERLAKE_S)
[07:40:49] [PASSED] 0x4688 (ALDERLAKE_S)
[07:40:49] [PASSED] 0x468A (ALDERLAKE_S)
[07:40:49] [PASSED] 0x468B (ALDERLAKE_S)
[07:40:49] [PASSED] 0x4690 (ALDERLAKE_S)
[07:40:49] [PASSED] 0x4692 (ALDERLAKE_S)
[07:40:49] [PASSED] 0x4693 (ALDERLAKE_S)
[07:40:49] [PASSED] 0x46A0 (ALDERLAKE_P)
[07:40:49] [PASSED] 0x46A1 (ALDERLAKE_P)
[07:40:49] [PASSED] 0x46A2 (ALDERLAKE_P)
[07:40:49] [PASSED] 0x46A3 (ALDERLAKE_P)
[07:40:49] [PASSED] 0x46A6 (ALDERLAKE_P)
[07:40:49] [PASSED] 0x46A8 (ALDERLAKE_P)
[07:40:49] [PASSED] 0x46AA (ALDERLAKE_P)
[07:40:49] [PASSED] 0x462A (ALDERLAKE_P)
[07:40:49] [PASSED] 0x4626 (ALDERLAKE_P)
[07:40:49] [PASSED] 0x4628 (ALDERLAKE_P)
[07:40:49] [PASSED] 0x46B0 (ALDERLAKE_P)
[07:40:49] [PASSED] 0x46B1 (ALDERLAKE_P)
[07:40:49] [PASSED] 0x46B2 (ALDERLAKE_P)
[07:40:49] [PASSED] 0x46B3 (ALDERLAKE_P)
[07:40:49] [PASSED] 0x46C0 (ALDERLAKE_P)
[07:40:49] [PASSED] 0x46C1 (ALDERLAKE_P)
[07:40:49] [PASSED] 0x46C2 (ALDERLAKE_P)
[07:40:49] [PASSED] 0x46C3 (ALDERLAKE_P)
[07:40:49] [PASSED] 0x46D0 (ALDERLAKE_N)
[07:40:49] [PASSED] 0x46D1 (ALDERLAKE_N)
[07:40:49] [PASSED] 0x46D2 (ALDERLAKE_N)
[07:40:49] [PASSED] 0x46D3 (ALDERLAKE_N)
[07:40:49] [PASSED] 0x46D4 (ALDERLAKE_N)
[07:40:49] [PASSED] 0xA721 (ALDERLAKE_P)
[07:40:49] [PASSED] 0xA7A1 (ALDERLAKE_P)
[07:40:49] [PASSED] 0xA7A9 (ALDERLAKE_P)
[07:40:49] [PASSED] 0xA7AC (ALDERLAKE_P)
[07:40:49] [PASSED] 0xA7AD (ALDERLAKE_P)
[07:40:49] [PASSED] 0xA720 (ALDERLAKE_P)
[07:40:49] [PASSED] 0xA7A0 (ALDERLAKE_P)
[07:40:49] [PASSED] 0xA7A8 (ALDERLAKE_P)
[07:40:49] [PASSED] 0xA7AA (ALDERLAKE_P)
[07:40:49] [PASSED] 0xA7AB (ALDERLAKE_P)
[07:40:49] [PASSED] 0xA780 (ALDERLAKE_S)
[07:40:49] [PASSED] 0xA781 (ALDERLAKE_S)
[07:40:49] [PASSED] 0xA782 (ALDERLAKE_S)
[07:40:49] [PASSED] 0xA783 (ALDERLAKE_S)
[07:40:49] [PASSED] 0xA788 (ALDERLAKE_S)
[07:40:49] [PASSED] 0xA789 (ALDERLAKE_S)
[07:40:49] [PASSED] 0xA78A (ALDERLAKE_S)
[07:40:49] [PASSED] 0xA78B (ALDERLAKE_S)
[07:40:49] [PASSED] 0x4905 (DG1)
[07:40:49] [PASSED] 0x4906 (DG1)
[07:40:49] [PASSED] 0x4907 (DG1)
[07:40:49] [PASSED] 0x4908 (DG1)
[07:40:49] [PASSED] 0x4909 (DG1)
[07:40:49] [PASSED] 0x56C0 (DG2)
[07:40:49] [PASSED] 0x56C2 (DG2)
[07:40:49] [PASSED] 0x56C1 (DG2)
[07:40:49] [PASSED] 0x7D51 (METEORLAKE)
[07:40:49] [PASSED] 0x7DD1 (METEORLAKE)
[07:40:49] [PASSED] 0x7D41 (METEORLAKE)
[07:40:49] [PASSED] 0x7D67 (METEORLAKE)
[07:40:49] [PASSED] 0xB640 (METEORLAKE)
[07:40:49] [PASSED] 0x56A0 (DG2)
[07:40:49] [PASSED] 0x56A1 (DG2)
[07:40:49] [PASSED] 0x56A2 (DG2)
[07:40:49] [PASSED] 0x56BE (DG2)
[07:40:49] [PASSED] 0x56BF (DG2)
[07:40:49] [PASSED] 0x5690 (DG2)
stty: 'standard input': Inappropriate ioctl for device
[07:40:49] [PASSED] 0x5691 (DG2)
[07:40:49] [PASSED] 0x5692 (DG2)
[07:40:49] [PASSED] 0x56A5 (DG2)
[07:40:49] [PASSED] 0x56A6 (DG2)
[07:40:49] [PASSED] 0x56B0 (DG2)
[07:40:49] [PASSED] 0x56B1 (DG2)
[07:40:49] [PASSED] 0x56BA (DG2)
[07:40:49] [PASSED] 0x56BB (DG2)
[07:40:49] [PASSED] 0x56BC (DG2)
[07:40:49] [PASSED] 0x56BD (DG2)
[07:40:49] [PASSED] 0x5693 (DG2)
[07:40:49] [PASSED] 0x5694 (DG2)
[07:40:49] [PASSED] 0x5695 (DG2)
[07:40:49] [PASSED] 0x56A3 (DG2)
[07:40:49] [PASSED] 0x56A4 (DG2)
[07:40:49] [PASSED] 0x56B2 (DG2)
[07:40:49] [PASSED] 0x56B3 (DG2)
[07:40:49] [PASSED] 0x5696 (DG2)
[07:40:49] [PASSED] 0x5697 (DG2)
[07:40:49] [PASSED] 0xB69 (PVC)
[07:40:49] [PASSED] 0xB6E (PVC)
[07:40:49] [PASSED] 0xBD4 (PVC)
[07:40:49] [PASSED] 0xBD5 (PVC)
[07:40:49] [PASSED] 0xBD6 (PVC)
[07:40:49] [PASSED] 0xBD7 (PVC)
[07:40:49] [PASSED] 0xBD8 (PVC)
[07:40:49] [PASSED] 0xBD9 (PVC)
[07:40:49] [PASSED] 0xBDA (PVC)
[07:40:49] [PASSED] 0xBDB (PVC)
[07:40:49] [PASSED] 0xBE0 (PVC)
[07:40:49] [PASSED] 0xBE1 (PVC)
[07:40:49] [PASSED] 0xBE5 (PVC)
[07:40:49] [PASSED] 0x7D40 (METEORLAKE)
[07:40:49] [PASSED] 0x7D45 (METEORLAKE)
[07:40:49] [PASSED] 0x7D55 (METEORLAKE)
[07:40:49] [PASSED] 0x7D60 (METEORLAKE)
[07:40:49] [PASSED] 0x7DD5 (METEORLAKE)
[07:40:49] [PASSED] 0x6420 (LUNARLAKE)
[07:40:49] [PASSED] 0x64A0 (LUNARLAKE)
[07:40:49] [PASSED] 0x64B0 (LUNARLAKE)
[07:40:49] [PASSED] 0xE202 (BATTLEMAGE)
[07:40:49] [PASSED] 0xE209 (BATTLEMAGE)
[07:40:49] [PASSED] 0xE20B (BATTLEMAGE)
[07:40:49] [PASSED] 0xE20C (BATTLEMAGE)
[07:40:49] [PASSED] 0xE20D (BATTLEMAGE)
[07:40:49] [PASSED] 0xE210 (BATTLEMAGE)
[07:40:49] [PASSED] 0xE211 (BATTLEMAGE)
[07:40:49] [PASSED] 0xE212 (BATTLEMAGE)
[07:40:49] [PASSED] 0xE216 (BATTLEMAGE)
[07:40:49] [PASSED] 0xE220 (BATTLEMAGE)
[07:40:49] [PASSED] 0xE221 (BATTLEMAGE)
[07:40:49] [PASSED] 0xE222 (BATTLEMAGE)
[07:40:49] [PASSED] 0xE223 (BATTLEMAGE)
[07:40:49] [PASSED] 0xB080 (PANTHERLAKE)
[07:40:49] [PASSED] 0xB081 (PANTHERLAKE)
[07:40:49] [PASSED] 0xB082 (PANTHERLAKE)
[07:40:49] [PASSED] 0xB083 (PANTHERLAKE)
[07:40:49] [PASSED] 0xB084 (PANTHERLAKE)
[07:40:49] [PASSED] 0xB085 (PANTHERLAKE)
[07:40:49] [PASSED] 0xB086 (PANTHERLAKE)
[07:40:49] [PASSED] 0xB087 (PANTHERLAKE)
[07:40:49] [PASSED] 0xB08F (PANTHERLAKE)
[07:40:49] [PASSED] 0xB090 (PANTHERLAKE)
[07:40:49] [PASSED] 0xB0A0 (PANTHERLAKE)
[07:40:49] [PASSED] 0xB0B0 (PANTHERLAKE)
[07:40:49] [PASSED] 0xD740 (NOVALAKE_S)
[07:40:49] [PASSED] 0xD741 (NOVALAKE_S)
[07:40:49] [PASSED] 0xD742 (NOVALAKE_S)
[07:40:49] [PASSED] 0xD743 (NOVALAKE_S)
[07:40:49] [PASSED] 0xD744 (NOVALAKE_S)
[07:40:49] [PASSED] 0xD745 (NOVALAKE_S)
[07:40:49] [PASSED] 0x674C (CRESCENTISLAND)
[07:40:49] [PASSED] 0xFD80 (PANTHERLAKE)
[07:40:49] [PASSED] 0xFD81 (PANTHERLAKE)
[07:40:49] =============== [PASSED] check_platform_desc ===============
[07:40:49] ===================== [PASSED] xe_pci ======================
[07:40:49] =================== xe_rtp (2 subtests) ====================
[07:40:49] =============== xe_rtp_process_to_sr_tests ================
[07:40:49] [PASSED] coalesce-same-reg
[07:40:49] [PASSED] no-match-no-add
[07:40:49] [PASSED] match-or
[07:40:49] [PASSED] match-or-xfail
[07:40:49] [PASSED] no-match-no-add-multiple-rules
[07:40:49] [PASSED] two-regs-two-entries
[07:40:49] [PASSED] clr-one-set-other
[07:40:49] [PASSED] set-field
[07:40:49] [PASSED] conflict-duplicate
[07:40:49] [PASSED] conflict-not-disjoint
[07:40:49] [PASSED] conflict-reg-type
[07:40:49] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[07:40:49] ================== xe_rtp_process_tests ===================
[07:40:49] [PASSED] active1
[07:40:49] [PASSED] active2
[07:40:49] [PASSED] active-inactive
[07:40:49] [PASSED] inactive-active
[07:40:49] [PASSED] inactive-1st_or_active-inactive
[07:40:49] [PASSED] inactive-2nd_or_active-inactive
[07:40:49] [PASSED] inactive-last_or_active-inactive
[07:40:49] [PASSED] inactive-no_or_active-inactive
[07:40:49] ============== [PASSED] xe_rtp_process_tests ===============
[07:40:49] ===================== [PASSED] xe_rtp ======================
[07:40:49] ==================== xe_wa (1 subtest) =====================
[07:40:49] ======================== xe_wa_gt =========================
[07:40:49] [PASSED] TIGERLAKE B0
[07:40:49] [PASSED] DG1 A0
[07:40:49] [PASSED] DG1 B0
[07:40:49] [PASSED] ALDERLAKE_S A0
[07:40:49] [PASSED] ALDERLAKE_S B0
[07:40:49] [PASSED] ALDERLAKE_S C0
[07:40:49] [PASSED] ALDERLAKE_S D0
[07:40:49] [PASSED] ALDERLAKE_P A0
[07:40:49] [PASSED] ALDERLAKE_P B0
[07:40:49] [PASSED] ALDERLAKE_P C0
[07:40:49] [PASSED] ALDERLAKE_S RPLS D0
[07:40:49] [PASSED] ALDERLAKE_P RPLU E0
[07:40:49] [PASSED] DG2 G10 C0
[07:40:49] [PASSED] DG2 G11 B1
[07:40:49] [PASSED] DG2 G12 A1
[07:40:49] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[07:40:49] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[07:40:49] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[07:40:49] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[07:40:49] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[07:40:49] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[07:40:49] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[07:40:49] ==================== [PASSED] xe_wa_gt =====================
[07:40:49] ====================== [PASSED] xe_wa ======================
[07:40:49] ============================================================
[07:40:49] Testing complete. Ran 446 tests: passed: 428, skipped: 18
[07:40:49] Elapsed time: 35.644s total, 4.285s configuring, 30.893s building, 0.422s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[07:40:50] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:40:51] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:41:16] Starting KUnit Kernel (1/1)...
[07:41:16] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:41:16] ============ drm_test_pick_cmdline (2 subtests) ============
[07:41:16] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[07:41:16] =============== drm_test_pick_cmdline_named ===============
[07:41:16] [PASSED] NTSC
[07:41:16] [PASSED] NTSC-J
[07:41:16] [PASSED] PAL
[07:41:16] [PASSED] PAL-M
[07:41:16] =========== [PASSED] drm_test_pick_cmdline_named ===========
[07:41:16] ============== [PASSED] drm_test_pick_cmdline ==============
[07:41:16] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[07:41:16] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[07:41:16] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[07:41:16] =========== drm_validate_clone_mode (2 subtests) ===========
[07:41:16] ============== drm_test_check_in_clone_mode ===============
[07:41:16] [PASSED] in_clone_mode
[07:41:16] [PASSED] not_in_clone_mode
[07:41:16] ========== [PASSED] drm_test_check_in_clone_mode ===========
[07:41:16] =============== drm_test_check_valid_clones ===============
[07:41:16] [PASSED] not_in_clone_mode
[07:41:16] [PASSED] valid_clone
[07:41:16] [PASSED] invalid_clone
[07:41:16] =========== [PASSED] drm_test_check_valid_clones ===========
[07:41:16] ============= [PASSED] drm_validate_clone_mode =============
[07:41:16] ============= drm_validate_modeset (1 subtest) =============
[07:41:16] [PASSED] drm_test_check_connector_changed_modeset
[07:41:16] ============== [PASSED] drm_validate_modeset ===============
[07:41:16] ====== drm_test_bridge_get_current_state (2 subtests) ======
[07:41:16] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[07:41:16] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[07:41:16] ======== [PASSED] drm_test_bridge_get_current_state ========
[07:41:16] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[07:41:16] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[07:41:16] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[07:41:16] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[07:41:16] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[07:41:16] ============== drm_bridge_alloc (2 subtests) ===============
[07:41:16] [PASSED] drm_test_drm_bridge_alloc_basic
[07:41:16] [PASSED] drm_test_drm_bridge_alloc_get_put
[07:41:16] ================ [PASSED] drm_bridge_alloc =================
[07:41:16] ================== drm_buddy (8 subtests) ==================
[07:41:16] [PASSED] drm_test_buddy_alloc_limit
[07:41:16] [PASSED] drm_test_buddy_alloc_optimistic
[07:41:16] [PASSED] drm_test_buddy_alloc_pessimistic
[07:41:16] [PASSED] drm_test_buddy_alloc_pathological
[07:41:16] [PASSED] drm_test_buddy_alloc_contiguous
[07:41:16] [PASSED] drm_test_buddy_alloc_clear
[07:41:16] [PASSED] drm_test_buddy_alloc_range_bias
[07:41:17] [PASSED] drm_test_buddy_fragmentation_performance
[07:41:17] ==================== [PASSED] drm_buddy ====================
[07:41:17] ============= drm_cmdline_parser (40 subtests) =============
[07:41:17] [PASSED] drm_test_cmdline_force_d_only
[07:41:17] [PASSED] drm_test_cmdline_force_D_only_dvi
[07:41:17] [PASSED] drm_test_cmdline_force_D_only_hdmi
[07:41:17] [PASSED] drm_test_cmdline_force_D_only_not_digital
[07:41:17] [PASSED] drm_test_cmdline_force_e_only
[07:41:17] [PASSED] drm_test_cmdline_res
[07:41:17] [PASSED] drm_test_cmdline_res_vesa
[07:41:17] [PASSED] drm_test_cmdline_res_vesa_rblank
[07:41:17] [PASSED] drm_test_cmdline_res_rblank
[07:41:17] [PASSED] drm_test_cmdline_res_bpp
[07:41:17] [PASSED] drm_test_cmdline_res_refresh
[07:41:17] [PASSED] drm_test_cmdline_res_bpp_refresh
[07:41:17] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[07:41:17] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[07:41:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[07:41:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[07:41:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[07:41:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[07:41:17] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[07:41:17] [PASSED] drm_test_cmdline_res_margins_force_on
[07:41:17] [PASSED] drm_test_cmdline_res_vesa_margins
[07:41:17] [PASSED] drm_test_cmdline_name
[07:41:17] [PASSED] drm_test_cmdline_name_bpp
[07:41:17] [PASSED] drm_test_cmdline_name_option
[07:41:17] [PASSED] drm_test_cmdline_name_bpp_option
[07:41:17] [PASSED] drm_test_cmdline_rotate_0
[07:41:17] [PASSED] drm_test_cmdline_rotate_90
[07:41:17] [PASSED] drm_test_cmdline_rotate_180
[07:41:17] [PASSED] drm_test_cmdline_rotate_270
[07:41:17] [PASSED] drm_test_cmdline_hmirror
[07:41:17] [PASSED] drm_test_cmdline_vmirror
[07:41:17] [PASSED] drm_test_cmdline_margin_options
[07:41:17] [PASSED] drm_test_cmdline_multiple_options
[07:41:17] [PASSED] drm_test_cmdline_bpp_extra_and_option
[07:41:17] [PASSED] drm_test_cmdline_extra_and_option
[07:41:17] [PASSED] drm_test_cmdline_freestanding_options
[07:41:17] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[07:41:17] [PASSED] drm_test_cmdline_panel_orientation
[07:41:17] ================ drm_test_cmdline_invalid =================
[07:41:17] [PASSED] margin_only
[07:41:17] [PASSED] interlace_only
[07:41:17] [PASSED] res_missing_x
[07:41:17] [PASSED] res_missing_y
[07:41:17] [PASSED] res_bad_y
[07:41:17] [PASSED] res_missing_y_bpp
[07:41:17] [PASSED] res_bad_bpp
[07:41:17] [PASSED] res_bad_refresh
[07:41:17] [PASSED] res_bpp_refresh_force_on_off
[07:41:17] [PASSED] res_invalid_mode
[07:41:17] [PASSED] res_bpp_wrong_place_mode
[07:41:17] [PASSED] name_bpp_refresh
[07:41:17] [PASSED] name_refresh
[07:41:17] [PASSED] name_refresh_wrong_mode
[07:41:17] [PASSED] name_refresh_invalid_mode
[07:41:17] [PASSED] rotate_multiple
[07:41:17] [PASSED] rotate_invalid_val
[07:41:17] [PASSED] rotate_truncated
[07:41:17] [PASSED] invalid_option
[07:41:17] [PASSED] invalid_tv_option
[07:41:17] [PASSED] truncated_tv_option
[07:41:17] ============ [PASSED] drm_test_cmdline_invalid =============
[07:41:17] =============== drm_test_cmdline_tv_options ===============
[07:41:17] [PASSED] NTSC
[07:41:17] [PASSED] NTSC_443
[07:41:17] [PASSED] NTSC_J
[07:41:17] [PASSED] PAL
[07:41:17] [PASSED] PAL_M
[07:41:17] [PASSED] PAL_N
[07:41:17] [PASSED] SECAM
[07:41:17] [PASSED] MONO_525
[07:41:17] [PASSED] MONO_625
[07:41:17] =========== [PASSED] drm_test_cmdline_tv_options ===========
[07:41:17] =============== [PASSED] drm_cmdline_parser ================
[07:41:17] ========== drmm_connector_hdmi_init (20 subtests) ==========
[07:41:17] [PASSED] drm_test_connector_hdmi_init_valid
[07:41:17] [PASSED] drm_test_connector_hdmi_init_bpc_8
[07:41:17] [PASSED] drm_test_connector_hdmi_init_bpc_10
[07:41:17] [PASSED] drm_test_connector_hdmi_init_bpc_12
[07:41:17] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[07:41:17] [PASSED] drm_test_connector_hdmi_init_bpc_null
[07:41:17] [PASSED] drm_test_connector_hdmi_init_formats_empty
[07:41:17] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[07:41:17] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[07:41:17] [PASSED] supported_formats=0x9 yuv420_allowed=1
[07:41:17] [PASSED] supported_formats=0x9 yuv420_allowed=0
[07:41:17] [PASSED] supported_formats=0x3 yuv420_allowed=1
[07:41:17] [PASSED] supported_formats=0x3 yuv420_allowed=0
[07:41:17] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[07:41:17] [PASSED] drm_test_connector_hdmi_init_null_ddc
[07:41:17] [PASSED] drm_test_connector_hdmi_init_null_product
[07:41:17] [PASSED] drm_test_connector_hdmi_init_null_vendor
[07:41:17] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[07:41:17] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[07:41:17] [PASSED] drm_test_connector_hdmi_init_product_valid
[07:41:17] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[07:41:17] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[07:41:17] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[07:41:17] ========= drm_test_connector_hdmi_init_type_valid =========
[07:41:17] [PASSED] HDMI-A
[07:41:17] [PASSED] HDMI-B
[07:41:17] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[07:41:17] ======== drm_test_connector_hdmi_init_type_invalid ========
[07:41:17] [PASSED] Unknown
[07:41:17] [PASSED] VGA
[07:41:17] [PASSED] DVI-I
[07:41:17] [PASSED] DVI-D
[07:41:17] [PASSED] DVI-A
[07:41:17] [PASSED] Composite
[07:41:17] [PASSED] SVIDEO
[07:41:17] [PASSED] LVDS
[07:41:17] [PASSED] Component
[07:41:17] [PASSED] DIN
[07:41:17] [PASSED] DP
[07:41:17] [PASSED] TV
[07:41:17] [PASSED] eDP
[07:41:17] [PASSED] Virtual
[07:41:17] [PASSED] DSI
[07:41:17] [PASSED] DPI
[07:41:17] [PASSED] Writeback
[07:41:17] [PASSED] SPI
[07:41:17] [PASSED] USB
[07:41:17] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[07:41:17] ============ [PASSED] drmm_connector_hdmi_init =============
[07:41:17] ============= drmm_connector_init (3 subtests) =============
[07:41:17] [PASSED] drm_test_drmm_connector_init
[07:41:17] [PASSED] drm_test_drmm_connector_init_null_ddc
[07:41:17] ========= drm_test_drmm_connector_init_type_valid =========
[07:41:17] [PASSED] Unknown
[07:41:17] [PASSED] VGA
[07:41:17] [PASSED] DVI-I
[07:41:17] [PASSED] DVI-D
[07:41:17] [PASSED] DVI-A
[07:41:17] [PASSED] Composite
[07:41:17] [PASSED] SVIDEO
[07:41:17] [PASSED] LVDS
[07:41:17] [PASSED] Component
[07:41:17] [PASSED] DIN
[07:41:17] [PASSED] DP
[07:41:17] [PASSED] HDMI-A
[07:41:17] [PASSED] HDMI-B
[07:41:17] [PASSED] TV
[07:41:17] [PASSED] eDP
[07:41:17] [PASSED] Virtual
[07:41:17] [PASSED] DSI
[07:41:17] [PASSED] DPI
[07:41:17] [PASSED] Writeback
[07:41:17] [PASSED] SPI
[07:41:17] [PASSED] USB
[07:41:17] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[07:41:17] =============== [PASSED] drmm_connector_init ===============
[07:41:17] ========= drm_connector_dynamic_init (6 subtests) ==========
[07:41:17] [PASSED] drm_test_drm_connector_dynamic_init
[07:41:17] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[07:41:17] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[07:41:17] [PASSED] drm_test_drm_connector_dynamic_init_properties
[07:41:17] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[07:41:17] [PASSED] Unknown
[07:41:17] [PASSED] VGA
[07:41:17] [PASSED] DVI-I
[07:41:17] [PASSED] DVI-D
[07:41:17] [PASSED] DVI-A
[07:41:17] [PASSED] Composite
[07:41:17] [PASSED] SVIDEO
[07:41:17] [PASSED] LVDS
[07:41:17] [PASSED] Component
[07:41:17] [PASSED] DIN
[07:41:17] [PASSED] DP
[07:41:17] [PASSED] HDMI-A
[07:41:17] [PASSED] HDMI-B
[07:41:17] [PASSED] TV
[07:41:17] [PASSED] eDP
[07:41:17] [PASSED] Virtual
[07:41:17] [PASSED] DSI
[07:41:17] [PASSED] DPI
[07:41:17] [PASSED] Writeback
[07:41:17] [PASSED] SPI
[07:41:17] [PASSED] USB
[07:41:17] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[07:41:17] ======== drm_test_drm_connector_dynamic_init_name =========
[07:41:17] [PASSED] Unknown
[07:41:17] [PASSED] VGA
[07:41:17] [PASSED] DVI-I
[07:41:17] [PASSED] DVI-D
[07:41:17] [PASSED] DVI-A
[07:41:17] [PASSED] Composite
[07:41:17] [PASSED] SVIDEO
[07:41:17] [PASSED] LVDS
[07:41:17] [PASSED] Component
[07:41:17] [PASSED] DIN
[07:41:17] [PASSED] DP
[07:41:17] [PASSED] HDMI-A
[07:41:17] [PASSED] HDMI-B
[07:41:17] [PASSED] TV
[07:41:17] [PASSED] eDP
[07:41:17] [PASSED] Virtual
[07:41:17] [PASSED] DSI
[07:41:17] [PASSED] DPI
[07:41:17] [PASSED] Writeback
[07:41:17] [PASSED] SPI
[07:41:17] [PASSED] USB
[07:41:17] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[07:41:17] =========== [PASSED] drm_connector_dynamic_init ============
[07:41:17] ==== drm_connector_dynamic_register_early (4 subtests) =====
[07:41:17] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[07:41:17] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[07:41:17] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[07:41:17] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[07:41:17] ====== [PASSED] drm_connector_dynamic_register_early =======
[07:41:17] ======= drm_connector_dynamic_register (7 subtests) ========
[07:41:17] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[07:41:17] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[07:41:17] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[07:41:17] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[07:41:17] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[07:41:17] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[07:41:17] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[07:41:17] ========= [PASSED] drm_connector_dynamic_register ==========
[07:41:17] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[07:41:17] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[07:41:17] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[07:41:17] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[07:41:17] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[07:41:17] ========== drm_test_get_tv_mode_from_name_valid ===========
[07:41:17] [PASSED] NTSC
[07:41:17] [PASSED] NTSC-443
[07:41:17] [PASSED] NTSC-J
[07:41:17] [PASSED] PAL
[07:41:17] [PASSED] PAL-M
[07:41:17] [PASSED] PAL-N
[07:41:17] [PASSED] SECAM
[07:41:17] [PASSED] Mono
[07:41:17] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[07:41:17] [PASSED] drm_test_get_tv_mode_from_name_truncated
[07:41:17] ============ [PASSED] drm_get_tv_mode_from_name ============
[07:41:17] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[07:41:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[07:41:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[07:41:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[07:41:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[07:41:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[07:41:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[07:41:17] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[07:41:17] [PASSED] VIC 96
[07:41:17] [PASSED] VIC 97
[07:41:17] [PASSED] VIC 101
[07:41:17] [PASSED] VIC 102
[07:41:17] [PASSED] VIC 106
[07:41:17] [PASSED] VIC 107
[07:41:17] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[07:41:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[07:41:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[07:41:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[07:41:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[07:41:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[07:41:17] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[07:41:17] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[07:41:17] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[07:41:17] [PASSED] Automatic
[07:41:17] [PASSED] Full
[07:41:17] [PASSED] Limited 16:235
[07:41:17] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[07:41:17] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[07:41:17] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[07:41:17] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[07:41:17] === drm_test_drm_hdmi_connector_get_output_format_name ====
[07:41:17] [PASSED] RGB
[07:41:17] [PASSED] YUV 4:2:0
[07:41:17] [PASSED] YUV 4:2:2
[07:41:17] [PASSED] YUV 4:4:4
[07:41:17] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[07:41:17] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[07:41:17] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[07:41:17] ============= drm_damage_helper (21 subtests) ==============
[07:41:17] [PASSED] drm_test_damage_iter_no_damage
[07:41:17] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[07:41:17] [PASSED] drm_test_damage_iter_no_damage_src_moved
[07:41:17] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[07:41:17] [PASSED] drm_test_damage_iter_no_damage_not_visible
[07:41:17] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[07:41:17] [PASSED] drm_test_damage_iter_no_damage_no_fb
[07:41:17] [PASSED] drm_test_damage_iter_simple_damage
[07:41:17] [PASSED] drm_test_damage_iter_single_damage
[07:41:17] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[07:41:17] [PASSED] drm_test_damage_iter_single_damage_outside_src
[07:41:17] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[07:41:17] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[07:41:17] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[07:41:17] [PASSED] drm_test_damage_iter_single_damage_src_moved
[07:41:17] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[07:41:17] [PASSED] drm_test_damage_iter_damage
[07:41:17] [PASSED] drm_test_damage_iter_damage_one_intersect
[07:41:17] [PASSED] drm_test_damage_iter_damage_one_outside
[07:41:17] [PASSED] drm_test_damage_iter_damage_src_moved
[07:41:17] [PASSED] drm_test_damage_iter_damage_not_visible
[07:41:17] ================ [PASSED] drm_damage_helper ================
[07:41:17] ============== drm_dp_mst_helper (3 subtests) ==============
[07:41:17] ============== drm_test_dp_mst_calc_pbn_mode ==============
[07:41:17] [PASSED] Clock 154000 BPP 30 DSC disabled
[07:41:17] [PASSED] Clock 234000 BPP 30 DSC disabled
[07:41:17] [PASSED] Clock 297000 BPP 24 DSC disabled
[07:41:17] [PASSED] Clock 332880 BPP 24 DSC enabled
[07:41:17] [PASSED] Clock 324540 BPP 24 DSC enabled
[07:41:17] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[07:41:17] ============== drm_test_dp_mst_calc_pbn_div ===============
[07:41:17] [PASSED] Link rate 2000000 lane count 4
[07:41:17] [PASSED] Link rate 2000000 lane count 2
[07:41:17] [PASSED] Link rate 2000000 lane count 1
[07:41:17] [PASSED] Link rate 1350000 lane count 4
[07:41:17] [PASSED] Link rate 1350000 lane count 2
[07:41:17] [PASSED] Link rate 1350000 lane count 1
[07:41:17] [PASSED] Link rate 1000000 lane count 4
[07:41:17] [PASSED] Link rate 1000000 lane count 2
[07:41:17] [PASSED] Link rate 1000000 lane count 1
[07:41:17] [PASSED] Link rate 810000 lane count 4
[07:41:17] [PASSED] Link rate 810000 lane count 2
[07:41:17] [PASSED] Link rate 810000 lane count 1
[07:41:17] [PASSED] Link rate 540000 lane count 4
[07:41:17] [PASSED] Link rate 540000 lane count 2
[07:41:17] [PASSED] Link rate 540000 lane count 1
[07:41:17] [PASSED] Link rate 270000 lane count 4
[07:41:17] [PASSED] Link rate 270000 lane count 2
[07:41:17] [PASSED] Link rate 270000 lane count 1
[07:41:17] [PASSED] Link rate 162000 lane count 4
[07:41:17] [PASSED] Link rate 162000 lane count 2
[07:41:17] [PASSED] Link rate 162000 lane count 1
[07:41:17] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[07:41:17] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[07:41:17] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[07:41:17] [PASSED] DP_POWER_UP_PHY with port number
[07:41:17] [PASSED] DP_POWER_DOWN_PHY with port number
[07:41:17] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[07:41:17] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[07:41:17] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[07:41:17] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[07:41:17] [PASSED] DP_QUERY_PAYLOAD with port number
[07:41:17] [PASSED] DP_QUERY_PAYLOAD with VCPI
[07:41:17] [PASSED] DP_REMOTE_DPCD_READ with port number
[07:41:17] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[07:41:17] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[07:41:17] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[07:41:17] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[07:41:17] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[07:41:17] [PASSED] DP_REMOTE_I2C_READ with port number
[07:41:17] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[07:41:17] [PASSED] DP_REMOTE_I2C_READ with transactions array
[07:41:17] [PASSED] DP_REMOTE_I2C_WRITE with port number
[07:41:17] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[07:41:17] [PASSED] DP_REMOTE_I2C_WRITE with data array
[07:41:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[07:41:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[07:41:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[07:41:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[07:41:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[07:41:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[07:41:17] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[07:41:17] ================ [PASSED] drm_dp_mst_helper ================
[07:41:17] ================== drm_exec (7 subtests) ===================
[07:41:17] [PASSED] sanitycheck
[07:41:17] [PASSED] test_lock
[07:41:17] [PASSED] test_lock_unlock
[07:41:17] [PASSED] test_duplicates
[07:41:17] [PASSED] test_prepare
[07:41:17] [PASSED] test_prepare_array
[07:41:17] [PASSED] test_multiple_loops
[07:41:17] ==================== [PASSED] drm_exec =====================
[07:41:17] =========== drm_format_helper_test (17 subtests) ===========
[07:41:17] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[07:41:17] [PASSED] single_pixel_source_buffer
[07:41:17] [PASSED] single_pixel_clip_rectangle
[07:41:17] [PASSED] well_known_colors
[07:41:17] [PASSED] destination_pitch
[07:41:17] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[07:41:17] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[07:41:17] [PASSED] single_pixel_source_buffer
[07:41:17] [PASSED] single_pixel_clip_rectangle
[07:41:17] [PASSED] well_known_colors
[07:41:17] [PASSED] destination_pitch
[07:41:17] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[07:41:17] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[07:41:17] [PASSED] single_pixel_source_buffer
[07:41:17] [PASSED] single_pixel_clip_rectangle
[07:41:17] [PASSED] well_known_colors
[07:41:17] [PASSED] destination_pitch
[07:41:17] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[07:41:17] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[07:41:17] [PASSED] single_pixel_source_buffer
[07:41:17] [PASSED] single_pixel_clip_rectangle
[07:41:17] [PASSED] well_known_colors
[07:41:17] [PASSED] destination_pitch
[07:41:17] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[07:41:17] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[07:41:17] [PASSED] single_pixel_source_buffer
[07:41:17] [PASSED] single_pixel_clip_rectangle
[07:41:17] [PASSED] well_known_colors
[07:41:17] [PASSED] destination_pitch
[07:41:17] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[07:41:17] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[07:41:17] [PASSED] single_pixel_source_buffer
[07:41:17] [PASSED] single_pixel_clip_rectangle
[07:41:17] [PASSED] well_known_colors
[07:41:17] [PASSED] destination_pitch
[07:41:17] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[07:41:17] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[07:41:17] [PASSED] single_pixel_source_buffer
[07:41:17] [PASSED] single_pixel_clip_rectangle
[07:41:17] [PASSED] well_known_colors
[07:41:17] [PASSED] destination_pitch
[07:41:17] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[07:41:17] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[07:41:17] [PASSED] single_pixel_source_buffer
[07:41:17] [PASSED] single_pixel_clip_rectangle
[07:41:17] [PASSED] well_known_colors
[07:41:17] [PASSED] destination_pitch
[07:41:17] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[07:41:17] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[07:41:17] [PASSED] single_pixel_source_buffer
[07:41:17] [PASSED] single_pixel_clip_rectangle
[07:41:17] [PASSED] well_known_colors
[07:41:17] [PASSED] destination_pitch
[07:41:17] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[07:41:17] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[07:41:17] [PASSED] single_pixel_source_buffer
[07:41:17] [PASSED] single_pixel_clip_rectangle
[07:41:17] [PASSED] well_known_colors
[07:41:17] [PASSED] destination_pitch
[07:41:17] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[07:41:17] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[07:41:17] [PASSED] single_pixel_source_buffer
[07:41:17] [PASSED] single_pixel_clip_rectangle
[07:41:17] [PASSED] well_known_colors
[07:41:17] [PASSED] destination_pitch
[07:41:17] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[07:41:17] ============== drm_test_fb_xrgb8888_to_mono ===============
[07:41:17] [PASSED] single_pixel_source_buffer
[07:41:17] [PASSED] single_pixel_clip_rectangle
[07:41:17] [PASSED] well_known_colors
[07:41:17] [PASSED] destination_pitch
[07:41:17] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[07:41:17] ==================== drm_test_fb_swab =====================
[07:41:17] [PASSED] single_pixel_source_buffer
[07:41:17] [PASSED] single_pixel_clip_rectangle
[07:41:17] [PASSED] well_known_colors
[07:41:17] [PASSED] destination_pitch
[07:41:17] ================ [PASSED] drm_test_fb_swab =================
[07:41:17] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[07:41:17] [PASSED] single_pixel_source_buffer
[07:41:17] [PASSED] single_pixel_clip_rectangle
[07:41:17] [PASSED] well_known_colors
[07:41:17] [PASSED] destination_pitch
[07:41:17] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[07:41:17] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[07:41:17] [PASSED] single_pixel_source_buffer
[07:41:17] [PASSED] single_pixel_clip_rectangle
[07:41:17] [PASSED] well_known_colors
[07:41:17] [PASSED] destination_pitch
[07:41:17] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[07:41:17] ================= drm_test_fb_clip_offset =================
[07:41:17] [PASSED] pass through
[07:41:17] [PASSED] horizontal offset
[07:41:17] [PASSED] vertical offset
[07:41:17] [PASSED] horizontal and vertical offset
[07:41:17] [PASSED] horizontal offset (custom pitch)
[07:41:17] [PASSED] vertical offset (custom pitch)
[07:41:17] [PASSED] horizontal and vertical offset (custom pitch)
[07:41:17] ============= [PASSED] drm_test_fb_clip_offset =============
[07:41:17] =================== drm_test_fb_memcpy ====================
[07:41:17] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[07:41:17] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[07:41:17] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[07:41:17] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[07:41:17] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[07:41:17] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[07:41:17] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[07:41:17] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[07:41:17] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[07:41:17] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[07:41:17] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[07:41:17] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[07:41:17] =============== [PASSED] drm_test_fb_memcpy ================
[07:41:17] ============= [PASSED] drm_format_helper_test ==============
[07:41:17] ================= drm_format (18 subtests) =================
[07:41:17] [PASSED] drm_test_format_block_width_invalid
[07:41:17] [PASSED] drm_test_format_block_width_one_plane
[07:41:17] [PASSED] drm_test_format_block_width_two_plane
[07:41:17] [PASSED] drm_test_format_block_width_three_plane
[07:41:17] [PASSED] drm_test_format_block_width_tiled
[07:41:17] [PASSED] drm_test_format_block_height_invalid
[07:41:17] [PASSED] drm_test_format_block_height_one_plane
[07:41:17] [PASSED] drm_test_format_block_height_two_plane
[07:41:17] [PASSED] drm_test_format_block_height_three_plane
[07:41:17] [PASSED] drm_test_format_block_height_tiled
[07:41:17] [PASSED] drm_test_format_min_pitch_invalid
[07:41:17] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[07:41:17] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[07:41:17] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[07:41:17] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[07:41:17] [PASSED] drm_test_format_min_pitch_two_plane
[07:41:17] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[07:41:17] [PASSED] drm_test_format_min_pitch_tiled
[07:41:17] =================== [PASSED] drm_format ====================
[07:41:17] ============== drm_framebuffer (10 subtests) ===============
[07:41:17] ========== drm_test_framebuffer_check_src_coords ==========
[07:41:17] [PASSED] Success: source fits into fb
[07:41:17] [PASSED] Fail: overflowing fb with x-axis coordinate
[07:41:17] [PASSED] Fail: overflowing fb with y-axis coordinate
[07:41:17] [PASSED] Fail: overflowing fb with source width
[07:41:17] [PASSED] Fail: overflowing fb with source height
[07:41:17] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[07:41:17] [PASSED] drm_test_framebuffer_cleanup
[07:41:17] =============== drm_test_framebuffer_create ===============
[07:41:17] [PASSED] ABGR8888 normal sizes
[07:41:17] [PASSED] ABGR8888 max sizes
[07:41:17] [PASSED] ABGR8888 pitch greater than min required
[07:41:17] [PASSED] ABGR8888 pitch less than min required
[07:41:17] [PASSED] ABGR8888 Invalid width
[07:41:17] [PASSED] ABGR8888 Invalid buffer handle
[07:41:17] [PASSED] No pixel format
[07:41:17] [PASSED] ABGR8888 Width 0
[07:41:17] [PASSED] ABGR8888 Height 0
[07:41:17] [PASSED] ABGR8888 Out of bound height * pitch combination
[07:41:17] [PASSED] ABGR8888 Large buffer offset
[07:41:17] [PASSED] ABGR8888 Buffer offset for inexistent plane
[07:41:17] [PASSED] ABGR8888 Invalid flag
[07:41:17] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[07:41:17] [PASSED] ABGR8888 Valid buffer modifier
[07:41:17] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[07:41:17] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[07:41:17] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[07:41:17] [PASSED] NV12 Normal sizes
[07:41:17] [PASSED] NV12 Max sizes
[07:41:17] [PASSED] NV12 Invalid pitch
[07:41:17] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[07:41:17] [PASSED] NV12 different modifier per-plane
[07:41:17] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[07:41:17] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[07:41:17] [PASSED] NV12 Modifier for inexistent plane
[07:41:17] [PASSED] NV12 Handle for inexistent plane
[07:41:17] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[07:41:17] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[07:41:17] [PASSED] YVU420 Normal sizes
[07:41:17] [PASSED] YVU420 Max sizes
[07:41:17] [PASSED] YVU420 Invalid pitch
[07:41:17] [PASSED] YVU420 Different pitches
[07:41:17] [PASSED] YVU420 Different buffer offsets/pitches
[07:41:17] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[07:41:17] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[07:41:17] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[07:41:17] [PASSED] YVU420 Valid modifier
[07:41:17] [PASSED] YVU420 Different modifiers per plane
[07:41:17] [PASSED] YVU420 Modifier for inexistent plane
[07:41:17] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[07:41:17] [PASSED] X0L2 Normal sizes
[07:41:17] [PASSED] X0L2 Max sizes
[07:41:17] [PASSED] X0L2 Invalid pitch
[07:41:17] [PASSED] X0L2 Pitch greater than minimum required
[07:41:17] [PASSED] X0L2 Handle for inexistent plane
[07:41:17] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[07:41:17] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[07:41:17] [PASSED] X0L2 Valid modifier
[07:41:17] [PASSED] X0L2 Modifier for inexistent plane
[07:41:17] =========== [PASSED] drm_test_framebuffer_create ===========
[07:41:17] [PASSED] drm_test_framebuffer_free
[07:41:17] [PASSED] drm_test_framebuffer_init
[07:41:17] [PASSED] drm_test_framebuffer_init_bad_format
[07:41:17] [PASSED] drm_test_framebuffer_init_dev_mismatch
[07:41:17] [PASSED] drm_test_framebuffer_lookup
[07:41:17] [PASSED] drm_test_framebuffer_lookup_inexistent
[07:41:17] [PASSED] drm_test_framebuffer_modifiers_not_supported
[07:41:17] ================= [PASSED] drm_framebuffer =================
[07:41:17] ================ drm_gem_shmem (8 subtests) ================
[07:41:17] [PASSED] drm_gem_shmem_test_obj_create
[07:41:17] [PASSED] drm_gem_shmem_test_obj_create_private
[07:41:17] [PASSED] drm_gem_shmem_test_pin_pages
[07:41:17] [PASSED] drm_gem_shmem_test_vmap
[07:41:17] [PASSED] drm_gem_shmem_test_get_pages_sgt
[07:41:17] [PASSED] drm_gem_shmem_test_get_sg_table
[07:41:17] [PASSED] drm_gem_shmem_test_madvise
[07:41:17] [PASSED] drm_gem_shmem_test_purge
[07:41:17] ================== [PASSED] drm_gem_shmem ==================
[07:41:17] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[07:41:17] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[07:41:17] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[07:41:17] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[07:41:17] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[07:41:17] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[07:41:17] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[07:41:17] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[07:41:17] [PASSED] Automatic
[07:41:17] [PASSED] Full
[07:41:17] [PASSED] Limited 16:235
[07:41:17] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[07:41:17] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[07:41:17] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[07:41:17] [PASSED] drm_test_check_disable_connector
[07:41:17] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[07:41:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[07:41:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[07:41:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[07:41:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[07:41:17] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[07:41:17] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[07:41:17] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[07:41:17] [PASSED] drm_test_check_output_bpc_dvi
[07:41:17] [PASSED] drm_test_check_output_bpc_format_vic_1
[07:41:17] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[07:41:17] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[07:41:17] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[07:41:17] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[07:41:17] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[07:41:17] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[07:41:17] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[07:41:17] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[07:41:17] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[07:41:17] [PASSED] drm_test_check_broadcast_rgb_value
[07:41:17] [PASSED] drm_test_check_bpc_8_value
[07:41:17] [PASSED] drm_test_check_bpc_10_value
[07:41:17] [PASSED] drm_test_check_bpc_12_value
[07:41:17] [PASSED] drm_test_check_format_value
[07:41:17] [PASSED] drm_test_check_tmds_char_value
[07:41:17] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[07:41:17] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[07:41:17] [PASSED] drm_test_check_mode_valid
[07:41:17] [PASSED] drm_test_check_mode_valid_reject
[07:41:17] [PASSED] drm_test_check_mode_valid_reject_rate
[07:41:17] [PASSED] drm_test_check_mode_valid_reject_max_clock
[07:41:17] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[07:41:17] ================= drm_managed (2 subtests) =================
[07:41:17] [PASSED] drm_test_managed_release_action
[07:41:17] [PASSED] drm_test_managed_run_action
[07:41:17] =================== [PASSED] drm_managed ===================
[07:41:17] =================== drm_mm (6 subtests) ====================
[07:41:17] [PASSED] drm_test_mm_init
[07:41:17] [PASSED] drm_test_mm_debug
[07:41:17] [PASSED] drm_test_mm_align32
[07:41:17] [PASSED] drm_test_mm_align64
[07:41:17] [PASSED] drm_test_mm_lowest
[07:41:17] [PASSED] drm_test_mm_highest
[07:41:17] ===================== [PASSED] drm_mm ======================
[07:41:17] ============= drm_modes_analog_tv (5 subtests) =============
[07:41:17] [PASSED] drm_test_modes_analog_tv_mono_576i
[07:41:17] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[07:41:17] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[07:41:17] [PASSED] drm_test_modes_analog_tv_pal_576i
[07:41:17] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[07:41:17] =============== [PASSED] drm_modes_analog_tv ===============
[07:41:17] ============== drm_plane_helper (2 subtests) ===============
[07:41:17] =============== drm_test_check_plane_state ================
[07:41:17] [PASSED] clipping_simple
[07:41:17] [PASSED] clipping_rotate_reflect
[07:41:17] [PASSED] positioning_simple
[07:41:17] [PASSED] upscaling
[07:41:17] [PASSED] downscaling
[07:41:17] [PASSED] rounding1
[07:41:17] [PASSED] rounding2
[07:41:17] [PASSED] rounding3
[07:41:17] [PASSED] rounding4
[07:41:17] =========== [PASSED] drm_test_check_plane_state ============
[07:41:17] =========== drm_test_check_invalid_plane_state ============
[07:41:17] [PASSED] positioning_invalid
[07:41:17] [PASSED] upscaling_invalid
[07:41:17] [PASSED] downscaling_invalid
[07:41:17] ======= [PASSED] drm_test_check_invalid_plane_state ========
[07:41:17] ================ [PASSED] drm_plane_helper =================
[07:41:17] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[07:41:17] ====== drm_test_connector_helper_tv_get_modes_check =======
[07:41:17] [PASSED] None
[07:41:17] [PASSED] PAL
[07:41:17] [PASSED] NTSC
[07:41:17] [PASSED] Both, NTSC Default
[07:41:17] [PASSED] Both, PAL Default
[07:41:17] [PASSED] Both, NTSC Default, with PAL on command-line
[07:41:17] [PASSED] Both, PAL Default, with NTSC on command-line
[07:41:17] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[07:41:17] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[07:41:17] ================== drm_rect (9 subtests) ===================
[07:41:17] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[07:41:17] [PASSED] drm_test_rect_clip_scaled_not_clipped
[07:41:17] [PASSED] drm_test_rect_clip_scaled_clipped
[07:41:17] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[07:41:17] ================= drm_test_rect_intersect =================
[07:41:17] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[07:41:17] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[07:41:17] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[07:41:17] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[07:41:17] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[07:41:17] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[07:41:17] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[07:41:17] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[07:41:17] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[07:41:17] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[07:41:17] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[07:41:17] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[07:41:17] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[07:41:17] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[07:41:17] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[07:41:17] ============= [PASSED] drm_test_rect_intersect =============
[07:41:17] ================ drm_test_rect_calc_hscale ================
[07:41:17] [PASSED] normal use
[07:41:17] [PASSED] out of max range
[07:41:17] [PASSED] out of min range
[07:41:17] [PASSED] zero dst
[07:41:17] [PASSED] negative src
[07:41:17] [PASSED] negative dst
[07:41:17] ============ [PASSED] drm_test_rect_calc_hscale ============
[07:41:17] ================ drm_test_rect_calc_vscale ================
[07:41:17] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[07:41:17] [PASSED] out of max range
[07:41:17] [PASSED] out of min range
[07:41:17] [PASSED] zero dst
[07:41:17] [PASSED] negative src
[07:41:17] [PASSED] negative dst
[07:41:17] ============ [PASSED] drm_test_rect_calc_vscale ============
[07:41:17] ================== drm_test_rect_rotate ===================
[07:41:17] [PASSED] reflect-x
[07:41:17] [PASSED] reflect-y
[07:41:17] [PASSED] rotate-0
[07:41:17] [PASSED] rotate-90
[07:41:17] [PASSED] rotate-180
[07:41:17] [PASSED] rotate-270
[07:41:17] ============== [PASSED] drm_test_rect_rotate ===============
[07:41:17] ================ drm_test_rect_rotate_inv =================
[07:41:17] [PASSED] reflect-x
[07:41:17] [PASSED] reflect-y
[07:41:17] [PASSED] rotate-0
[07:41:17] [PASSED] rotate-90
[07:41:17] [PASSED] rotate-180
[07:41:17] [PASSED] rotate-270
[07:41:17] ============ [PASSED] drm_test_rect_rotate_inv =============
[07:41:17] ==================== [PASSED] drm_rect =====================
[07:41:17] ============ drm_sysfb_modeset_test (1 subtest) ============
[07:41:17] ============ drm_test_sysfb_build_fourcc_list =============
[07:41:17] [PASSED] no native formats
[07:41:17] [PASSED] XRGB8888 as native format
[07:41:17] [PASSED] remove duplicates
[07:41:17] [PASSED] convert alpha formats
[07:41:17] [PASSED] random formats
[07:41:17] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[07:41:17] ============= [PASSED] drm_sysfb_modeset_test ==============
[07:41:17] ============================================================
[07:41:17] Testing complete. Ran 622 tests: passed: 622
[07:41:17] Elapsed time: 27.152s total, 1.718s configuring, 25.013s building, 0.390s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[07:41:17] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:41:19] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:41:28] Starting KUnit Kernel (1/1)...
[07:41:28] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:41:28] ================= ttm_device (5 subtests) ==================
[07:41:28] [PASSED] ttm_device_init_basic
[07:41:28] [PASSED] ttm_device_init_multiple
[07:41:28] [PASSED] ttm_device_fini_basic
[07:41:28] [PASSED] ttm_device_init_no_vma_man
[07:41:28] ================== ttm_device_init_pools ==================
[07:41:28] [PASSED] No DMA allocations, no DMA32 required
[07:41:28] [PASSED] DMA allocations, DMA32 required
[07:41:28] [PASSED] No DMA allocations, DMA32 required
[07:41:28] [PASSED] DMA allocations, no DMA32 required
[07:41:28] ============== [PASSED] ttm_device_init_pools ==============
[07:41:28] =================== [PASSED] ttm_device ====================
[07:41:28] ================== ttm_pool (8 subtests) ===================
[07:41:28] ================== ttm_pool_alloc_basic ===================
[07:41:28] [PASSED] One page
[07:41:28] [PASSED] More than one page
[07:41:28] [PASSED] Above the allocation limit
[07:41:28] [PASSED] One page, with coherent DMA mappings enabled
[07:41:28] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[07:41:28] ============== [PASSED] ttm_pool_alloc_basic ===============
[07:41:28] ============== ttm_pool_alloc_basic_dma_addr ==============
[07:41:28] [PASSED] One page
[07:41:28] [PASSED] More than one page
[07:41:28] [PASSED] Above the allocation limit
[07:41:28] [PASSED] One page, with coherent DMA mappings enabled
[07:41:28] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[07:41:28] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[07:41:28] [PASSED] ttm_pool_alloc_order_caching_match
[07:41:28] [PASSED] ttm_pool_alloc_caching_mismatch
[07:41:28] [PASSED] ttm_pool_alloc_order_mismatch
[07:41:28] [PASSED] ttm_pool_free_dma_alloc
[07:41:28] [PASSED] ttm_pool_free_no_dma_alloc
[07:41:28] [PASSED] ttm_pool_fini_basic
[07:41:28] ==================== [PASSED] ttm_pool =====================
[07:41:28] ================ ttm_resource (8 subtests) =================
[07:41:28] ================= ttm_resource_init_basic =================
[07:41:28] [PASSED] Init resource in TTM_PL_SYSTEM
[07:41:28] [PASSED] Init resource in TTM_PL_VRAM
[07:41:28] [PASSED] Init resource in a private placement
[07:41:28] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[07:41:28] ============= [PASSED] ttm_resource_init_basic =============
[07:41:28] [PASSED] ttm_resource_init_pinned
[07:41:28] [PASSED] ttm_resource_fini_basic
[07:41:28] [PASSED] ttm_resource_manager_init_basic
[07:41:28] [PASSED] ttm_resource_manager_usage_basic
[07:41:28] [PASSED] ttm_resource_manager_set_used_basic
[07:41:28] [PASSED] ttm_sys_man_alloc_basic
[07:41:28] [PASSED] ttm_sys_man_free_basic
[07:41:28] ================== [PASSED] ttm_resource ===================
[07:41:28] =================== ttm_tt (15 subtests) ===================
[07:41:28] ==================== ttm_tt_init_basic ====================
[07:41:28] [PASSED] Page-aligned size
[07:41:28] [PASSED] Extra pages requested
[07:41:28] ================ [PASSED] ttm_tt_init_basic ================
[07:41:28] [PASSED] ttm_tt_init_misaligned
[07:41:28] [PASSED] ttm_tt_fini_basic
[07:41:28] [PASSED] ttm_tt_fini_sg
[07:41:28] [PASSED] ttm_tt_fini_shmem
[07:41:28] [PASSED] ttm_tt_create_basic
[07:41:28] [PASSED] ttm_tt_create_invalid_bo_type
[07:41:28] [PASSED] ttm_tt_create_ttm_exists
[07:41:28] [PASSED] ttm_tt_create_failed
[07:41:28] [PASSED] ttm_tt_destroy_basic
[07:41:28] [PASSED] ttm_tt_populate_null_ttm
[07:41:28] [PASSED] ttm_tt_populate_populated_ttm
[07:41:28] [PASSED] ttm_tt_unpopulate_basic
[07:41:28] [PASSED] ttm_tt_unpopulate_empty_ttm
[07:41:28] [PASSED] ttm_tt_swapin_basic
[07:41:28] ===================== [PASSED] ttm_tt ======================
[07:41:28] =================== ttm_bo (14 subtests) ===================
[07:41:28] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[07:41:28] [PASSED] Cannot be interrupted and sleeps
[07:41:28] [PASSED] Cannot be interrupted, locks straight away
[07:41:28] [PASSED] Can be interrupted, sleeps
[07:41:28] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[07:41:28] [PASSED] ttm_bo_reserve_locked_no_sleep
[07:41:28] [PASSED] ttm_bo_reserve_no_wait_ticket
[07:41:28] [PASSED] ttm_bo_reserve_double_resv
[07:41:28] [PASSED] ttm_bo_reserve_interrupted
[07:41:28] [PASSED] ttm_bo_reserve_deadlock
[07:41:28] [PASSED] ttm_bo_unreserve_basic
[07:41:28] [PASSED] ttm_bo_unreserve_pinned
[07:41:28] [PASSED] ttm_bo_unreserve_bulk
[07:41:28] [PASSED] ttm_bo_fini_basic
[07:41:28] [PASSED] ttm_bo_fini_shared_resv
[07:41:28] [PASSED] ttm_bo_pin_basic
[07:41:28] [PASSED] ttm_bo_pin_unpin_resource
[07:41:28] [PASSED] ttm_bo_multiple_pin_one_unpin
[07:41:28] ===================== [PASSED] ttm_bo ======================
[07:41:28] ============== ttm_bo_validate (21 subtests) ===============
[07:41:28] ============== ttm_bo_init_reserved_sys_man ===============
[07:41:28] [PASSED] Buffer object for userspace
[07:41:28] [PASSED] Kernel buffer object
[07:41:28] [PASSED] Shared buffer object
[07:41:28] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[07:41:28] ============== ttm_bo_init_reserved_mock_man ==============
[07:41:28] [PASSED] Buffer object for userspace
[07:41:28] [PASSED] Kernel buffer object
[07:41:28] [PASSED] Shared buffer object
[07:41:28] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[07:41:28] [PASSED] ttm_bo_init_reserved_resv
[07:41:28] ================== ttm_bo_validate_basic ==================
[07:41:28] [PASSED] Buffer object for userspace
[07:41:28] [PASSED] Kernel buffer object
[07:41:28] [PASSED] Shared buffer object
[07:41:28] ============== [PASSED] ttm_bo_validate_basic ==============
[07:41:28] [PASSED] ttm_bo_validate_invalid_placement
[07:41:28] ============= ttm_bo_validate_same_placement ==============
[07:41:28] [PASSED] System manager
[07:41:28] [PASSED] VRAM manager
[07:41:28] ========= [PASSED] ttm_bo_validate_same_placement ==========
[07:41:28] [PASSED] ttm_bo_validate_failed_alloc
[07:41:28] [PASSED] ttm_bo_validate_pinned
[07:41:28] [PASSED] ttm_bo_validate_busy_placement
[07:41:28] ================ ttm_bo_validate_multihop =================
[07:41:28] [PASSED] Buffer object for userspace
[07:41:28] [PASSED] Kernel buffer object
[07:41:28] [PASSED] Shared buffer object
[07:41:28] ============ [PASSED] ttm_bo_validate_multihop =============
[07:41:28] ========== ttm_bo_validate_no_placement_signaled ==========
[07:41:28] [PASSED] Buffer object in system domain, no page vector
[07:41:28] [PASSED] Buffer object in system domain with an existing page vector
[07:41:28] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[07:41:28] ======== ttm_bo_validate_no_placement_not_signaled ========
[07:41:28] [PASSED] Buffer object for userspace
[07:41:28] [PASSED] Kernel buffer object
[07:41:28] [PASSED] Shared buffer object
[07:41:28] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[07:41:28] [PASSED] ttm_bo_validate_move_fence_signaled
[07:41:28] ========= ttm_bo_validate_move_fence_not_signaled =========
[07:41:28] [PASSED] Waits for GPU
[07:41:28] [PASSED] Tries to lock straight away
[07:41:28] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[07:41:28] [PASSED] ttm_bo_validate_happy_evict
[07:41:28] [PASSED] ttm_bo_validate_all_pinned_evict
[07:41:28] [PASSED] ttm_bo_validate_allowed_only_evict
[07:41:28] [PASSED] ttm_bo_validate_deleted_evict
[07:41:28] [PASSED] ttm_bo_validate_busy_domain_evict
[07:41:28] [PASSED] ttm_bo_validate_evict_gutting
[07:41:28] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[07:41:28] ================= [PASSED] ttm_bo_validate =================
[07:41:28] ============================================================
[07:41:28] Testing complete. Ran 101 tests: passed: 101
[07:41:28] Elapsed time: 11.331s total, 1.739s configuring, 9.376s building, 0.180s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 18+ messages in thread* ✓ Xe.CI.BAT: success for drm/{i915, xe}/irq: clarify display and parent driver interfaces (rev2)
2025-11-11 7:34 [PATCH v2 0/3] drm/{i915, xe}/irq: clarify display and parent driver interfaces Jani Nikula
` (4 preceding siblings ...)
2025-11-11 7:41 ` ✓ CI.KUnit: success " Patchwork
@ 2025-11-11 8:23 ` Patchwork
2025-11-11 15:25 ` ✓ Xe.CI.Full: " Patchwork
` (4 subsequent siblings)
10 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2025-11-11 8:23 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 2393 bytes --]
== Series Details ==
Series: drm/{i915, xe}/irq: clarify display and parent driver interfaces (rev2)
URL : https://patchwork.freedesktop.org/series/157350/
State : success
== Summary ==
CI Bug Log - changes from xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b_BAT -> xe-pw-157350v2_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-157350v2_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_flip@basic-plain-flip@b-edp1:
- bat-adlp-7: [PASS][1] -> [DMESG-WARN][2] ([Intel XE#4543]) +1 other test dmesg-warn
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/bat-adlp-7/igt@kms_flip@basic-plain-flip@b-edp1.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/bat-adlp-7/igt@kms_flip@basic-plain-flip@b-edp1.html
* igt@xe_waitfence@abstime:
- bat-dg2-oem2: [PASS][3] -> [TIMEOUT][4] ([Intel XE#6506])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/bat-dg2-oem2/igt@xe_waitfence@abstime.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/bat-dg2-oem2/igt@xe_waitfence@abstime.html
* igt@xe_waitfence@engine:
- bat-dg2-oem2: [PASS][5] -> [FAIL][6] ([Intel XE#6519])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/bat-dg2-oem2/igt@xe_waitfence@engine.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/bat-dg2-oem2/igt@xe_waitfence@engine.html
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#6506]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6506
[Intel XE#6519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6519
Build changes
-------------
* IGT: IGT_8618 -> IGT_8620
* Linux: xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b -> xe-pw-157350v2
IGT_8618: 8618
IGT_8620: 8620
xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b: 4ce351022716985e9c1dd18583acd4d3d149cb5b
xe-pw-157350v2: 157350v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/index.html
[-- Attachment #2: Type: text/html, Size: 3031 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread* ✓ Xe.CI.Full: success for drm/{i915, xe}/irq: clarify display and parent driver interfaces (rev2)
2025-11-11 7:34 [PATCH v2 0/3] drm/{i915, xe}/irq: clarify display and parent driver interfaces Jani Nikula
` (5 preceding siblings ...)
2025-11-11 8:23 ` ✓ Xe.CI.BAT: " Patchwork
@ 2025-11-11 15:25 ` Patchwork
2025-11-12 15:29 ` ✗ CI.checkpatch: warning for drm/{i915, xe}/irq: clarify display and parent driver interfaces (rev3) Patchwork
` (3 subsequent siblings)
10 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2025-11-11 15:25 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 87767 bytes --]
== Series Details ==
Series: drm/{i915, xe}/irq: clarify display and parent driver interfaces (rev2)
URL : https://patchwork.freedesktop.org/series/157350/
State : success
== Summary ==
CI Bug Log - changes from xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b_FULL -> xe-pw-157350v2_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-157350v2_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@intel_hwmon@hwmon-write:
- shard-lnl: NOTRUN -> [SKIP][1] ([Intel XE#1125])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-1/igt@intel_hwmon@hwmon-write.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][2] ([Intel XE#2327])
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-5/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
- shard-lnl: NOTRUN -> [SKIP][3] ([Intel XE#3658])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
* igt@kms_big_fb@linear-32bpp-rotate-90:
- shard-dg2-set2: NOTRUN -> [SKIP][4] ([Intel XE#316]) +2 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-433/igt@kms_big_fb@linear-32bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-16bpp-rotate-270:
- shard-lnl: NOTRUN -> [SKIP][5] ([Intel XE#1407]) +2 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-8/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
- shard-adlp: NOTRUN -> [DMESG-FAIL][6] ([Intel XE#4543])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-1/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
* igt@kms_big_fb@y-tiled-16bpp-rotate-180:
- shard-lnl: NOTRUN -> [SKIP][7] ([Intel XE#1124]) +3 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-3/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html
* igt@kms_big_fb@y-tiled-addfb:
- shard-dg2-set2: NOTRUN -> [SKIP][8] ([Intel XE#619])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-434/igt@kms_big_fb@y-tiled-addfb.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
- shard-adlp: [PASS][9] -> [DMESG-FAIL][10] ([Intel XE#4543]) +11 other tests dmesg-fail
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-adlp-8/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-9/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0:
- shard-dg2-set2: NOTRUN -> [SKIP][11] ([Intel XE#1124]) +7 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-435/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
- shard-dg2-set2: NOTRUN -> [SKIP][12] ([Intel XE#607])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-436/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180:
- shard-adlp: NOTRUN -> [SKIP][13] ([Intel XE#1124]) +2 other tests skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-1/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180.html
- shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#1124]) +4 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-7/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180.html
* igt@kms_bw@connected-linear-tiling-3-displays-2160x1440p:
- shard-dg2-set2: NOTRUN -> [SKIP][15] ([Intel XE#2191]) +1 other test skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-463/igt@kms_bw@connected-linear-tiling-3-displays-2160x1440p.html
* igt@kms_bw@linear-tiling-2-displays-3840x2160p:
- shard-dg2-set2: NOTRUN -> [SKIP][16] ([Intel XE#367]) +2 other tests skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-432/igt@kms_bw@linear-tiling-2-displays-3840x2160p.html
- shard-bmg: NOTRUN -> [SKIP][17] ([Intel XE#367])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-6/igt@kms_bw@linear-tiling-2-displays-3840x2160p.html
* igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [SKIP][18] ([Intel XE#787]) +83 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-463/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-6.html
* igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs-cc:
- shard-lnl: NOTRUN -> [SKIP][19] ([Intel XE#2887]) +4 other tests skip
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-1/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
- shard-dg2-set2: [PASS][20] -> [INCOMPLETE][21] ([Intel XE#3862]) +1 other test incomplete
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-432/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-434/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#3432]) +1 other test skip
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc.html
- shard-lnl: NOTRUN -> [SKIP][23] ([Intel XE#3432]) +1 other test skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-2/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][24] ([Intel XE#455] / [Intel XE#787]) +23 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-433/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc@pipe-d-dp-4.html
* igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][25] ([Intel XE#787]) +5 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-4/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-d-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][26] ([Intel XE#455] / [Intel XE#787]) +3 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-4/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-d-hdmi-a-1.html
* igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][27] ([Intel XE#2907])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
- shard-bmg: NOTRUN -> [SKIP][28] ([Intel XE#2887]) +2 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-1/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][29] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#6168])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-6.html
* igt@kms_cdclk@mode-transition@pipe-b-edp-1:
- shard-lnl: NOTRUN -> [SKIP][30] ([Intel XE#4417]) +3 other tests skip
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-7/igt@kms_cdclk@mode-transition@pipe-b-edp-1.html
* igt@kms_chamelium_color@ctm-0-75:
- shard-dg2-set2: NOTRUN -> [SKIP][31] ([Intel XE#306]) +2 other tests skip
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-464/igt@kms_chamelium_color@ctm-0-75.html
- shard-lnl: NOTRUN -> [SKIP][32] ([Intel XE#306])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-7/igt@kms_chamelium_color@ctm-0-75.html
- shard-adlp: NOTRUN -> [SKIP][33] ([Intel XE#306])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-2/igt@kms_chamelium_color@ctm-0-75.html
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#2325])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-8/igt@kms_chamelium_color@ctm-0-75.html
* igt@kms_chamelium_frames@hdmi-frame-dump:
- shard-adlp: NOTRUN -> [SKIP][35] ([Intel XE#373]) +1 other test skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-2/igt@kms_chamelium_frames@hdmi-frame-dump.html
- shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#2252]) +2 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-8/igt@kms_chamelium_frames@hdmi-frame-dump.html
* igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe:
- shard-dg2-set2: NOTRUN -> [SKIP][37] ([Intel XE#373]) +8 other tests skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-436/igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe.html
- shard-lnl: NOTRUN -> [SKIP][38] ([Intel XE#373]) +3 other tests skip
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-5/igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe.html
* igt@kms_chamelium_sharpness_filter@filter-basic:
- shard-lnl: NOTRUN -> [SKIP][39] ([Intel XE#6507])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-3/igt@kms_chamelium_sharpness_filter@filter-basic.html
* igt@kms_color@legacy-gamma-reset:
- shard-adlp: [PASS][40] -> [DMESG-WARN][41] ([Intel XE#2953] / [Intel XE#4173]) +4 other tests dmesg-warn
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-adlp-6/igt@kms_color@legacy-gamma-reset.html
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-2/igt@kms_color@legacy-gamma-reset.html
* igt@kms_content_protection@dp-mst-lic-type-1:
- shard-dg2-set2: NOTRUN -> [SKIP][42] ([Intel XE#307])
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-435/igt@kms_content_protection@dp-mst-lic-type-1.html
* igt@kms_content_protection@legacy@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][43] ([Intel XE#1178])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-5/igt@kms_content_protection@legacy@pipe-a-dp-2.html
* igt@kms_content_protection@uevent:
- shard-dg2-set2: NOTRUN -> [FAIL][44] ([Intel XE#1188]) +1 other test fail
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-463/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@cursor-onscreen-512x170:
- shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#2321])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-1/igt@kms_cursor_crc@cursor-onscreen-512x170.html
* igt@kms_cursor_crc@cursor-random-128x42:
- shard-lnl: NOTRUN -> [SKIP][46] ([Intel XE#1424]) +1 other test skip
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-5/igt@kms_cursor_crc@cursor-random-128x42.html
* igt@kms_cursor_crc@cursor-sliding-32x10:
- shard-bmg: NOTRUN -> [SKIP][47] ([Intel XE#2320])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-7/igt@kms_cursor_crc@cursor-sliding-32x10.html
* igt@kms_cursor_crc@cursor-sliding-512x512:
- shard-dg2-set2: NOTRUN -> [SKIP][48] ([Intel XE#308])
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-435/igt@kms_cursor_crc@cursor-sliding-512x512.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
- shard-bmg: [PASS][49] -> [SKIP][50] ([Intel XE#2291]) +2 other tests skip
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-legacy:
- shard-lnl: NOTRUN -> [SKIP][51] ([Intel XE#309])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipb-legacy.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic:
- shard-bmg: [PASS][52] -> [FAIL][53] ([Intel XE#4633])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-6/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
* igt@kms_cursor_legacy@flip-vs-cursor-legacy:
- shard-bmg: NOTRUN -> [FAIL][54] ([Intel XE#4633])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-4/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
- shard-dg2-set2: NOTRUN -> [SKIP][55] ([Intel XE#323])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-436/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
* igt@kms_display_modes@extended-mode-basic:
- shard-bmg: [PASS][56] -> [SKIP][57] ([Intel XE#4302])
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-2/igt@kms_display_modes@extended-mode-basic.html
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-6/igt@kms_display_modes@extended-mode-basic.html
* igt@kms_dp_link_training@non-uhbr-mst:
- shard-lnl: NOTRUN -> [SKIP][58] ([Intel XE#4354])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-8/igt@kms_dp_link_training@non-uhbr-mst.html
* igt@kms_dsc@dsc-with-formats:
- shard-lnl: NOTRUN -> [SKIP][59] ([Intel XE#2244])
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-1/igt@kms_dsc@dsc-with-formats.html
* igt@kms_dsc@dsc-with-output-formats-with-bpc:
- shard-bmg: NOTRUN -> [SKIP][60] ([Intel XE#2244])
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-5/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats:
- shard-lnl: NOTRUN -> [SKIP][61] ([Intel XE#4422])
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-5/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html
* igt@kms_flip@2x-busy-flip:
- shard-adlp: NOTRUN -> [SKIP][62] ([Intel XE#310])
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-8/igt@kms_flip@2x-busy-flip.html
* igt@kms_flip@2x-plain-flip-fb-recreate:
- shard-bmg: [PASS][63] -> [SKIP][64] ([Intel XE#2316]) +6 other tests skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-5/igt@kms_flip@2x-plain-flip-fb-recreate.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-6/igt@kms_flip@2x-plain-flip-fb-recreate.html
- shard-lnl: NOTRUN -> [SKIP][65] ([Intel XE#1421]) +1 other test skip
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-7/igt@kms_flip@2x-plain-flip-fb-recreate.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
- shard-lnl: [PASS][66] -> [FAIL][67] ([Intel XE#301] / [Intel XE#3149]) +1 other test fail
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
* igt@kms_flip@flip-vs-suspend@b-hdmi-a1:
- shard-adlp: [PASS][68] -> [DMESG-WARN][69] ([Intel XE#4543]) +8 other tests dmesg-warn
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-adlp-3/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-4/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling:
- shard-lnl: NOTRUN -> [SKIP][70] ([Intel XE#1401] / [Intel XE#1745]) +2 other tests skip
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-8/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][71] ([Intel XE#1401]) +2 other tests skip
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-4/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling:
- shard-adlp: [PASS][72] -> [DMESG-FAIL][73] ([Intel XE#4543] / [Intel XE#4921]) +1 other test dmesg-fail
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-adlp-8/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling.html
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-9/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
- shard-adlp: NOTRUN -> [SKIP][74] ([Intel XE#455]) +1 other test skip
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-2/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html
- shard-bmg: NOTRUN -> [SKIP][75] ([Intel XE#2293] / [Intel XE#2380])
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-8/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][76] ([Intel XE#2293])
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-8/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@drrs-1p-offscreen-pri-shrfb-draw-mmap-wc:
- shard-lnl: NOTRUN -> [SKIP][77] ([Intel XE#6312])
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-4/igt@kms_frontbuffer_tracking@drrs-1p-offscreen-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@drrs-slowdraw:
- shard-lnl: NOTRUN -> [SKIP][78] ([Intel XE#651]) +3 other tests skip
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-2/igt@kms_frontbuffer_tracking@drrs-slowdraw.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][79] ([Intel XE#6313])
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-lnl: NOTRUN -> [SKIP][80] ([Intel XE#656]) +11 other tests skip
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
- shard-bmg: NOTRUN -> [SKIP][81] ([Intel XE#5390]) +1 other test skip
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbc-tiling-4:
- shard-adlp: NOTRUN -> [SKIP][82] ([Intel XE#1151])
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-2/igt@kms_frontbuffer_tracking@fbc-tiling-4.html
* igt@kms_frontbuffer_tracking@fbc-tiling-y:
- shard-lnl: NOTRUN -> [SKIP][83] ([Intel XE#1469])
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-7/igt@kms_frontbuffer_tracking@fbc-tiling-y.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][84] ([Intel XE#2311]) +9 other tests skip
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-mmap-wc.html
- shard-adlp: NOTRUN -> [SKIP][85] ([Intel XE#651]) +1 other test skip
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-3/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][86] ([Intel XE#651]) +17 other tests skip
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-433/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt:
- shard-adlp: NOTRUN -> [SKIP][87] ([Intel XE#653])
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-move:
- shard-bmg: NOTRUN -> [SKIP][88] ([Intel XE#2312]) +1 other test skip
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-plflip-blt:
- shard-adlp: NOTRUN -> [SKIP][89] ([Intel XE#656]) +1 other test skip
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][90] ([Intel XE#6312]) +1 other test skip
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-466/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-blt.html
- shard-adlp: NOTRUN -> [SKIP][91] ([Intel XE#6312])
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-1/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][92] ([Intel XE#2313]) +8 other tests skip
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][93] ([Intel XE#653]) +17 other tests skip
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-463/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-blt.html
* igt@kms_hdr@invalid-metadata-sizes:
- shard-lnl: NOTRUN -> [SKIP][94] ([Intel XE#1503]) +1 other test skip
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-5/igt@kms_hdr@invalid-metadata-sizes.html
* igt@kms_joiner@basic-ultra-joiner:
- shard-bmg: NOTRUN -> [SKIP][95] ([Intel XE#2927])
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-6/igt@kms_joiner@basic-ultra-joiner.html
* igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-factor-0-25:
- shard-lnl: NOTRUN -> [SKIP][96] ([Intel XE#2763]) +11 other tests skip
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-1/igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-factor-0-25.html
* igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-a:
- shard-bmg: NOTRUN -> [SKIP][97] ([Intel XE#2763]) +9 other tests skip
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-8/igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-a.html
* igt@kms_pm_backlight@fade:
- shard-bmg: NOTRUN -> [SKIP][98] ([Intel XE#870])
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-2/igt@kms_pm_backlight@fade.html
- shard-dg2-set2: NOTRUN -> [SKIP][99] ([Intel XE#870])
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-464/igt@kms_pm_backlight@fade.html
* igt@kms_pm_lpsp@kms-lpsp:
- shard-bmg: NOTRUN -> [SKIP][100] ([Intel XE#2499])
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-1/igt@kms_pm_lpsp@kms-lpsp.html
* igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
- shard-lnl: NOTRUN -> [SKIP][101] ([Intel XE#1439] / [Intel XE#836])
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-1/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
* igt@kms_pm_rpm@universal-planes:
- shard-adlp: [PASS][102] -> [ABORT][103] ([Intel XE#5545])
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-adlp-1/igt@kms_pm_rpm@universal-planes.html
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-6/igt@kms_pm_rpm@universal-planes.html
* igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area:
- shard-dg2-set2: NOTRUN -> [SKIP][104] ([Intel XE#1406] / [Intel XE#1489]) +4 other tests skip
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-432/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area:
- shard-bmg: NOTRUN -> [SKIP][105] ([Intel XE#1406] / [Intel XE#1489]) +2 other tests skip
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-4/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@pr-cursor-plane-update-sf:
- shard-lnl: NOTRUN -> [SKIP][106] ([Intel XE#1406] / [Intel XE#2893]) +2 other tests skip
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-7/igt@kms_psr2_sf@pr-cursor-plane-update-sf.html
* igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf:
- shard-adlp: NOTRUN -> [SKIP][107] ([Intel XE#1406] / [Intel XE#1489])
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-2/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_su@page_flip-p010:
- shard-lnl: NOTRUN -> [SKIP][108] ([Intel XE#1128] / [Intel XE#1406])
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-5/igt@kms_psr2_su@page_flip-p010.html
* igt@kms_psr@fbc-pr-dpms:
- shard-dg2-set2: NOTRUN -> [SKIP][109] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +8 other tests skip
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-435/igt@kms_psr@fbc-pr-dpms.html
* igt@kms_psr@fbc-psr-cursor-plane-onoff:
- shard-adlp: NOTRUN -> [SKIP][110] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929])
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-4/igt@kms_psr@fbc-psr-cursor-plane-onoff.html
* igt@kms_psr@fbc-psr2-primary-render:
- shard-lnl: NOTRUN -> [SKIP][111] ([Intel XE#1406])
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-7/igt@kms_psr@fbc-psr2-primary-render.html
* igt@kms_psr@fbc-psr2-primary-render@edp-1:
- shard-lnl: NOTRUN -> [SKIP][112] ([Intel XE#1406] / [Intel XE#4609])
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-7/igt@kms_psr@fbc-psr2-primary-render@edp-1.html
* igt@kms_psr@psr-primary-page-flip:
- shard-bmg: NOTRUN -> [SKIP][113] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +3 other tests skip
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-5/igt@kms_psr@psr-primary-page-flip.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-dg2-set2: NOTRUN -> [SKIP][114] ([Intel XE#1406] / [Intel XE#2939])
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-432/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@primary-x-tiled-reflect-x-180:
- shard-lnl: NOTRUN -> [FAIL][115] ([Intel XE#4689])
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-5/igt@kms_rotation_crc@primary-x-tiled-reflect-x-180.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
- shard-bmg: NOTRUN -> [SKIP][116] ([Intel XE#3414] / [Intel XE#3904])
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-2/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
- shard-dg2-set2: NOTRUN -> [SKIP][117] ([Intel XE#3414])
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-464/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
* igt@kms_setmode@clone-exclusive-crtc:
- shard-bmg: [PASS][118] -> [SKIP][119] ([Intel XE#1435])
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-4/igt@kms_setmode@clone-exclusive-crtc.html
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-6/igt@kms_setmode@clone-exclusive-crtc.html
* igt@kms_vrr@flip-dpms:
- shard-dg2-set2: NOTRUN -> [SKIP][120] ([Intel XE#455]) +16 other tests skip
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-433/igt@kms_vrr@flip-dpms.html
* igt@kms_vrr@lobf:
- shard-bmg: NOTRUN -> [SKIP][121] ([Intel XE#2168])
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-4/igt@kms_vrr@lobf.html
- shard-dg2-set2: NOTRUN -> [SKIP][122] ([Intel XE#2168])
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-435/igt@kms_vrr@lobf.html
* igt@xe_ccs@ctrl-surf-copy-new-ctx:
- shard-adlp: NOTRUN -> [SKIP][123] ([Intel XE#455] / [Intel XE#488] / [Intel XE#5607])
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-6/igt@xe_ccs@ctrl-surf-copy-new-ctx.html
* igt@xe_configfs@survivability-mode:
- shard-lnl: NOTRUN -> [SKIP][124] ([Intel XE#6010])
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-3/igt@xe_configfs@survivability-mode.html
* igt@xe_copy_basic@mem-copy-linear-0xfffe:
- shard-dg2-set2: NOTRUN -> [SKIP][125] ([Intel XE#1123])
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-432/igt@xe_copy_basic@mem-copy-linear-0xfffe.html
- shard-adlp: NOTRUN -> [SKIP][126] ([Intel XE#1123])
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-2/igt@xe_copy_basic@mem-copy-linear-0xfffe.html
* igt@xe_copy_basic@mem-set-linear-0x3fff:
- shard-dg2-set2: NOTRUN -> [SKIP][127] ([Intel XE#1126])
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-432/igt@xe_copy_basic@mem-set-linear-0x3fff.html
* igt@xe_eu_stall@invalid-event-report-count:
- shard-dg2-set2: NOTRUN -> [SKIP][128] ([Intel XE#5626]) +2 other tests skip
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-464/igt@xe_eu_stall@invalid-event-report-count.html
* igt@xe_eudebug_online@interrupt-all-set-breakpoint:
- shard-dg2-set2: NOTRUN -> [SKIP][129] ([Intel XE#4837]) +9 other tests skip
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-435/igt@xe_eudebug_online@interrupt-all-set-breakpoint.html
- shard-lnl: NOTRUN -> [SKIP][130] ([Intel XE#4837]) +4 other tests skip
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-2/igt@xe_eudebug_online@interrupt-all-set-breakpoint.html
- shard-adlp: NOTRUN -> [SKIP][131] ([Intel XE#4837] / [Intel XE#5565]) +1 other test skip
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-2/igt@xe_eudebug_online@interrupt-all-set-breakpoint.html
* igt@xe_eudebug_online@set-breakpoint:
- shard-bmg: NOTRUN -> [SKIP][132] ([Intel XE#4837]) +2 other tests skip
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-6/igt@xe_eudebug_online@set-breakpoint.html
* igt@xe_evict@evict-beng-mixed-threads-large:
- shard-adlp: NOTRUN -> [SKIP][133] ([Intel XE#261])
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-4/igt@xe_evict@evict-beng-mixed-threads-large.html
* igt@xe_evict@evict-threads-small-multi-vm:
- shard-lnl: NOTRUN -> [SKIP][134] ([Intel XE#688]) +4 other tests skip
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-1/igt@xe_evict@evict-threads-small-multi-vm.html
* igt@xe_evict_ccs@evict-overcommit-parallel-instantfree-reopen:
- shard-adlp: NOTRUN -> [SKIP][135] ([Intel XE#688])
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-4/igt@xe_evict_ccs@evict-overcommit-parallel-instantfree-reopen.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-rebind:
- shard-adlp: NOTRUN -> [SKIP][136] ([Intel XE#1392] / [Intel XE#5575])
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-8/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-rebind.html
- shard-bmg: NOTRUN -> [SKIP][137] ([Intel XE#2322])
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-5/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-rebind.html
* igt@xe_exec_basic@multigpu-no-exec-userptr:
- shard-lnl: NOTRUN -> [SKIP][138] ([Intel XE#1392]) +2 other tests skip
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-1/igt@xe_exec_basic@multigpu-no-exec-userptr.html
* igt@xe_exec_fault_mode@twice-rebind-prefetch:
- shard-adlp: NOTRUN -> [SKIP][139] ([Intel XE#288] / [Intel XE#5561]) +1 other test skip
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-9/igt@xe_exec_fault_mode@twice-rebind-prefetch.html
* igt@xe_exec_fault_mode@twice-userptr-invalidate-race:
- shard-dg2-set2: NOTRUN -> [SKIP][140] ([Intel XE#288]) +16 other tests skip
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-433/igt@xe_exec_fault_mode@twice-userptr-invalidate-race.html
* igt@xe_exec_reset@parallel-gt-reset:
- shard-adlp: [PASS][141] -> [DMESG-WARN][142] ([Intel XE#3876])
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-adlp-6/igt@xe_exec_reset@parallel-gt-reset.html
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-6/igt@xe_exec_reset@parallel-gt-reset.html
* igt@xe_exec_system_allocator@process-many-execqueues-malloc-fork-read:
- shard-adlp: NOTRUN -> [SKIP][143] ([Intel XE#4915]) +35 other tests skip
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-9/igt@xe_exec_system_allocator@process-many-execqueues-malloc-fork-read.html
* igt@xe_exec_system_allocator@process-many-execqueues-mmap-new-huge:
- shard-bmg: NOTRUN -> [SKIP][144] ([Intel XE#4943]) +7 other tests skip
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-5/igt@xe_exec_system_allocator@process-many-execqueues-mmap-new-huge.html
* igt@xe_exec_system_allocator@process-many-stride-mmap-prefetch-shared:
- shard-dg2-set2: NOTRUN -> [SKIP][145] ([Intel XE#4915]) +225 other tests skip
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-432/igt@xe_exec_system_allocator@process-many-stride-mmap-prefetch-shared.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-mmap-new-huge-nomemset:
- shard-lnl: NOTRUN -> [SKIP][146] ([Intel XE#4943]) +9 other tests skip
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-1/igt@xe_exec_system_allocator@threads-shared-vm-many-large-mmap-new-huge-nomemset.html
* igt@xe_live_ktest@xe_eudebug:
- shard-lnl: NOTRUN -> [SKIP][147] ([Intel XE#2833])
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-2/igt@xe_live_ktest@xe_eudebug.html
* igt@xe_media_fill@media-fill:
- shard-bmg: NOTRUN -> [SKIP][148] ([Intel XE#2459] / [Intel XE#2596])
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-1/igt@xe_media_fill@media-fill.html
- shard-dg2-set2: NOTRUN -> [SKIP][149] ([Intel XE#560])
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-436/igt@xe_media_fill@media-fill.html
* igt@xe_oa@invalid-remove-userspace-config:
- shard-adlp: NOTRUN -> [SKIP][150] ([Intel XE#3573]) +1 other test skip
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-2/igt@xe_oa@invalid-remove-userspace-config.html
* igt@xe_oa@oa-tlb-invalidate:
- shard-lnl: NOTRUN -> [SKIP][151] ([Intel XE#2248])
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-5/igt@xe_oa@oa-tlb-invalidate.html
- shard-bmg: NOTRUN -> [SKIP][152] ([Intel XE#2248])
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-1/igt@xe_oa@oa-tlb-invalidate.html
* igt@xe_oa@polling-small-buf:
- shard-dg2-set2: NOTRUN -> [SKIP][153] ([Intel XE#3573]) +4 other tests skip
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-464/igt@xe_oa@polling-small-buf.html
* igt@xe_pat@pat-index-xelp:
- shard-lnl: NOTRUN -> [SKIP][154] ([Intel XE#977])
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-2/igt@xe_pat@pat-index-xelp.html
* igt@xe_peer2peer@write:
- shard-bmg: NOTRUN -> [SKIP][155] ([Intel XE#2427])
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-4/igt@xe_peer2peer@write.html
- shard-adlp: NOTRUN -> [SKIP][156] ([Intel XE#1061])
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-9/igt@xe_peer2peer@write.html
- shard-lnl: NOTRUN -> [SKIP][157] ([Intel XE#1061])
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-1/igt@xe_peer2peer@write.html
* igt@xe_peer2peer@write@write-gpua-vram01-gpub-system-p2p:
- shard-dg2-set2: NOTRUN -> [SKIP][158] ([Intel XE#6566])
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-463/igt@xe_peer2peer@write@write-gpua-vram01-gpub-system-p2p.html
* igt@xe_pm_residency@idle-residency:
- shard-dg2-set2: NOTRUN -> [FAIL][159] ([Intel XE#6362]) +1 other test fail
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-436/igt@xe_pm_residency@idle-residency.html
* igt@xe_pmu@engine-activity-accuracy-90:
- shard-lnl: [PASS][160] -> [FAIL][161] ([Intel XE#6251]) +4 other tests fail
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-lnl-8/igt@xe_pmu@engine-activity-accuracy-90.html
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-8/igt@xe_pmu@engine-activity-accuracy-90.html
* igt@xe_pmu@fn-engine-activity-sched-if-idle:
- shard-lnl: NOTRUN -> [SKIP][162] ([Intel XE#4650])
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-1/igt@xe_pmu@fn-engine-activity-sched-if-idle.html
* igt@xe_pmu@gt-c6-idle:
- shard-dg2-set2: NOTRUN -> [FAIL][163] ([Intel XE#6366])
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-435/igt@xe_pmu@gt-c6-idle.html
* igt@xe_pxp@pxp-stale-bo-exec-post-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][164] ([Intel XE#4733])
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-435/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html
* igt@xe_query@multigpu-query-engines:
- shard-lnl: NOTRUN -> [SKIP][165] ([Intel XE#944]) +1 other test skip
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-1/igt@xe_query@multigpu-query-engines.html
* igt@xe_query@multigpu-query-invalid-cs-cycles:
- shard-dg2-set2: NOTRUN -> [SKIP][166] ([Intel XE#944]) +2 other tests skip
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-436/igt@xe_query@multigpu-query-invalid-cs-cycles.html
* igt@xe_query@multigpu-query-uc-fw-version-huc:
- shard-adlp: NOTRUN -> [SKIP][167] ([Intel XE#944])
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-8/igt@xe_query@multigpu-query-uc-fw-version-huc.html
- shard-bmg: NOTRUN -> [SKIP][168] ([Intel XE#944])
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-6/igt@xe_query@multigpu-query-uc-fw-version-huc.html
* igt@xe_render_copy@render-stress-2-copies:
- shard-dg2-set2: NOTRUN -> [SKIP][169] ([Intel XE#4814]) +1 other test skip
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-435/igt@xe_render_copy@render-stress-2-copies.html
* igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling:
- shard-dg2-set2: NOTRUN -> [SKIP][170] ([Intel XE#4130]) +1 other test skip
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-436/igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling.html
* igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs:
- shard-lnl: NOTRUN -> [SKIP][171] ([Intel XE#4130])
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-1/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs.html
* igt@xe_sriov_flr@flr-vf1-clear:
- shard-lnl: NOTRUN -> [SKIP][172] ([Intel XE#3342])
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-7/igt@xe_sriov_flr@flr-vf1-clear.html
* igt@xe_sriov_scheduling@nonpreempt-engine-resets:
- shard-dg2-set2: NOTRUN -> [SKIP][173] ([Intel XE#4351])
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-435/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html
* igt@xe_survivability@i2c-functionality:
- shard-dg2-set2: NOTRUN -> [SKIP][174] ([Intel XE#6529])
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-436/igt@xe_survivability@i2c-functionality.html
#### Possible fixes ####
* igt@intel_hwmon@hwmon-write:
- shard-bmg: [FAIL][175] ([Intel XE#4665]) -> [PASS][176]
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-5/igt@intel_hwmon@hwmon-write.html
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-4/igt@intel_hwmon@hwmon-write.html
* igt@kms_big_fb@x-tiled-8bpp-rotate-0:
- shard-adlp: [DMESG-FAIL][177] ([Intel XE#4543]) -> [PASS][178] +12 other tests pass
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-adlp-9/igt@kms_big_fb@x-tiled-8bpp-rotate-0.html
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-8/igt@kms_big_fb@x-tiled-8bpp-rotate-0.html
* igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p:
- shard-bmg: [SKIP][179] ([Intel XE#2314] / [Intel XE#2894]) -> [PASS][180]
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-2/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-bmg: [INCOMPLETE][181] ([Intel XE#3862]) -> [PASS][182] +1 other test pass
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-4/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
- shard-dg2-set2: [INCOMPLETE][183] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4345] / [Intel XE#6168]) -> [PASS][184]
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-dp-4:
- shard-dg2-set2: [INCOMPLETE][185] ([Intel XE#6168]) -> [PASS][186]
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-dp-4.html
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-hdmi-a-6:
- shard-dg2-set2: [DMESG-WARN][187] ([Intel XE#1727] / [Intel XE#3113]) -> [PASS][188]
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-hdmi-a-6.html
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6:
- shard-dg2-set2: [INCOMPLETE][189] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522]) -> [PASS][190]
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6.html
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
- shard-bmg: [SKIP][191] ([Intel XE#2291]) -> [PASS][192] +2 other tests pass
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-7/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-bmg: [FAIL][193] ([Intel XE#1475]) -> [PASS][194]
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
- shard-bmg: [SKIP][195] ([Intel XE#2316]) -> [PASS][196] +6 other tests pass
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-6/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-1/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1:
- shard-adlp: [DMESG-WARN][197] ([Intel XE#4543]) -> [PASS][198] +10 other tests pass
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-adlp-2/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1.html
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-9/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1.html
* igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a1:
- shard-adlp: [FAIL][199] ([Intel XE#301]) -> [PASS][200]
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-adlp-2/igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a1.html
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-9/igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a1.html
* igt@kms_joiner@invalid-modeset-force-big-joiner:
- shard-bmg: [SKIP][201] ([Intel XE#3012]) -> [PASS][202]
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-6/igt@kms_joiner@invalid-modeset-force-big-joiner.html
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-7/igt@kms_joiner@invalid-modeset-force-big-joiner.html
* igt@kms_plane_alpha_blend@alpha-opaque-fb@pipe-a-hdmi-a-1:
- shard-adlp: [DMESG-WARN][203] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][204] +3 other tests pass
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-adlp-8/igt@kms_plane_alpha_blend@alpha-opaque-fb@pipe-a-hdmi-a-1.html
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-1/igt@kms_plane_alpha_blend@alpha-opaque-fb@pipe-a-hdmi-a-1.html
* igt@kms_pm_dc@dc6-psr:
- shard-lnl: [FAIL][205] ([Intel XE#718]) -> [PASS][206]
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-lnl-2/igt@kms_pm_dc@dc6-psr.html
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-lnl-3/igt@kms_pm_dc@dc6-psr.html
* igt@xe_compute_preempt@compute-preempt-many-vram-evict@engine-drm_xe_engine_class_compute:
- shard-bmg: [ABORT][207] ([Intel XE#3970]) -> [PASS][208] +1 other test pass
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-1/igt@xe_compute_preempt@compute-preempt-many-vram-evict@engine-drm_xe_engine_class_compute.html
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-5/igt@xe_compute_preempt@compute-preempt-many-vram-evict@engine-drm_xe_engine_class_compute.html
* igt@xe_exec_system_allocator@many-stride-malloc-prefetch:
- shard-bmg: [WARN][209] ([Intel XE#5786]) -> [PASS][210]
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-4/igt@xe_exec_system_allocator@many-stride-malloc-prefetch.html
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-5/igt@xe_exec_system_allocator@many-stride-malloc-prefetch.html
* igt@xe_exec_system_allocator@threads-many-stride-new-busy-nomemset:
- shard-bmg: [INCOMPLETE][211] ([Intel XE#6480]) -> [PASS][212]
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-8/igt@xe_exec_system_allocator@threads-many-stride-new-busy-nomemset.html
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-1/igt@xe_exec_system_allocator@threads-many-stride-new-busy-nomemset.html
* igt@xe_module_load@load:
- shard-bmg: ([PASS][213], [PASS][214], [PASS][215], [PASS][216], [PASS][217], [PASS][218], [PASS][219], [PASS][220], [PASS][221], [PASS][222], [PASS][223], [PASS][224], [PASS][225], [PASS][226], [PASS][227], [PASS][228], [PASS][229], [PASS][230], [PASS][231], [SKIP][232], [PASS][233], [PASS][234], [PASS][235], [PASS][236], [PASS][237], [PASS][238]) ([Intel XE#2457]) -> ([PASS][239], [PASS][240], [PASS][241], [PASS][242], [PASS][243], [PASS][244], [PASS][245], [PASS][246], [PASS][247], [PASS][248], [PASS][249], [PASS][250], [PASS][251], [PASS][252], [PASS][253], [PASS][254], [PASS][255], [PASS][256], [PASS][257], [PASS][258], [PASS][259], [PASS][260], [PASS][261], [PASS][262], [PASS][263])
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-6/igt@xe_module_load@load.html
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-5/igt@xe_module_load@load.html
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-8/igt@xe_module_load@load.html
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-4/igt@xe_module_load@load.html
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-8/igt@xe_module_load@load.html
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-4/igt@xe_module_load@load.html
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-7/igt@xe_module_load@load.html
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-7/igt@xe_module_load@load.html
[221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-7/igt@xe_module_load@load.html
[222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-2/igt@xe_module_load@load.html
[223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-1/igt@xe_module_load@load.html
[224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-6/igt@xe_module_load@load.html
[225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-6/igt@xe_module_load@load.html
[226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-8/igt@xe_module_load@load.html
[227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-2/igt@xe_module_load@load.html
[228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-5/igt@xe_module_load@load.html
[229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-8/igt@xe_module_load@load.html
[230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-2/igt@xe_module_load@load.html
[231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-6/igt@xe_module_load@load.html
[232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-5/igt@xe_module_load@load.html
[233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-5/igt@xe_module_load@load.html
[234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-2/igt@xe_module_load@load.html
[235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-1/igt@xe_module_load@load.html
[236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-1/igt@xe_module_load@load.html
[237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-4/igt@xe_module_load@load.html
[238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-7/igt@xe_module_load@load.html
[239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-7/igt@xe_module_load@load.html
[240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-1/igt@xe_module_load@load.html
[241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-1/igt@xe_module_load@load.html
[242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-5/igt@xe_module_load@load.html
[243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-2/igt@xe_module_load@load.html
[244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-6/igt@xe_module_load@load.html
[245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-6/igt@xe_module_load@load.html
[246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-6/igt@xe_module_load@load.html
[247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-8/igt@xe_module_load@load.html
[248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-7/igt@xe_module_load@load.html
[249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-2/igt@xe_module_load@load.html
[250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-8/igt@xe_module_load@load.html
[251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-8/igt@xe_module_load@load.html
[252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-7/igt@xe_module_load@load.html
[253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-5/igt@xe_module_load@load.html
[254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-5/igt@xe_module_load@load.html
[255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-4/igt@xe_module_load@load.html
[256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-1/igt@xe_module_load@load.html
[257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-4/igt@xe_module_load@load.html
[258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-4/igt@xe_module_load@load.html
[259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-5/igt@xe_module_load@load.html
[260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-2/igt@xe_module_load@load.html
[261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-2/igt@xe_module_load@load.html
[262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-1/igt@xe_module_load@load.html
[263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-8/igt@xe_module_load@load.html
- shard-dg2-set2: ([PASS][264], [PASS][265], [PASS][266], [PASS][267], [PASS][268], [PASS][269], [PASS][270], [PASS][271], [PASS][272], [PASS][273], [PASS][274], [PASS][275], [PASS][276], [PASS][277], [PASS][278], [PASS][279], [PASS][280], [SKIP][281], [PASS][282], [PASS][283], [PASS][284], [PASS][285], [PASS][286], [PASS][287], [PASS][288]) ([Intel XE#378]) -> ([PASS][289], [PASS][290], [PASS][291], [PASS][292], [PASS][293], [PASS][294], [PASS][295], [PASS][296], [PASS][297], [PASS][298], [PASS][299], [PASS][300], [PASS][301], [PASS][302], [PASS][303], [PASS][304], [PASS][305], [PASS][306], [PASS][307], [PASS][308], [PASS][309], [PASS][310], [PASS][311], [PASS][312], [PASS][313])
[264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-432/igt@xe_module_load@load.html
[265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-432/igt@xe_module_load@load.html
[266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-463/igt@xe_module_load@load.html
[267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-464/igt@xe_module_load@load.html
[268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-466/igt@xe_module_load@load.html
[269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-466/igt@xe_module_load@load.html
[270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-433/igt@xe_module_load@load.html
[271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-466/igt@xe_module_load@load.html
[272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-436/igt@xe_module_load@load.html
[273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-436/igt@xe_module_load@load.html
[274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-463/igt@xe_module_load@load.html
[275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-466/igt@xe_module_load@load.html
[276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-433/igt@xe_module_load@load.html
[277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-432/igt@xe_module_load@load.html
[278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-464/igt@xe_module_load@load.html
[279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-464/igt@xe_module_load@load.html
[280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-436/igt@xe_module_load@load.html
[281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-436/igt@xe_module_load@load.html
[282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-434/igt@xe_module_load@load.html
[283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-435/igt@xe_module_load@load.html
[284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-435/igt@xe_module_load@load.html
[285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-434/igt@xe_module_load@load.html
[286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-435/igt@xe_module_load@load.html
[287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-432/igt@xe_module_load@load.html
[288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-434/igt@xe_module_load@load.html
[289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-435/igt@xe_module_load@load.html
[290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-435/igt@xe_module_load@load.html
[291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-432/igt@xe_module_load@load.html
[292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-466/igt@xe_module_load@load.html
[293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-464/igt@xe_module_load@load.html
[294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-463/igt@xe_module_load@load.html
[295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-432/igt@xe_module_load@load.html
[296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-435/igt@xe_module_load@load.html
[297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-435/igt@xe_module_load@load.html
[298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-463/igt@xe_module_load@load.html
[299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-464/igt@xe_module_load@load.html
[300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-433/igt@xe_module_load@load.html
[301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-433/igt@xe_module_load@load.html
[302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-466/igt@xe_module_load@load.html
[303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-464/igt@xe_module_load@load.html
[304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-434/igt@xe_module_load@load.html
[305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-433/igt@xe_module_load@load.html
[306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-434/igt@xe_module_load@load.html
[307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-466/igt@xe_module_load@load.html
[308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-436/igt@xe_module_load@load.html
[309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-436/igt@xe_module_load@load.html
[310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-434/igt@xe_module_load@load.html
[311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-436/igt@xe_module_load@load.html
[312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-432/igt@xe_module_load@load.html
[313]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-463/igt@xe_module_load@load.html
* igt@xe_sriov_auto_provisioning@selfconfig-reprovision-reduce-numvfs:
- shard-bmg: [FAIL][314] ([Intel XE#5937]) -> [PASS][315] +1 other test pass
[314]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-6/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-reduce-numvfs.html
[315]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-1/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-reduce-numvfs.html
* igt@xe_sriov_flr@flr-twice:
- shard-bmg: [FAIL][316] ([Intel XE#6569]) -> [PASS][317]
[316]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-5/igt@xe_sriov_flr@flr-twice.html
[317]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-4/igt@xe_sriov_flr@flr-twice.html
#### Warnings ####
* igt@kms_async_flips@crc-atomic@pipe-c-hdmi-a-1:
- shard-adlp: [FAIL][318] ([Intel XE#3884]) -> [DMESG-FAIL][319] ([Intel XE#4543])
[318]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-adlp-8/igt@kms_async_flips@crc-atomic@pipe-c-hdmi-a-1.html
[319]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-9/igt@kms_async_flips@crc-atomic@pipe-c-hdmi-a-1.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
- shard-dg2-set2: [INCOMPLETE][320] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522]) -> [INCOMPLETE][321] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4345] / [Intel XE#6168])
[320]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
[321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
* igt@kms_content_protection@legacy:
- shard-bmg: [SKIP][322] ([Intel XE#2341]) -> [FAIL][323] ([Intel XE#1178])
[322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-6/igt@kms_content_protection@legacy.html
[323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-5/igt@kms_content_protection@legacy.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-adlp: [DMESG-WARN][324] ([Intel XE#2953] / [Intel XE#4173]) -> [DMESG-WARN][325] ([Intel XE#4543]) +2 other tests dmesg-warn
[324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-adlp-6/igt@kms_flip@flip-vs-suspend-interruptible.html
[325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-8/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt:
- shard-bmg: [SKIP][326] ([Intel XE#2312]) -> [SKIP][327] ([Intel XE#2311]) +14 other tests skip
[326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
[327]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt:
- shard-adlp: [FAIL][328] ([Intel XE#5671]) -> [DMESG-FAIL][329] ([Intel XE#4543]) +1 other test dmesg-fail
[328]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-adlp-1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt.html
[329]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen:
- shard-bmg: [SKIP][330] ([Intel XE#5390]) -> [SKIP][331] ([Intel XE#2312]) +4 other tests skip
[330]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html
[331]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt:
- shard-bmg: [SKIP][332] ([Intel XE#2312]) -> [SKIP][333] ([Intel XE#5390]) +6 other tests skip
[332]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt.html
[333]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-indfb-plflip-blt:
- shard-bmg: [SKIP][334] ([Intel XE#2311]) -> [SKIP][335] ([Intel XE#2312]) +9 other tests skip
[334]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-indfb-plflip-blt.html
[335]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-pri-indfb-multidraw:
- shard-bmg: [SKIP][336] ([Intel XE#2313]) -> [SKIP][337] ([Intel XE#2312]) +7 other tests skip
[336]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-pri-indfb-multidraw.html
[337]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
- shard-bmg: [SKIP][338] ([Intel XE#2312]) -> [SKIP][339] ([Intel XE#2313]) +12 other tests skip
[338]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
[339]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][340] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][341] ([Intel XE#3544])
[340]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-8/igt@kms_hdr@brightness-with-hdr.html
[341]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-1/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_pm_dc@dc6-dpms:
- shard-adlp: [FAIL][342] ([Intel XE#718]) -> [DMESG-FAIL][343] ([Intel XE#2953] / [Intel XE#4173])
[342]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-adlp-8/igt@kms_pm_dc@dc6-dpms.html
[343]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-2/igt@kms_pm_dc@dc6-dpms.html
* igt@kms_pm_rpm@modeset-non-lpsp:
- shard-adlp: [SKIP][344] ([Intel XE#6070]) -> [SKIP][345] ([Intel XE#836])
[344]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-adlp-6/igt@kms_pm_rpm@modeset-non-lpsp.html
[345]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-1/igt@kms_pm_rpm@modeset-non-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress:
- shard-adlp: [SKIP][346] ([Intel XE#836]) -> [SKIP][347] ([Intel XE#6070])
[346]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-adlp-3/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
[347]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-adlp-1/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-dg2-set2: [FAIL][348] ([Intel XE#1729]) -> [SKIP][349] ([Intel XE#362])
[348]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-dg2-464/igt@kms_tiled_display@basic-test-pattern.html
[349]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][350] ([Intel XE#2426]) -> [SKIP][351] ([Intel XE#2509])
[350]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b/shard-bmg-7/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[351]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[Intel XE#1061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1061
[Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1125]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1125
[Intel XE#1126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1126
[Intel XE#1128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1128
[Intel XE#1151]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1151
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1469]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1469
[Intel XE#1475]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1475
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
[Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
[Intel XE#2248]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2248
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
[Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
[Intel XE#2459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2459
[Intel XE#2499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2499
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#2596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2596
[Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2833]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2833
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
[Intel XE#2927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2927
[Intel XE#2939]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2939
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
[Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
[Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
[Intel XE#3658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3658
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
[Intel XE#3862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3862
[Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876
[Intel XE#3884]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3884
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#3970]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3970
[Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4302]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4302
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#4351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4351
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4417
[Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
[Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
[Intel XE#4633]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4633
[Intel XE#4650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4650
[Intel XE#4665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4665
[Intel XE#4689]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4689
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4814
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#488]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/488
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#4921]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4921
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
[Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
[Intel XE#5561]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5561
[Intel XE#5565]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5565
[Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
[Intel XE#560]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/560
[Intel XE#5607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5607
[Intel XE#5626]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5626
[Intel XE#5671]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5671
[Intel XE#5786]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5786
[Intel XE#5937]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5937
[Intel XE#6010]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6010
[Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
[Intel XE#6070]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6070
[Intel XE#6168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6168
[Intel XE#619]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/619
[Intel XE#6251]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6251
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6313
[Intel XE#6362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6362
[Intel XE#6366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6366
[Intel XE#6480]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6480
[Intel XE#6507]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6507
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#6529]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6529
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#6566]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6566
[Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
Build changes
-------------
* IGT: IGT_8618 -> IGT_8620
* Linux: xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b -> xe-pw-157350v2
IGT_8618: 8618
IGT_8620: 8620
xe-4085-4ce351022716985e9c1dd18583acd4d3d149cb5b: 4ce351022716985e9c1dd18583acd4d3d149cb5b
xe-pw-157350v2: 157350v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v2/index.html
[-- Attachment #2: Type: text/html, Size: 101046 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread* ✗ CI.checkpatch: warning for drm/{i915, xe}/irq: clarify display and parent driver interfaces (rev3)
2025-11-11 7:34 [PATCH v2 0/3] drm/{i915, xe}/irq: clarify display and parent driver interfaces Jani Nikula
` (6 preceding siblings ...)
2025-11-11 15:25 ` ✓ Xe.CI.Full: " Patchwork
@ 2025-11-12 15:29 ` Patchwork
2025-11-12 15:30 ` ✓ CI.KUnit: success " Patchwork
` (2 subsequent siblings)
10 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2025-11-12 15:29 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/{i915, xe}/irq: clarify display and parent driver interfaces (rev3)
URL : https://patchwork.freedesktop.org/series/157350/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
d9120d4d84745cf011b4b3efb338747e69179dfb
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 8d560f9787342d45788c52715a7841efb039fe10
Author: Jani Nikula <jani.nikula@intel.com>
Date: Wed Nov 12 16:18:24 2025 +0200
drm/{i915,xe}/display: move irq calls to parent interface
Add an irq parent driver interface for the .enabled and .synchronize
calls. This lets us drop the dependency on i915_drv.h and i915_irq.h in
multiple places, and subsequently remove the compat i915_irq.h and
i915_irq.c files along with the display/ext directory from xe
altogether.
Introduce new intel_parent.[ch] as the wrapper layer to chase the
function pointers and convert between generic and more specific display
types.
v2: Keep static wrappers in intel_display_irq.c (Ville)
v3: Full blown wrappers in intel_parent.[ch] (Ville)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+ /mt/dim checkpatch bef8705a5dfd309ce7304ca98b11566045bc4018 drm-intel
883763eec3cc drm/{i915, xe}/display: duplicate gen2 irq/error init/reset in display irq
-:63: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#63: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:61:
+ WARN(1,
+ "Interrupt register 0x%x is not zero: 0x%08x\n",
total: 0 errors, 0 warnings, 1 checks, 203 lines checked
d6246550052d drm/i915/display: convert the display irq interfaces to struct intel_display
8d560f978734 drm/{i915,xe}/display: move irq calls to parent interface
-:416: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#416:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 511 lines checked
^ permalink raw reply [flat|nested] 18+ messages in thread* ✓ CI.KUnit: success for drm/{i915, xe}/irq: clarify display and parent driver interfaces (rev3)
2025-11-11 7:34 [PATCH v2 0/3] drm/{i915, xe}/irq: clarify display and parent driver interfaces Jani Nikula
` (7 preceding siblings ...)
2025-11-12 15:29 ` ✗ CI.checkpatch: warning for drm/{i915, xe}/irq: clarify display and parent driver interfaces (rev3) Patchwork
@ 2025-11-12 15:30 ` Patchwork
2025-11-12 16:10 ` ✓ Xe.CI.BAT: " Patchwork
2025-11-12 20:26 ` ✗ Xe.CI.Full: failure " Patchwork
10 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2025-11-12 15:30 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/{i915, xe}/irq: clarify display and parent driver interfaces (rev3)
URL : https://patchwork.freedesktop.org/series/157350/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[15:29:17] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[15:29:21] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[15:29:52] Starting KUnit Kernel (1/1)...
[15:29:52] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[15:29:52] ================== guc_buf (11 subtests) ===================
[15:29:52] [PASSED] test_smallest
[15:29:52] [PASSED] test_largest
[15:29:52] [PASSED] test_granular
[15:29:52] [PASSED] test_unique
[15:29:52] [PASSED] test_overlap
[15:29:52] [PASSED] test_reusable
[15:29:52] [PASSED] test_too_big
[15:29:52] [PASSED] test_flush
[15:29:52] [PASSED] test_lookup
[15:29:52] [PASSED] test_data
[15:29:52] [PASSED] test_class
[15:29:52] ===================== [PASSED] guc_buf =====================
[15:29:52] =================== guc_dbm (7 subtests) ===================
[15:29:52] [PASSED] test_empty
[15:29:52] [PASSED] test_default
[15:29:52] ======================== test_size ========================
[15:29:52] [PASSED] 4
[15:29:52] [PASSED] 8
[15:29:52] [PASSED] 32
[15:29:52] [PASSED] 256
[15:29:52] ==================== [PASSED] test_size ====================
[15:29:52] ======================= test_reuse ========================
[15:29:52] [PASSED] 4
[15:29:52] [PASSED] 8
[15:29:52] [PASSED] 32
[15:29:52] [PASSED] 256
[15:29:52] =================== [PASSED] test_reuse ====================
[15:29:52] =================== test_range_overlap ====================
[15:29:52] [PASSED] 4
[15:29:52] [PASSED] 8
[15:29:52] [PASSED] 32
[15:29:52] [PASSED] 256
[15:29:52] =============== [PASSED] test_range_overlap ================
[15:29:52] =================== test_range_compact ====================
[15:29:52] [PASSED] 4
[15:29:52] [PASSED] 8
[15:29:52] [PASSED] 32
[15:29:52] [PASSED] 256
[15:29:52] =============== [PASSED] test_range_compact ================
[15:29:52] ==================== test_range_spare =====================
[15:29:52] [PASSED] 4
[15:29:52] [PASSED] 8
[15:29:52] [PASSED] 32
[15:29:52] [PASSED] 256
[15:29:52] ================ [PASSED] test_range_spare =================
[15:29:52] ===================== [PASSED] guc_dbm =====================
[15:29:52] =================== guc_idm (6 subtests) ===================
[15:29:52] [PASSED] bad_init
[15:29:52] [PASSED] no_init
[15:29:52] [PASSED] init_fini
[15:29:52] [PASSED] check_used
[15:29:52] [PASSED] check_quota
[15:29:52] [PASSED] check_all
[15:29:52] ===================== [PASSED] guc_idm =====================
[15:29:52] ================== no_relay (3 subtests) ===================
[15:29:52] [PASSED] xe_drops_guc2pf_if_not_ready
[15:29:52] [PASSED] xe_drops_guc2vf_if_not_ready
[15:29:52] [PASSED] xe_rejects_send_if_not_ready
[15:29:52] ==================== [PASSED] no_relay =====================
[15:29:52] ================== pf_relay (14 subtests) ==================
[15:29:52] [PASSED] pf_rejects_guc2pf_too_short
[15:29:52] [PASSED] pf_rejects_guc2pf_too_long
[15:29:52] [PASSED] pf_rejects_guc2pf_no_payload
[15:29:52] [PASSED] pf_fails_no_payload
[15:29:52] [PASSED] pf_fails_bad_origin
[15:29:52] [PASSED] pf_fails_bad_type
[15:29:52] [PASSED] pf_txn_reports_error
[15:29:52] [PASSED] pf_txn_sends_pf2guc
[15:29:52] [PASSED] pf_sends_pf2guc
[15:29:52] [SKIPPED] pf_loopback_nop
[15:29:52] [SKIPPED] pf_loopback_echo
[15:29:52] [SKIPPED] pf_loopback_fail
[15:29:52] [SKIPPED] pf_loopback_busy
[15:29:52] [SKIPPED] pf_loopback_retry
[15:29:52] ==================== [PASSED] pf_relay =====================
[15:29:52] ================== vf_relay (3 subtests) ===================
[15:29:52] [PASSED] vf_rejects_guc2vf_too_short
[15:29:52] [PASSED] vf_rejects_guc2vf_too_long
[15:29:52] [PASSED] vf_rejects_guc2vf_no_payload
[15:29:52] ==================== [PASSED] vf_relay =====================
[15:29:52] ================ pf_gt_config (4 subtests) =================
[15:29:52] [PASSED] fair_contexts_1vf
[15:29:52] [PASSED] fair_doorbells_1vf
[15:29:52] ====================== fair_contexts ======================
[15:29:52] [PASSED] 1 VF
[15:29:52] [PASSED] 2 VFs
[15:29:52] [PASSED] 3 VFs
[15:29:52] [PASSED] 4 VFs
[15:29:52] [PASSED] 5 VFs
[15:29:52] [PASSED] 6 VFs
[15:29:52] [PASSED] 7 VFs
[15:29:52] [PASSED] 8 VFs
[15:29:52] [PASSED] 9 VFs
[15:29:52] [PASSED] 10 VFs
[15:29:52] [PASSED] 11 VFs
[15:29:52] [PASSED] 12 VFs
[15:29:52] [PASSED] 13 VFs
[15:29:52] [PASSED] 14 VFs
[15:29:52] [PASSED] 15 VFs
[15:29:52] [PASSED] 16 VFs
[15:29:52] [PASSED] 17 VFs
[15:29:52] [PASSED] 18 VFs
[15:29:52] [PASSED] 19 VFs
[15:29:52] [PASSED] 20 VFs
[15:29:52] [PASSED] 21 VFs
[15:29:52] [PASSED] 22 VFs
[15:29:52] [PASSED] 23 VFs
[15:29:52] [PASSED] 24 VFs
[15:29:52] [PASSED] 25 VFs
[15:29:52] [PASSED] 26 VFs
[15:29:52] [PASSED] 27 VFs
[15:29:52] [PASSED] 28 VFs
[15:29:52] [PASSED] 29 VFs
[15:29:52] [PASSED] 30 VFs
[15:29:52] [PASSED] 31 VFs
[15:29:52] [PASSED] 32 VFs
[15:29:52] [PASSED] 33 VFs
[15:29:52] [PASSED] 34 VFs
[15:29:52] [PASSED] 35 VFs
[15:29:52] [PASSED] 36 VFs
[15:29:52] [PASSED] 37 VFs
[15:29:52] [PASSED] 38 VFs
[15:29:52] [PASSED] 39 VFs
[15:29:52] [PASSED] 40 VFs
[15:29:52] [PASSED] 41 VFs
[15:29:52] [PASSED] 42 VFs
[15:29:52] [PASSED] 43 VFs
[15:29:52] [PASSED] 44 VFs
[15:29:52] [PASSED] 45 VFs
[15:29:52] [PASSED] 46 VFs
[15:29:52] [PASSED] 47 VFs
[15:29:52] [PASSED] 48 VFs
[15:29:52] [PASSED] 49 VFs
[15:29:52] [PASSED] 50 VFs
[15:29:52] [PASSED] 51 VFs
[15:29:52] [PASSED] 52 VFs
[15:29:52] [PASSED] 53 VFs
[15:29:52] [PASSED] 54 VFs
[15:29:52] [PASSED] 55 VFs
[15:29:52] [PASSED] 56 VFs
[15:29:52] [PASSED] 57 VFs
[15:29:52] [PASSED] 58 VFs
[15:29:52] [PASSED] 59 VFs
[15:29:52] [PASSED] 60 VFs
[15:29:52] [PASSED] 61 VFs
[15:29:52] [PASSED] 62 VFs
[15:29:52] [PASSED] 63 VFs
[15:29:52] ================== [PASSED] fair_contexts ==================
[15:29:52] ===================== fair_doorbells ======================
[15:29:52] [PASSED] 1 VF
[15:29:52] [PASSED] 2 VFs
[15:29:52] [PASSED] 3 VFs
[15:29:52] [PASSED] 4 VFs
[15:29:52] [PASSED] 5 VFs
[15:29:52] [PASSED] 6 VFs
[15:29:52] [PASSED] 7 VFs
[15:29:52] [PASSED] 8 VFs
[15:29:52] [PASSED] 9 VFs
[15:29:52] [PASSED] 10 VFs
[15:29:52] [PASSED] 11 VFs
[15:29:52] [PASSED] 12 VFs
[15:29:52] [PASSED] 13 VFs
[15:29:52] [PASSED] 14 VFs
[15:29:52] [PASSED] 15 VFs
[15:29:52] [PASSED] 16 VFs
[15:29:52] [PASSED] 17 VFs
[15:29:52] [PASSED] 18 VFs
[15:29:52] [PASSED] 19 VFs
[15:29:52] [PASSED] 20 VFs
[15:29:52] [PASSED] 21 VFs
[15:29:52] [PASSED] 22 VFs
[15:29:52] [PASSED] 23 VFs
[15:29:52] [PASSED] 24 VFs
[15:29:52] [PASSED] 25 VFs
[15:29:52] [PASSED] 26 VFs
[15:29:52] [PASSED] 27 VFs
[15:29:52] [PASSED] 28 VFs
[15:29:52] [PASSED] 29 VFs
[15:29:52] [PASSED] 30 VFs
[15:29:52] [PASSED] 31 VFs
[15:29:52] [PASSED] 32 VFs
[15:29:52] [PASSED] 33 VFs
[15:29:52] [PASSED] 34 VFs
[15:29:52] [PASSED] 35 VFs
[15:29:52] [PASSED] 36 VFs
[15:29:52] [PASSED] 37 VFs
[15:29:52] [PASSED] 38 VFs
[15:29:52] [PASSED] 39 VFs
[15:29:52] [PASSED] 40 VFs
[15:29:52] [PASSED] 41 VFs
[15:29:52] [PASSED] 42 VFs
[15:29:52] [PASSED] 43 VFs
[15:29:52] [PASSED] 44 VFs
[15:29:52] [PASSED] 45 VFs
[15:29:52] [PASSED] 46 VFs
[15:29:52] [PASSED] 47 VFs
[15:29:52] [PASSED] 48 VFs
[15:29:52] [PASSED] 49 VFs
[15:29:52] [PASSED] 50 VFs
[15:29:52] [PASSED] 51 VFs
[15:29:52] [PASSED] 52 VFs
[15:29:52] [PASSED] 53 VFs
[15:29:52] [PASSED] 54 VFs
[15:29:52] [PASSED] 55 VFs
[15:29:52] [PASSED] 56 VFs
[15:29:52] [PASSED] 57 VFs
[15:29:52] [PASSED] 58 VFs
[15:29:52] [PASSED] 59 VFs
[15:29:52] [PASSED] 60 VFs
[15:29:52] [PASSED] 61 VFs
[15:29:52] [PASSED] 62 VFs
[15:29:52] [PASSED] 63 VFs
[15:29:52] ================= [PASSED] fair_doorbells ==================
[15:29:52] ================== [PASSED] pf_gt_config ===================
[15:29:52] ===================== lmtt (1 subtest) =====================
[15:29:52] ======================== test_ops =========================
[15:29:52] [PASSED] 2-level
[15:29:52] [PASSED] multi-level
[15:29:52] ==================== [PASSED] test_ops =====================
[15:29:52] ====================== [PASSED] lmtt =======================
[15:29:52] ================= pf_service (11 subtests) =================
[15:29:52] [PASSED] pf_negotiate_any
[15:29:52] [PASSED] pf_negotiate_base_match
[15:29:52] [PASSED] pf_negotiate_base_newer
[15:29:52] [PASSED] pf_negotiate_base_next
[15:29:52] [SKIPPED] pf_negotiate_base_older
[15:29:52] [PASSED] pf_negotiate_base_prev
[15:29:52] [PASSED] pf_negotiate_latest_match
[15:29:52] [PASSED] pf_negotiate_latest_newer
[15:29:52] [PASSED] pf_negotiate_latest_next
[15:29:52] [SKIPPED] pf_negotiate_latest_older
[15:29:52] [SKIPPED] pf_negotiate_latest_prev
[15:29:52] =================== [PASSED] pf_service ====================
[15:29:52] ================= xe_guc_g2g (2 subtests) ==================
[15:29:52] ============== xe_live_guc_g2g_kunit_default ==============
[15:29:52] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[15:29:52] ============== xe_live_guc_g2g_kunit_allmem ===============
[15:29:52] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[15:29:52] =================== [SKIPPED] xe_guc_g2g ===================
[15:29:52] =================== xe_mocs (2 subtests) ===================
[15:29:52] ================ xe_live_mocs_kernel_kunit ================
[15:29:52] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[15:29:52] ================ xe_live_mocs_reset_kunit =================
[15:29:52] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[15:29:52] ==================== [SKIPPED] xe_mocs =====================
[15:29:52] ================= xe_migrate (2 subtests) ==================
[15:29:52] ================= xe_migrate_sanity_kunit =================
[15:29:52] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[15:29:52] ================== xe_validate_ccs_kunit ==================
[15:29:52] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[15:29:52] =================== [SKIPPED] xe_migrate ===================
[15:29:52] ================== xe_dma_buf (1 subtest) ==================
[15:29:52] ==================== xe_dma_buf_kunit =====================
[15:29:52] ================ [SKIPPED] xe_dma_buf_kunit ================
[15:29:52] =================== [SKIPPED] xe_dma_buf ===================
[15:29:52] ================= xe_bo_shrink (1 subtest) =================
[15:29:52] =================== xe_bo_shrink_kunit ====================
[15:29:52] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[15:29:52] ================== [SKIPPED] xe_bo_shrink ==================
[15:29:52] ==================== xe_bo (2 subtests) ====================
[15:29:52] ================== xe_ccs_migrate_kunit ===================
[15:29:52] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[15:29:52] ==================== xe_bo_evict_kunit ====================
[15:29:52] =============== [SKIPPED] xe_bo_evict_kunit ================
[15:29:52] ===================== [SKIPPED] xe_bo ======================
[15:29:52] ==================== args (11 subtests) ====================
[15:29:52] [PASSED] count_args_test
[15:29:52] [PASSED] call_args_example
[15:29:52] [PASSED] call_args_test
[15:29:52] [PASSED] drop_first_arg_example
[15:29:52] [PASSED] drop_first_arg_test
[15:29:52] [PASSED] first_arg_example
[15:29:52] [PASSED] first_arg_test
[15:29:52] [PASSED] last_arg_example
[15:29:52] [PASSED] last_arg_test
[15:29:52] [PASSED] pick_arg_example
[15:29:52] [PASSED] sep_comma_example
[15:29:52] ====================== [PASSED] args =======================
[15:29:52] =================== xe_pci (3 subtests) ====================
[15:29:52] ==================== check_graphics_ip ====================
[15:29:52] [PASSED] 12.00 Xe_LP
[15:29:52] [PASSED] 12.10 Xe_LP+
[15:29:52] [PASSED] 12.55 Xe_HPG
[15:29:52] [PASSED] 12.60 Xe_HPC
[15:29:52] [PASSED] 12.70 Xe_LPG
[15:29:52] [PASSED] 12.71 Xe_LPG
[15:29:52] [PASSED] 12.74 Xe_LPG+
[15:29:52] [PASSED] 20.01 Xe2_HPG
[15:29:52] [PASSED] 20.02 Xe2_HPG
[15:29:52] [PASSED] 20.04 Xe2_LPG
[15:29:52] [PASSED] 30.00 Xe3_LPG
[15:29:52] [PASSED] 30.01 Xe3_LPG
[15:29:52] [PASSED] 30.03 Xe3_LPG
[15:29:52] [PASSED] 30.04 Xe3_LPG
[15:29:52] [PASSED] 30.05 Xe3_LPG
[15:29:52] [PASSED] 35.11 Xe3p_XPC
[15:29:52] ================ [PASSED] check_graphics_ip ================
[15:29:52] ===================== check_media_ip ======================
[15:29:52] [PASSED] 12.00 Xe_M
[15:29:52] [PASSED] 12.55 Xe_HPM
[15:29:52] [PASSED] 13.00 Xe_LPM+
[15:29:52] [PASSED] 13.01 Xe2_HPM
[15:29:52] [PASSED] 20.00 Xe2_LPM
[15:29:52] [PASSED] 30.00 Xe3_LPM
[15:29:52] [PASSED] 30.02 Xe3_LPM
[15:29:52] [PASSED] 35.00 Xe3p_LPM
[15:29:52] [PASSED] 35.03 Xe3p_HPM
[15:29:52] ================= [PASSED] check_media_ip ==================
[15:29:52] =================== check_platform_desc ===================
[15:29:52] [PASSED] 0x9A60 (TIGERLAKE)
[15:29:52] [PASSED] 0x9A68 (TIGERLAKE)
[15:29:52] [PASSED] 0x9A70 (TIGERLAKE)
[15:29:52] [PASSED] 0x9A40 (TIGERLAKE)
[15:29:52] [PASSED] 0x9A49 (TIGERLAKE)
[15:29:52] [PASSED] 0x9A59 (TIGERLAKE)
[15:29:52] [PASSED] 0x9A78 (TIGERLAKE)
[15:29:52] [PASSED] 0x9AC0 (TIGERLAKE)
[15:29:52] [PASSED] 0x9AC9 (TIGERLAKE)
[15:29:52] [PASSED] 0x9AD9 (TIGERLAKE)
[15:29:52] [PASSED] 0x9AF8 (TIGERLAKE)
[15:29:52] [PASSED] 0x4C80 (ROCKETLAKE)
[15:29:52] [PASSED] 0x4C8A (ROCKETLAKE)
[15:29:52] [PASSED] 0x4C8B (ROCKETLAKE)
[15:29:52] [PASSED] 0x4C8C (ROCKETLAKE)
[15:29:52] [PASSED] 0x4C90 (ROCKETLAKE)
[15:29:52] [PASSED] 0x4C9A (ROCKETLAKE)
[15:29:52] [PASSED] 0x4680 (ALDERLAKE_S)
[15:29:52] [PASSED] 0x4682 (ALDERLAKE_S)
[15:29:52] [PASSED] 0x4688 (ALDERLAKE_S)
[15:29:52] [PASSED] 0x468A (ALDERLAKE_S)
[15:29:52] [PASSED] 0x468B (ALDERLAKE_S)
[15:29:52] [PASSED] 0x4690 (ALDERLAKE_S)
[15:29:52] [PASSED] 0x4692 (ALDERLAKE_S)
[15:29:52] [PASSED] 0x4693 (ALDERLAKE_S)
[15:29:52] [PASSED] 0x46A0 (ALDERLAKE_P)
[15:29:52] [PASSED] 0x46A1 (ALDERLAKE_P)
[15:29:52] [PASSED] 0x46A2 (ALDERLAKE_P)
[15:29:52] [PASSED] 0x46A3 (ALDERLAKE_P)
[15:29:52] [PASSED] 0x46A6 (ALDERLAKE_P)
[15:29:52] [PASSED] 0x46A8 (ALDERLAKE_P)
[15:29:52] [PASSED] 0x46AA (ALDERLAKE_P)
[15:29:52] [PASSED] 0x462A (ALDERLAKE_P)
[15:29:52] [PASSED] 0x4626 (ALDERLAKE_P)
[15:29:52] [PASSED] 0x4628 (ALDERLAKE_P)
[15:29:52] [PASSED] 0x46B0 (ALDERLAKE_P)
[15:29:52] [PASSED] 0x46B1 (ALDERLAKE_P)
[15:29:52] [PASSED] 0x46B2 (ALDERLAKE_P)
[15:29:52] [PASSED] 0x46B3 (ALDERLAKE_P)
[15:29:52] [PASSED] 0x46C0 (ALDERLAKE_P)
[15:29:52] [PASSED] 0x46C1 (ALDERLAKE_P)
[15:29:52] [PASSED] 0x46C2 (ALDERLAKE_P)
[15:29:52] [PASSED] 0x46C3 (ALDERLAKE_P)
[15:29:52] [PASSED] 0x46D0 (ALDERLAKE_N)
[15:29:52] [PASSED] 0x46D1 (ALDERLAKE_N)
[15:29:52] [PASSED] 0x46D2 (ALDERLAKE_N)
[15:29:52] [PASSED] 0x46D3 (ALDERLAKE_N)
[15:29:52] [PASSED] 0x46D4 (ALDERLAKE_N)
[15:29:52] [PASSED] 0xA721 (ALDERLAKE_P)
[15:29:52] [PASSED] 0xA7A1 (ALDERLAKE_P)
[15:29:52] [PASSED] 0xA7A9 (ALDERLAKE_P)
[15:29:52] [PASSED] 0xA7AC (ALDERLAKE_P)
[15:29:52] [PASSED] 0xA7AD (ALDERLAKE_P)
[15:29:52] [PASSED] 0xA720 (ALDERLAKE_P)
[15:29:52] [PASSED] 0xA7A0 (ALDERLAKE_P)
[15:29:52] [PASSED] 0xA7A8 (ALDERLAKE_P)
[15:29:52] [PASSED] 0xA7AA (ALDERLAKE_P)
[15:29:52] [PASSED] 0xA7AB (ALDERLAKE_P)
[15:29:52] [PASSED] 0xA780 (ALDERLAKE_S)
[15:29:52] [PASSED] 0xA781 (ALDERLAKE_S)
[15:29:52] [PASSED] 0xA782 (ALDERLAKE_S)
[15:29:52] [PASSED] 0xA783 (ALDERLAKE_S)
[15:29:52] [PASSED] 0xA788 (ALDERLAKE_S)
[15:29:52] [PASSED] 0xA789 (ALDERLAKE_S)
[15:29:52] [PASSED] 0xA78A (ALDERLAKE_S)
[15:29:52] [PASSED] 0xA78B (ALDERLAKE_S)
[15:29:52] [PASSED] 0x4905 (DG1)
[15:29:52] [PASSED] 0x4906 (DG1)
[15:29:52] [PASSED] 0x4907 (DG1)
[15:29:52] [PASSED] 0x4908 (DG1)
[15:29:52] [PASSED] 0x4909 (DG1)
[15:29:52] [PASSED] 0x56C0 (DG2)
[15:29:52] [PASSED] 0x56C2 (DG2)
[15:29:52] [PASSED] 0x56C1 (DG2)
[15:29:52] [PASSED] 0x7D51 (METEORLAKE)
[15:29:52] [PASSED] 0x7DD1 (METEORLAKE)
[15:29:52] [PASSED] 0x7D41 (METEORLAKE)
[15:29:52] [PASSED] 0x7D67 (METEORLAKE)
[15:29:52] [PASSED] 0xB640 (METEORLAKE)
[15:29:52] [PASSED] 0x56A0 (DG2)
[15:29:52] [PASSED] 0x56A1 (DG2)
[15:29:52] [PASSED] 0x56A2 (DG2)
[15:29:52] [PASSED] 0x56BE (DG2)
[15:29:52] [PASSED] 0x56BF (DG2)
[15:29:52] [PASSED] 0x5690 (DG2)
stty: 'standard input': Inappropriate ioctl for device
[15:29:52] [PASSED] 0x5691 (DG2)
[15:29:52] [PASSED] 0x5692 (DG2)
[15:29:52] [PASSED] 0x56A5 (DG2)
[15:29:52] [PASSED] 0x56A6 (DG2)
[15:29:52] [PASSED] 0x56B0 (DG2)
[15:29:52] [PASSED] 0x56B1 (DG2)
[15:29:52] [PASSED] 0x56BA (DG2)
[15:29:52] [PASSED] 0x56BB (DG2)
[15:29:52] [PASSED] 0x56BC (DG2)
[15:29:52] [PASSED] 0x56BD (DG2)
[15:29:52] [PASSED] 0x5693 (DG2)
[15:29:52] [PASSED] 0x5694 (DG2)
[15:29:52] [PASSED] 0x5695 (DG2)
[15:29:52] [PASSED] 0x56A3 (DG2)
[15:29:52] [PASSED] 0x56A4 (DG2)
[15:29:52] [PASSED] 0x56B2 (DG2)
[15:29:52] [PASSED] 0x56B3 (DG2)
[15:29:52] [PASSED] 0x5696 (DG2)
[15:29:52] [PASSED] 0x5697 (DG2)
[15:29:52] [PASSED] 0xB69 (PVC)
[15:29:52] [PASSED] 0xB6E (PVC)
[15:29:52] [PASSED] 0xBD4 (PVC)
[15:29:52] [PASSED] 0xBD5 (PVC)
[15:29:52] [PASSED] 0xBD6 (PVC)
[15:29:52] [PASSED] 0xBD7 (PVC)
[15:29:52] [PASSED] 0xBD8 (PVC)
[15:29:52] [PASSED] 0xBD9 (PVC)
[15:29:52] [PASSED] 0xBDA (PVC)
[15:29:52] [PASSED] 0xBDB (PVC)
[15:29:52] [PASSED] 0xBE0 (PVC)
[15:29:52] [PASSED] 0xBE1 (PVC)
[15:29:52] [PASSED] 0xBE5 (PVC)
[15:29:52] [PASSED] 0x7D40 (METEORLAKE)
[15:29:52] [PASSED] 0x7D45 (METEORLAKE)
[15:29:52] [PASSED] 0x7D55 (METEORLAKE)
[15:29:52] [PASSED] 0x7D60 (METEORLAKE)
[15:29:52] [PASSED] 0x7DD5 (METEORLAKE)
[15:29:52] [PASSED] 0x6420 (LUNARLAKE)
[15:29:52] [PASSED] 0x64A0 (LUNARLAKE)
[15:29:52] [PASSED] 0x64B0 (LUNARLAKE)
[15:29:52] [PASSED] 0xE202 (BATTLEMAGE)
[15:29:52] [PASSED] 0xE209 (BATTLEMAGE)
[15:29:52] [PASSED] 0xE20B (BATTLEMAGE)
[15:29:52] [PASSED] 0xE20C (BATTLEMAGE)
[15:29:52] [PASSED] 0xE20D (BATTLEMAGE)
[15:29:52] [PASSED] 0xE210 (BATTLEMAGE)
[15:29:52] [PASSED] 0xE211 (BATTLEMAGE)
[15:29:52] [PASSED] 0xE212 (BATTLEMAGE)
[15:29:52] [PASSED] 0xE216 (BATTLEMAGE)
[15:29:52] [PASSED] 0xE220 (BATTLEMAGE)
[15:29:52] [PASSED] 0xE221 (BATTLEMAGE)
[15:29:52] [PASSED] 0xE222 (BATTLEMAGE)
[15:29:52] [PASSED] 0xE223 (BATTLEMAGE)
[15:29:52] [PASSED] 0xB080 (PANTHERLAKE)
[15:29:52] [PASSED] 0xB081 (PANTHERLAKE)
[15:29:52] [PASSED] 0xB082 (PANTHERLAKE)
[15:29:52] [PASSED] 0xB083 (PANTHERLAKE)
[15:29:52] [PASSED] 0xB084 (PANTHERLAKE)
[15:29:52] [PASSED] 0xB085 (PANTHERLAKE)
[15:29:52] [PASSED] 0xB086 (PANTHERLAKE)
[15:29:52] [PASSED] 0xB087 (PANTHERLAKE)
[15:29:52] [PASSED] 0xB08F (PANTHERLAKE)
[15:29:52] [PASSED] 0xB090 (PANTHERLAKE)
[15:29:52] [PASSED] 0xB0A0 (PANTHERLAKE)
[15:29:52] [PASSED] 0xB0B0 (PANTHERLAKE)
[15:29:52] [PASSED] 0xD740 (NOVALAKE_S)
[15:29:52] [PASSED] 0xD741 (NOVALAKE_S)
[15:29:52] [PASSED] 0xD742 (NOVALAKE_S)
[15:29:52] [PASSED] 0xD743 (NOVALAKE_S)
[15:29:52] [PASSED] 0xD744 (NOVALAKE_S)
[15:29:52] [PASSED] 0xD745 (NOVALAKE_S)
[15:29:52] [PASSED] 0x674C (CRESCENTISLAND)
[15:29:52] [PASSED] 0xFD80 (PANTHERLAKE)
[15:29:52] [PASSED] 0xFD81 (PANTHERLAKE)
[15:29:52] =============== [PASSED] check_platform_desc ===============
[15:29:52] ===================== [PASSED] xe_pci ======================
[15:29:52] =================== xe_rtp (2 subtests) ====================
[15:29:52] =============== xe_rtp_process_to_sr_tests ================
[15:29:52] [PASSED] coalesce-same-reg
[15:29:52] [PASSED] no-match-no-add
[15:29:52] [PASSED] match-or
[15:29:52] [PASSED] match-or-xfail
[15:29:52] [PASSED] no-match-no-add-multiple-rules
[15:29:52] [PASSED] two-regs-two-entries
[15:29:52] [PASSED] clr-one-set-other
[15:29:52] [PASSED] set-field
[15:29:52] [PASSED] conflict-duplicate
[15:29:52] [PASSED] conflict-not-disjoint
[15:29:52] [PASSED] conflict-reg-type
[15:29:52] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[15:29:52] ================== xe_rtp_process_tests ===================
[15:29:52] [PASSED] active1
[15:29:52] [PASSED] active2
[15:29:52] [PASSED] active-inactive
[15:29:52] [PASSED] inactive-active
[15:29:52] [PASSED] inactive-1st_or_active-inactive
[15:29:52] [PASSED] inactive-2nd_or_active-inactive
[15:29:52] [PASSED] inactive-last_or_active-inactive
[15:29:52] [PASSED] inactive-no_or_active-inactive
[15:29:52] ============== [PASSED] xe_rtp_process_tests ===============
[15:29:52] ===================== [PASSED] xe_rtp ======================
[15:29:52] ==================== xe_wa (1 subtest) =====================
[15:29:52] ======================== xe_wa_gt =========================
[15:29:52] [PASSED] TIGERLAKE B0
[15:29:52] [PASSED] DG1 A0
[15:29:52] [PASSED] DG1 B0
[15:29:52] [PASSED] ALDERLAKE_S A0
[15:29:52] [PASSED] ALDERLAKE_S B0
[15:29:52] [PASSED] ALDERLAKE_S C0
[15:29:52] [PASSED] ALDERLAKE_S D0
[15:29:52] [PASSED] ALDERLAKE_P A0
[15:29:52] [PASSED] ALDERLAKE_P B0
[15:29:52] [PASSED] ALDERLAKE_P C0
[15:29:52] [PASSED] ALDERLAKE_S RPLS D0
[15:29:52] [PASSED] ALDERLAKE_P RPLU E0
[15:29:52] [PASSED] DG2 G10 C0
[15:29:52] [PASSED] DG2 G11 B1
[15:29:52] [PASSED] DG2 G12 A1
[15:29:52] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[15:29:52] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[15:29:52] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[15:29:52] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[15:29:52] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[15:29:52] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[15:29:52] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[15:29:52] ==================== [PASSED] xe_wa_gt =====================
[15:29:52] ====================== [PASSED] xe_wa ======================
[15:29:52] ============================================================
[15:29:52] Testing complete. Ran 446 tests: passed: 428, skipped: 18
[15:29:52] Elapsed time: 35.470s total, 4.250s configuring, 30.753s building, 0.427s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[15:29:52] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[15:29:54] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[15:30:19] Starting KUnit Kernel (1/1)...
[15:30:19] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[15:30:19] ============ drm_test_pick_cmdline (2 subtests) ============
[15:30:19] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[15:30:19] =============== drm_test_pick_cmdline_named ===============
[15:30:19] [PASSED] NTSC
[15:30:19] [PASSED] NTSC-J
[15:30:19] [PASSED] PAL
[15:30:19] [PASSED] PAL-M
[15:30:19] =========== [PASSED] drm_test_pick_cmdline_named ===========
[15:30:19] ============== [PASSED] drm_test_pick_cmdline ==============
[15:30:19] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[15:30:19] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[15:30:19] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[15:30:19] =========== drm_validate_clone_mode (2 subtests) ===========
[15:30:19] ============== drm_test_check_in_clone_mode ===============
[15:30:19] [PASSED] in_clone_mode
[15:30:19] [PASSED] not_in_clone_mode
[15:30:19] ========== [PASSED] drm_test_check_in_clone_mode ===========
[15:30:19] =============== drm_test_check_valid_clones ===============
[15:30:19] [PASSED] not_in_clone_mode
[15:30:19] [PASSED] valid_clone
[15:30:19] [PASSED] invalid_clone
[15:30:19] =========== [PASSED] drm_test_check_valid_clones ===========
[15:30:19] ============= [PASSED] drm_validate_clone_mode =============
[15:30:19] ============= drm_validate_modeset (1 subtest) =============
[15:30:19] [PASSED] drm_test_check_connector_changed_modeset
[15:30:19] ============== [PASSED] drm_validate_modeset ===============
[15:30:19] ====== drm_test_bridge_get_current_state (2 subtests) ======
[15:30:19] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[15:30:19] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[15:30:19] ======== [PASSED] drm_test_bridge_get_current_state ========
[15:30:19] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[15:30:19] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[15:30:19] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[15:30:19] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[15:30:19] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[15:30:19] ============== drm_bridge_alloc (2 subtests) ===============
[15:30:19] [PASSED] drm_test_drm_bridge_alloc_basic
[15:30:19] [PASSED] drm_test_drm_bridge_alloc_get_put
[15:30:19] ================ [PASSED] drm_bridge_alloc =================
[15:30:19] ================== drm_buddy (8 subtests) ==================
[15:30:19] [PASSED] drm_test_buddy_alloc_limit
[15:30:19] [PASSED] drm_test_buddy_alloc_optimistic
[15:30:19] [PASSED] drm_test_buddy_alloc_pessimistic
[15:30:19] [PASSED] drm_test_buddy_alloc_pathological
[15:30:19] [PASSED] drm_test_buddy_alloc_contiguous
[15:30:19] [PASSED] drm_test_buddy_alloc_clear
[15:30:19] [PASSED] drm_test_buddy_alloc_range_bias
[15:30:19] [PASSED] drm_test_buddy_fragmentation_performance
[15:30:19] ==================== [PASSED] drm_buddy ====================
[15:30:19] ============= drm_cmdline_parser (40 subtests) =============
[15:30:19] [PASSED] drm_test_cmdline_force_d_only
[15:30:19] [PASSED] drm_test_cmdline_force_D_only_dvi
[15:30:19] [PASSED] drm_test_cmdline_force_D_only_hdmi
[15:30:19] [PASSED] drm_test_cmdline_force_D_only_not_digital
[15:30:19] [PASSED] drm_test_cmdline_force_e_only
[15:30:19] [PASSED] drm_test_cmdline_res
[15:30:19] [PASSED] drm_test_cmdline_res_vesa
[15:30:19] [PASSED] drm_test_cmdline_res_vesa_rblank
[15:30:19] [PASSED] drm_test_cmdline_res_rblank
[15:30:19] [PASSED] drm_test_cmdline_res_bpp
[15:30:19] [PASSED] drm_test_cmdline_res_refresh
[15:30:19] [PASSED] drm_test_cmdline_res_bpp_refresh
[15:30:19] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[15:30:19] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[15:30:19] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[15:30:19] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[15:30:19] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[15:30:19] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[15:30:19] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[15:30:19] [PASSED] drm_test_cmdline_res_margins_force_on
[15:30:19] [PASSED] drm_test_cmdline_res_vesa_margins
[15:30:19] [PASSED] drm_test_cmdline_name
[15:30:19] [PASSED] drm_test_cmdline_name_bpp
[15:30:19] [PASSED] drm_test_cmdline_name_option
[15:30:19] [PASSED] drm_test_cmdline_name_bpp_option
[15:30:19] [PASSED] drm_test_cmdline_rotate_0
[15:30:19] [PASSED] drm_test_cmdline_rotate_90
[15:30:19] [PASSED] drm_test_cmdline_rotate_180
[15:30:19] [PASSED] drm_test_cmdline_rotate_270
[15:30:19] [PASSED] drm_test_cmdline_hmirror
[15:30:19] [PASSED] drm_test_cmdline_vmirror
[15:30:19] [PASSED] drm_test_cmdline_margin_options
[15:30:19] [PASSED] drm_test_cmdline_multiple_options
[15:30:19] [PASSED] drm_test_cmdline_bpp_extra_and_option
[15:30:19] [PASSED] drm_test_cmdline_extra_and_option
[15:30:19] [PASSED] drm_test_cmdline_freestanding_options
[15:30:19] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[15:30:19] [PASSED] drm_test_cmdline_panel_orientation
[15:30:19] ================ drm_test_cmdline_invalid =================
[15:30:19] [PASSED] margin_only
[15:30:19] [PASSED] interlace_only
[15:30:19] [PASSED] res_missing_x
[15:30:19] [PASSED] res_missing_y
[15:30:19] [PASSED] res_bad_y
[15:30:19] [PASSED] res_missing_y_bpp
[15:30:19] [PASSED] res_bad_bpp
[15:30:19] [PASSED] res_bad_refresh
[15:30:19] [PASSED] res_bpp_refresh_force_on_off
[15:30:19] [PASSED] res_invalid_mode
[15:30:19] [PASSED] res_bpp_wrong_place_mode
[15:30:19] [PASSED] name_bpp_refresh
[15:30:19] [PASSED] name_refresh
[15:30:19] [PASSED] name_refresh_wrong_mode
[15:30:19] [PASSED] name_refresh_invalid_mode
[15:30:19] [PASSED] rotate_multiple
[15:30:19] [PASSED] rotate_invalid_val
[15:30:19] [PASSED] rotate_truncated
[15:30:19] [PASSED] invalid_option
[15:30:19] [PASSED] invalid_tv_option
[15:30:19] [PASSED] truncated_tv_option
[15:30:19] ============ [PASSED] drm_test_cmdline_invalid =============
[15:30:19] =============== drm_test_cmdline_tv_options ===============
[15:30:19] [PASSED] NTSC
[15:30:19] [PASSED] NTSC_443
[15:30:19] [PASSED] NTSC_J
[15:30:19] [PASSED] PAL
[15:30:19] [PASSED] PAL_M
[15:30:19] [PASSED] PAL_N
[15:30:19] [PASSED] SECAM
[15:30:19] [PASSED] MONO_525
[15:30:19] [PASSED] MONO_625
[15:30:19] =========== [PASSED] drm_test_cmdline_tv_options ===========
[15:30:19] =============== [PASSED] drm_cmdline_parser ================
[15:30:19] ========== drmm_connector_hdmi_init (20 subtests) ==========
[15:30:19] [PASSED] drm_test_connector_hdmi_init_valid
[15:30:19] [PASSED] drm_test_connector_hdmi_init_bpc_8
[15:30:19] [PASSED] drm_test_connector_hdmi_init_bpc_10
[15:30:19] [PASSED] drm_test_connector_hdmi_init_bpc_12
[15:30:19] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[15:30:19] [PASSED] drm_test_connector_hdmi_init_bpc_null
[15:30:19] [PASSED] drm_test_connector_hdmi_init_formats_empty
[15:30:19] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[15:30:19] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[15:30:19] [PASSED] supported_formats=0x9 yuv420_allowed=1
[15:30:19] [PASSED] supported_formats=0x9 yuv420_allowed=0
[15:30:19] [PASSED] supported_formats=0x3 yuv420_allowed=1
[15:30:19] [PASSED] supported_formats=0x3 yuv420_allowed=0
[15:30:19] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[15:30:19] [PASSED] drm_test_connector_hdmi_init_null_ddc
[15:30:19] [PASSED] drm_test_connector_hdmi_init_null_product
[15:30:19] [PASSED] drm_test_connector_hdmi_init_null_vendor
[15:30:19] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[15:30:19] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[15:30:19] [PASSED] drm_test_connector_hdmi_init_product_valid
[15:30:19] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[15:30:19] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[15:30:19] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[15:30:19] ========= drm_test_connector_hdmi_init_type_valid =========
[15:30:19] [PASSED] HDMI-A
[15:30:19] [PASSED] HDMI-B
[15:30:19] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[15:30:19] ======== drm_test_connector_hdmi_init_type_invalid ========
[15:30:19] [PASSED] Unknown
[15:30:19] [PASSED] VGA
[15:30:19] [PASSED] DVI-I
[15:30:19] [PASSED] DVI-D
[15:30:19] [PASSED] DVI-A
[15:30:19] [PASSED] Composite
[15:30:19] [PASSED] SVIDEO
[15:30:19] [PASSED] LVDS
[15:30:19] [PASSED] Component
[15:30:19] [PASSED] DIN
[15:30:19] [PASSED] DP
[15:30:19] [PASSED] TV
[15:30:19] [PASSED] eDP
[15:30:19] [PASSED] Virtual
[15:30:19] [PASSED] DSI
[15:30:19] [PASSED] DPI
[15:30:19] [PASSED] Writeback
[15:30:19] [PASSED] SPI
[15:30:19] [PASSED] USB
[15:30:19] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[15:30:19] ============ [PASSED] drmm_connector_hdmi_init =============
[15:30:19] ============= drmm_connector_init (3 subtests) =============
[15:30:19] [PASSED] drm_test_drmm_connector_init
[15:30:19] [PASSED] drm_test_drmm_connector_init_null_ddc
[15:30:19] ========= drm_test_drmm_connector_init_type_valid =========
[15:30:19] [PASSED] Unknown
[15:30:19] [PASSED] VGA
[15:30:19] [PASSED] DVI-I
[15:30:19] [PASSED] DVI-D
[15:30:19] [PASSED] DVI-A
[15:30:19] [PASSED] Composite
[15:30:19] [PASSED] SVIDEO
[15:30:19] [PASSED] LVDS
[15:30:19] [PASSED] Component
[15:30:19] [PASSED] DIN
[15:30:19] [PASSED] DP
[15:30:19] [PASSED] HDMI-A
[15:30:19] [PASSED] HDMI-B
[15:30:19] [PASSED] TV
[15:30:19] [PASSED] eDP
[15:30:19] [PASSED] Virtual
[15:30:19] [PASSED] DSI
[15:30:19] [PASSED] DPI
[15:30:19] [PASSED] Writeback
[15:30:19] [PASSED] SPI
[15:30:19] [PASSED] USB
[15:30:19] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[15:30:19] =============== [PASSED] drmm_connector_init ===============
[15:30:19] ========= drm_connector_dynamic_init (6 subtests) ==========
[15:30:19] [PASSED] drm_test_drm_connector_dynamic_init
[15:30:19] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[15:30:19] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[15:30:19] [PASSED] drm_test_drm_connector_dynamic_init_properties
[15:30:19] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[15:30:19] [PASSED] Unknown
[15:30:19] [PASSED] VGA
[15:30:19] [PASSED] DVI-I
[15:30:19] [PASSED] DVI-D
[15:30:19] [PASSED] DVI-A
[15:30:19] [PASSED] Composite
[15:30:19] [PASSED] SVIDEO
[15:30:19] [PASSED] LVDS
[15:30:19] [PASSED] Component
[15:30:19] [PASSED] DIN
[15:30:19] [PASSED] DP
[15:30:19] [PASSED] HDMI-A
[15:30:19] [PASSED] HDMI-B
[15:30:19] [PASSED] TV
[15:30:19] [PASSED] eDP
[15:30:19] [PASSED] Virtual
[15:30:19] [PASSED] DSI
[15:30:19] [PASSED] DPI
[15:30:19] [PASSED] Writeback
[15:30:19] [PASSED] SPI
[15:30:19] [PASSED] USB
[15:30:19] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[15:30:19] ======== drm_test_drm_connector_dynamic_init_name =========
[15:30:19] [PASSED] Unknown
[15:30:19] [PASSED] VGA
[15:30:19] [PASSED] DVI-I
[15:30:19] [PASSED] DVI-D
[15:30:19] [PASSED] DVI-A
[15:30:19] [PASSED] Composite
[15:30:19] [PASSED] SVIDEO
[15:30:19] [PASSED] LVDS
[15:30:19] [PASSED] Component
[15:30:19] [PASSED] DIN
[15:30:19] [PASSED] DP
[15:30:19] [PASSED] HDMI-A
[15:30:19] [PASSED] HDMI-B
[15:30:19] [PASSED] TV
[15:30:19] [PASSED] eDP
[15:30:19] [PASSED] Virtual
[15:30:19] [PASSED] DSI
[15:30:19] [PASSED] DPI
[15:30:19] [PASSED] Writeback
[15:30:19] [PASSED] SPI
[15:30:19] [PASSED] USB
[15:30:19] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[15:30:19] =========== [PASSED] drm_connector_dynamic_init ============
[15:30:19] ==== drm_connector_dynamic_register_early (4 subtests) =====
[15:30:19] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[15:30:19] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[15:30:19] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[15:30:19] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[15:30:19] ====== [PASSED] drm_connector_dynamic_register_early =======
[15:30:19] ======= drm_connector_dynamic_register (7 subtests) ========
[15:30:19] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[15:30:19] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[15:30:19] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[15:30:19] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[15:30:19] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[15:30:19] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[15:30:19] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[15:30:19] ========= [PASSED] drm_connector_dynamic_register ==========
[15:30:19] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[15:30:19] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[15:30:19] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[15:30:19] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[15:30:19] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[15:30:19] ========== drm_test_get_tv_mode_from_name_valid ===========
[15:30:19] [PASSED] NTSC
[15:30:19] [PASSED] NTSC-443
[15:30:19] [PASSED] NTSC-J
[15:30:19] [PASSED] PAL
[15:30:19] [PASSED] PAL-M
[15:30:19] [PASSED] PAL-N
[15:30:19] [PASSED] SECAM
[15:30:19] [PASSED] Mono
[15:30:19] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[15:30:19] [PASSED] drm_test_get_tv_mode_from_name_truncated
[15:30:19] ============ [PASSED] drm_get_tv_mode_from_name ============
[15:30:19] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[15:30:19] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[15:30:19] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[15:30:19] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[15:30:19] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[15:30:19] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[15:30:19] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[15:30:19] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[15:30:19] [PASSED] VIC 96
[15:30:19] [PASSED] VIC 97
[15:30:19] [PASSED] VIC 101
[15:30:19] [PASSED] VIC 102
[15:30:19] [PASSED] VIC 106
[15:30:19] [PASSED] VIC 107
[15:30:19] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[15:30:19] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[15:30:19] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[15:30:19] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[15:30:19] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[15:30:19] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[15:30:19] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[15:30:19] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[15:30:19] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[15:30:19] [PASSED] Automatic
[15:30:19] [PASSED] Full
[15:30:19] [PASSED] Limited 16:235
[15:30:19] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[15:30:19] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[15:30:19] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[15:30:19] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[15:30:19] === drm_test_drm_hdmi_connector_get_output_format_name ====
[15:30:19] [PASSED] RGB
[15:30:19] [PASSED] YUV 4:2:0
[15:30:19] [PASSED] YUV 4:2:2
[15:30:19] [PASSED] YUV 4:4:4
[15:30:19] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[15:30:19] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[15:30:19] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[15:30:19] ============= drm_damage_helper (21 subtests) ==============
[15:30:19] [PASSED] drm_test_damage_iter_no_damage
[15:30:19] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[15:30:19] [PASSED] drm_test_damage_iter_no_damage_src_moved
[15:30:19] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[15:30:19] [PASSED] drm_test_damage_iter_no_damage_not_visible
[15:30:19] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[15:30:19] [PASSED] drm_test_damage_iter_no_damage_no_fb
[15:30:19] [PASSED] drm_test_damage_iter_simple_damage
[15:30:19] [PASSED] drm_test_damage_iter_single_damage
[15:30:19] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[15:30:19] [PASSED] drm_test_damage_iter_single_damage_outside_src
[15:30:19] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[15:30:19] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[15:30:19] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[15:30:19] [PASSED] drm_test_damage_iter_single_damage_src_moved
[15:30:19] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[15:30:19] [PASSED] drm_test_damage_iter_damage
[15:30:19] [PASSED] drm_test_damage_iter_damage_one_intersect
[15:30:19] [PASSED] drm_test_damage_iter_damage_one_outside
[15:30:19] [PASSED] drm_test_damage_iter_damage_src_moved
[15:30:19] [PASSED] drm_test_damage_iter_damage_not_visible
[15:30:19] ================ [PASSED] drm_damage_helper ================
[15:30:19] ============== drm_dp_mst_helper (3 subtests) ==============
[15:30:19] ============== drm_test_dp_mst_calc_pbn_mode ==============
[15:30:19] [PASSED] Clock 154000 BPP 30 DSC disabled
[15:30:19] [PASSED] Clock 234000 BPP 30 DSC disabled
[15:30:19] [PASSED] Clock 297000 BPP 24 DSC disabled
[15:30:19] [PASSED] Clock 332880 BPP 24 DSC enabled
[15:30:19] [PASSED] Clock 324540 BPP 24 DSC enabled
[15:30:19] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[15:30:19] ============== drm_test_dp_mst_calc_pbn_div ===============
[15:30:19] [PASSED] Link rate 2000000 lane count 4
[15:30:19] [PASSED] Link rate 2000000 lane count 2
[15:30:19] [PASSED] Link rate 2000000 lane count 1
[15:30:19] [PASSED] Link rate 1350000 lane count 4
[15:30:19] [PASSED] Link rate 1350000 lane count 2
[15:30:19] [PASSED] Link rate 1350000 lane count 1
[15:30:19] [PASSED] Link rate 1000000 lane count 4
[15:30:19] [PASSED] Link rate 1000000 lane count 2
[15:30:19] [PASSED] Link rate 1000000 lane count 1
[15:30:19] [PASSED] Link rate 810000 lane count 4
[15:30:19] [PASSED] Link rate 810000 lane count 2
[15:30:19] [PASSED] Link rate 810000 lane count 1
[15:30:19] [PASSED] Link rate 540000 lane count 4
[15:30:19] [PASSED] Link rate 540000 lane count 2
[15:30:19] [PASSED] Link rate 540000 lane count 1
[15:30:19] [PASSED] Link rate 270000 lane count 4
[15:30:19] [PASSED] Link rate 270000 lane count 2
[15:30:19] [PASSED] Link rate 270000 lane count 1
[15:30:19] [PASSED] Link rate 162000 lane count 4
[15:30:19] [PASSED] Link rate 162000 lane count 2
[15:30:19] [PASSED] Link rate 162000 lane count 1
[15:30:19] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[15:30:19] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[15:30:19] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[15:30:19] [PASSED] DP_POWER_UP_PHY with port number
[15:30:19] [PASSED] DP_POWER_DOWN_PHY with port number
[15:30:19] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[15:30:19] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[15:30:19] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[15:30:19] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[15:30:19] [PASSED] DP_QUERY_PAYLOAD with port number
[15:30:19] [PASSED] DP_QUERY_PAYLOAD with VCPI
[15:30:19] [PASSED] DP_REMOTE_DPCD_READ with port number
[15:30:19] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[15:30:19] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[15:30:19] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[15:30:19] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[15:30:19] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[15:30:19] [PASSED] DP_REMOTE_I2C_READ with port number
[15:30:19] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[15:30:19] [PASSED] DP_REMOTE_I2C_READ with transactions array
[15:30:19] [PASSED] DP_REMOTE_I2C_WRITE with port number
[15:30:19] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[15:30:19] [PASSED] DP_REMOTE_I2C_WRITE with data array
[15:30:19] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[15:30:19] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[15:30:19] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[15:30:19] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[15:30:19] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[15:30:19] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[15:30:19] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[15:30:19] ================ [PASSED] drm_dp_mst_helper ================
[15:30:19] ================== drm_exec (7 subtests) ===================
[15:30:19] [PASSED] sanitycheck
[15:30:19] [PASSED] test_lock
[15:30:19] [PASSED] test_lock_unlock
[15:30:19] [PASSED] test_duplicates
[15:30:19] [PASSED] test_prepare
[15:30:19] [PASSED] test_prepare_array
[15:30:19] [PASSED] test_multiple_loops
[15:30:19] ==================== [PASSED] drm_exec =====================
[15:30:19] =========== drm_format_helper_test (17 subtests) ===========
[15:30:19] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[15:30:19] [PASSED] single_pixel_source_buffer
[15:30:19] [PASSED] single_pixel_clip_rectangle
[15:30:19] [PASSED] well_known_colors
[15:30:19] [PASSED] destination_pitch
[15:30:19] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[15:30:19] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[15:30:19] [PASSED] single_pixel_source_buffer
[15:30:19] [PASSED] single_pixel_clip_rectangle
[15:30:19] [PASSED] well_known_colors
[15:30:19] [PASSED] destination_pitch
[15:30:19] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[15:30:19] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[15:30:19] [PASSED] single_pixel_source_buffer
[15:30:19] [PASSED] single_pixel_clip_rectangle
[15:30:19] [PASSED] well_known_colors
[15:30:19] [PASSED] destination_pitch
[15:30:19] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[15:30:19] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[15:30:19] [PASSED] single_pixel_source_buffer
[15:30:19] [PASSED] single_pixel_clip_rectangle
[15:30:19] [PASSED] well_known_colors
[15:30:19] [PASSED] destination_pitch
[15:30:19] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[15:30:19] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[15:30:19] [PASSED] single_pixel_source_buffer
[15:30:19] [PASSED] single_pixel_clip_rectangle
[15:30:19] [PASSED] well_known_colors
[15:30:19] [PASSED] destination_pitch
[15:30:19] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[15:30:19] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[15:30:19] [PASSED] single_pixel_source_buffer
[15:30:19] [PASSED] single_pixel_clip_rectangle
[15:30:19] [PASSED] well_known_colors
[15:30:19] [PASSED] destination_pitch
[15:30:19] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[15:30:19] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[15:30:19] [PASSED] single_pixel_source_buffer
[15:30:19] [PASSED] single_pixel_clip_rectangle
[15:30:19] [PASSED] well_known_colors
[15:30:19] [PASSED] destination_pitch
[15:30:19] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[15:30:19] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[15:30:19] [PASSED] single_pixel_source_buffer
[15:30:19] [PASSED] single_pixel_clip_rectangle
[15:30:19] [PASSED] well_known_colors
[15:30:19] [PASSED] destination_pitch
[15:30:19] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[15:30:19] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[15:30:19] [PASSED] single_pixel_source_buffer
[15:30:19] [PASSED] single_pixel_clip_rectangle
[15:30:19] [PASSED] well_known_colors
[15:30:19] [PASSED] destination_pitch
[15:30:19] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[15:30:19] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[15:30:19] [PASSED] single_pixel_source_buffer
[15:30:19] [PASSED] single_pixel_clip_rectangle
[15:30:19] [PASSED] well_known_colors
[15:30:19] [PASSED] destination_pitch
[15:30:19] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[15:30:19] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[15:30:19] [PASSED] single_pixel_source_buffer
[15:30:19] [PASSED] single_pixel_clip_rectangle
[15:30:19] [PASSED] well_known_colors
[15:30:19] [PASSED] destination_pitch
[15:30:19] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[15:30:19] ============== drm_test_fb_xrgb8888_to_mono ===============
[15:30:19] [PASSED] single_pixel_source_buffer
[15:30:19] [PASSED] single_pixel_clip_rectangle
[15:30:19] [PASSED] well_known_colors
[15:30:19] [PASSED] destination_pitch
[15:30:19] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[15:30:19] ==================== drm_test_fb_swab =====================
[15:30:19] [PASSED] single_pixel_source_buffer
[15:30:19] [PASSED] single_pixel_clip_rectangle
[15:30:19] [PASSED] well_known_colors
[15:30:19] [PASSED] destination_pitch
[15:30:19] ================ [PASSED] drm_test_fb_swab =================
[15:30:19] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[15:30:19] [PASSED] single_pixel_source_buffer
[15:30:19] [PASSED] single_pixel_clip_rectangle
[15:30:19] [PASSED] well_known_colors
[15:30:19] [PASSED] destination_pitch
[15:30:19] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[15:30:19] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[15:30:19] [PASSED] single_pixel_source_buffer
[15:30:19] [PASSED] single_pixel_clip_rectangle
[15:30:19] [PASSED] well_known_colors
[15:30:19] [PASSED] destination_pitch
[15:30:19] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[15:30:19] ================= drm_test_fb_clip_offset =================
[15:30:19] [PASSED] pass through
[15:30:19] [PASSED] horizontal offset
[15:30:19] [PASSED] vertical offset
[15:30:19] [PASSED] horizontal and vertical offset
[15:30:19] [PASSED] horizontal offset (custom pitch)
[15:30:19] [PASSED] vertical offset (custom pitch)
[15:30:19] [PASSED] horizontal and vertical offset (custom pitch)
[15:30:19] ============= [PASSED] drm_test_fb_clip_offset =============
[15:30:19] =================== drm_test_fb_memcpy ====================
[15:30:19] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[15:30:19] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[15:30:19] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[15:30:19] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[15:30:19] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[15:30:19] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[15:30:19] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[15:30:19] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[15:30:19] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[15:30:19] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[15:30:19] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[15:30:19] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[15:30:19] =============== [PASSED] drm_test_fb_memcpy ================
[15:30:19] ============= [PASSED] drm_format_helper_test ==============
[15:30:19] ================= drm_format (18 subtests) =================
[15:30:19] [PASSED] drm_test_format_block_width_invalid
[15:30:19] [PASSED] drm_test_format_block_width_one_plane
[15:30:19] [PASSED] drm_test_format_block_width_two_plane
[15:30:19] [PASSED] drm_test_format_block_width_three_plane
[15:30:19] [PASSED] drm_test_format_block_width_tiled
[15:30:19] [PASSED] drm_test_format_block_height_invalid
[15:30:19] [PASSED] drm_test_format_block_height_one_plane
[15:30:19] [PASSED] drm_test_format_block_height_two_plane
[15:30:19] [PASSED] drm_test_format_block_height_three_plane
[15:30:19] [PASSED] drm_test_format_block_height_tiled
[15:30:19] [PASSED] drm_test_format_min_pitch_invalid
[15:30:19] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[15:30:19] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[15:30:19] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[15:30:19] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[15:30:19] [PASSED] drm_test_format_min_pitch_two_plane
[15:30:19] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[15:30:19] [PASSED] drm_test_format_min_pitch_tiled
[15:30:19] =================== [PASSED] drm_format ====================
[15:30:19] ============== drm_framebuffer (10 subtests) ===============
[15:30:19] ========== drm_test_framebuffer_check_src_coords ==========
[15:30:19] [PASSED] Success: source fits into fb
[15:30:19] [PASSED] Fail: overflowing fb with x-axis coordinate
[15:30:19] [PASSED] Fail: overflowing fb with y-axis coordinate
[15:30:19] [PASSED] Fail: overflowing fb with source width
[15:30:19] [PASSED] Fail: overflowing fb with source height
[15:30:19] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[15:30:19] [PASSED] drm_test_framebuffer_cleanup
[15:30:19] =============== drm_test_framebuffer_create ===============
[15:30:19] [PASSED] ABGR8888 normal sizes
[15:30:19] [PASSED] ABGR8888 max sizes
[15:30:19] [PASSED] ABGR8888 pitch greater than min required
[15:30:19] [PASSED] ABGR8888 pitch less than min required
[15:30:19] [PASSED] ABGR8888 Invalid width
[15:30:19] [PASSED] ABGR8888 Invalid buffer handle
[15:30:19] [PASSED] No pixel format
[15:30:19] [PASSED] ABGR8888 Width 0
[15:30:19] [PASSED] ABGR8888 Height 0
[15:30:19] [PASSED] ABGR8888 Out of bound height * pitch combination
[15:30:19] [PASSED] ABGR8888 Large buffer offset
[15:30:19] [PASSED] ABGR8888 Buffer offset for inexistent plane
[15:30:19] [PASSED] ABGR8888 Invalid flag
[15:30:19] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[15:30:19] [PASSED] ABGR8888 Valid buffer modifier
[15:30:19] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[15:30:19] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[15:30:19] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[15:30:19] [PASSED] NV12 Normal sizes
[15:30:19] [PASSED] NV12 Max sizes
[15:30:19] [PASSED] NV12 Invalid pitch
[15:30:19] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[15:30:19] [PASSED] NV12 different modifier per-plane
[15:30:19] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[15:30:19] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[15:30:19] [PASSED] NV12 Modifier for inexistent plane
[15:30:19] [PASSED] NV12 Handle for inexistent plane
[15:30:19] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[15:30:19] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[15:30:19] [PASSED] YVU420 Normal sizes
[15:30:19] [PASSED] YVU420 Max sizes
[15:30:19] [PASSED] YVU420 Invalid pitch
[15:30:19] [PASSED] YVU420 Different pitches
[15:30:19] [PASSED] YVU420 Different buffer offsets/pitches
[15:30:19] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[15:30:19] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[15:30:19] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[15:30:19] [PASSED] YVU420 Valid modifier
[15:30:19] [PASSED] YVU420 Different modifiers per plane
[15:30:19] [PASSED] YVU420 Modifier for inexistent plane
[15:30:19] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[15:30:19] [PASSED] X0L2 Normal sizes
[15:30:19] [PASSED] X0L2 Max sizes
[15:30:19] [PASSED] X0L2 Invalid pitch
[15:30:19] [PASSED] X0L2 Pitch greater than minimum required
[15:30:19] [PASSED] X0L2 Handle for inexistent plane
[15:30:19] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[15:30:19] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[15:30:19] [PASSED] X0L2 Valid modifier
[15:30:19] [PASSED] X0L2 Modifier for inexistent plane
[15:30:19] =========== [PASSED] drm_test_framebuffer_create ===========
[15:30:19] [PASSED] drm_test_framebuffer_free
[15:30:19] [PASSED] drm_test_framebuffer_init
[15:30:19] [PASSED] drm_test_framebuffer_init_bad_format
[15:30:19] [PASSED] drm_test_framebuffer_init_dev_mismatch
[15:30:19] [PASSED] drm_test_framebuffer_lookup
[15:30:19] [PASSED] drm_test_framebuffer_lookup_inexistent
[15:30:19] [PASSED] drm_test_framebuffer_modifiers_not_supported
[15:30:19] ================= [PASSED] drm_framebuffer =================
[15:30:19] ================ drm_gem_shmem (8 subtests) ================
[15:30:19] [PASSED] drm_gem_shmem_test_obj_create
[15:30:19] [PASSED] drm_gem_shmem_test_obj_create_private
[15:30:19] [PASSED] drm_gem_shmem_test_pin_pages
[15:30:19] [PASSED] drm_gem_shmem_test_vmap
[15:30:19] [PASSED] drm_gem_shmem_test_get_pages_sgt
[15:30:19] [PASSED] drm_gem_shmem_test_get_sg_table
[15:30:19] [PASSED] drm_gem_shmem_test_madvise
[15:30:19] [PASSED] drm_gem_shmem_test_purge
[15:30:19] ================== [PASSED] drm_gem_shmem ==================
[15:30:19] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[15:30:19] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[15:30:19] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[15:30:19] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[15:30:19] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[15:30:19] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[15:30:19] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[15:30:19] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[15:30:19] [PASSED] Automatic
[15:30:19] [PASSED] Full
[15:30:19] [PASSED] Limited 16:235
[15:30:19] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[15:30:19] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[15:30:19] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[15:30:19] [PASSED] drm_test_check_disable_connector
[15:30:19] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[15:30:19] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[15:30:19] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[15:30:19] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[15:30:19] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[15:30:19] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[15:30:19] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[15:30:19] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[15:30:19] [PASSED] drm_test_check_output_bpc_dvi
[15:30:19] [PASSED] drm_test_check_output_bpc_format_vic_1
[15:30:19] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[15:30:19] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[15:30:19] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[15:30:19] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[15:30:19] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[15:30:19] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[15:30:19] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[15:30:19] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[15:30:19] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[15:30:19] [PASSED] drm_test_check_broadcast_rgb_value
[15:30:19] [PASSED] drm_test_check_bpc_8_value
[15:30:19] [PASSED] drm_test_check_bpc_10_value
[15:30:19] [PASSED] drm_test_check_bpc_12_value
[15:30:19] [PASSED] drm_test_check_format_value
[15:30:19] [PASSED] drm_test_check_tmds_char_value
[15:30:19] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[15:30:19] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[15:30:19] [PASSED] drm_test_check_mode_valid
[15:30:19] [PASSED] drm_test_check_mode_valid_reject
[15:30:19] [PASSED] drm_test_check_mode_valid_reject_rate
[15:30:19] [PASSED] drm_test_check_mode_valid_reject_max_clock
[15:30:19] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[15:30:19] ================= drm_managed (2 subtests) =================
[15:30:19] [PASSED] drm_test_managed_release_action
[15:30:19] [PASSED] drm_test_managed_run_action
[15:30:19] =================== [PASSED] drm_managed ===================
[15:30:19] =================== drm_mm (6 subtests) ====================
[15:30:19] [PASSED] drm_test_mm_init
[15:30:19] [PASSED] drm_test_mm_debug
[15:30:19] [PASSED] drm_test_mm_align32
[15:30:19] [PASSED] drm_test_mm_align64
[15:30:19] [PASSED] drm_test_mm_lowest
[15:30:19] [PASSED] drm_test_mm_highest
[15:30:19] ===================== [PASSED] drm_mm ======================
[15:30:19] ============= drm_modes_analog_tv (5 subtests) =============
[15:30:19] [PASSED] drm_test_modes_analog_tv_mono_576i
[15:30:19] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[15:30:19] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[15:30:19] [PASSED] drm_test_modes_analog_tv_pal_576i
[15:30:19] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[15:30:19] =============== [PASSED] drm_modes_analog_tv ===============
[15:30:19] ============== drm_plane_helper (2 subtests) ===============
[15:30:19] =============== drm_test_check_plane_state ================
[15:30:19] [PASSED] clipping_simple
[15:30:19] [PASSED] clipping_rotate_reflect
[15:30:19] [PASSED] positioning_simple
[15:30:19] [PASSED] upscaling
[15:30:19] [PASSED] downscaling
[15:30:19] [PASSED] rounding1
[15:30:19] [PASSED] rounding2
[15:30:19] [PASSED] rounding3
[15:30:19] [PASSED] rounding4
[15:30:19] =========== [PASSED] drm_test_check_plane_state ============
[15:30:19] =========== drm_test_check_invalid_plane_state ============
[15:30:19] [PASSED] positioning_invalid
[15:30:19] [PASSED] upscaling_invalid
[15:30:19] [PASSED] downscaling_invalid
[15:30:19] ======= [PASSED] drm_test_check_invalid_plane_state ========
[15:30:19] ================ [PASSED] drm_plane_helper =================
[15:30:19] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[15:30:19] ====== drm_test_connector_helper_tv_get_modes_check =======
[15:30:19] [PASSED] None
[15:30:19] [PASSED] PAL
[15:30:19] [PASSED] NTSC
[15:30:19] [PASSED] Both, NTSC Default
[15:30:19] [PASSED] Both, PAL Default
[15:30:19] [PASSED] Both, NTSC Default, with PAL on command-line
[15:30:19] [PASSED] Both, PAL Default, with NTSC on command-line
[15:30:19] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[15:30:19] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[15:30:19] ================== drm_rect (9 subtests) ===================
[15:30:19] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[15:30:19] [PASSED] drm_test_rect_clip_scaled_not_clipped
[15:30:19] [PASSED] drm_test_rect_clip_scaled_clipped
[15:30:19] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[15:30:19] ================= drm_test_rect_intersect =================
[15:30:19] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[15:30:19] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[15:30:19] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[15:30:19] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[15:30:19] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[15:30:19] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[15:30:19] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[15:30:19] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[15:30:19] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[15:30:19] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[15:30:19] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[15:30:19] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[15:30:19] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[15:30:19] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[15:30:19] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[15:30:19] ============= [PASSED] drm_test_rect_intersect =============
[15:30:19] ================ drm_test_rect_calc_hscale ================
[15:30:19] [PASSED] normal use
[15:30:19] [PASSED] out of max range
[15:30:19] [PASSED] out of min range
[15:30:19] [PASSED] zero dst
[15:30:19] [PASSED] negative src
[15:30:19] [PASSED] negative dst
[15:30:19] ============ [PASSED] drm_test_rect_calc_hscale ============
[15:30:19] ================ drm_test_rect_calc_vscale ================
[15:30:19] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[15:30:19] [PASSED] out of max range
[15:30:19] [PASSED] out of min range
[15:30:19] [PASSED] zero dst
[15:30:19] [PASSED] negative src
[15:30:19] [PASSED] negative dst
[15:30:19] ============ [PASSED] drm_test_rect_calc_vscale ============
[15:30:19] ================== drm_test_rect_rotate ===================
[15:30:19] [PASSED] reflect-x
[15:30:19] [PASSED] reflect-y
[15:30:19] [PASSED] rotate-0
[15:30:19] [PASSED] rotate-90
[15:30:19] [PASSED] rotate-180
[15:30:19] [PASSED] rotate-270
[15:30:19] ============== [PASSED] drm_test_rect_rotate ===============
[15:30:19] ================ drm_test_rect_rotate_inv =================
[15:30:19] [PASSED] reflect-x
[15:30:19] [PASSED] reflect-y
[15:30:19] [PASSED] rotate-0
[15:30:19] [PASSED] rotate-90
[15:30:19] [PASSED] rotate-180
[15:30:19] [PASSED] rotate-270
[15:30:19] ============ [PASSED] drm_test_rect_rotate_inv =============
[15:30:19] ==================== [PASSED] drm_rect =====================
[15:30:19] ============ drm_sysfb_modeset_test (1 subtest) ============
[15:30:19] ============ drm_test_sysfb_build_fourcc_list =============
[15:30:19] [PASSED] no native formats
[15:30:19] [PASSED] XRGB8888 as native format
[15:30:19] [PASSED] remove duplicates
[15:30:19] [PASSED] convert alpha formats
[15:30:19] [PASSED] random formats
[15:30:19] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[15:30:19] ============= [PASSED] drm_sysfb_modeset_test ==============
[15:30:19] ============================================================
[15:30:19] Testing complete. Ran 622 tests: passed: 622
[15:30:19] Elapsed time: 27.224s total, 1.671s configuring, 25.132s building, 0.389s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[15:30:20] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[15:30:21] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[15:30:31] Starting KUnit Kernel (1/1)...
[15:30:31] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[15:30:31] ================= ttm_device (5 subtests) ==================
[15:30:31] [PASSED] ttm_device_init_basic
[15:30:31] [PASSED] ttm_device_init_multiple
[15:30:31] [PASSED] ttm_device_fini_basic
[15:30:31] [PASSED] ttm_device_init_no_vma_man
[15:30:31] ================== ttm_device_init_pools ==================
[15:30:31] [PASSED] No DMA allocations, no DMA32 required
[15:30:31] [PASSED] DMA allocations, DMA32 required
[15:30:31] [PASSED] No DMA allocations, DMA32 required
[15:30:31] [PASSED] DMA allocations, no DMA32 required
[15:30:31] ============== [PASSED] ttm_device_init_pools ==============
[15:30:31] =================== [PASSED] ttm_device ====================
[15:30:31] ================== ttm_pool (8 subtests) ===================
[15:30:31] ================== ttm_pool_alloc_basic ===================
[15:30:31] [PASSED] One page
[15:30:31] [PASSED] More than one page
[15:30:31] [PASSED] Above the allocation limit
[15:30:31] [PASSED] One page, with coherent DMA mappings enabled
[15:30:31] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[15:30:31] ============== [PASSED] ttm_pool_alloc_basic ===============
[15:30:31] ============== ttm_pool_alloc_basic_dma_addr ==============
[15:30:31] [PASSED] One page
[15:30:31] [PASSED] More than one page
[15:30:31] [PASSED] Above the allocation limit
[15:30:31] [PASSED] One page, with coherent DMA mappings enabled
[15:30:31] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[15:30:31] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[15:30:31] [PASSED] ttm_pool_alloc_order_caching_match
[15:30:31] [PASSED] ttm_pool_alloc_caching_mismatch
[15:30:31] [PASSED] ttm_pool_alloc_order_mismatch
[15:30:31] [PASSED] ttm_pool_free_dma_alloc
[15:30:31] [PASSED] ttm_pool_free_no_dma_alloc
[15:30:31] [PASSED] ttm_pool_fini_basic
[15:30:31] ==================== [PASSED] ttm_pool =====================
[15:30:31] ================ ttm_resource (8 subtests) =================
[15:30:31] ================= ttm_resource_init_basic =================
[15:30:31] [PASSED] Init resource in TTM_PL_SYSTEM
[15:30:31] [PASSED] Init resource in TTM_PL_VRAM
[15:30:31] [PASSED] Init resource in a private placement
[15:30:31] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[15:30:31] ============= [PASSED] ttm_resource_init_basic =============
[15:30:31] [PASSED] ttm_resource_init_pinned
[15:30:31] [PASSED] ttm_resource_fini_basic
[15:30:31] [PASSED] ttm_resource_manager_init_basic
[15:30:31] [PASSED] ttm_resource_manager_usage_basic
[15:30:31] [PASSED] ttm_resource_manager_set_used_basic
[15:30:31] [PASSED] ttm_sys_man_alloc_basic
[15:30:31] [PASSED] ttm_sys_man_free_basic
[15:30:31] ================== [PASSED] ttm_resource ===================
[15:30:31] =================== ttm_tt (15 subtests) ===================
[15:30:31] ==================== ttm_tt_init_basic ====================
[15:30:31] [PASSED] Page-aligned size
[15:30:31] [PASSED] Extra pages requested
[15:30:31] ================ [PASSED] ttm_tt_init_basic ================
[15:30:31] [PASSED] ttm_tt_init_misaligned
[15:30:31] [PASSED] ttm_tt_fini_basic
[15:30:31] [PASSED] ttm_tt_fini_sg
[15:30:31] [PASSED] ttm_tt_fini_shmem
[15:30:31] [PASSED] ttm_tt_create_basic
[15:30:31] [PASSED] ttm_tt_create_invalid_bo_type
[15:30:31] [PASSED] ttm_tt_create_ttm_exists
[15:30:31] [PASSED] ttm_tt_create_failed
[15:30:31] [PASSED] ttm_tt_destroy_basic
[15:30:31] [PASSED] ttm_tt_populate_null_ttm
[15:30:31] [PASSED] ttm_tt_populate_populated_ttm
[15:30:31] [PASSED] ttm_tt_unpopulate_basic
[15:30:31] [PASSED] ttm_tt_unpopulate_empty_ttm
[15:30:31] [PASSED] ttm_tt_swapin_basic
[15:30:31] ===================== [PASSED] ttm_tt ======================
[15:30:31] =================== ttm_bo (14 subtests) ===================
[15:30:31] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[15:30:31] [PASSED] Cannot be interrupted and sleeps
[15:30:31] [PASSED] Cannot be interrupted, locks straight away
[15:30:31] [PASSED] Can be interrupted, sleeps
[15:30:31] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[15:30:31] [PASSED] ttm_bo_reserve_locked_no_sleep
[15:30:31] [PASSED] ttm_bo_reserve_no_wait_ticket
[15:30:31] [PASSED] ttm_bo_reserve_double_resv
[15:30:31] [PASSED] ttm_bo_reserve_interrupted
[15:30:31] [PASSED] ttm_bo_reserve_deadlock
[15:30:31] [PASSED] ttm_bo_unreserve_basic
[15:30:31] [PASSED] ttm_bo_unreserve_pinned
[15:30:31] [PASSED] ttm_bo_unreserve_bulk
[15:30:31] [PASSED] ttm_bo_fini_basic
[15:30:31] [PASSED] ttm_bo_fini_shared_resv
[15:30:31] [PASSED] ttm_bo_pin_basic
[15:30:31] [PASSED] ttm_bo_pin_unpin_resource
[15:30:31] [PASSED] ttm_bo_multiple_pin_one_unpin
[15:30:31] ===================== [PASSED] ttm_bo ======================
[15:30:31] ============== ttm_bo_validate (21 subtests) ===============
[15:30:31] ============== ttm_bo_init_reserved_sys_man ===============
[15:30:31] [PASSED] Buffer object for userspace
[15:30:31] [PASSED] Kernel buffer object
[15:30:31] [PASSED] Shared buffer object
[15:30:31] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[15:30:31] ============== ttm_bo_init_reserved_mock_man ==============
[15:30:31] [PASSED] Buffer object for userspace
[15:30:31] [PASSED] Kernel buffer object
[15:30:31] [PASSED] Shared buffer object
[15:30:31] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[15:30:31] [PASSED] ttm_bo_init_reserved_resv
[15:30:31] ================== ttm_bo_validate_basic ==================
[15:30:31] [PASSED] Buffer object for userspace
[15:30:31] [PASSED] Kernel buffer object
[15:30:31] [PASSED] Shared buffer object
[15:30:31] ============== [PASSED] ttm_bo_validate_basic ==============
[15:30:31] [PASSED] ttm_bo_validate_invalid_placement
[15:30:31] ============= ttm_bo_validate_same_placement ==============
[15:30:31] [PASSED] System manager
[15:30:31] [PASSED] VRAM manager
[15:30:31] ========= [PASSED] ttm_bo_validate_same_placement ==========
[15:30:31] [PASSED] ttm_bo_validate_failed_alloc
[15:30:31] [PASSED] ttm_bo_validate_pinned
[15:30:31] [PASSED] ttm_bo_validate_busy_placement
[15:30:31] ================ ttm_bo_validate_multihop =================
[15:30:31] [PASSED] Buffer object for userspace
[15:30:31] [PASSED] Kernel buffer object
[15:30:31] [PASSED] Shared buffer object
[15:30:31] ============ [PASSED] ttm_bo_validate_multihop =============
[15:30:31] ========== ttm_bo_validate_no_placement_signaled ==========
[15:30:31] [PASSED] Buffer object in system domain, no page vector
[15:30:31] [PASSED] Buffer object in system domain with an existing page vector
[15:30:31] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[15:30:31] ======== ttm_bo_validate_no_placement_not_signaled ========
[15:30:31] [PASSED] Buffer object for userspace
[15:30:31] [PASSED] Kernel buffer object
[15:30:31] [PASSED] Shared buffer object
[15:30:31] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[15:30:31] [PASSED] ttm_bo_validate_move_fence_signaled
[15:30:31] ========= ttm_bo_validate_move_fence_not_signaled =========
[15:30:31] [PASSED] Waits for GPU
[15:30:31] [PASSED] Tries to lock straight away
[15:30:31] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[15:30:31] [PASSED] ttm_bo_validate_happy_evict
[15:30:31] [PASSED] ttm_bo_validate_all_pinned_evict
[15:30:31] [PASSED] ttm_bo_validate_allowed_only_evict
[15:30:31] [PASSED] ttm_bo_validate_deleted_evict
[15:30:31] [PASSED] ttm_bo_validate_busy_domain_evict
[15:30:31] [PASSED] ttm_bo_validate_evict_gutting
[15:30:31] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[15:30:31] ================= [PASSED] ttm_bo_validate =================
[15:30:31] ============================================================
[15:30:31] Testing complete. Ran 101 tests: passed: 101
[15:30:31] Elapsed time: 11.273s total, 1.677s configuring, 9.380s building, 0.181s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 18+ messages in thread* ✓ Xe.CI.BAT: success for drm/{i915, xe}/irq: clarify display and parent driver interfaces (rev3)
2025-11-11 7:34 [PATCH v2 0/3] drm/{i915, xe}/irq: clarify display and parent driver interfaces Jani Nikula
` (8 preceding siblings ...)
2025-11-12 15:30 ` ✓ CI.KUnit: success " Patchwork
@ 2025-11-12 16:10 ` Patchwork
2025-11-12 20:26 ` ✗ Xe.CI.Full: failure " Patchwork
10 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2025-11-12 16:10 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1922 bytes --]
== Series Details ==
Series: drm/{i915, xe}/irq: clarify display and parent driver interfaces (rev3)
URL : https://patchwork.freedesktop.org/series/157350/
State : success
== Summary ==
CI Bug Log - changes from xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2_BAT -> xe-pw-157350v3_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-157350v3_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_flip@basic-plain-flip@b-edp1:
- bat-adlp-7: [PASS][1] -> [DMESG-WARN][2] ([Intel XE#4543]) +1 other test dmesg-warn
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/bat-adlp-7/igt@kms_flip@basic-plain-flip@b-edp1.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/bat-adlp-7/igt@kms_flip@basic-plain-flip@b-edp1.html
* igt@xe_waitfence@reltime:
- bat-dg2-oem2: [PASS][3] -> [FAIL][4] ([Intel XE#6520])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/bat-dg2-oem2/igt@xe_waitfence@reltime.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/bat-dg2-oem2/igt@xe_waitfence@reltime.html
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#6520]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6520
Build changes
-------------
* Linux: xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2 -> xe-pw-157350v3
IGT_8621: 8621
xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2: 0961bffa4c3b59fb4c844f2e5687d876a78938c2
xe-pw-157350v3: 157350v3
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/index.html
[-- Attachment #2: Type: text/html, Size: 2521 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread* ✗ Xe.CI.Full: failure for drm/{i915, xe}/irq: clarify display and parent driver interfaces (rev3)
2025-11-11 7:34 [PATCH v2 0/3] drm/{i915, xe}/irq: clarify display and parent driver interfaces Jani Nikula
` (9 preceding siblings ...)
2025-11-12 16:10 ` ✓ Xe.CI.BAT: " Patchwork
@ 2025-11-12 20:26 ` Patchwork
10 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2025-11-12 20:26 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 53734 bytes --]
== Series Details ==
Series: drm/{i915, xe}/irq: clarify display and parent driver interfaces (rev3)
URL : https://patchwork.freedesktop.org/series/157350/
State : failure
== Summary ==
CI Bug Log - changes from xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2_FULL -> xe-pw-157350v3_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-157350v3_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-157350v3_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-157350v3_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-bmg: [PASS][1] -> [DMESG-WARN][2] +1 other test dmesg-warn
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
Known issues
------------
Here are the changes found in xe-pw-157350v3_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@linear-32bpp-rotate-270:
- shard-dg2-set2: NOTRUN -> [SKIP][3] ([Intel XE#316])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-435/igt@kms_big_fb@linear-32bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-addfb-size-offset-overflow:
- shard-dg2-set2: NOTRUN -> [SKIP][4] ([Intel XE#607])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-436/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180:
- shard-dg2-set2: NOTRUN -> [SKIP][5] ([Intel XE#1124]) +4 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-464/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180.html
- shard-lnl: NOTRUN -> [SKIP][6] ([Intel XE#1124]) +1 other test skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-lnl-4/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180.html
* igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p:
- shard-dg2-set2: NOTRUN -> [SKIP][7] ([Intel XE#2191])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-463/igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-2-displays-2560x1440p:
- shard-dg2-set2: NOTRUN -> [SKIP][8] ([Intel XE#367]) +2 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-464/igt@kms_bw@linear-tiling-2-displays-2560x1440p.html
- shard-lnl: NOTRUN -> [SKIP][9] ([Intel XE#367])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-lnl-4/igt@kms_bw@linear-tiling-2-displays-2560x1440p.html
* igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][10] ([Intel XE#2907]) +1 other test skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-464/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs@pipe-c-edp-1:
- shard-lnl: NOTRUN -> [SKIP][11] ([Intel XE#2669]) +3 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-lnl-4/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs@pipe-c-edp-1.html
* igt@kms_ccs@crc-primary-basic-y-tiled-ccs:
- shard-lnl: NOTRUN -> [SKIP][12] ([Intel XE#2887])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-lnl-4/igt@kms_ccs@crc-primary-basic-y-tiled-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][13] ([Intel XE#455] / [Intel XE#787]) +7 other tests skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-436/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc@pipe-d-dp-4.html
* igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-rc-ccs@pipe-c-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [SKIP][14] ([Intel XE#787]) +27 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-436/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-rc-ccs@pipe-c-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#2652] / [Intel XE#787]) +3 other tests skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-2/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2.html
* igt@kms_chamelium_color@ctm-green-to-red:
- shard-dg2-set2: NOTRUN -> [SKIP][16] ([Intel XE#306])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-464/igt@kms_chamelium_color@ctm-green-to-red.html
- shard-lnl: NOTRUN -> [SKIP][17] ([Intel XE#306])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-lnl-4/igt@kms_chamelium_color@ctm-green-to-red.html
* igt@kms_chamelium_edid@dp-edid-resolution-list:
- shard-dg2-set2: NOTRUN -> [SKIP][18] ([Intel XE#373]) +8 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-463/igt@kms_chamelium_edid@dp-edid-resolution-list.html
* igt@kms_chamelium_frames@hdmi-crc-single:
- shard-lnl: NOTRUN -> [SKIP][19] ([Intel XE#373])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-lnl-4/igt@kms_chamelium_frames@hdmi-crc-single.html
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-dg2-set2: NOTRUN -> [SKIP][20] ([Intel XE#307])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-463/igt@kms_content_protection@dp-mst-lic-type-0.html
* igt@kms_content_protection@srm@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][21] ([Intel XE#1178]) +1 other test fail
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-2/igt@kms_content_protection@srm@pipe-a-dp-2.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-atomic:
- shard-lnl: NOTRUN -> [SKIP][22] ([Intel XE#309])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-lnl-4/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size:
- shard-bmg: [PASS][23] -> [SKIP][24] ([Intel XE#2291]) +1 other test skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic:
- shard-bmg: [PASS][25] -> [FAIL][26] ([Intel XE#1475]) +1 other test fail
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-5/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-8/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
* igt@kms_dp_link_training@non-uhbr-sst:
- shard-bmg: [PASS][27] -> [SKIP][28] ([Intel XE#4354])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-1/igt@kms_dp_link_training@non-uhbr-sst.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-6/igt@kms_dp_link_training@non-uhbr-sst.html
* igt@kms_dp_linktrain_fallback@dsc-fallback:
- shard-dg2-set2: NOTRUN -> [SKIP][29] ([Intel XE#4331])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-436/igt@kms_dp_linktrain_fallback@dsc-fallback.html
* igt@kms_feature_discovery@psr2:
- shard-dg2-set2: NOTRUN -> [SKIP][30] ([Intel XE#1135])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-436/igt@kms_feature_discovery@psr2.html
* igt@kms_flip@2x-blocking-wf_vblank:
- shard-bmg: [PASS][31] -> [SKIP][32] ([Intel XE#2316]) +3 other tests skip
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-4/igt@kms_flip@2x-blocking-wf_vblank.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-6/igt@kms_flip@2x-blocking-wf_vblank.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
- shard-lnl: [PASS][33] -> [FAIL][34] ([Intel XE#301]) +2 other tests fail
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-bmg: [PASS][35] -> [INCOMPLETE][36] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-4/igt@kms_flip@flip-vs-suspend-interruptible.html
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-6/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip@plain-flip-ts-check-interruptible@b-hdmi-a1:
- shard-adlp: [PASS][37] -> [DMESG-WARN][38] ([Intel XE#4543])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-adlp-4/igt@kms_flip@plain-flip-ts-check-interruptible@b-hdmi-a1.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-adlp-3/igt@kms_flip@plain-flip-ts-check-interruptible@b-hdmi-a1.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][39] ([Intel XE#2293])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-4/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling:
- shard-dg2-set2: NOTRUN -> [SKIP][40] ([Intel XE#455]) +16 other tests skip
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-464/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-cur-indfb-onoff:
- shard-dg2-set2: NOTRUN -> [SKIP][41] ([Intel XE#651]) +18 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-435/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-cur-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-onoff:
- shard-lnl: NOTRUN -> [SKIP][42] ([Intel XE#656])
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-lnl-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-render:
- shard-bmg: NOTRUN -> [SKIP][43] ([Intel XE#2313])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-render.html
* igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][44] ([Intel XE#6312]) +1 other test skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][45] ([Intel XE#653]) +22 other tests skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_pm_backlight@fade-with-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][46] ([Intel XE#870])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-464/igt@kms_pm_backlight@fade-with-suspend.html
* igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf:
- shard-dg2-set2: NOTRUN -> [SKIP][47] ([Intel XE#1406] / [Intel XE#1489]) +5 other tests skip
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-435/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html
* igt@kms_psr@fbc-psr2-sprite-plane-move:
- shard-dg2-set2: NOTRUN -> [SKIP][48] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +10 other tests skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-435/igt@kms_psr@fbc-psr2-sprite-plane-move.html
* igt@kms_rmfb@close-fd@pipe-a-hdmi-a-1:
- shard-adlp: [PASS][49] -> [DMESG-WARN][50] ([Intel XE#2953] / [Intel XE#4173]) +12 other tests dmesg-warn
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-adlp-6/igt@kms_rmfb@close-fd@pipe-a-hdmi-a-1.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-adlp-4/igt@kms_rmfb@close-fd@pipe-a-hdmi-a-1.html
* igt@kms_rotation_crc@primary-rotation-270:
- shard-dg2-set2: NOTRUN -> [SKIP][51] ([Intel XE#3414])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-435/igt@kms_rotation_crc@primary-rotation-270.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
- shard-dg2-set2: NOTRUN -> [SKIP][52] ([Intel XE#1127])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-463/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-dg2-set2: NOTRUN -> [SKIP][53] ([Intel XE#1500])
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-435/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1:
- shard-lnl: [PASS][54] -> [FAIL][55] ([Intel XE#2142]) +1 other test fail
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-lnl-5/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-lnl-2/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
* igt@xe_copy_basic@mem-set-linear-0x8fffe:
- shard-dg2-set2: NOTRUN -> [SKIP][56] ([Intel XE#5503])
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-435/igt@xe_copy_basic@mem-set-linear-0x8fffe.html
* igt@xe_eu_stall@invalid-event-report-count:
- shard-dg2-set2: NOTRUN -> [SKIP][57] ([Intel XE#5626]) +1 other test skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-435/igt@xe_eu_stall@invalid-event-report-count.html
* igt@xe_eudebug@basic-vm-access-userptr-faultable:
- shard-dg2-set2: NOTRUN -> [SKIP][58] ([Intel XE#4837]) +8 other tests skip
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-464/igt@xe_eudebug@basic-vm-access-userptr-faultable.html
* igt@xe_evict@evict-threads-small-multi-vm:
- shard-lnl: NOTRUN -> [SKIP][59] ([Intel XE#688])
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-lnl-4/igt@xe_evict@evict-threads-small-multi-vm.html
* igt@xe_exec_fault_mode@twice-userptr-rebind-imm:
- shard-dg2-set2: NOTRUN -> [SKIP][60] ([Intel XE#288]) +21 other tests skip
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-463/igt@xe_exec_fault_mode@twice-userptr-rebind-imm.html
* igt@xe_exec_sip_eudebug@breakpoint-writesip-twice:
- shard-lnl: NOTRUN -> [SKIP][61] ([Intel XE#4837])
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-lnl-4/igt@xe_exec_sip_eudebug@breakpoint-writesip-twice.html
* igt@xe_exec_system_allocator@threads-many-large-execqueues-malloc-mlock-nomemset:
- shard-dg2-set2: NOTRUN -> [SKIP][62] ([Intel XE#4915]) +218 other tests skip
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-463/igt@xe_exec_system_allocator@threads-many-large-execqueues-malloc-mlock-nomemset.html
* igt@xe_oa@non-privileged-map-oa-buffer:
- shard-dg2-set2: NOTRUN -> [SKIP][63] ([Intel XE#3573]) +2 other tests skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-463/igt@xe_oa@non-privileged-map-oa-buffer.html
* igt@xe_oa@tail-address-wrap:
- shard-dg2-set2: NOTRUN -> [SKIP][64] ([Intel XE#6032])
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-436/igt@xe_oa@tail-address-wrap.html
* igt@xe_pat@pat-index-xehpc:
- shard-dg2-set2: NOTRUN -> [SKIP][65] ([Intel XE#2838] / [Intel XE#979])
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-435/igt@xe_pat@pat-index-xehpc.html
* igt@xe_pm@d3cold-mocs:
- shard-dg2-set2: NOTRUN -> [SKIP][66] ([Intel XE#2284])
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-463/igt@xe_pm@d3cold-mocs.html
* igt@xe_pm@s2idle-exec-after:
- shard-adlp: [PASS][67] -> [DMESG-WARN][68] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#4504])
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-adlp-6/igt@xe_pm@s2idle-exec-after.html
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-adlp-4/igt@xe_pm@s2idle-exec-after.html
* igt@xe_pm@s4-d3cold-basic-exec:
- shard-dg2-set2: NOTRUN -> [SKIP][69] ([Intel XE#2284] / [Intel XE#366])
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-436/igt@xe_pm@s4-d3cold-basic-exec.html
* igt@xe_pmu@all-fn-engine-activity-load:
- shard-dg2-set2: NOTRUN -> [SKIP][70] ([Intel XE#4650])
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-464/igt@xe_pmu@all-fn-engine-activity-load.html
* igt@xe_pxp@pxp-stale-bo-exec-post-termination-irq:
- shard-dg2-set2: NOTRUN -> [SKIP][71] ([Intel XE#4733])
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-464/igt@xe_pxp@pxp-stale-bo-exec-post-termination-irq.html
* igt@xe_query@multigpu-query-topology:
- shard-dg2-set2: NOTRUN -> [SKIP][72] ([Intel XE#944]) +3 other tests skip
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-463/igt@xe_query@multigpu-query-topology.html
* igt@xe_render_copy@render-stress-2-copies:
- shard-dg2-set2: NOTRUN -> [SKIP][73] ([Intel XE#4814])
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-435/igt@xe_render_copy@render-stress-2-copies.html
* igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs:
- shard-dg2-set2: NOTRUN -> [SKIP][74] ([Intel XE#4130])
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-435/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs.html
* igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random:
- shard-adlp: [PASS][75] -> [ABORT][76] ([Intel XE#5466]) +1 other test abort
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-adlp-9/igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random.html
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-adlp-9/igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random.html
#### Possible fixes ####
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
- shard-adlp: [DMESG-FAIL][77] ([Intel XE#4543]) -> [PASS][78]
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-adlp-2/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-adlp-6/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
* igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p:
- shard-bmg: [SKIP][79] ([Intel XE#2314] / [Intel XE#2894]) -> [PASS][80]
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p.html
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-7/igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs:
- shard-dg2-set2: [INCOMPLETE][81] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4345] / [Intel XE#6168]) -> [PASS][82] +1 other test pass
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-6:
- shard-dg2-set2: [INCOMPLETE][83] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#6168]) -> [PASS][84]
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-6.html
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4:
- shard-dg2-set2: [INCOMPLETE][85] ([Intel XE#6168]) -> [PASS][86]
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4.html
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6:
- shard-dg2-set2: [DMESG-WARN][87] ([Intel XE#1727] / [Intel XE#3113]) -> [PASS][88]
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6.html
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6.html
* igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-1:
- shard-adlp: [DMESG-WARN][89] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][90] +2 other tests pass
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-adlp-1/igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-1.html
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-adlp-8/igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-1.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
- shard-bmg: [SKIP][91] ([Intel XE#2291]) -> [PASS][92]
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-7/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@flip-vs-cursor-legacy:
- shard-bmg: [FAIL][93] ([Intel XE#5299]) -> [PASS][94]
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
* igt@kms_cursor_legacy@flip-vs-cursor-toggle:
- shard-bmg: [DMESG-WARN][95] ([Intel XE#5354]) -> [PASS][96]
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-6/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-7/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html
* igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible:
- shard-bmg: [SKIP][97] ([Intel XE#2316]) -> [PASS][98] +3 other tests pass
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-2/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank@b-edp1:
- shard-lnl: [FAIL][99] ([Intel XE#301]) -> [PASS][100]
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-lnl: [FAIL][101] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][102]
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_hdr@static-toggle-suspend:
- shard-bmg: [SKIP][103] ([Intel XE#1503]) -> [PASS][104] +1 other test pass
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-6/igt@kms_hdr@static-toggle-suspend.html
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-8/igt@kms_hdr@static-toggle-suspend.html
* igt@kms_setmode@invalid-clone-single-crtc:
- shard-bmg: [SKIP][105] ([Intel XE#1435]) -> [PASS][106]
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-6/igt@kms_setmode@invalid-clone-single-crtc.html
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-2/igt@kms_setmode@invalid-clone-single-crtc.html
* igt@xe_exec_compute_mode@twice-basic:
- shard-bmg: [SKIP][107] ([Intel XE#6557]) -> [PASS][108] +47 other tests pass
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-3/igt@xe_exec_compute_mode@twice-basic.html
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-4/igt@xe_exec_compute_mode@twice-basic.html
* igt@xe_exec_system_allocator@many-execqueues-mmap-new-race-nomemset:
- shard-bmg: [DMESG-FAIL][109] ([Intel XE#5545]) -> [PASS][110]
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-3/igt@xe_exec_system_allocator@many-execqueues-mmap-new-race-nomemset.html
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-4/igt@xe_exec_system_allocator@many-execqueues-mmap-new-race-nomemset.html
* igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma:
- shard-lnl: [FAIL][111] ([Intel XE#5625]) -> [PASS][112] +1 other test pass
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-lnl-7/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma.html
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-lnl-3/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma.html
* igt@xe_exec_system_allocator@process-many-large-execqueues-malloc-mlock-nomemset:
- shard-bmg: [FAIL][113] ([Intel XE#5625]) -> [PASS][114]
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-3/igt@xe_exec_system_allocator@process-many-large-execqueues-malloc-mlock-nomemset.html
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-4/igt@xe_exec_system_allocator@process-many-large-execqueues-malloc-mlock-nomemset.html
* igt@xe_exec_threads@threads-bal-shared-vm-rebind:
- shard-dg2-set2: [INCOMPLETE][115] ([Intel XE#4842]) -> [PASS][116]
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-dg2-433/igt@xe_exec_threads@threads-bal-shared-vm-rebind.html
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-436/igt@xe_exec_threads@threads-bal-shared-vm-rebind.html
* igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv:
- shard-dg2-set2: [DMESG-WARN][117] ([Intel XE#5893]) -> [PASS][118]
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-dg2-433/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-436/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html
* igt@xe_module_load@load:
- shard-bmg: ([PASS][119], [PASS][120], [PASS][121], [PASS][122], [PASS][123], [PASS][124], [PASS][125], [PASS][126], [PASS][127], [PASS][128], [PASS][129], [PASS][130], [PASS][131], [PASS][132], [PASS][133], [PASS][134], [PASS][135], [SKIP][136], [PASS][137], [PASS][138], [PASS][139], [PASS][140], [PASS][141], [PASS][142], [PASS][143]) ([Intel XE#2457]) -> ([PASS][144], [PASS][145], [PASS][146], [PASS][147], [PASS][148], [PASS][149], [PASS][150], [PASS][151], [PASS][152], [PASS][153], [PASS][154], [PASS][155], [PASS][156], [PASS][157], [PASS][158], [PASS][159], [PASS][160], [PASS][161], [PASS][162], [PASS][163])
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-7/igt@xe_module_load@load.html
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-1/igt@xe_module_load@load.html
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-3/igt@xe_module_load@load.html
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-7/igt@xe_module_load@load.html
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-4/igt@xe_module_load@load.html
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-4/igt@xe_module_load@load.html
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-4/igt@xe_module_load@load.html
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-2/igt@xe_module_load@load.html
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-1/igt@xe_module_load@load.html
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-2/igt@xe_module_load@load.html
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-2/igt@xe_module_load@load.html
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-7/igt@xe_module_load@load.html
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-8/igt@xe_module_load@load.html
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-8/igt@xe_module_load@load.html
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-8/igt@xe_module_load@load.html
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-5/igt@xe_module_load@load.html
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-5/igt@xe_module_load@load.html
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-2/igt@xe_module_load@load.html
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-8/igt@xe_module_load@load.html
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-6/igt@xe_module_load@load.html
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-6/igt@xe_module_load@load.html
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-6/igt@xe_module_load@load.html
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-1/igt@xe_module_load@load.html
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-2/igt@xe_module_load@load.html
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-1/igt@xe_module_load@load.html
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-5/igt@xe_module_load@load.html
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-2/igt@xe_module_load@load.html
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-2/igt@xe_module_load@load.html
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-4/igt@xe_module_load@load.html
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-6/igt@xe_module_load@load.html
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-7/igt@xe_module_load@load.html
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-4/igt@xe_module_load@load.html
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-4/igt@xe_module_load@load.html
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-7/igt@xe_module_load@load.html
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-1/igt@xe_module_load@load.html
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-6/igt@xe_module_load@load.html
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-1/igt@xe_module_load@load.html
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-1/igt@xe_module_load@load.html
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-8/igt@xe_module_load@load.html
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-2/igt@xe_module_load@load.html
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-8/igt@xe_module_load@load.html
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-5/igt@xe_module_load@load.html
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-5/igt@xe_module_load@load.html
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-7/igt@xe_module_load@load.html
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-8/igt@xe_module_load@load.html
* igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_copy0:
- shard-lnl: [FAIL][164] ([Intel XE#6251]) -> [PASS][165] +1 other test pass
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-lnl-1/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_copy0.html
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-lnl-5/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_copy0.html
#### Warnings ####
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs:
- shard-bmg: [SKIP][166] ([Intel XE#6557]) -> [SKIP][167] ([Intel XE#2887])
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-3/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs.html
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-4/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs.html
* igt@kms_content_protection@srm:
- shard-bmg: [SKIP][168] ([Intel XE#2341]) -> [FAIL][169] ([Intel XE#1178]) +1 other test fail
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-6/igt@kms_content_protection@srm.html
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-2/igt@kms_content_protection@srm.html
* igt@kms_cursor_crc@cursor-rapid-movement-256x85:
- shard-bmg: [SKIP][170] ([Intel XE#6557]) -> [SKIP][171] ([Intel XE#2320])
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-3/igt@kms_cursor_crc@cursor-rapid-movement-256x85.html
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-4/igt@kms_cursor_crc@cursor-rapid-movement-256x85.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-lnl: [FAIL][172] ([Intel XE#301] / [Intel XE#3149]) -> [FAIL][173] ([Intel XE#301])
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank.html
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling:
- shard-bmg: [SKIP][174] ([Intel XE#6557]) -> [SKIP][175] ([Intel XE#2293] / [Intel XE#2380])
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-3/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling.html
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-4/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][176] ([Intel XE#2312]) -> [SKIP][177] ([Intel XE#2311]) +10 other tests skip
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][178] ([Intel XE#5390]) -> [SKIP][179] ([Intel XE#2312]) +3 other tests skip
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-wc.html
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt:
- shard-bmg: [SKIP][180] ([Intel XE#6557]) -> [SKIP][181] ([Intel XE#5390])
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt:
- shard-bmg: [SKIP][182] ([Intel XE#2312]) -> [SKIP][183] ([Intel XE#5390]) +5 other tests skip
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][184] ([Intel XE#2311]) -> [SKIP][185] ([Intel XE#2312]) +7 other tests skip
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-suspend:
- shard-bmg: [SKIP][186] ([Intel XE#6557]) -> [SKIP][187] ([Intel XE#2311]) +2 other tests skip
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrs-suspend.html
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcdrrs-suspend.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][188] ([Intel XE#6557]) -> [SKIP][189] ([Intel XE#2313])
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-msflip-blt:
- shard-bmg: [SKIP][190] ([Intel XE#2313]) -> [SKIP][191] ([Intel XE#2312]) +9 other tests skip
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-msflip-blt.html
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen:
- shard-bmg: [SKIP][192] ([Intel XE#2312]) -> [SKIP][193] ([Intel XE#2313]) +10 other tests skip
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen.html
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][194] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][195] ([Intel XE#3544])
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-7/igt@kms_hdr@brightness-with-hdr.html
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-5/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_plane_multiple@2x-tiling-y:
- shard-bmg: [SKIP][196] ([Intel XE#4596]) -> [SKIP][197] ([Intel XE#5021])
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-y.html
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-8/igt@kms_plane_multiple@2x-tiling-y.html
* igt@kms_psr@psr2-no-drrs:
- shard-bmg: [SKIP][198] ([Intel XE#1406]) -> [SKIP][199] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +3 other tests skip
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-3/igt@kms_psr@psr2-no-drrs.html
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-4/igt@kms_psr@psr2-no-drrs.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [FAIL][200] ([Intel XE#1729]) -> [SKIP][201] ([Intel XE#2426])
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern.html
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-6/igt@kms_tiled_display@basic-test-pattern.html
- shard-dg2-set2: [SKIP][202] ([Intel XE#362]) -> [FAIL][203] ([Intel XE#1729])
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern.html
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-dg2-435/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tv_load_detect@load-detect:
- shard-bmg: [SKIP][204] ([Intel XE#6557]) -> [SKIP][205] ([Intel XE#2450])
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-3/igt@kms_tv_load_detect@load-detect.html
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-4/igt@kms_tv_load_detect@load-detect.html
* igt@xe_eudebug@basic-vm-bind-ufence-reconnect:
- shard-bmg: [SKIP][206] ([Intel XE#6557]) -> [SKIP][207] ([Intel XE#4837])
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2/shard-bmg-3/igt@xe_eudebug@basic-vm-bind-ufence-reconnect.html
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/shard-bmg-4/igt@xe_eudebug@basic-vm-bind-ufence-reconnect.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
[Intel XE#1135]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1135
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1475]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1475
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1500]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1500
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2142]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2142
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2450]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2450
[Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2669]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2669
[Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
[Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4504
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4650
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4814
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4842]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4842
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
[Intel XE#5299]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5299
[Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
[Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
[Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466
[Intel XE#5503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5503
[Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
[Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
[Intel XE#5626]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5626
[Intel XE#5893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5893
[Intel XE#6032]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6032
[Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
[Intel XE#6168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6168
[Intel XE#6251]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6251
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#6557]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6557
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
Build changes
-------------
* Linux: xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2 -> xe-pw-157350v3
IGT_8621: 8621
xe-4090-0961bffa4c3b59fb4c844f2e5687d876a78938c2: 0961bffa4c3b59fb4c844f2e5687d876a78938c2
xe-pw-157350v3: 157350v3
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157350v3/index.html
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