[PATCH 00/10] drm/i915: call irq and rps through the parent interface

[PATCH 00/10] drm/i915: call irq and rps through the parent interface

[Jani Nikula]

Join series [1] and [2] together, converging on having the
intel_parent.[ch] wrappers. Also added a couple more patches for
individual functions in the interface.

[1] https://lore.kernel.org/r/cover.1762846363.git.jani.nikula@intel.com
[2] https://lore.kernel.org/r/cover.1762440096.git.jani.nikula@intel.com

Jani Nikula (10):
  drm/{i915,xe}/display: duplicate gen2 irq/error init/reset in display
    irq
  drm/i915/display: convert the display irq interfaces to struct
    intel_display
  drm/{i915,xe}/display: move irq calls to parent interface
  drm/i915: add .vgpu_active to parent interface
  drm/i915: add .fence_support_legacy to parent interface
  drm/i915/rps: store struct dma_fence in struct wait_rps_boost
  drm/i915/rps: call RPS functions via the parent interface
  drm/i915/rps: postpone i915 fence check to boost
  drm/i915: add .fence_priority_display to parent interface
  drm/xe/rps: build RPS as part of xe

 drivers/gpu/drm/i915/Makefile                 |   1 +
 drivers/gpu/drm/i915/display/intel_crtc.c     |   6 +-
 .../gpu/drm/i915/display/intel_display_irq.c  | 191 +++++++++---------
 .../drm/i915/display/intel_display_power.c    |   5 +-
 .../i915/display/intel_display_power_well.c   |  15 +-
 .../gpu/drm/i915/display/intel_display_rps.c  |  34 ++--
 .../gpu/drm/i915/display/intel_display_rps.h  |  21 --
 drivers/gpu/drm/i915/display/intel_fbc.c      |  13 +-
 drivers/gpu/drm/i915/display/intel_gmbus.c    |   6 +-
 drivers/gpu/drm/i915/display/intel_hotplug.c  |   6 +-
 .../gpu/drm/i915/display/intel_lpe_audio.c    |   1 -
 drivers/gpu/drm/i915/display/intel_parent.c   |  72 +++++++
 drivers/gpu/drm/i915/display/intel_parent.h   |  26 +++
 drivers/gpu/drm/i915/display/intel_pipe_crc.c |   6 +-
 drivers/gpu/drm/i915/display/intel_plane.c    |   5 +-
 drivers/gpu/drm/i915/gt/intel_rps.c           |  39 ++++
 drivers/gpu/drm/i915/gt/intel_rps.h           |   2 +
 drivers/gpu/drm/i915/i915_driver.c            |  22 ++
 drivers/gpu/drm/i915/i915_irq.c               |  16 ++
 drivers/gpu/drm/i915/i915_irq.h               |   2 +
 drivers/gpu/drm/xe/Makefile                   |   6 +-
 .../compat-i915-headers/gem/i915_gem_object.h |  13 --
 .../compat-i915-headers/gt/intel_gt_types.h   |  11 -
 .../gpu/drm/xe/compat-i915-headers/i915_irq.h |   6 -
 .../drm/xe/compat-i915-headers/i915_vgpu.h    |  18 --
 drivers/gpu/drm/xe/display/ext/i915_irq.c     |  85 --------
 drivers/gpu/drm/xe/display/xe_display.c       |  18 ++
 include/drm/intel/display_parent_interface.h  |  27 +++
 28 files changed, 360 insertions(+), 313 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/display/intel_parent.c
 create mode 100644 drivers/gpu/drm/i915/display/intel_parent.h
 delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h
 delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/gt/intel_gt_types.h
 delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
 delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/i915_vgpu.h
 delete mode 100644 drivers/gpu/drm/xe/display/ext/i915_irq.c

-- 
2.47.3

[PATCH 01/10] drm/{i915, xe}/display: duplicate gen2 irq/error init/reset in display irq

[Jani Nikula]

Duplicate gen2_irq_reset(), gen2_assert_iir_is_zero(), gen2_irq_init(),
gen2_error_reset(), and gen2_error_init() in intel_display_irq.c.

This allows us to drop the duplicates from xe, and prepares for future
cleanups. Although duplication is undesirable in general, in this case
the local duplicates lead to a cleaner end result.

There's a slight wrinkle in gen2_assert_iir_is_zero(). We need to use
non-device based logging until we pass in struct intel_display in a
separate change.

v2:
- Keep xe compat stuff due to series reorder and rebase
- Keep the WARN as regular WARN
- Rename the functions in the same go

Suggested-by: Ville Syrjala <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

---

Note: 'git show --color-moved' helps review
---
 .../gpu/drm/i915/display/intel_display_irq.c  | 82 +++++++++++++++++--
 drivers/gpu/drm/xe/display/ext/i915_irq.c     | 67 ---------------
 2 files changed, 73 insertions(+), 76 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 43b27deb4a26..acfaff13c3ba 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -33,6 +33,72 @@
 #include "intel_psr_regs.h"
 #include "intel_uncore.h"
 
+static void irq_reset(struct intel_uncore *uncore, struct i915_irq_regs regs)
+{
+	intel_uncore_write(uncore, regs.imr, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.imr);
+
+	intel_uncore_write(uncore, regs.ier, 0);
+
+	/* IIR can theoretically queue up two events. Be paranoid. */
+	intel_uncore_write(uncore, regs.iir, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.iir);
+	intel_uncore_write(uncore, regs.iir, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.iir);
+}
+
+/*
+ * We should clear IMR at preinstall/uninstall, and just check at postinstall.
+ */
+static void assert_iir_is_zero(struct intel_uncore *uncore, i915_reg_t reg)
+{
+	u32 val = intel_uncore_read(uncore, reg);
+
+	if (val == 0)
+		return;
+
+	WARN(1,
+		 "Interrupt register 0x%x is not zero: 0x%08x\n",
+		 i915_mmio_reg_offset(reg), val);
+	intel_uncore_write(uncore, reg, 0xffffffff);
+	intel_uncore_posting_read(uncore, reg);
+	intel_uncore_write(uncore, reg, 0xffffffff);
+	intel_uncore_posting_read(uncore, reg);
+}
+
+static void irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
+		     u32 imr_val, u32 ier_val)
+{
+	assert_iir_is_zero(uncore, regs.iir);
+
+	intel_uncore_write(uncore, regs.ier, ier_val);
+	intel_uncore_write(uncore, regs.imr, imr_val);
+	intel_uncore_posting_read(uncore, regs.imr);
+}
+
+static void error_reset(struct intel_uncore *uncore, struct i915_error_regs regs)
+{
+	intel_uncore_write(uncore, regs.emr, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.emr);
+
+	intel_uncore_write(uncore, regs.eir, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.eir);
+	intel_uncore_write(uncore, regs.eir, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.eir);
+}
+
+static void error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
+		       u32 emr_val)
+{
+	intel_uncore_write(uncore, regs.eir, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.eir);
+	intel_uncore_write(uncore, regs.eir, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.eir);
+
+	intel_uncore_write(uncore, regs.emr, emr_val);
+	intel_uncore_posting_read(uncore, regs.emr);
+}
+
 static void
 intel_display_irq_regs_init(struct intel_display *display, struct i915_irq_regs regs,
 			    u32 imr_val, u32 ier_val)
@@ -41,7 +107,7 @@ intel_display_irq_regs_init(struct intel_display *display, struct i915_irq_regs
 	intel_dmc_wl_get(display, regs.ier);
 	intel_dmc_wl_get(display, regs.iir);
 
-	gen2_irq_init(to_intel_uncore(display->drm), regs, imr_val, ier_val);
+	irq_init(to_intel_uncore(display->drm), regs, imr_val, ier_val);
 
 	intel_dmc_wl_put(display, regs.iir);
 	intel_dmc_wl_put(display, regs.ier);
@@ -55,7 +121,7 @@ intel_display_irq_regs_reset(struct intel_display *display, struct i915_irq_regs
 	intel_dmc_wl_get(display, regs.ier);
 	intel_dmc_wl_get(display, regs.iir);
 
-	gen2_irq_reset(to_intel_uncore(display->drm), regs);
+	irq_reset(to_intel_uncore(display->drm), regs);
 
 	intel_dmc_wl_put(display, regs.iir);
 	intel_dmc_wl_put(display, regs.ier);
@@ -67,7 +133,7 @@ intel_display_irq_regs_assert_irr_is_zero(struct intel_display *display, i915_re
 {
 	intel_dmc_wl_get(display, reg);
 
-	gen2_assert_iir_is_zero(to_intel_uncore(display->drm), reg);
+	assert_iir_is_zero(to_intel_uncore(display->drm), reg);
 
 	intel_dmc_wl_put(display, reg);
 }
@@ -1918,8 +1984,7 @@ static void _vlv_display_irq_reset(struct intel_display *display)
 	else
 		intel_de_write(display, DPINVGTT, DPINVGTT_STATUS_MASK_VLV);
 
-	gen2_error_reset(to_intel_uncore(display->drm),
-			 VLV_ERROR_REGS);
+	error_reset(to_intel_uncore(display->drm), VLV_ERROR_REGS);
 
 	i915_hotplug_interrupt_update_locked(display, 0xffffffff, 0);
 	intel_de_rmw(display, PORT_HOTPLUG_STAT(display), 0, 0);
@@ -2014,8 +2079,7 @@ static void _vlv_display_irq_postinstall(struct intel_display *display)
 			       DPINVGTT_STATUS_MASK_VLV |
 			       DPINVGTT_EN_MASK_VLV);
 
-	gen2_error_init(to_intel_uncore(display->drm),
-			VLV_ERROR_REGS, ~vlv_error_mask());
+	error_init(to_intel_uncore(display->drm), VLV_ERROR_REGS, ~vlv_error_mask());
 
 	pipestat_mask = PIPE_CRC_DONE_INTERRUPT_STATUS;
 
@@ -2054,7 +2118,7 @@ static void ibx_display_irq_reset(struct intel_display *display)
 	if (HAS_PCH_NOP(display))
 		return;
 
-	gen2_irq_reset(to_intel_uncore(display->drm), SDE_IRQ_REGS);
+	irq_reset(to_intel_uncore(display->drm), SDE_IRQ_REGS);
 
 	if (HAS_PCH_CPT(display) || HAS_PCH_LPT(display))
 		intel_de_write(display, SERR_INT, 0xffffffff);
@@ -2064,7 +2128,7 @@ void ilk_display_irq_reset(struct intel_display *display)
 {
 	struct intel_uncore *uncore = to_intel_uncore(display->drm);
 
-	gen2_irq_reset(uncore, DE_IRQ_REGS);
+	irq_reset(uncore, DE_IRQ_REGS);
 	display->irq.ilk_de_imr_mask = ~0u;
 
 	if (DISPLAY_VER(display) == 7)
diff --git a/drivers/gpu/drm/xe/display/ext/i915_irq.c b/drivers/gpu/drm/xe/display/ext/i915_irq.c
index 3c6bca66ddab..1011c1c754d0 100644
--- a/drivers/gpu/drm/xe/display/ext/i915_irq.c
+++ b/drivers/gpu/drm/xe/display/ext/i915_irq.c
@@ -7,73 +7,6 @@
 #include "i915_reg.h"
 #include "intel_uncore.h"
 
-void gen2_irq_reset(struct intel_uncore *uncore, struct i915_irq_regs regs)
-{
-	intel_uncore_write(uncore, regs.imr, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.imr);
-
-	intel_uncore_write(uncore, regs.ier, 0);
-
-	/* IIR can theoretically queue up two events. Be paranoid. */
-	intel_uncore_write(uncore, regs.iir, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.iir);
-	intel_uncore_write(uncore, regs.iir, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.iir);
-}
-
-/*
- * We should clear IMR at preinstall/uninstall, and just check at postinstall.
- */
-void gen2_assert_iir_is_zero(struct intel_uncore *uncore, i915_reg_t reg)
-{
-	struct xe_device *xe = container_of(uncore, struct xe_device, uncore);
-	u32 val = intel_uncore_read(uncore, reg);
-
-	if (val == 0)
-		return;
-
-	drm_WARN(&xe->drm, 1,
-		 "Interrupt register 0x%x is not zero: 0x%08x\n",
-		 i915_mmio_reg_offset(reg), val);
-	intel_uncore_write(uncore, reg, 0xffffffff);
-	intel_uncore_posting_read(uncore, reg);
-	intel_uncore_write(uncore, reg, 0xffffffff);
-	intel_uncore_posting_read(uncore, reg);
-}
-
-void gen2_irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
-		   u32 imr_val, u32 ier_val)
-{
-	gen2_assert_iir_is_zero(uncore, regs.iir);
-
-	intel_uncore_write(uncore, regs.ier, ier_val);
-	intel_uncore_write(uncore, regs.imr, imr_val);
-	intel_uncore_posting_read(uncore, regs.imr);
-}
-
-void gen2_error_reset(struct intel_uncore *uncore, struct i915_error_regs regs)
-{
-	intel_uncore_write(uncore, regs.emr, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.emr);
-
-	intel_uncore_write(uncore, regs.eir, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.eir);
-	intel_uncore_write(uncore, regs.eir, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.eir);
-}
-
-void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
-		     u32 emr_val)
-{
-	intel_uncore_write(uncore, regs.eir, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.eir);
-	intel_uncore_write(uncore, regs.eir, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.eir);
-
-	intel_uncore_write(uncore, regs.emr, emr_val);
-	intel_uncore_posting_read(uncore, regs.emr);
-}
-
 bool intel_irqs_enabled(struct xe_device *xe)
 {
 	return atomic_read(&xe->irq.enabled);
-- 
2.47.3

[PATCH 02/10] drm/i915/display: convert the display irq interfaces to struct intel_display

[Jani Nikula]

Convert the irq/error init/reset interfaces from struct intel_uncore to
struct intel_display, and drop the dependency on intel_uncore.h.

Since the intel_de_*() calls handle the DMC wakelock internally, we can
drop the wrappers handling wakelocks completely.

v2: Drop the wakelock wrappers (Ville)

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../gpu/drm/i915/display/intel_display_irq.c  | 184 +++++++-----------
 1 file changed, 68 insertions(+), 116 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index acfaff13c3ba..2a92ca6c2f82 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -19,7 +19,6 @@
 #include "intel_display_trace.h"
 #include "intel_display_types.h"
 #include "intel_dmc.h"
-#include "intel_dmc_wl.h"
 #include "intel_dp_aux.h"
 #include "intel_dsb.h"
 #include "intel_fdi_regs.h"
@@ -31,111 +30,71 @@
 #include "intel_pmdemand.h"
 #include "intel_psr.h"
 #include "intel_psr_regs.h"
-#include "intel_uncore.h"
 
-static void irq_reset(struct intel_uncore *uncore, struct i915_irq_regs regs)
+static void irq_reset(struct intel_display *display, struct i915_irq_regs regs)
 {
-	intel_uncore_write(uncore, regs.imr, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.imr);
+	intel_de_write(display, regs.imr, 0xffffffff);
+	intel_de_posting_read(display, regs.imr);
 
-	intel_uncore_write(uncore, regs.ier, 0);
+	intel_de_write(display, regs.ier, 0);
 
 	/* IIR can theoretically queue up two events. Be paranoid. */
-	intel_uncore_write(uncore, regs.iir, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.iir);
-	intel_uncore_write(uncore, regs.iir, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.iir);
+	intel_de_write(display, regs.iir, 0xffffffff);
+	intel_de_posting_read(display, regs.iir);
+	intel_de_write(display, regs.iir, 0xffffffff);
+	intel_de_posting_read(display, regs.iir);
 }
 
 /*
  * We should clear IMR at preinstall/uninstall, and just check at postinstall.
  */
-static void assert_iir_is_zero(struct intel_uncore *uncore, i915_reg_t reg)
+static void assert_iir_is_zero(struct intel_display *display, i915_reg_t reg)
 {
-	u32 val = intel_uncore_read(uncore, reg);
+	u32 val = intel_de_read(display, reg);
 
 	if (val == 0)
 		return;
 
-	WARN(1,
+	drm_WARN(display->drm, 1,
 		 "Interrupt register 0x%x is not zero: 0x%08x\n",
 		 i915_mmio_reg_offset(reg), val);
-	intel_uncore_write(uncore, reg, 0xffffffff);
-	intel_uncore_posting_read(uncore, reg);
-	intel_uncore_write(uncore, reg, 0xffffffff);
-	intel_uncore_posting_read(uncore, reg);
+	intel_de_write(display, reg, 0xffffffff);
+	intel_de_posting_read(display, reg);
+	intel_de_write(display, reg, 0xffffffff);
+	intel_de_posting_read(display, reg);
 }
 
-static void irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
+static void irq_init(struct intel_display *display, struct i915_irq_regs regs,
 		     u32 imr_val, u32 ier_val)
 {
-	assert_iir_is_zero(uncore, regs.iir);
+	assert_iir_is_zero(display, regs.iir);
 
-	intel_uncore_write(uncore, regs.ier, ier_val);
-	intel_uncore_write(uncore, regs.imr, imr_val);
-	intel_uncore_posting_read(uncore, regs.imr);
+	intel_de_write(display, regs.ier, ier_val);
+	intel_de_write(display, regs.imr, imr_val);
+	intel_de_posting_read(display, regs.imr);
 }
 
-static void error_reset(struct intel_uncore *uncore, struct i915_error_regs regs)
+static void error_reset(struct intel_display *display, struct i915_error_regs regs)
 {
-	intel_uncore_write(uncore, regs.emr, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.emr);
+	intel_de_write(display, regs.emr, 0xffffffff);
+	intel_de_posting_read(display, regs.emr);
 
-	intel_uncore_write(uncore, regs.eir, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.eir);
-	intel_uncore_write(uncore, regs.eir, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.eir);
+	intel_de_write(display, regs.eir, 0xffffffff);
+	intel_de_posting_read(display, regs.eir);
+	intel_de_write(display, regs.eir, 0xffffffff);
+	intel_de_posting_read(display, regs.eir);
 }
 
-static void error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
+static void error_init(struct intel_display *display, struct i915_error_regs regs,
 		       u32 emr_val)
 {
-	intel_uncore_write(uncore, regs.eir, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.eir);
-	intel_uncore_write(uncore, regs.eir, 0xffffffff);
-	intel_uncore_posting_read(uncore, regs.eir);
+	intel_de_write(display, regs.eir, 0xffffffff);
+	intel_de_posting_read(display, regs.eir);
+	intel_de_write(display, regs.eir, 0xffffffff);
+	intel_de_posting_read(display, regs.eir);
 
-	intel_uncore_write(uncore, regs.emr, emr_val);
-	intel_uncore_posting_read(uncore, regs.emr);
-}
-
-static void
-intel_display_irq_regs_init(struct intel_display *display, struct i915_irq_regs regs,
-			    u32 imr_val, u32 ier_val)
-{
-	intel_dmc_wl_get(display, regs.imr);
-	intel_dmc_wl_get(display, regs.ier);
-	intel_dmc_wl_get(display, regs.iir);
-
-	irq_init(to_intel_uncore(display->drm), regs, imr_val, ier_val);
-
-	intel_dmc_wl_put(display, regs.iir);
-	intel_dmc_wl_put(display, regs.ier);
-	intel_dmc_wl_put(display, regs.imr);
-}
-
-static void
-intel_display_irq_regs_reset(struct intel_display *display, struct i915_irq_regs regs)
-{
-	intel_dmc_wl_get(display, regs.imr);
-	intel_dmc_wl_get(display, regs.ier);
-	intel_dmc_wl_get(display, regs.iir);
-
-	irq_reset(to_intel_uncore(display->drm), regs);
-
-	intel_dmc_wl_put(display, regs.iir);
-	intel_dmc_wl_put(display, regs.ier);
-	intel_dmc_wl_put(display, regs.imr);
-}
-
-static void
-intel_display_irq_regs_assert_irr_is_zero(struct intel_display *display, i915_reg_t reg)
-{
-	intel_dmc_wl_get(display, reg);
-
-	assert_iir_is_zero(to_intel_uncore(display->drm), reg);
-
-	intel_dmc_wl_put(display, reg);
+	intel_de_write(display, regs.emr, emr_val);
+	intel_de_posting_read(display, regs.emr);
 }
 
 struct pipe_fault_handler {
@@ -1984,14 +1943,14 @@ static void _vlv_display_irq_reset(struct intel_display *display)
 	else
 		intel_de_write(display, DPINVGTT, DPINVGTT_STATUS_MASK_VLV);
 
-	error_reset(to_intel_uncore(display->drm), VLV_ERROR_REGS);
+	error_reset(display, VLV_ERROR_REGS);
 
 	i915_hotplug_interrupt_update_locked(display, 0xffffffff, 0);
 	intel_de_rmw(display, PORT_HOTPLUG_STAT(display), 0, 0);
 
 	i9xx_pipestat_irq_reset(display);
 
-	intel_display_irq_regs_reset(display, VLV_IRQ_REGS);
+	irq_reset(display, VLV_IRQ_REGS);
 	display->irq.vlv_imr_mask = ~0u;
 }
 
@@ -2079,7 +2038,7 @@ static void _vlv_display_irq_postinstall(struct intel_display *display)
 			       DPINVGTT_STATUS_MASK_VLV |
 			       DPINVGTT_EN_MASK_VLV);
 
-	error_init(to_intel_uncore(display->drm), VLV_ERROR_REGS, ~vlv_error_mask());
+	error_init(display, VLV_ERROR_REGS, ~vlv_error_mask());
 
 	pipestat_mask = PIPE_CRC_DONE_INTERRUPT_STATUS;
 
@@ -2102,7 +2061,7 @@ static void _vlv_display_irq_postinstall(struct intel_display *display)
 
 	display->irq.vlv_imr_mask = ~enable_mask;
 
-	intel_display_irq_regs_init(display, VLV_IRQ_REGS, display->irq.vlv_imr_mask, enable_mask);
+	irq_init(display, VLV_IRQ_REGS, display->irq.vlv_imr_mask, enable_mask);
 }
 
 void vlv_display_irq_postinstall(struct intel_display *display)
@@ -2118,7 +2077,7 @@ static void ibx_display_irq_reset(struct intel_display *display)
 	if (HAS_PCH_NOP(display))
 		return;
 
-	irq_reset(to_intel_uncore(display->drm), SDE_IRQ_REGS);
+	irq_reset(display, SDE_IRQ_REGS);
 
 	if (HAS_PCH_CPT(display) || HAS_PCH_LPT(display))
 		intel_de_write(display, SERR_INT, 0xffffffff);
@@ -2126,9 +2085,7 @@ static void ibx_display_irq_reset(struct intel_display *display)
 
 void ilk_display_irq_reset(struct intel_display *display)
 {
-	struct intel_uncore *uncore = to_intel_uncore(display->drm);
-
-	irq_reset(uncore, DE_IRQ_REGS);
+	irq_reset(display, DE_IRQ_REGS);
 	display->irq.ilk_de_imr_mask = ~0u;
 
 	if (DISPLAY_VER(display) == 7)
@@ -2155,10 +2112,10 @@ void gen8_display_irq_reset(struct intel_display *display)
 	for_each_pipe(display, pipe)
 		if (intel_display_power_is_enabled(display,
 						   POWER_DOMAIN_PIPE(pipe)))
-			intel_display_irq_regs_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
+			irq_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
 
-	intel_display_irq_regs_reset(display, GEN8_DE_PORT_IRQ_REGS);
-	intel_display_irq_regs_reset(display, GEN8_DE_MISC_IRQ_REGS);
+	irq_reset(display, GEN8_DE_PORT_IRQ_REGS);
+	irq_reset(display, GEN8_DE_MISC_IRQ_REGS);
 
 	if (HAS_PCH_SPLIT(display))
 		ibx_display_irq_reset(display);
@@ -2200,18 +2157,18 @@ void gen11_display_irq_reset(struct intel_display *display)
 	for_each_pipe(display, pipe)
 		if (intel_display_power_is_enabled(display,
 						   POWER_DOMAIN_PIPE(pipe)))
-			intel_display_irq_regs_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
+			irq_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
 
-	intel_display_irq_regs_reset(display, GEN8_DE_PORT_IRQ_REGS);
-	intel_display_irq_regs_reset(display, GEN8_DE_MISC_IRQ_REGS);
+	irq_reset(display, GEN8_DE_PORT_IRQ_REGS);
+	irq_reset(display, GEN8_DE_MISC_IRQ_REGS);
 
 	if (DISPLAY_VER(display) >= 14)
-		intel_display_irq_regs_reset(display, PICAINTERRUPT_IRQ_REGS);
+		irq_reset(display, PICAINTERRUPT_IRQ_REGS);
 	else
-		intel_display_irq_regs_reset(display, GEN11_DE_HPD_IRQ_REGS);
+		irq_reset(display, GEN11_DE_HPD_IRQ_REGS);
 
 	if (INTEL_PCH_TYPE(display) >= PCH_ICP)
-		intel_display_irq_regs_reset(display, SDE_IRQ_REGS);
+		irq_reset(display, SDE_IRQ_REGS);
 }
 
 void gen8_irq_power_well_post_enable(struct intel_display *display,
@@ -2230,9 +2187,9 @@ void gen8_irq_power_well_post_enable(struct intel_display *display,
 	}
 
 	for_each_pipe_masked(display, pipe, pipe_mask)
-		intel_display_irq_regs_init(display, GEN8_DE_PIPE_IRQ_REGS(pipe),
-					    display->irq.de_pipe_imr_mask[pipe],
-					    ~display->irq.de_pipe_imr_mask[pipe] | extra_ier);
+		irq_init(display, GEN8_DE_PIPE_IRQ_REGS(pipe),
+			 display->irq.de_pipe_imr_mask[pipe],
+			 ~display->irq.de_pipe_imr_mask[pipe] | extra_ier);
 
 	spin_unlock_irq(&display->irq.lock);
 }
@@ -2251,7 +2208,7 @@ void gen8_irq_power_well_pre_disable(struct intel_display *display,
 	}
 
 	for_each_pipe_masked(display, pipe, pipe_mask)
-		intel_display_irq_regs_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
+		irq_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
 
 	spin_unlock_irq(&display->irq.lock);
 
@@ -2284,7 +2241,7 @@ static void ibx_irq_postinstall(struct intel_display *display)
 	else
 		mask = SDE_GMBUS_CPT;
 
-	intel_display_irq_regs_init(display, SDE_IRQ_REGS, ~mask, 0xffffffff);
+	irq_init(display, SDE_IRQ_REGS, ~mask, 0xffffffff);
 }
 
 void valleyview_enable_display_irqs(struct intel_display *display)
@@ -2350,7 +2307,7 @@ void ilk_de_irq_postinstall(struct intel_display *display)
 	}
 
 	if (display->platform.haswell) {
-		intel_display_irq_regs_assert_irr_is_zero(display, EDP_PSR_IIR);
+		assert_iir_is_zero(display, EDP_PSR_IIR);
 		display_mask |= DE_EDP_PSR_INT_HSW;
 	}
 
@@ -2361,8 +2318,8 @@ void ilk_de_irq_postinstall(struct intel_display *display)
 
 	ibx_irq_postinstall(display);
 
-	intel_display_irq_regs_init(display, DE_IRQ_REGS, display->irq.ilk_de_imr_mask,
-				    display_mask | extra_mask);
+	irq_init(display, DE_IRQ_REGS, display->irq.ilk_de_imr_mask,
+		 display_mask | extra_mask);
 }
 
 static void mtp_irq_postinstall(struct intel_display *display);
@@ -2438,11 +2395,10 @@ void gen8_de_irq_postinstall(struct intel_display *display)
 			if (!intel_display_power_is_enabled(display, domain))
 				continue;
 
-			intel_display_irq_regs_assert_irr_is_zero(display,
-								  TRANS_PSR_IIR(display, trans));
+			assert_iir_is_zero(display, TRANS_PSR_IIR(display, trans));
 		}
 	} else {
-		intel_display_irq_regs_assert_irr_is_zero(display, EDP_PSR_IIR);
+		assert_iir_is_zero(display, EDP_PSR_IIR);
 	}
 
 	for_each_pipe(display, pipe) {
@@ -2450,23 +2406,20 @@ void gen8_de_irq_postinstall(struct intel_display *display)
 
 		if (intel_display_power_is_enabled(display,
 						   POWER_DOMAIN_PIPE(pipe)))
-			intel_display_irq_regs_init(display, GEN8_DE_PIPE_IRQ_REGS(pipe),
-						    display->irq.de_pipe_imr_mask[pipe],
-						    de_pipe_enables);
+			irq_init(display, GEN8_DE_PIPE_IRQ_REGS(pipe),
+				 display->irq.de_pipe_imr_mask[pipe],
+				 de_pipe_enables);
 	}
 
-	intel_display_irq_regs_init(display, GEN8_DE_PORT_IRQ_REGS, ~de_port_masked,
-				    de_port_enables);
-	intel_display_irq_regs_init(display, GEN8_DE_MISC_IRQ_REGS, ~de_misc_masked,
-				    de_misc_masked);
+	irq_init(display, GEN8_DE_PORT_IRQ_REGS, ~de_port_masked, de_port_enables);
+	irq_init(display, GEN8_DE_MISC_IRQ_REGS, ~de_misc_masked, de_misc_masked);
 
 	if (IS_DISPLAY_VER(display, 11, 13)) {
 		u32 de_hpd_masked = 0;
 		u32 de_hpd_enables = GEN11_DE_TC_HOTPLUG_MASK |
 				     GEN11_DE_TBT_HOTPLUG_MASK;
 
-		intel_display_irq_regs_init(display, GEN11_DE_HPD_IRQ_REGS, ~de_hpd_masked,
-					    de_hpd_enables);
+		irq_init(display, GEN11_DE_HPD_IRQ_REGS, ~de_hpd_masked, de_hpd_enables);
 	}
 }
 
@@ -2477,17 +2430,16 @@ static void mtp_irq_postinstall(struct intel_display *display)
 	u32 de_hpd_enables = de_hpd_mask | XELPDP_DP_ALT_HOTPLUG_MASK |
 			     XELPDP_TBT_HOTPLUG_MASK;
 
-	intel_display_irq_regs_init(display, PICAINTERRUPT_IRQ_REGS, ~de_hpd_mask,
-				    de_hpd_enables);
+	irq_init(display, PICAINTERRUPT_IRQ_REGS, ~de_hpd_mask, de_hpd_enables);
 
-	intel_display_irq_regs_init(display, SDE_IRQ_REGS, ~sde_mask, 0xffffffff);
+	irq_init(display, SDE_IRQ_REGS, ~sde_mask, 0xffffffff);
 }
 
 static void icp_irq_postinstall(struct intel_display *display)
 {
 	u32 mask = SDE_GMBUS_ICP;
 
-	intel_display_irq_regs_init(display, SDE_IRQ_REGS, ~mask, 0xffffffff);
+	irq_init(display, SDE_IRQ_REGS, ~mask, 0xffffffff);
 }
 
 void gen11_de_irq_postinstall(struct intel_display *display)
-- 
2.47.3

[PATCH 03/10] drm/{i915, xe}/display: move irq calls to parent interface

[Jani Nikula]

Add an irq parent driver interface for the .enabled and .synchronize
calls. This lets us drop the dependency on i915_drv.h and i915_irq.h in
multiple places, and subsequently remove the compat i915_irq.h and
i915_irq.c files along with the display/ext directory from xe
altogether.

Introduce new intel_parent.[ch] as the wrapper layer to chase the
function pointers and convert between generic and more specific display
types.

v2: Keep static wrappers in intel_display_irq.c (Ville)

v3: Full blown wrappers in intel_parent.[ch] (Ville)

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/Makefile                 |  1 +
 .../gpu/drm/i915/display/intel_display_irq.c  | 37 ++++++-------------
 .../drm/i915/display/intel_display_power.c    |  5 +--
 .../i915/display/intel_display_power_well.c   | 15 ++------
 drivers/gpu/drm/i915/display/intel_gmbus.c    |  6 +--
 drivers/gpu/drm/i915/display/intel_hotplug.c  |  6 +--
 .../gpu/drm/i915/display/intel_lpe_audio.c    |  1 -
 drivers/gpu/drm/i915/display/intel_parent.c   | 33 +++++++++++++++++
 drivers/gpu/drm/i915/display/intel_parent.h   | 14 +++++++
 drivers/gpu/drm/i915/display/intel_pipe_crc.c |  6 +--
 drivers/gpu/drm/i915/i915_driver.c            |  1 +
 drivers/gpu/drm/i915/i915_irq.c               | 16 ++++++++
 drivers/gpu/drm/i915/i915_irq.h               |  2 +
 drivers/gpu/drm/xe/Makefile                   |  5 +--
 .../gpu/drm/xe/compat-i915-headers/i915_irq.h |  6 ---
 drivers/gpu/drm/xe/display/ext/i915_irq.c     | 18 ---------
 drivers/gpu/drm/xe/display/xe_display.c       | 18 +++++++++
 include/drm/intel/display_parent_interface.h  |  8 ++++
 18 files changed, 119 insertions(+), 79 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/display/intel_parent.c
 create mode 100644 drivers/gpu/drm/i915/display/intel_parent.h
 delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
 delete mode 100644 drivers/gpu/drm/xe/display/ext/i915_irq.c

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 7c89e5e0a277..9a4f89c9a1cd 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -292,6 +292,7 @@ i915-y += \
 	display/intel_modeset_verify.o \
 	display/intel_overlay.o \
 	display/intel_panic.o \
+	display/intel_parent.o \
 	display/intel_pch.o \
 	display/intel_pch_display.o \
 	display/intel_pch_refclk.o \
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 2a92ca6c2f82..d2933ac3acb4 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -6,8 +6,6 @@
 #include <drm/drm_print.h>
 #include <drm/drm_vblank.h>
 
-#include "i915_drv.h"
-#include "i915_irq.h"
 #include "i915_reg.h"
 #include "icl_dsi_regs.h"
 #include "intel_crtc.h"
@@ -25,6 +23,7 @@
 #include "intel_fifo_underrun.h"
 #include "intel_gmbus.h"
 #include "intel_hotplug_irq.h"
+#include "intel_parent.h"
 #include "intel_pipe_crc_regs.h"
 #include "intel_plane.h"
 #include "intel_pmdemand.h"
@@ -160,7 +159,6 @@ intel_handle_vblank(struct intel_display *display, enum pipe pipe)
 void ilk_update_display_irq(struct intel_display *display,
 			    u32 interrupt_mask, u32 enabled_irq_mask)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	u32 new_val;
 
 	lockdep_assert_held(&display->irq.lock);
@@ -171,7 +169,7 @@ void ilk_update_display_irq(struct intel_display *display,
 	new_val |= (~enabled_irq_mask & interrupt_mask);
 
 	if (new_val != display->irq.ilk_de_imr_mask &&
-	    !drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv))) {
+	    !drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display))) {
 		display->irq.ilk_de_imr_mask = new_val;
 		intel_de_write(display, DEIMR, display->irq.ilk_de_imr_mask);
 		intel_de_posting_read(display, DEIMR);
@@ -197,7 +195,6 @@ void ilk_disable_display_irq(struct intel_display *display, u32 bits)
 void bdw_update_port_irq(struct intel_display *display,
 			 u32 interrupt_mask, u32 enabled_irq_mask)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	u32 new_val;
 	u32 old_val;
 
@@ -205,7 +202,7 @@ void bdw_update_port_irq(struct intel_display *display,
 
 	drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
 
-	if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
+	if (drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display)))
 		return;
 
 	old_val = intel_de_read(display, GEN8_DE_PORT_IMR);
@@ -231,14 +228,13 @@ static void bdw_update_pipe_irq(struct intel_display *display,
 				enum pipe pipe, u32 interrupt_mask,
 				u32 enabled_irq_mask)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	u32 new_val;
 
 	lockdep_assert_held(&display->irq.lock);
 
 	drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
 
-	if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
+	if (drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display)))
 		return;
 
 	new_val = display->irq.de_pipe_imr_mask[pipe];
@@ -274,7 +270,6 @@ void ibx_display_interrupt_update(struct intel_display *display,
 				  u32 interrupt_mask,
 				  u32 enabled_irq_mask)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	u32 sdeimr = intel_de_read(display, SDEIMR);
 
 	sdeimr &= ~interrupt_mask;
@@ -284,7 +279,7 @@ void ibx_display_interrupt_update(struct intel_display *display,
 
 	lockdep_assert_held(&display->irq.lock);
 
-	if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
+	if (drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display)))
 		return;
 
 	intel_de_write(display, SDEIMR, sdeimr);
@@ -348,7 +343,6 @@ u32 i915_pipestat_enable_mask(struct intel_display *display,
 void i915_enable_pipestat(struct intel_display *display,
 			  enum pipe pipe, u32 status_mask)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	i915_reg_t reg = PIPESTAT(display, pipe);
 	u32 enable_mask;
 
@@ -357,7 +351,7 @@ void i915_enable_pipestat(struct intel_display *display,
 		      pipe_name(pipe), status_mask);
 
 	lockdep_assert_held(&display->irq.lock);
-	drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv));
+	drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display));
 
 	if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == status_mask)
 		return;
@@ -372,7 +366,6 @@ void i915_enable_pipestat(struct intel_display *display,
 void i915_disable_pipestat(struct intel_display *display,
 			   enum pipe pipe, u32 status_mask)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	i915_reg_t reg = PIPESTAT(display, pipe);
 	u32 enable_mask;
 
@@ -381,7 +374,7 @@ void i915_disable_pipestat(struct intel_display *display,
 		      pipe_name(pipe), status_mask);
 
 	lockdep_assert_held(&display->irq.lock);
-	drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv));
+	drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display));
 
 	if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == 0)
 		return;
@@ -2174,14 +2167,13 @@ void gen11_display_irq_reset(struct intel_display *display)
 void gen8_irq_power_well_post_enable(struct intel_display *display,
 				     u8 pipe_mask)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	u32 extra_ier = GEN8_PIPE_VBLANK | GEN8_PIPE_FIFO_UNDERRUN |
 		gen8_de_pipe_flip_done_mask(display);
 	enum pipe pipe;
 
 	spin_lock_irq(&display->irq.lock);
 
-	if (!intel_irqs_enabled(dev_priv)) {
+	if (!intel_parent_irq_enabled(display)) {
 		spin_unlock_irq(&display->irq.lock);
 		return;
 	}
@@ -2197,12 +2189,11 @@ void gen8_irq_power_well_post_enable(struct intel_display *display,
 void gen8_irq_power_well_pre_disable(struct intel_display *display,
 				     u8 pipe_mask)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	enum pipe pipe;
 
 	spin_lock_irq(&display->irq.lock);
 
-	if (!intel_irqs_enabled(dev_priv)) {
+	if (!intel_parent_irq_enabled(display)) {
 		spin_unlock_irq(&display->irq.lock);
 		return;
 	}
@@ -2213,7 +2204,7 @@ void gen8_irq_power_well_pre_disable(struct intel_display *display,
 	spin_unlock_irq(&display->irq.lock);
 
 	/* make sure we're done processing display irqs */
-	intel_synchronize_irq(dev_priv);
+	intel_parent_irq_synchronize(display);
 }
 
 /*
@@ -2246,8 +2237,6 @@ static void ibx_irq_postinstall(struct intel_display *display)
 
 void valleyview_enable_display_irqs(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
-
 	spin_lock_irq(&display->irq.lock);
 
 	if (display->irq.vlv_display_irqs_enabled)
@@ -2255,7 +2244,7 @@ void valleyview_enable_display_irqs(struct intel_display *display)
 
 	display->irq.vlv_display_irqs_enabled = true;
 
-	if (intel_irqs_enabled(dev_priv)) {
+	if (intel_parent_irq_enabled(display)) {
 		_vlv_display_irq_reset(display);
 		_vlv_display_irq_postinstall(display);
 	}
@@ -2266,8 +2255,6 @@ void valleyview_enable_display_irqs(struct intel_display *display)
 
 void valleyview_disable_display_irqs(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
-
 	spin_lock_irq(&display->irq.lock);
 
 	if (!display->irq.vlv_display_irqs_enabled)
@@ -2275,7 +2262,7 @@ void valleyview_disable_display_irqs(struct intel_display *display)
 
 	display->irq.vlv_display_irqs_enabled = false;
 
-	if (intel_irqs_enabled(dev_priv))
+	if (intel_parent_irq_enabled(display))
 		_vlv_display_irq_reset(display);
 out:
 	spin_unlock_irq(&display->irq.lock);
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 2a4cc1dcc293..a383ef23391d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -11,7 +11,6 @@
 #include "soc/intel_dram.h"
 
 #include "i915_drv.h"
-#include "i915_irq.h"
 #include "i915_reg.h"
 #include "intel_backlight_regs.h"
 #include "intel_cdclk.h"
@@ -27,6 +26,7 @@
 #include "intel_display_utils.h"
 #include "intel_dmc.h"
 #include "intel_mchbar_regs.h"
+#include "intel_parent.h"
 #include "intel_pch_refclk.h"
 #include "intel_pcode.h"
 #include "intel_pmdemand.h"
@@ -1202,7 +1202,6 @@ static void hsw_assert_cdclk(struct intel_display *display)
 
 static void assert_can_disable_lcpll(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	struct intel_crtc *crtc;
 
 	for_each_intel_crtc(display->drm, crtc)
@@ -1247,7 +1246,7 @@ static void assert_can_disable_lcpll(struct intel_display *display)
 	 * gen-specific and since we only disable LCPLL after we fully disable
 	 * the interrupts, the check below should be enough.
 	 */
-	INTEL_DISPLAY_STATE_WARN(display, intel_irqs_enabled(dev_priv),
+	INTEL_DISPLAY_STATE_WARN(display, intel_parent_irq_enabled(display),
 				 "IRQs enabled\n");
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
index f4f7e73acc87..719f58e43269 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
@@ -7,8 +7,6 @@
 
 #include <drm/drm_print.h>
 
-#include "i915_drv.h"
-#include "i915_irq.h"
 #include "i915_reg.h"
 #include "intel_backlight_regs.h"
 #include "intel_combo_phy.h"
@@ -28,6 +26,7 @@
 #include "intel_dpio_phy.h"
 #include "intel_dpll.h"
 #include "intel_hotplug.h"
+#include "intel_parent.h"
 #include "intel_pcode.h"
 #include "intel_pps.h"
 #include "intel_psr.h"
@@ -628,8 +627,6 @@ static bool hsw_power_well_enabled(struct intel_display *display,
 
 static void assert_can_enable_dc9(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
-
 	drm_WARN_ONCE(display->drm,
 		      (intel_de_read(display, DC_STATE_EN) & DC_STATE_EN_DC9),
 		      "DC9 already programmed to be enabled.\n");
@@ -641,7 +638,7 @@ static void assert_can_enable_dc9(struct intel_display *display)
 		      intel_de_read(display, HSW_PWR_WELL_CTL2) &
 		      HSW_PWR_WELL_CTL_REQ(SKL_PW_CTL_IDX_PW_2),
 		      "Power well 2 on.\n");
-	drm_WARN_ONCE(display->drm, intel_irqs_enabled(dev_priv),
+	drm_WARN_ONCE(display->drm, intel_parent_irq_enabled(display),
 		      "Interrupts not disabled yet.\n");
 
 	 /*
@@ -655,9 +652,7 @@ static void assert_can_enable_dc9(struct intel_display *display)
 
 static void assert_can_disable_dc9(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
-
-	drm_WARN_ONCE(display->drm, intel_irqs_enabled(dev_priv),
+	drm_WARN_ONCE(display->drm, intel_parent_irq_enabled(display),
 		      "Interrupts not disabled yet.\n");
 	drm_WARN_ONCE(display->drm,
 		      intel_de_read(display, DC_STATE_EN) &
@@ -1281,12 +1276,10 @@ static void vlv_display_power_well_init(struct intel_display *display)
 
 static void vlv_display_power_well_deinit(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
-
 	valleyview_disable_display_irqs(display);
 
 	/* make sure we're done processing display irqs */
-	intel_synchronize_irq(dev_priv);
+	intel_parent_irq_synchronize(display);
 
 	vlv_pps_reset_all(display);
 
diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
index 795012d7c24c..acc85853b2a7 100644
--- a/drivers/gpu/drm/i915/display/intel_gmbus.c
+++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
@@ -35,8 +35,6 @@
 #include <drm/drm_print.h>
 #include <drm/display/drm_hdcp_helper.h>
 
-#include "i915_drv.h"
-#include "i915_irq.h"
 #include "i915_reg.h"
 #include "intel_de.h"
 #include "intel_display_regs.h"
@@ -44,6 +42,7 @@
 #include "intel_display_wa.h"
 #include "intel_gmbus.h"
 #include "intel_gmbus_regs.h"
+#include "intel_parent.h"
 
 struct intel_gmbus {
 	struct i2c_adapter adapter;
@@ -391,12 +390,11 @@ intel_gpio_setup(struct intel_gmbus *bus, i915_reg_t gpio_reg)
 
 static bool has_gmbus_irq(struct intel_display *display)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
 	/*
 	 * encoder->shutdown() may want to use GMBUS
 	 * after irqs have already been disabled.
 	 */
-	return HAS_GMBUS_IRQ(display) && intel_irqs_enabled(i915);
+	return HAS_GMBUS_IRQ(display) && intel_parent_irq_enabled(display);
 }
 
 static int gmbus_wait(struct intel_display *display, u32 status, u32 irq_en)
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
index 235706229ffb..7575a063f7be 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
@@ -27,8 +27,6 @@
 #include <drm/drm_print.h>
 #include <drm/drm_probe_helper.h>
 
-#include "i915_drv.h"
-#include "i915_irq.h"
 #include "intel_connector.h"
 #include "intel_display_core.h"
 #include "intel_display_power.h"
@@ -39,6 +37,7 @@
 #include "intel_hdcp.h"
 #include "intel_hotplug.h"
 #include "intel_hotplug_irq.h"
+#include "intel_parent.h"
 
 /**
  * DOC: Hotplug
@@ -1177,13 +1176,12 @@ bool intel_hpd_schedule_detection(struct intel_display *display)
 static int i915_hpd_storm_ctl_show(struct seq_file *m, void *data)
 {
 	struct intel_display *display = m->private;
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	struct intel_hotplug *hotplug = &display->hotplug;
 
 	/* Synchronize with everything first in case there's been an HPD
 	 * storm, but we haven't finished handling it in the kernel yet
 	 */
-	intel_synchronize_irq(dev_priv);
+	intel_parent_irq_synchronize(display);
 	flush_work(&display->hotplug.dig_port_work);
 	flush_delayed_work(&display->hotplug.hotplug_work);
 
diff --git a/drivers/gpu/drm/i915/display/intel_lpe_audio.c b/drivers/gpu/drm/i915/display/intel_lpe_audio.c
index 42284e9928f2..5b41abe1c64d 100644
--- a/drivers/gpu/drm/i915/display/intel_lpe_audio.c
+++ b/drivers/gpu/drm/i915/display/intel_lpe_audio.c
@@ -71,7 +71,6 @@
 #include <drm/drm_print.h>
 #include <drm/intel/intel_lpe_audio.h>
 
-#include "i915_irq.h"
 #include "intel_audio_regs.h"
 #include "intel_de.h"
 #include "intel_lpe_audio.h"
diff --git a/drivers/gpu/drm/i915/display/intel_parent.c b/drivers/gpu/drm/i915/display/intel_parent.c
new file mode 100644
index 000000000000..375713f6f411
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_parent.c
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: MIT
+/* Copyright © 2025 Intel Corporation */
+
+/*
+ * Convenience wrapper functions to call the parent interface functions:
+ *
+ * - display->parent->SUBSTRUCT->FUNCTION()
+ * - display->parent->FUNCTION()
+ *
+ * All functions here should be named accordingly:
+ *
+ * - intel_parent_SUBSTRUCT_FUNCTION()
+ * - intel_parent_FUNCTION()
+ *
+ * These functions may use display driver specific types for parameters and
+ * return values, translating them to and from the generic types used in the
+ * function pointer interface.
+ */
+
+#include <drm/intel/display_parent_interface.h>
+
+#include "intel_display_core.h"
+#include "intel_parent.h"
+
+bool intel_parent_irq_enabled(struct intel_display *display)
+{
+	return display->parent->irq->enabled(display->drm);
+}
+
+void intel_parent_irq_synchronize(struct intel_display *display)
+{
+	display->parent->irq->synchronize(display->drm);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_parent.h b/drivers/gpu/drm/i915/display/intel_parent.h
new file mode 100644
index 000000000000..3ade493f1008
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_parent.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: MIT */
+/* Copyright © 2025 Intel Corporation */
+
+#ifndef __INTEL_PARENT_H__
+#define __INTEL_PARENT_H__
+
+#include <linux/types.h>
+
+struct intel_display;
+
+bool intel_parent_irq_enabled(struct intel_display *display);
+void intel_parent_irq_synchronize(struct intel_display *display);
+
+#endif /* __INTEL_PARENT_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_pipe_crc.c b/drivers/gpu/drm/i915/display/intel_pipe_crc.c
index 1f27643412f1..71cb0178c8b1 100644
--- a/drivers/gpu/drm/i915/display/intel_pipe_crc.c
+++ b/drivers/gpu/drm/i915/display/intel_pipe_crc.c
@@ -30,13 +30,12 @@
 
 #include <drm/drm_print.h>
 
-#include "i915_drv.h"
-#include "i915_irq.h"
 #include "intel_atomic.h"
 #include "intel_de.h"
 #include "intel_display_irq.h"
 #include "intel_display_regs.h"
 #include "intel_display_types.h"
+#include "intel_parent.h"
 #include "intel_pipe_crc.h"
 #include "intel_pipe_crc_regs.h"
 
@@ -658,7 +657,6 @@ void intel_crtc_enable_pipe_crc(struct intel_crtc *crtc)
 void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc)
 {
 	struct intel_display *display = to_intel_display(crtc);
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	struct intel_pipe_crc *pipe_crc = &crtc->pipe_crc;
 	enum pipe pipe = crtc->pipe;
 
@@ -669,5 +667,5 @@ void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc)
 
 	intel_de_write(display, PIPE_CRC_CTL(display, pipe), 0);
 	intel_de_posting_read(display, PIPE_CRC_CTL(display, pipe));
-	intel_synchronize_irq(dev_priv);
+	intel_parent_irq_synchronize(display);
 }
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index c97b76771917..07715aef62d3 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -741,6 +741,7 @@ static void i915_welcome_messages(struct drm_i915_private *dev_priv)
 
 static const struct intel_display_parent_interface parent = {
 	.rpm = &i915_display_rpm_interface,
+	.irq = &i915_display_irq_interface,
 };
 
 const struct intel_display_parent_interface *i915_driver_parent_interface(void)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 1898be4ddc8b..3fe978d4ea53 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -33,6 +33,7 @@
 
 #include <drm/drm_drv.h>
 #include <drm/drm_print.h>
+#include <drm/intel/display_parent_interface.h>
 
 #include "display/intel_display_irq.h"
 #include "display/intel_hotplug.h"
@@ -1252,3 +1253,18 @@ void intel_synchronize_hardirq(struct drm_i915_private *i915)
 {
 	synchronize_hardirq(to_pci_dev(i915->drm.dev)->irq);
 }
+
+static bool _intel_irq_enabled(struct drm_device *drm)
+{
+	return intel_irqs_enabled(to_i915(drm));
+}
+
+static void _intel_irq_synchronize(struct drm_device *drm)
+{
+	return intel_synchronize_irq(to_i915(drm));
+}
+
+const struct intel_display_irq_interface i915_display_irq_interface = {
+	.enabled = _intel_irq_enabled,
+	.synchronize = _intel_irq_synchronize,
+};
diff --git a/drivers/gpu/drm/i915/i915_irq.h b/drivers/gpu/drm/i915/i915_irq.h
index 58789b264575..5c87d6d41c74 100644
--- a/drivers/gpu/drm/i915/i915_irq.h
+++ b/drivers/gpu/drm/i915/i915_irq.h
@@ -51,4 +51,6 @@ void gen2_error_reset(struct intel_uncore *uncore, struct i915_error_regs regs);
 void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
 		     u32 emr_val);
 
+extern const struct intel_display_irq_interface i915_display_irq_interface;
+
 #endif /* __I915_IRQ_H__ */
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index e4b273b025d2..c2d2303a8198 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -191,7 +191,6 @@ endif
 
 # i915 Display compat #defines and #includes
 subdir-ccflags-$(CONFIG_DRM_XE_DISPLAY) += \
-	-I$(src)/display/ext \
 	-I$(src)/compat-i915-headers \
 	-I$(srctree)/drivers/gpu/drm/i915/display/ \
 	-Ddrm_i915_private=xe_device
@@ -208,7 +207,6 @@ $(obj)/i915-display/%.o: $(srctree)/drivers/gpu/drm/i915/display/%.c FORCE
 
 # Display code specific to xe
 xe-$(CONFIG_DRM_XE_DISPLAY) += \
-	display/ext/i915_irq.o \
 	display/intel_bo.o \
 	display/intel_fb_bo.o \
 	display/intel_fbdev_fb.o \
@@ -304,10 +302,11 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
 	i915-display/intel_modeset_setup.o \
 	i915-display/intel_modeset_verify.o \
 	i915-display/intel_panel.o \
+	i915-display/intel_parent.o \
+	i915-display/intel_pch.o \
 	i915-display/intel_pfit.o \
 	i915-display/intel_plane.o \
 	i915-display/intel_pmdemand.o \
-	i915-display/intel_pch.o \
 	i915-display/intel_pps.o \
 	i915-display/intel_psr.o \
 	i915-display/intel_qp_tables.o \
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
deleted file mode 100644
index 61707a07f91f..000000000000
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#include "../../i915/i915_irq.h"
diff --git a/drivers/gpu/drm/xe/display/ext/i915_irq.c b/drivers/gpu/drm/xe/display/ext/i915_irq.c
deleted file mode 100644
index 1011c1c754d0..000000000000
--- a/drivers/gpu/drm/xe/display/ext/i915_irq.c
+++ /dev/null
@@ -1,18 +0,0 @@
-// SPDX-License-Identifier: MIT
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#include "i915_irq.h"
-#include "i915_reg.h"
-#include "intel_uncore.h"
-
-bool intel_irqs_enabled(struct xe_device *xe)
-{
-	return atomic_read(&xe->irq.enabled);
-}
-
-void intel_synchronize_irq(struct xe_device *xe)
-{
-	synchronize_irq(to_pci_dev(xe->drm.dev)->irq);
-}
diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
index 8b0afa270216..e3320d9e6314 100644
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@ -516,8 +516,26 @@ static void display_device_remove(struct drm_device *dev, void *arg)
 	intel_display_device_remove(display);
 }
 
+static bool irq_enabled(struct drm_device *drm)
+{
+	struct xe_device *xe = to_xe_device(drm);
+
+	return atomic_read(&xe->irq.enabled);
+}
+
+static void irq_synchronize(struct drm_device *drm)
+{
+	synchronize_irq(to_pci_dev(drm->dev)->irq);
+}
+
+static const struct intel_display_irq_interface xe_display_irq_interface = {
+	.enabled = irq_enabled,
+	.synchronize = irq_synchronize,
+};
+
 static const struct intel_display_parent_interface parent = {
 	.rpm = &xe_display_rpm_interface,
+	.irq = &xe_display_irq_interface,
 };
 
 /**
diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
index 26bedc360044..3a008a18eb65 100644
--- a/include/drm/intel/display_parent_interface.h
+++ b/include/drm/intel/display_parent_interface.h
@@ -25,6 +25,11 @@ struct intel_display_rpm_interface {
 	void (*assert_unblock)(const struct drm_device *drm);
 };
 
+struct intel_display_irq_interface {
+	bool (*enabled)(struct drm_device *drm);
+	void (*synchronize)(struct drm_device *drm);
+};
+
 /**
  * struct intel_display_parent_interface - services parent driver provides to display
  *
@@ -40,6 +45,9 @@ struct intel_display_rpm_interface {
 struct intel_display_parent_interface {
 	/** @rpm: Runtime PM functions */
 	const struct intel_display_rpm_interface *rpm;
+
+	/** @irq: IRQ interface */
+	const struct intel_display_irq_interface *irq;
 };
 
 #endif
-- 
2.47.3

[PATCH 04/10] drm/i915: add .vgpu_active to parent interface

[Jani Nikula]

Add .vgpu_active() to display parent interface, removing more
dependencies on struct drm_i915_private, i915_drv.h, and i915_vgpu.h.

This also allows us to remove the xe compat i915_vgpu.h.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_crtc.c      |  6 ++----
 drivers/gpu/drm/i915/display/intel_fbc.c       |  5 ++---
 drivers/gpu/drm/i915/display/intel_parent.c    |  5 +++++
 drivers/gpu/drm/i915/display/intel_parent.h    |  2 ++
 drivers/gpu/drm/i915/i915_driver.c             |  6 ++++++
 .../gpu/drm/xe/compat-i915-headers/i915_vgpu.h | 18 ------------------
 include/drm/intel/display_parent_interface.h   |  3 +++
 7 files changed, 20 insertions(+), 25 deletions(-)
 delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/i915_vgpu.h

diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index 9d2a23c96c61..153ff4b4b52c 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -13,8 +13,6 @@
 #include <drm/drm_vblank.h>
 #include <drm/drm_vblank_work.h>
 
-#include "i915_drv.h"
-#include "i915_vgpu.h"
 #include "i9xx_plane.h"
 #include "icl_dsi.h"
 #include "intel_atomic.h"
@@ -28,6 +26,7 @@
 #include "intel_drrs.h"
 #include "intel_dsi.h"
 #include "intel_fifo_underrun.h"
+#include "intel_parent.h"
 #include "intel_pipe_crc.h"
 #include "intel_plane.h"
 #include "intel_psr.h"
@@ -671,7 +670,6 @@ void intel_pipe_update_end(struct intel_atomic_state *state,
 	int scanline_end = intel_get_crtc_scanline(crtc);
 	u32 end_vbl_count = intel_crtc_get_vblank_counter(crtc);
 	ktime_t end_vbl_time = ktime_get();
-	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 
 	drm_WARN_ON(display->drm, new_crtc_state->use_dsb);
 
@@ -737,7 +735,7 @@ void intel_pipe_update_end(struct intel_atomic_state *state,
 
 	local_irq_enable();
 
-	if (intel_vgpu_active(dev_priv))
+	if (intel_parent_vgpu_active(display))
 		goto out;
 
 	if (crtc->debug.start_vbl_count &&
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 437d2fda20a7..ab0bcea5aa89 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -50,7 +50,6 @@
 #include "gt/intel_gt_types.h"
 
 #include "i915_drv.h"
-#include "i915_vgpu.h"
 #include "i915_vma.h"
 #include "i9xx_plane_regs.h"
 #include "intel_de.h"
@@ -64,6 +63,7 @@
 #include "intel_fbc.h"
 #include "intel_fbc_regs.h"
 #include "intel_frontbuffer.h"
+#include "intel_parent.h"
 
 #define for_each_fbc_id(__display, __fbc_id) \
 	for ((__fbc_id) = INTEL_FBC_A; (__fbc_id) < I915_MAX_FBCS; (__fbc_id)++) \
@@ -1485,7 +1485,6 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
 				 struct intel_plane *plane)
 {
 	struct intel_display *display = to_intel_display(state->base.dev);
-	struct drm_i915_private *i915 = to_i915(display->drm);
 	struct intel_plane_state *plane_state =
 		intel_atomic_get_new_plane_state(state, plane);
 	const struct drm_framebuffer *fb = plane_state->hw.fb;
@@ -1501,7 +1500,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
 		return 0;
 	}
 
-	if (intel_vgpu_active(i915)) {
+	if (intel_parent_vgpu_active(display)) {
 		plane_state->no_fbc_reason = "VGPU active";
 		return 0;
 	}
diff --git a/drivers/gpu/drm/i915/display/intel_parent.c b/drivers/gpu/drm/i915/display/intel_parent.c
index 375713f6f411..3786fd42827d 100644
--- a/drivers/gpu/drm/i915/display/intel_parent.c
+++ b/drivers/gpu/drm/i915/display/intel_parent.c
@@ -31,3 +31,8 @@ void intel_parent_irq_synchronize(struct intel_display *display)
 {
 	display->parent->irq->synchronize(display->drm);
 }
+
+bool intel_parent_vgpu_active(struct intel_display *display)
+{
+	return display->parent->vgpu_active && display->parent->vgpu_active(display->drm);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_parent.h b/drivers/gpu/drm/i915/display/intel_parent.h
index 3ade493f1008..222c95836d35 100644
--- a/drivers/gpu/drm/i915/display/intel_parent.h
+++ b/drivers/gpu/drm/i915/display/intel_parent.h
@@ -11,4 +11,6 @@ struct intel_display;
 bool intel_parent_irq_enabled(struct intel_display *display);
 void intel_parent_irq_synchronize(struct intel_display *display);
 
+bool intel_parent_vgpu_active(struct intel_display *display);
+
 #endif /* __INTEL_PARENT_H__ */
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 07715aef62d3..f21f1919a225 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -739,9 +739,15 @@ static void i915_welcome_messages(struct drm_i915_private *dev_priv)
 			 "DRM_I915_DEBUG_RUNTIME_PM enabled\n");
 }
 
+static bool vgpu_active(struct drm_device *drm)
+{
+	return intel_vgpu_active(to_i915(drm));
+}
+
 static const struct intel_display_parent_interface parent = {
 	.rpm = &i915_display_rpm_interface,
 	.irq = &i915_display_irq_interface,
+	.vgpu_active = vgpu_active,
 };
 
 const struct intel_display_parent_interface *i915_driver_parent_interface(void)
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_vgpu.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_vgpu.h
deleted file mode 100644
index 4931c7198f13..000000000000
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_vgpu.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#ifndef _I915_VGPU_H_
-#define _I915_VGPU_H_
-
-#include <linux/types.h>
-
-struct drm_i915_private;
-
-static inline bool intel_vgpu_active(struct drm_i915_private *i915)
-{
-	return false;
-}
-
-#endif /* _I915_VGPU_H_ */
diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
index 3a008a18eb65..f3834f36ce74 100644
--- a/include/drm/intel/display_parent_interface.h
+++ b/include/drm/intel/display_parent_interface.h
@@ -48,6 +48,9 @@ struct intel_display_parent_interface {
 
 	/** @irq: IRQ interface */
 	const struct intel_display_irq_interface *irq;
+
+	/** @vgpu_active: Is vGPU active? Optional. */
+	bool (*vgpu_active)(struct drm_device *drm);
 };
 
 #endif
-- 
2.47.3

[PATCH 05/10] drm/i915: add .fence_support_legacy to parent interface

[Jani Nikula]

Add .fence_support_legacy() to display parent interface, removing more
dependencies on struct drm_i915_private, i915_drv.h, and
gt/intel_gt_types.h.

This allows us to remove the xe compat gt/intel_gt_types.h.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c              |  8 ++------
 drivers/gpu/drm/i915/display/intel_parent.c           |  5 +++++
 drivers/gpu/drm/i915/display/intel_parent.h           |  2 ++
 drivers/gpu/drm/i915/i915_driver.c                    |  6 ++++++
 .../drm/xe/compat-i915-headers/gt/intel_gt_types.h    | 11 -----------
 include/drm/intel/display_parent_interface.h          |  3 +++
 6 files changed, 18 insertions(+), 17 deletions(-)
 delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/gt/intel_gt_types.h

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index ab0bcea5aa89..8c56c87d00a9 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -47,9 +47,6 @@
 
 #include "gem/i915_gem_stolen.h"
 
-#include "gt/intel_gt_types.h"
-
-#include "i915_drv.h"
 #include "i915_vma.h"
 #include "i9xx_plane_regs.h"
 #include "intel_de.h"
@@ -64,6 +61,7 @@
 #include "intel_fbc_regs.h"
 #include "intel_frontbuffer.h"
 #include "intel_parent.h"
+#include "intel_step.h"
 
 #define for_each_fbc_id(__display, __fbc_id) \
 	for ((__fbc_id) = INTEL_FBC_A; (__fbc_id) < I915_MAX_FBCS; (__fbc_id)++) \
@@ -267,9 +265,7 @@ static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state *plane_s
 
 static bool intel_fbc_has_fences(struct intel_display *display)
 {
-	struct drm_i915_private __maybe_unused *i915 = to_i915(display->drm);
-
-	return intel_gt_support_legacy_fencing(to_gt(i915));
+	return intel_parent_fence_support_legacy(display);
 }
 
 static u32 i8xx_fbc_ctl(struct intel_fbc *fbc)
diff --git a/drivers/gpu/drm/i915/display/intel_parent.c b/drivers/gpu/drm/i915/display/intel_parent.c
index 3786fd42827d..3dd31852e2e1 100644
--- a/drivers/gpu/drm/i915/display/intel_parent.c
+++ b/drivers/gpu/drm/i915/display/intel_parent.c
@@ -36,3 +36,8 @@ bool intel_parent_vgpu_active(struct intel_display *display)
 {
 	return display->parent->vgpu_active && display->parent->vgpu_active(display->drm);
 }
+
+bool intel_parent_fence_support_legacy(struct intel_display *display)
+{
+	return display->parent->fence_support_legacy && display->parent->fence_support_legacy(display->drm);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_parent.h b/drivers/gpu/drm/i915/display/intel_parent.h
index 222c95836d35..fc6799db0361 100644
--- a/drivers/gpu/drm/i915/display/intel_parent.h
+++ b/drivers/gpu/drm/i915/display/intel_parent.h
@@ -13,4 +13,6 @@ void intel_parent_irq_synchronize(struct intel_display *display);
 
 bool intel_parent_vgpu_active(struct intel_display *display);
 
+bool intel_parent_fence_support_legacy(struct intel_display *display);
+
 #endif /* __INTEL_PARENT_H__ */
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index f21f1919a225..814b430de960 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -744,10 +744,16 @@ static bool vgpu_active(struct drm_device *drm)
 	return intel_vgpu_active(to_i915(drm));
 }
 
+static bool fence_support_legacy(struct drm_device *drm)
+{
+	return intel_gt_support_legacy_fencing(to_gt(to_i915(drm)));
+}
+
 static const struct intel_display_parent_interface parent = {
 	.rpm = &i915_display_rpm_interface,
 	.irq = &i915_display_irq_interface,
 	.vgpu_active = vgpu_active,
+	.fence_support_legacy = fence_support_legacy,
 };
 
 const struct intel_display_parent_interface *i915_driver_parent_interface(void)
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/gt/intel_gt_types.h b/drivers/gpu/drm/xe/compat-i915-headers/gt/intel_gt_types.h
deleted file mode 100644
index c15806d6c4f7..000000000000
--- a/drivers/gpu/drm/xe/compat-i915-headers/gt/intel_gt_types.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#ifndef __INTEL_GT_TYPES__
-#define __INTEL_GT_TYPES__
-
-#define intel_gt_support_legacy_fencing(gt) 0
-
-#endif
diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
index f3834f36ce74..11767adb0083 100644
--- a/include/drm/intel/display_parent_interface.h
+++ b/include/drm/intel/display_parent_interface.h
@@ -51,6 +51,9 @@ struct intel_display_parent_interface {
 
 	/** @vgpu_active: Is vGPU active? Optional. */
 	bool (*vgpu_active)(struct drm_device *drm);
+
+	/** @fence_support_legacy: Support legacy fencing? Optional. */
+	bool (*fence_support_legacy)(struct drm_device *drm);
 };
 
 #endif
-- 
2.47.3

[PATCH 06/10] drm/i915/rps: store struct dma_fence in struct wait_rps_boost

[Jani Nikula]

Prefer the more generic pointer rather than i915 specific data
type. Also use dma_fence_put() for symmetry with the dma_fence_get()

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_rps.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_rps.c b/drivers/gpu/drm/i915/display/intel_display_rps.c
index 82ea1ec482e4..b6720f7c09d9 100644
--- a/drivers/gpu/drm/i915/display/intel_display_rps.c
+++ b/drivers/gpu/drm/i915/display/intel_display_rps.c
@@ -18,14 +18,14 @@ struct wait_rps_boost {
 	struct wait_queue_entry wait;
 
 	struct drm_crtc *crtc;
-	struct i915_request *request;
+	struct dma_fence *fence;
 };
 
 static int do_rps_boost(struct wait_queue_entry *_wait,
 			unsigned mode, int sync, void *key)
 {
 	struct wait_rps_boost *wait = container_of(_wait, typeof(*wait), wait);
-	struct i915_request *rq = wait->request;
+	struct i915_request *rq = to_request(wait->fence);
 
 	/*
 	 * If we missed the vblank, but the request is already running it
@@ -34,7 +34,7 @@ static int do_rps_boost(struct wait_queue_entry *_wait,
 	 */
 	if (!i915_request_started(rq))
 		intel_rps_boost(rq);
-	i915_request_put(rq);
+	dma_fence_put(wait->fence);
 
 	drm_crtc_vblank_put(wait->crtc);
 
@@ -64,7 +64,7 @@ void intel_display_rps_boost_after_vblank(struct drm_crtc *crtc,
 		return;
 	}
 
-	wait->request = to_request(dma_fence_get(fence));
+	wait->fence = dma_fence_get(fence);
 	wait->crtc = crtc;
 
 	wait->wait.func = do_rps_boost;
-- 
2.47.3

[PATCH 07/10] drm/i915/rps: call RPS functions via the parent interface

[Jani Nikula]

Add struct intel_display_rps_interface to the display parent interface,
and call the RPS functions through it. The RPS interface is optional.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../gpu/drm/i915/display/intel_display_rps.c  | 32 ++++++++---------
 drivers/gpu/drm/i915/display/intel_parent.c   | 23 +++++++++++++
 drivers/gpu/drm/i915/display/intel_parent.h   |  6 ++++
 drivers/gpu/drm/i915/gt/intel_rps.c           | 34 +++++++++++++++++++
 drivers/gpu/drm/i915/gt/intel_rps.h           |  2 ++
 drivers/gpu/drm/i915/i915_driver.c            |  2 ++
 include/drm/intel/display_parent_interface.h  | 10 ++++++
 7 files changed, 93 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_rps.c b/drivers/gpu/drm/i915/display/intel_display_rps.c
index b6720f7c09d9..e70c4f0eab80 100644
--- a/drivers/gpu/drm/i915/display/intel_display_rps.c
+++ b/drivers/gpu/drm/i915/display/intel_display_rps.c
@@ -3,16 +3,18 @@
  * Copyright © 2023 Intel Corporation
  */
 
+#include <linux/dma-fence.h>
+
 #include <drm/drm_crtc.h>
 #include <drm/drm_vblank.h>
 
-#include "gt/intel_rps.h"
-#include "i915_drv.h"
 #include "i915_reg.h"
+#include "i915_request.h"
 #include "intel_display_core.h"
 #include "intel_display_irq.h"
 #include "intel_display_rps.h"
 #include "intel_display_types.h"
+#include "intel_parent.h"
 
 struct wait_rps_boost {
 	struct wait_queue_entry wait;
@@ -25,15 +27,10 @@ static int do_rps_boost(struct wait_queue_entry *_wait,
 			unsigned mode, int sync, void *key)
 {
 	struct wait_rps_boost *wait = container_of(_wait, typeof(*wait), wait);
-	struct i915_request *rq = to_request(wait->fence);
-
-	/*
-	 * If we missed the vblank, but the request is already running it
-	 * is reasonable to assume that it will complete before the next
-	 * vblank without our intervention, so leave RPS alone.
-	 */
-	if (!i915_request_started(rq))
-		intel_rps_boost(rq);
+	struct intel_display *display = to_intel_display(wait->crtc->dev);
+
+	intel_parent_rps_boost(display, wait->fence);
+
 	dma_fence_put(wait->fence);
 
 	drm_crtc_vblank_put(wait->crtc);
@@ -49,6 +46,9 @@ void intel_display_rps_boost_after_vblank(struct drm_crtc *crtc,
 	struct intel_display *display = to_intel_display(crtc->dev);
 	struct wait_rps_boost *wait;
 
+	if (!intel_parent_rps_available(display))
+		return;
+
 	if (!dma_fence_is_i915(fence))
 		return;
 
@@ -77,12 +77,14 @@ void intel_display_rps_mark_interactive(struct intel_display *display,
 					struct intel_atomic_state *state,
 					bool interactive)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
+	if (!intel_parent_rps_available(display))
+		return;
 
 	if (state->rps_interactive == interactive)
 		return;
 
-	intel_rps_mark_interactive(&to_gt(i915)->rps, interactive);
+	intel_parent_rps_mark_interactive(display, interactive);
+
 	state->rps_interactive = interactive;
 }
 
@@ -102,7 +104,5 @@ void ilk_display_rps_disable(struct intel_display *display)
 
 void ilk_display_rps_irq_handler(struct intel_display *display)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
-
-	gen5_rps_irq_handler(&to_gt(i915)->rps);
+	intel_parent_rps_ilk_irq_handler(display);
 }
diff --git a/drivers/gpu/drm/i915/display/intel_parent.c b/drivers/gpu/drm/i915/display/intel_parent.c
index 3dd31852e2e1..9370da9d215c 100644
--- a/drivers/gpu/drm/i915/display/intel_parent.c
+++ b/drivers/gpu/drm/i915/display/intel_parent.c
@@ -32,6 +32,29 @@ void intel_parent_irq_synchronize(struct intel_display *display)
 	display->parent->irq->synchronize(display->drm);
 }
 
+bool intel_parent_rps_available(struct intel_display *display)
+{
+	return display->parent->rps;
+}
+
+void intel_parent_rps_boost(struct intel_display *display, struct dma_fence *fence)
+{
+	if (display->parent->rps)
+		display->parent->rps->boost(fence);
+}
+
+void intel_parent_rps_mark_interactive(struct intel_display *display, bool interactive)
+{
+	if (display->parent->rps)
+		display->parent->rps->mark_interactive(display->drm, interactive);
+}
+
+void intel_parent_rps_ilk_irq_handler(struct intel_display *display)
+{
+	if (display->parent->rps)
+		display->parent->rps->ilk_irq_handler(display->drm);
+}
+
 bool intel_parent_vgpu_active(struct intel_display *display)
 {
 	return display->parent->vgpu_active && display->parent->vgpu_active(display->drm);
diff --git a/drivers/gpu/drm/i915/display/intel_parent.h b/drivers/gpu/drm/i915/display/intel_parent.h
index fc6799db0361..41d6943786fb 100644
--- a/drivers/gpu/drm/i915/display/intel_parent.h
+++ b/drivers/gpu/drm/i915/display/intel_parent.h
@@ -6,11 +6,17 @@
 
 #include <linux/types.h>
 
+struct dma_fence;
 struct intel_display;
 
 bool intel_parent_irq_enabled(struct intel_display *display);
 void intel_parent_irq_synchronize(struct intel_display *display);
 
+bool intel_parent_rps_available(struct intel_display *display);
+void intel_parent_rps_boost(struct intel_display *display, struct dma_fence *fence);
+void intel_parent_rps_mark_interactive(struct intel_display *display, bool interactive);
+void intel_parent_rps_ilk_irq_handler(struct intel_display *display);
+
 bool intel_parent_vgpu_active(struct intel_display *display);
 
 bool intel_parent_fence_support_legacy(struct intel_display *display);
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index b01c837ab646..61d746bda462 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -6,6 +6,7 @@
 #include <linux/string_helpers.h>
 
 #include <drm/intel/i915_drm.h>
+#include <drm/intel/display_parent_interface.h>
 
 #include "display/intel_display_rps.h"
 #include "display/vlv_clock.h"
@@ -2914,6 +2915,39 @@ bool i915_gpu_turbo_disable(void)
 }
 EXPORT_SYMBOL_GPL(i915_gpu_turbo_disable);
 
+static void boost(struct dma_fence *fence)
+{
+	struct i915_request *rq = to_request(fence);
+
+	/*
+	 * If we missed the vblank, but the request is already running it
+	 * is reasonable to assume that it will complete before the next
+	 * vblank without our intervention, so leave RPS alone.
+	 */
+	if (!i915_request_started(rq))
+		intel_rps_boost(rq);
+}
+
+static void mark_interactive(struct drm_device *drm, bool interactive)
+{
+	struct drm_i915_private *i915 = to_i915(drm);
+
+	intel_rps_mark_interactive(&to_gt(i915)->rps, interactive);
+}
+
+static void ilk_irq_handler(struct drm_device *drm)
+{
+	struct drm_i915_private *i915 = to_i915(drm);
+
+	gen5_rps_irq_handler(&to_gt(i915)->rps);
+}
+
+const struct intel_display_rps_interface i915_display_rps_interface = {
+	.boost = boost,
+	.mark_interactive = mark_interactive,
+	.ilk_irq_handler = ilk_irq_handler,
+};
+
 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
 #include "selftest_rps.c"
 #include "selftest_slpc.c"
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.h b/drivers/gpu/drm/i915/gt/intel_rps.h
index 92fb01f5a452..5dbcebd7d4a5 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.h
+++ b/drivers/gpu/drm/i915/gt/intel_rps.h
@@ -128,4 +128,6 @@ static inline void intel_rps_clear_timer(struct intel_rps *rps)
 	clear_bit(INTEL_RPS_TIMER, &rps->flags);
 }
 
+extern const struct intel_display_rps_interface i915_display_rps_interface;
+
 #endif /* INTEL_RPS_H */
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 814b430de960..ac189b90f985 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -81,6 +81,7 @@
 #include "gt/intel_gt_pm.h"
 #include "gt/intel_gt_print.h"
 #include "gt/intel_rc6.h"
+#include "gt/intel_rps.h"
 
 #include "pxp/intel_pxp.h"
 #include "pxp/intel_pxp_debugfs.h"
@@ -752,6 +753,7 @@ static bool fence_support_legacy(struct drm_device *drm)
 static const struct intel_display_parent_interface parent = {
 	.rpm = &i915_display_rpm_interface,
 	.irq = &i915_display_irq_interface,
+	.rps = &i915_display_rps_interface,
 	.vgpu_active = vgpu_active,
 	.fence_support_legacy = fence_support_legacy,
 };
diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
index 11767adb0083..2ea68a31224d 100644
--- a/include/drm/intel/display_parent_interface.h
+++ b/include/drm/intel/display_parent_interface.h
@@ -6,6 +6,7 @@
 
 #include <linux/types.h>
 
+struct dma_fence;
 struct drm_device;
 struct ref_tracker;
 
@@ -30,6 +31,12 @@ struct intel_display_irq_interface {
 	void (*synchronize)(struct drm_device *drm);
 };
 
+struct intel_display_rps_interface {
+	void (*boost)(struct dma_fence *fence);
+	void (*mark_interactive)(struct drm_device *drm, bool interactive);
+	void (*ilk_irq_handler)(struct drm_device *drm);
+};
+
 /**
  * struct intel_display_parent_interface - services parent driver provides to display
  *
@@ -49,6 +56,9 @@ struct intel_display_parent_interface {
 	/** @irq: IRQ interface */
 	const struct intel_display_irq_interface *irq;
 
+	/** @rpm: RPS interface. Optional. */
+	const struct intel_display_rps_interface *rps;
+
 	/** @vgpu_active: Is vGPU active? Optional. */
 	bool (*vgpu_active)(struct drm_device *drm);
 
-- 
2.47.3

[PATCH 08/10] drm/i915/rps: postpone i915 fence check to boost

[Jani Nikula]

Make the RPS boost code independent of i915 request code by moving the
dma_fence_is_i915() check to the RPS boost call.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>

---

I'm not actually sure what the non-i915 fences would be here, and what
kind of overhead they would cause.
---
 drivers/gpu/drm/i915/display/intel_display_rps.c | 4 ----
 drivers/gpu/drm/i915/gt/intel_rps.c              | 7 ++++++-
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_rps.c b/drivers/gpu/drm/i915/display/intel_display_rps.c
index e70c4f0eab80..86e757423c0a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_rps.c
+++ b/drivers/gpu/drm/i915/display/intel_display_rps.c
@@ -9,7 +9,6 @@
 #include <drm/drm_vblank.h>
 
 #include "i915_reg.h"
-#include "i915_request.h"
 #include "intel_display_core.h"
 #include "intel_display_irq.h"
 #include "intel_display_rps.h"
@@ -49,9 +48,6 @@ void intel_display_rps_boost_after_vblank(struct drm_crtc *crtc,
 	if (!intel_parent_rps_available(display))
 		return;
 
-	if (!dma_fence_is_i915(fence))
-		return;
-
 	if (DISPLAY_VER(display) < 6)
 		return;
 
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index 61d746bda462..05b21de6c24b 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -2917,7 +2917,12 @@ EXPORT_SYMBOL_GPL(i915_gpu_turbo_disable);
 
 static void boost(struct dma_fence *fence)
 {
-	struct i915_request *rq = to_request(fence);
+	struct i915_request *rq;
+
+	if (!dma_fence_is_i915(fence))
+		return;
+
+	rq = to_request(fence);
 
 	/*
 	 * If we missed the vblank, but the request is already running it
-- 
2.47.3

[PATCH 09/10] drm/i915: add .fence_priority_display to parent interface

[Jani Nikula]

Add .fence_priority_display() to display parent interface, removing a
display dependency on gem/i915_gem_object.h.

This allows us to remove the xe compat gem/i915_gem_object.h.

v2: Don't mix this with the rps interface (Ville)

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_parent.c         |  6 ++++++
 drivers/gpu/drm/i915/display/intel_parent.h         |  2 ++
 drivers/gpu/drm/i915/display/intel_plane.c          |  5 ++---
 drivers/gpu/drm/i915/i915_driver.c                  |  7 +++++++
 .../xe/compat-i915-headers/gem/i915_gem_object.h    | 13 -------------
 include/drm/intel/display_parent_interface.h        |  3 +++
 6 files changed, 20 insertions(+), 16 deletions(-)
 delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h

diff --git a/drivers/gpu/drm/i915/display/intel_parent.c b/drivers/gpu/drm/i915/display/intel_parent.c
index 9370da9d215c..789bc11a324c 100644
--- a/drivers/gpu/drm/i915/display/intel_parent.c
+++ b/drivers/gpu/drm/i915/display/intel_parent.c
@@ -64,3 +64,9 @@ bool intel_parent_fence_support_legacy(struct intel_display *display)
 {
 	return display->parent->fence_support_legacy && display->parent->fence_support_legacy(display->drm);
 }
+
+void intel_parent_fence_priority_display(struct intel_display *display, struct dma_fence *fence)
+{
+	if (display->parent->fence_priority_display)
+		display->parent->fence_priority_display(fence);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_parent.h b/drivers/gpu/drm/i915/display/intel_parent.h
index 41d6943786fb..b3cce2c6b017 100644
--- a/drivers/gpu/drm/i915/display/intel_parent.h
+++ b/drivers/gpu/drm/i915/display/intel_parent.h
@@ -21,4 +21,6 @@ bool intel_parent_vgpu_active(struct intel_display *display);
 
 bool intel_parent_fence_support_legacy(struct intel_display *display);
 
+void intel_parent_fence_priority_display(struct intel_display *display, struct dma_fence *fence);
+
 #endif /* __INTEL_PARENT_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c
index 5105e3278bc4..a7fec5ba6ac0 100644
--- a/drivers/gpu/drm/i915/display/intel_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_plane.c
@@ -45,7 +45,6 @@
 #include <drm/drm_panic.h>
 #include <drm/drm_print.h>
 
-#include "gem/i915_gem_object.h"
 #include "i9xx_plane_regs.h"
 #include "intel_cdclk.h"
 #include "intel_cursor.h"
@@ -56,6 +55,7 @@
 #include "intel_fb_pin.h"
 #include "intel_fbdev.h"
 #include "intel_panic.h"
+#include "intel_parent.h"
 #include "intel_plane.h"
 #include "intel_psr.h"
 #include "skl_scaler.h"
@@ -1180,8 +1180,7 @@ intel_prepare_plane_fb(struct drm_plane *_plane,
 		goto unpin_fb;
 
 	if (new_plane_state->uapi.fence) {
-		i915_gem_fence_wait_priority_display(new_plane_state->uapi.fence);
-
+		intel_parent_fence_priority_display(display, new_plane_state->uapi.fence);
 		intel_display_rps_boost_after_vblank(new_plane_state->hw.crtc,
 						     new_plane_state->uapi.fence);
 	}
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index ac189b90f985..7cc74b76774a 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -750,12 +750,19 @@ static bool fence_support_legacy(struct drm_device *drm)
 	return intel_gt_support_legacy_fencing(to_gt(to_i915(drm)));
 }
 
+static void fence_priority_display(struct dma_fence *fence)
+{
+	if (dma_fence_is_i915(fence))
+		i915_gem_fence_wait_priority_display(fence);
+}
+
 static const struct intel_display_parent_interface parent = {
 	.rpm = &i915_display_rpm_interface,
 	.irq = &i915_display_irq_interface,
 	.rps = &i915_display_rps_interface,
 	.vgpu_active = vgpu_active,
 	.fence_support_legacy = fence_support_legacy,
+	.fence_priority_display = fence_priority_display,
 };
 
 const struct intel_display_parent_interface *i915_driver_parent_interface(void)
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h b/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h
deleted file mode 100644
index 0548b2e0316f..000000000000
--- a/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/* Copyright © 2025 Intel Corporation */
-
-#ifndef __I915_GEM_OBJECT_H__
-#define __I915_GEM_OBJECT_H__
-
-struct dma_fence;
-
-static inline void i915_gem_fence_wait_priority_display(struct dma_fence *fence)
-{
-}
-
-#endif
diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
index 2ea68a31224d..fd066309184d 100644
--- a/include/drm/intel/display_parent_interface.h
+++ b/include/drm/intel/display_parent_interface.h
@@ -64,6 +64,9 @@ struct intel_display_parent_interface {
 
 	/** @fence_support_legacy: Support legacy fencing? Optional. */
 	bool (*fence_support_legacy)(struct drm_device *drm);
+
+	/** @fence_priority_display: Set display priority. Optional. */
+	void (*fence_priority_display)(struct dma_fence *fence);
 };
 
 #endif
-- 
2.47.3

[PATCH 10/10] drm/xe/rps: build RPS as part of xe

[Jani Nikula]

Reduce the conditional compilation in i915 by building
intel_display_rps.c as part of the xe module. This doesn't actually
enable RPS on xe, because there's no parent interface implementation on
xe side, but it's a step in the right direction.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../gpu/drm/i915/display/intel_display_rps.h  | 21 -------------------
 drivers/gpu/drm/xe/Makefile                   |  1 +
 2 files changed, 1 insertion(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_rps.h b/drivers/gpu/drm/i915/display/intel_display_rps.h
index 183d154f2c7c..96b1fd00ead4 100644
--- a/drivers/gpu/drm/i915/display/intel_display_rps.h
+++ b/drivers/gpu/drm/i915/display/intel_display_rps.h
@@ -13,7 +13,6 @@ struct drm_crtc;
 struct intel_atomic_state;
 struct intel_display;
 
-#ifdef I915
 void intel_display_rps_boost_after_vblank(struct drm_crtc *crtc,
 					  struct dma_fence *fence);
 void intel_display_rps_mark_interactive(struct intel_display *display,
@@ -22,25 +21,5 @@ void intel_display_rps_mark_interactive(struct intel_display *display,
 void ilk_display_rps_enable(struct intel_display *display);
 void ilk_display_rps_disable(struct intel_display *display);
 void ilk_display_rps_irq_handler(struct intel_display *display);
-#else
-static inline void intel_display_rps_boost_after_vblank(struct drm_crtc *crtc,
-							struct dma_fence *fence)
-{
-}
-static inline void intel_display_rps_mark_interactive(struct intel_display *display,
-						      struct intel_atomic_state *state,
-						      bool interactive)
-{
-}
-static inline void ilk_display_rps_enable(struct intel_display *display)
-{
-}
-static inline void ilk_display_rps_disable(struct intel_display *display)
-{
-}
-static inline void ilk_display_rps_irq_handler(struct intel_display *display)
-{
-}
-#endif
 
 #endif /* __INTEL_DISPLAY_RPS_H__ */
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index c2d2303a8198..1a3aa041820d 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -259,6 +259,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
 	i915-display/intel_display_power_map.o \
 	i915-display/intel_display_power_well.o \
 	i915-display/intel_display_rpm.o \
+	i915-display/intel_display_rps.o \
 	i915-display/intel_display_trace.o \
 	i915-display/intel_display_utils.o \
 	i915-display/intel_display_wa.o \
-- 
2.47.3

✗ CI.checkpatch: warning for drm/i915: call irq and rps through the parent interface

[Patchwork]

== Series Details ==

Series: drm/i915: call irq and rps through the parent interface
URL   : https://patchwork.freedesktop.org/series/157576/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
d9120d4d84745cf011b4b3efb338747e69179dfb
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit effe9ae43ab103c2c1ec502ef6081c11b19536f8
Author: Jani Nikula <jani.nikula@intel.com>
Date:   Fri Nov 14 12:26:49 2025 +0200

    drm/xe/rps: build RPS as part of xe
    
    Reduce the conditional compilation in i915 by building
    intel_display_rps.c as part of the xe module. This doesn't actually
    enable RPS on xe, because there's no parent interface implementation on
    xe side, but it's a step in the right direction.
    
    Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+ /mt/dim checkpatch 09454f8115d510182b41dd65a887e1eca1bce610 drm-intel
6369c392b75e drm/{i915, xe}/display: duplicate gen2 irq/error init/reset in display irq
-:63: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#63: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:61:
+	WARN(1,
+		 "Interrupt register 0x%x is not zero: 0x%08x\n",

total: 0 errors, 0 warnings, 1 checks, 203 lines checked
2826709d4bd6 drm/i915/display: convert the display irq interfaces to struct intel_display
97b7784107e0 drm/{i915, xe}/display: move irq calls to parent interface
-:416: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#416: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 511 lines checked
d060f4a25fc6 drm/i915: add .vgpu_active to parent interface
-:133: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#133: 
deleted file mode 100644

total: 0 errors, 1 warnings, 0 checks, 97 lines checked
e91fa2bd8585 drm/i915: add .fence_support_legacy to parent interface
-:58: WARNING:LONG_LINE: line length of 108 exceeds 100 columns
#58: FILE: drivers/gpu/drm/i915/display/intel_parent.c:42:
+	return display->parent->fence_support_legacy && display->parent->fence_support_legacy(display->drm);

-:93: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#93: 
deleted file mode 100644

total: 0 errors, 2 warnings, 0 checks, 65 lines checked
37ed77011b3e drm/i915/rps: store struct dma_fence in struct wait_rps_boost
1218b03e4aa1 drm/i915/rps: call RPS functions via the parent interface
f72d10269968 drm/i915/rps: postpone i915 fence check to boost
eb6a1e4cf71e drm/i915: add .fence_priority_display to parent interface
-:95: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#95: 
deleted file mode 100644

total: 0 errors, 1 warnings, 0 checks, 66 lines checked
effe9ae43ab1 drm/xe/rps: build RPS as part of xe

✓ CI.KUnit: success for drm/i915: call irq and rps through the parent interface

[Patchwork]

== Series Details ==

Series: drm/i915: call irq and rps through the parent interface
URL   : https://patchwork.freedesktop.org/series/157576/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[11:22:55] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:23:00] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:23:38] Starting KUnit Kernel (1/1)...
[11:23:38] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:23:38] ================== guc_buf (11 subtests) ===================
[11:23:38] [PASSED] test_smallest
[11:23:38] [PASSED] test_largest
[11:23:38] [PASSED] test_granular
[11:23:38] [PASSED] test_unique
[11:23:38] [PASSED] test_overlap
[11:23:38] [PASSED] test_reusable
[11:23:38] [PASSED] test_too_big
[11:23:38] [PASSED] test_flush
[11:23:38] [PASSED] test_lookup
[11:23:38] [PASSED] test_data
[11:23:38] [PASSED] test_class
[11:23:38] ===================== [PASSED] guc_buf =====================
[11:23:38] =================== guc_dbm (7 subtests) ===================
[11:23:38] [PASSED] test_empty
[11:23:38] [PASSED] test_default
[11:23:38] ======================== test_size  ========================
[11:23:38] [PASSED] 4
[11:23:38] [PASSED] 8
[11:23:38] [PASSED] 32
[11:23:38] [PASSED] 256
[11:23:38] ==================== [PASSED] test_size ====================
[11:23:38] ======================= test_reuse  ========================
[11:23:38] [PASSED] 4
[11:23:38] [PASSED] 8
[11:23:38] [PASSED] 32
[11:23:38] [PASSED] 256
[11:23:38] =================== [PASSED] test_reuse ====================
[11:23:38] =================== test_range_overlap  ====================
[11:23:38] [PASSED] 4
[11:23:38] [PASSED] 8
[11:23:38] [PASSED] 32
[11:23:38] [PASSED] 256
[11:23:38] =============== [PASSED] test_range_overlap ================
[11:23:38] =================== test_range_compact  ====================
[11:23:38] [PASSED] 4
[11:23:38] [PASSED] 8
[11:23:38] [PASSED] 32
[11:23:38] [PASSED] 256
[11:23:38] =============== [PASSED] test_range_compact ================
[11:23:38] ==================== test_range_spare  =====================
[11:23:38] [PASSED] 4
[11:23:38] [PASSED] 8
[11:23:38] [PASSED] 32
[11:23:38] [PASSED] 256
[11:23:38] ================ [PASSED] test_range_spare =================
[11:23:38] ===================== [PASSED] guc_dbm =====================
[11:23:38] =================== guc_idm (6 subtests) ===================
[11:23:38] [PASSED] bad_init
[11:23:38] [PASSED] no_init
[11:23:38] [PASSED] init_fini
[11:23:38] [PASSED] check_used
[11:23:38] [PASSED] check_quota
[11:23:38] [PASSED] check_all
[11:23:38] ===================== [PASSED] guc_idm =====================
[11:23:38] ================== no_relay (3 subtests) ===================
[11:23:38] [PASSED] xe_drops_guc2pf_if_not_ready
[11:23:38] [PASSED] xe_drops_guc2vf_if_not_ready
[11:23:38] [PASSED] xe_rejects_send_if_not_ready
[11:23:38] ==================== [PASSED] no_relay =====================
[11:23:38] ================== pf_relay (14 subtests) ==================
[11:23:38] [PASSED] pf_rejects_guc2pf_too_short
[11:23:38] [PASSED] pf_rejects_guc2pf_too_long
[11:23:38] [PASSED] pf_rejects_guc2pf_no_payload
[11:23:38] [PASSED] pf_fails_no_payload
[11:23:38] [PASSED] pf_fails_bad_origin
[11:23:38] [PASSED] pf_fails_bad_type
[11:23:38] [PASSED] pf_txn_reports_error
[11:23:38] [PASSED] pf_txn_sends_pf2guc
[11:23:38] [PASSED] pf_sends_pf2guc
[11:23:38] [SKIPPED] pf_loopback_nop
[11:23:38] [SKIPPED] pf_loopback_echo
[11:23:38] [SKIPPED] pf_loopback_fail
[11:23:38] [SKIPPED] pf_loopback_busy
[11:23:38] [SKIPPED] pf_loopback_retry
[11:23:38] ==================== [PASSED] pf_relay =====================
[11:23:38] ================== vf_relay (3 subtests) ===================
[11:23:38] [PASSED] vf_rejects_guc2vf_too_short
[11:23:38] [PASSED] vf_rejects_guc2vf_too_long
[11:23:38] [PASSED] vf_rejects_guc2vf_no_payload
[11:23:38] ==================== [PASSED] vf_relay =====================
[11:23:38] ================ pf_gt_config (6 subtests) =================
[11:23:38] [PASSED] fair_contexts_1vf
[11:23:38] [PASSED] fair_doorbells_1vf
[11:23:38] [PASSED] fair_ggtt_1vf
[11:23:38] ====================== fair_contexts  ======================
[11:23:38] [PASSED] 1 VF
[11:23:38] [PASSED] 2 VFs
[11:23:38] [PASSED] 3 VFs
[11:23:38] [PASSED] 4 VFs
[11:23:38] [PASSED] 5 VFs
[11:23:38] [PASSED] 6 VFs
[11:23:38] [PASSED] 7 VFs
[11:23:38] [PASSED] 8 VFs
[11:23:38] [PASSED] 9 VFs
[11:23:38] [PASSED] 10 VFs
[11:23:38] [PASSED] 11 VFs
[11:23:38] [PASSED] 12 VFs
[11:23:38] [PASSED] 13 VFs
[11:23:38] [PASSED] 14 VFs
[11:23:38] [PASSED] 15 VFs
[11:23:38] [PASSED] 16 VFs
[11:23:38] [PASSED] 17 VFs
[11:23:38] [PASSED] 18 VFs
[11:23:38] [PASSED] 19 VFs
[11:23:38] [PASSED] 20 VFs
[11:23:38] [PASSED] 21 VFs
[11:23:38] [PASSED] 22 VFs
[11:23:38] [PASSED] 23 VFs
[11:23:38] [PASSED] 24 VFs
[11:23:38] [PASSED] 25 VFs
[11:23:38] [PASSED] 26 VFs
[11:23:38] [PASSED] 27 VFs
[11:23:38] [PASSED] 28 VFs
[11:23:38] [PASSED] 29 VFs
[11:23:38] [PASSED] 30 VFs
[11:23:38] [PASSED] 31 VFs
[11:23:38] [PASSED] 32 VFs
[11:23:38] [PASSED] 33 VFs
[11:23:38] [PASSED] 34 VFs
[11:23:38] [PASSED] 35 VFs
[11:23:38] [PASSED] 36 VFs
[11:23:38] [PASSED] 37 VFs
[11:23:38] [PASSED] 38 VFs
[11:23:38] [PASSED] 39 VFs
[11:23:38] [PASSED] 40 VFs
[11:23:38] [PASSED] 41 VFs
[11:23:38] [PASSED] 42 VFs
[11:23:38] [PASSED] 43 VFs
[11:23:38] [PASSED] 44 VFs
[11:23:38] [PASSED] 45 VFs
[11:23:38] [PASSED] 46 VFs
[11:23:38] [PASSED] 47 VFs
[11:23:38] [PASSED] 48 VFs
[11:23:38] [PASSED] 49 VFs
[11:23:38] [PASSED] 50 VFs
[11:23:38] [PASSED] 51 VFs
[11:23:38] [PASSED] 52 VFs
[11:23:38] [PASSED] 53 VFs
[11:23:38] [PASSED] 54 VFs
[11:23:38] [PASSED] 55 VFs
[11:23:38] [PASSED] 56 VFs
[11:23:38] [PASSED] 57 VFs
[11:23:38] [PASSED] 58 VFs
[11:23:38] [PASSED] 59 VFs
[11:23:38] [PASSED] 60 VFs
[11:23:38] [PASSED] 61 VFs
[11:23:38] [PASSED] 62 VFs
[11:23:38] [PASSED] 63 VFs
[11:23:38] ================== [PASSED] fair_contexts ==================
[11:23:38] ===================== fair_doorbells  ======================
[11:23:38] [PASSED] 1 VF
[11:23:38] [PASSED] 2 VFs
[11:23:38] [PASSED] 3 VFs
[11:23:38] [PASSED] 4 VFs
[11:23:38] [PASSED] 5 VFs
[11:23:38] [PASSED] 6 VFs
[11:23:38] [PASSED] 7 VFs
[11:23:38] [PASSED] 8 VFs
[11:23:38] [PASSED] 9 VFs
[11:23:38] [PASSED] 10 VFs
[11:23:38] [PASSED] 11 VFs
[11:23:38] [PASSED] 12 VFs
[11:23:38] [PASSED] 13 VFs
[11:23:38] [PASSED] 14 VFs
[11:23:38] [PASSED] 15 VFs
[11:23:38] [PASSED] 16 VFs
[11:23:38] [PASSED] 17 VFs
[11:23:38] [PASSED] 18 VFs
[11:23:38] [PASSED] 19 VFs
[11:23:38] [PASSED] 20 VFs
[11:23:38] [PASSED] 21 VFs
[11:23:38] [PASSED] 22 VFs
[11:23:38] [PASSED] 23 VFs
[11:23:38] [PASSED] 24 VFs
[11:23:38] [PASSED] 25 VFs
[11:23:38] [PASSED] 26 VFs
[11:23:38] [PASSED] 27 VFs
[11:23:38] [PASSED] 28 VFs
[11:23:38] [PASSED] 29 VFs
[11:23:38] [PASSED] 30 VFs
[11:23:38] [PASSED] 31 VFs
[11:23:38] [PASSED] 32 VFs
[11:23:38] [PASSED] 33 VFs
[11:23:38] [PASSED] 34 VFs
[11:23:38] [PASSED] 35 VFs
[11:23:38] [PASSED] 36 VFs
[11:23:38] [PASSED] 37 VFs
[11:23:38] [PASSED] 38 VFs
[11:23:38] [PASSED] 39 VFs
[11:23:38] [PASSED] 40 VFs
[11:23:38] [PASSED] 41 VFs
[11:23:38] [PASSED] 42 VFs
[11:23:38] [PASSED] 43 VFs
[11:23:38] [PASSED] 44 VFs
[11:23:38] [PASSED] 45 VFs
[11:23:38] [PASSED] 46 VFs
[11:23:38] [PASSED] 47 VFs
[11:23:38] [PASSED] 48 VFs
[11:23:38] [PASSED] 49 VFs
[11:23:38] [PASSED] 50 VFs
[11:23:38] [PASSED] 51 VFs
[11:23:38] [PASSED] 52 VFs
[11:23:38] [PASSED] 53 VFs
[11:23:38] [PASSED] 54 VFs
[11:23:38] [PASSED] 55 VFs
[11:23:38] [PASSED] 56 VFs
[11:23:38] [PASSED] 57 VFs
[11:23:38] [PASSED] 58 VFs
[11:23:38] [PASSED] 59 VFs
[11:23:38] [PASSED] 60 VFs
[11:23:38] [PASSED] 61 VFs
[11:23:38] [PASSED] 62 VFs
[11:23:38] [PASSED] 63 VFs
[11:23:38] ================= [PASSED] fair_doorbells ==================
[11:23:38] ======================== fair_ggtt  ========================
[11:23:38] [PASSED] 1 VF
[11:23:38] [PASSED] 2 VFs
[11:23:38] [PASSED] 3 VFs
[11:23:38] [PASSED] 4 VFs
[11:23:38] [PASSED] 5 VFs
[11:23:38] [PASSED] 6 VFs
[11:23:38] [PASSED] 7 VFs
[11:23:38] [PASSED] 8 VFs
[11:23:38] [PASSED] 9 VFs
[11:23:38] [PASSED] 10 VFs
[11:23:38] [PASSED] 11 VFs
[11:23:38] [PASSED] 12 VFs
[11:23:38] [PASSED] 13 VFs
[11:23:38] [PASSED] 14 VFs
[11:23:38] [PASSED] 15 VFs
[11:23:38] [PASSED] 16 VFs
[11:23:38] [PASSED] 17 VFs
[11:23:38] [PASSED] 18 VFs
[11:23:38] [PASSED] 19 VFs
[11:23:38] [PASSED] 20 VFs
[11:23:38] [PASSED] 21 VFs
[11:23:38] [PASSED] 22 VFs
[11:23:38] [PASSED] 23 VFs
[11:23:38] [PASSED] 24 VFs
[11:23:38] [PASSED] 25 VFs
[11:23:38] [PASSED] 26 VFs
[11:23:38] [PASSED] 27 VFs
[11:23:38] [PASSED] 28 VFs
[11:23:38] [PASSED] 29 VFs
[11:23:38] [PASSED] 30 VFs
[11:23:38] [PASSED] 31 VFs
[11:23:38] [PASSED] 32 VFs
[11:23:38] [PASSED] 33 VFs
[11:23:38] [PASSED] 34 VFs
[11:23:38] [PASSED] 35 VFs
[11:23:38] [PASSED] 36 VFs
[11:23:38] [PASSED] 37 VFs
[11:23:38] [PASSED] 38 VFs
[11:23:38] [PASSED] 39 VFs
[11:23:38] [PASSED] 40 VFs
[11:23:38] [PASSED] 41 VFs
[11:23:38] [PASSED] 42 VFs
[11:23:38] [PASSED] 43 VFs
[11:23:38] [PASSED] 44 VFs
[11:23:38] [PASSED] 45 VFs
[11:23:38] [PASSED] 46 VFs
[11:23:38] [PASSED] 47 VFs
[11:23:38] [PASSED] 48 VFs
[11:23:38] [PASSED] 49 VFs
[11:23:38] [PASSED] 50 VFs
[11:23:38] [PASSED] 51 VFs
[11:23:38] [PASSED] 52 VFs
[11:23:38] [PASSED] 53 VFs
[11:23:38] [PASSED] 54 VFs
[11:23:38] [PASSED] 55 VFs
[11:23:38] [PASSED] 56 VFs
[11:23:38] [PASSED] 57 VFs
[11:23:38] [PASSED] 58 VFs
[11:23:38] [PASSED] 59 VFs
[11:23:38] [PASSED] 60 VFs
[11:23:38] [PASSED] 61 VFs
[11:23:38] [PASSED] 62 VFs
[11:23:38] [PASSED] 63 VFs
[11:23:38] ==================== [PASSED] fair_ggtt ====================
[11:23:38] ================== [PASSED] pf_gt_config ===================
[11:23:38] ===================== lmtt (1 subtest) =====================
[11:23:38] ======================== test_ops  =========================
[11:23:38] [PASSED] 2-level
[11:23:38] [PASSED] multi-level
[11:23:38] ==================== [PASSED] test_ops =====================
[11:23:38] ====================== [PASSED] lmtt =======================
[11:23:38] ================= pf_service (11 subtests) =================
[11:23:38] [PASSED] pf_negotiate_any
[11:23:38] [PASSED] pf_negotiate_base_match
[11:23:38] [PASSED] pf_negotiate_base_newer
[11:23:38] [PASSED] pf_negotiate_base_next
[11:23:38] [SKIPPED] pf_negotiate_base_older
[11:23:38] [PASSED] pf_negotiate_base_prev
[11:23:38] [PASSED] pf_negotiate_latest_match
[11:23:38] [PASSED] pf_negotiate_latest_newer
[11:23:38] [PASSED] pf_negotiate_latest_next
[11:23:38] [SKIPPED] pf_negotiate_latest_older
[11:23:38] [SKIPPED] pf_negotiate_latest_prev
[11:23:38] =================== [PASSED] pf_service ====================
[11:23:38] ================= xe_guc_g2g (2 subtests) ==================
[11:23:38] ============== xe_live_guc_g2g_kunit_default  ==============
[11:23:38] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[11:23:38] ============== xe_live_guc_g2g_kunit_allmem  ===============
[11:23:38] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[11:23:38] =================== [SKIPPED] xe_guc_g2g ===================
[11:23:38] =================== xe_mocs (2 subtests) ===================
[11:23:38] ================ xe_live_mocs_kernel_kunit  ================
[11:23:38] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[11:23:38] ================ xe_live_mocs_reset_kunit  =================
[11:23:38] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[11:23:38] ==================== [SKIPPED] xe_mocs =====================
[11:23:38] ================= xe_migrate (2 subtests) ==================
[11:23:38] ================= xe_migrate_sanity_kunit  =================
[11:23:38] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[11:23:38] ================== xe_validate_ccs_kunit  ==================
[11:23:38] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[11:23:38] =================== [SKIPPED] xe_migrate ===================
[11:23:38] ================== xe_dma_buf (1 subtest) ==================
[11:23:38] ==================== xe_dma_buf_kunit  =====================
[11:23:38] ================ [SKIPPED] xe_dma_buf_kunit ================
[11:23:38] =================== [SKIPPED] xe_dma_buf ===================
[11:23:38] ================= xe_bo_shrink (1 subtest) =================
[11:23:38] =================== xe_bo_shrink_kunit  ====================
[11:23:38] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[11:23:38] ================== [SKIPPED] xe_bo_shrink ==================
[11:23:38] ==================== xe_bo (2 subtests) ====================
[11:23:38] ================== xe_ccs_migrate_kunit  ===================
[11:23:38] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[11:23:38] ==================== xe_bo_evict_kunit  ====================
[11:23:38] =============== [SKIPPED] xe_bo_evict_kunit ================
[11:23:38] ===================== [SKIPPED] xe_bo ======================
[11:23:38] ==================== args (11 subtests) ====================
[11:23:38] [PASSED] count_args_test
[11:23:38] [PASSED] call_args_example
[11:23:38] [PASSED] call_args_test
[11:23:38] [PASSED] drop_first_arg_example
[11:23:38] [PASSED] drop_first_arg_test
[11:23:38] [PASSED] first_arg_example
[11:23:38] [PASSED] first_arg_test
[11:23:38] [PASSED] last_arg_example
[11:23:38] [PASSED] last_arg_test
[11:23:38] [PASSED] pick_arg_example
[11:23:38] [PASSED] sep_comma_example
[11:23:38] ====================== [PASSED] args =======================
[11:23:38] =================== xe_pci (3 subtests) ====================
[11:23:38] ==================== check_graphics_ip  ====================
[11:23:38] [PASSED] 12.00 Xe_LP
[11:23:38] [PASSED] 12.10 Xe_LP+
[11:23:38] [PASSED] 12.55 Xe_HPG
[11:23:38] [PASSED] 12.60 Xe_HPC
[11:23:38] [PASSED] 12.70 Xe_LPG
[11:23:38] [PASSED] 12.71 Xe_LPG
[11:23:38] [PASSED] 12.74 Xe_LPG+
[11:23:38] [PASSED] 20.01 Xe2_HPG
[11:23:38] [PASSED] 20.02 Xe2_HPG
[11:23:38] [PASSED] 20.04 Xe2_LPG
[11:23:38] [PASSED] 30.00 Xe3_LPG
[11:23:38] [PASSED] 30.01 Xe3_LPG
[11:23:38] [PASSED] 30.03 Xe3_LPG
[11:23:38] [PASSED] 30.04 Xe3_LPG
[11:23:38] [PASSED] 30.05 Xe3_LPG
[11:23:38] [PASSED] 35.11 Xe3p_XPC
[11:23:38] ================ [PASSED] check_graphics_ip ================
[11:23:38] ===================== check_media_ip  ======================
[11:23:38] [PASSED] 12.00 Xe_M
[11:23:38] [PASSED] 12.55 Xe_HPM
[11:23:38] [PASSED] 13.00 Xe_LPM+
[11:23:38] [PASSED] 13.01 Xe2_HPM
[11:23:38] [PASSED] 20.00 Xe2_LPM
[11:23:38] [PASSED] 30.00 Xe3_LPM
[11:23:38] [PASSED] 30.02 Xe3_LPM
[11:23:38] [PASSED] 35.00 Xe3p_LPM
[11:23:38] [PASSED] 35.03 Xe3p_HPM
[11:23:38] ================= [PASSED] check_media_ip ==================
[11:23:38] =================== check_platform_desc  ===================
[11:23:38] [PASSED] 0x9A60 (TIGERLAKE)
[11:23:38] [PASSED] 0x9A68 (TIGERLAKE)
[11:23:38] [PASSED] 0x9A70 (TIGERLAKE)
[11:23:38] [PASSED] 0x9A40 (TIGERLAKE)
[11:23:38] [PASSED] 0x9A49 (TIGERLAKE)
[11:23:38] [PASSED] 0x9A59 (TIGERLAKE)
[11:23:38] [PASSED] 0x9A78 (TIGERLAKE)
[11:23:38] [PASSED] 0x9AC0 (TIGERLAKE)
[11:23:38] [PASSED] 0x9AC9 (TIGERLAKE)
[11:23:38] [PASSED] 0x9AD9 (TIGERLAKE)
[11:23:38] [PASSED] 0x9AF8 (TIGERLAKE)
[11:23:38] [PASSED] 0x4C80 (ROCKETLAKE)
[11:23:38] [PASSED] 0x4C8A (ROCKETLAKE)
[11:23:38] [PASSED] 0x4C8B (ROCKETLAKE)
[11:23:38] [PASSED] 0x4C8C (ROCKETLAKE)
[11:23:38] [PASSED] 0x4C90 (ROCKETLAKE)
[11:23:38] [PASSED] 0x4C9A (ROCKETLAKE)
[11:23:38] [PASSED] 0x4680 (ALDERLAKE_S)
[11:23:38] [PASSED] 0x4682 (ALDERLAKE_S)
[11:23:38] [PASSED] 0x4688 (ALDERLAKE_S)
[11:23:38] [PASSED] 0x468A (ALDERLAKE_S)
[11:23:38] [PASSED] 0x468B (ALDERLAKE_S)
[11:23:38] [PASSED] 0x4690 (ALDERLAKE_S)
[11:23:38] [PASSED] 0x4692 (ALDERLAKE_S)
[11:23:38] [PASSED] 0x4693 (ALDERLAKE_S)
[11:23:38] [PASSED] 0x46A0 (ALDERLAKE_P)
[11:23:38] [PASSED] 0x46A1 (ALDERLAKE_P)
[11:23:38] [PASSED] 0x46A2 (ALDERLAKE_P)
[11:23:38] [PASSED] 0x46A3 (ALDERLAKE_P)
[11:23:38] [PASSED] 0x46A6 (ALDERLAKE_P)
[11:23:38] [PASSED] 0x46A8 (ALDERLAKE_P)
[11:23:38] [PASSED] 0x46AA (ALDERLAKE_P)
[11:23:38] [PASSED] 0x462A (ALDERLAKE_P)
[11:23:38] [PASSED] 0x4626 (ALDERLAKE_P)
[11:23:38] [PASSED] 0x4628 (ALDERLAKE_P)
[11:23:38] [PASSED] 0x46B0 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[11:23:38] [PASSED] 0x46B1 (ALDERLAKE_P)
[11:23:38] [PASSED] 0x46B2 (ALDERLAKE_P)
[11:23:38] [PASSED] 0x46B3 (ALDERLAKE_P)
[11:23:38] [PASSED] 0x46C0 (ALDERLAKE_P)
[11:23:38] [PASSED] 0x46C1 (ALDERLAKE_P)
[11:23:38] [PASSED] 0x46C2 (ALDERLAKE_P)
[11:23:38] [PASSED] 0x46C3 (ALDERLAKE_P)
[11:23:38] [PASSED] 0x46D0 (ALDERLAKE_N)
[11:23:38] [PASSED] 0x46D1 (ALDERLAKE_N)
[11:23:38] [PASSED] 0x46D2 (ALDERLAKE_N)
[11:23:38] [PASSED] 0x46D3 (ALDERLAKE_N)
[11:23:38] [PASSED] 0x46D4 (ALDERLAKE_N)
[11:23:38] [PASSED] 0xA721 (ALDERLAKE_P)
[11:23:38] [PASSED] 0xA7A1 (ALDERLAKE_P)
[11:23:38] [PASSED] 0xA7A9 (ALDERLAKE_P)
[11:23:38] [PASSED] 0xA7AC (ALDERLAKE_P)
[11:23:38] [PASSED] 0xA7AD (ALDERLAKE_P)
[11:23:38] [PASSED] 0xA720 (ALDERLAKE_P)
[11:23:38] [PASSED] 0xA7A0 (ALDERLAKE_P)
[11:23:38] [PASSED] 0xA7A8 (ALDERLAKE_P)
[11:23:38] [PASSED] 0xA7AA (ALDERLAKE_P)
[11:23:38] [PASSED] 0xA7AB (ALDERLAKE_P)
[11:23:38] [PASSED] 0xA780 (ALDERLAKE_S)
[11:23:38] [PASSED] 0xA781 (ALDERLAKE_S)
[11:23:38] [PASSED] 0xA782 (ALDERLAKE_S)
[11:23:38] [PASSED] 0xA783 (ALDERLAKE_S)
[11:23:38] [PASSED] 0xA788 (ALDERLAKE_S)
[11:23:38] [PASSED] 0xA789 (ALDERLAKE_S)
[11:23:38] [PASSED] 0xA78A (ALDERLAKE_S)
[11:23:38] [PASSED] 0xA78B (ALDERLAKE_S)
[11:23:38] [PASSED] 0x4905 (DG1)
[11:23:38] [PASSED] 0x4906 (DG1)
[11:23:38] [PASSED] 0x4907 (DG1)
[11:23:38] [PASSED] 0x4908 (DG1)
[11:23:38] [PASSED] 0x4909 (DG1)
[11:23:38] [PASSED] 0x56C0 (DG2)
[11:23:38] [PASSED] 0x56C2 (DG2)
[11:23:38] [PASSED] 0x56C1 (DG2)
[11:23:38] [PASSED] 0x7D51 (METEORLAKE)
[11:23:38] [PASSED] 0x7DD1 (METEORLAKE)
[11:23:38] [PASSED] 0x7D41 (METEORLAKE)
[11:23:38] [PASSED] 0x7D67 (METEORLAKE)
[11:23:38] [PASSED] 0xB640 (METEORLAKE)
[11:23:38] [PASSED] 0x56A0 (DG2)
[11:23:38] [PASSED] 0x56A1 (DG2)
[11:23:38] [PASSED] 0x56A2 (DG2)
[11:23:38] [PASSED] 0x56BE (DG2)
[11:23:38] [PASSED] 0x56BF (DG2)
[11:23:38] [PASSED] 0x5690 (DG2)
[11:23:38] [PASSED] 0x5691 (DG2)
[11:23:38] [PASSED] 0x5692 (DG2)
[11:23:38] [PASSED] 0x56A5 (DG2)
[11:23:38] [PASSED] 0x56A6 (DG2)
[11:23:38] [PASSED] 0x56B0 (DG2)
[11:23:38] [PASSED] 0x56B1 (DG2)
[11:23:38] [PASSED] 0x56BA (DG2)
[11:23:38] [PASSED] 0x56BB (DG2)
[11:23:38] [PASSED] 0x56BC (DG2)
[11:23:38] [PASSED] 0x56BD (DG2)
[11:23:38] [PASSED] 0x5693 (DG2)
[11:23:38] [PASSED] 0x5694 (DG2)
[11:23:38] [PASSED] 0x5695 (DG2)
[11:23:38] [PASSED] 0x56A3 (DG2)
[11:23:38] [PASSED] 0x56A4 (DG2)
[11:23:38] [PASSED] 0x56B2 (DG2)
[11:23:38] [PASSED] 0x56B3 (DG2)
[11:23:38] [PASSED] 0x5696 (DG2)
[11:23:38] [PASSED] 0x5697 (DG2)
[11:23:38] [PASSED] 0xB69 (PVC)
[11:23:38] [PASSED] 0xB6E (PVC)
[11:23:38] [PASSED] 0xBD4 (PVC)
[11:23:38] [PASSED] 0xBD5 (PVC)
[11:23:38] [PASSED] 0xBD6 (PVC)
[11:23:38] [PASSED] 0xBD7 (PVC)
[11:23:38] [PASSED] 0xBD8 (PVC)
[11:23:38] [PASSED] 0xBD9 (PVC)
[11:23:38] [PASSED] 0xBDA (PVC)
[11:23:38] [PASSED] 0xBDB (PVC)
[11:23:38] [PASSED] 0xBE0 (PVC)
[11:23:38] [PASSED] 0xBE1 (PVC)
[11:23:38] [PASSED] 0xBE5 (PVC)
[11:23:38] [PASSED] 0x7D40 (METEORLAKE)
[11:23:38] [PASSED] 0x7D45 (METEORLAKE)
[11:23:38] [PASSED] 0x7D55 (METEORLAKE)
[11:23:38] [PASSED] 0x7D60 (METEORLAKE)
[11:23:38] [PASSED] 0x7DD5 (METEORLAKE)
[11:23:38] [PASSED] 0x6420 (LUNARLAKE)
[11:23:38] [PASSED] 0x64A0 (LUNARLAKE)
[11:23:38] [PASSED] 0x64B0 (LUNARLAKE)
[11:23:38] [PASSED] 0xE202 (BATTLEMAGE)
[11:23:38] [PASSED] 0xE209 (BATTLEMAGE)
[11:23:38] [PASSED] 0xE20B (BATTLEMAGE)
[11:23:38] [PASSED] 0xE20C (BATTLEMAGE)
[11:23:38] [PASSED] 0xE20D (BATTLEMAGE)
[11:23:38] [PASSED] 0xE210 (BATTLEMAGE)
[11:23:38] [PASSED] 0xE211 (BATTLEMAGE)
[11:23:38] [PASSED] 0xE212 (BATTLEMAGE)
[11:23:38] [PASSED] 0xE216 (BATTLEMAGE)
[11:23:38] [PASSED] 0xE220 (BATTLEMAGE)
[11:23:38] [PASSED] 0xE221 (BATTLEMAGE)
[11:23:38] [PASSED] 0xE222 (BATTLEMAGE)
[11:23:38] [PASSED] 0xE223 (BATTLEMAGE)
[11:23:38] [PASSED] 0xB080 (PANTHERLAKE)
[11:23:38] [PASSED] 0xB081 (PANTHERLAKE)
[11:23:38] [PASSED] 0xB082 (PANTHERLAKE)
[11:23:38] [PASSED] 0xB083 (PANTHERLAKE)
[11:23:38] [PASSED] 0xB084 (PANTHERLAKE)
[11:23:38] [PASSED] 0xB085 (PANTHERLAKE)
[11:23:38] [PASSED] 0xB086 (PANTHERLAKE)
[11:23:38] [PASSED] 0xB087 (PANTHERLAKE)
[11:23:38] [PASSED] 0xB08F (PANTHERLAKE)
[11:23:38] [PASSED] 0xB090 (PANTHERLAKE)
[11:23:38] [PASSED] 0xB0A0 (PANTHERLAKE)
[11:23:38] [PASSED] 0xB0B0 (PANTHERLAKE)
[11:23:38] [PASSED] 0xD740 (NOVALAKE_S)
[11:23:38] [PASSED] 0xD741 (NOVALAKE_S)
[11:23:38] [PASSED] 0xD742 (NOVALAKE_S)
[11:23:38] [PASSED] 0xD743 (NOVALAKE_S)
[11:23:38] [PASSED] 0xD744 (NOVALAKE_S)
[11:23:38] [PASSED] 0xD745 (NOVALAKE_S)
[11:23:38] [PASSED] 0x674C (CRESCENTISLAND)
[11:23:38] [PASSED] 0xFD80 (PANTHERLAKE)
[11:23:38] [PASSED] 0xFD81 (PANTHERLAKE)
[11:23:38] =============== [PASSED] check_platform_desc ===============
[11:23:38] ===================== [PASSED] xe_pci ======================
[11:23:38] =================== xe_rtp (2 subtests) ====================
[11:23:38] =============== xe_rtp_process_to_sr_tests  ================
[11:23:38] [PASSED] coalesce-same-reg
[11:23:38] [PASSED] no-match-no-add
[11:23:38] [PASSED] match-or
[11:23:38] [PASSED] match-or-xfail
[11:23:38] [PASSED] no-match-no-add-multiple-rules
[11:23:38] [PASSED] two-regs-two-entries
[11:23:38] [PASSED] clr-one-set-other
[11:23:38] [PASSED] set-field
[11:23:38] [PASSED] conflict-duplicate
[11:23:38] [PASSED] conflict-not-disjoint
[11:23:38] [PASSED] conflict-reg-type
[11:23:38] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[11:23:38] ================== xe_rtp_process_tests  ===================
[11:23:38] [PASSED] active1
[11:23:38] [PASSED] active2
[11:23:38] [PASSED] active-inactive
[11:23:38] [PASSED] inactive-active
[11:23:38] [PASSED] inactive-1st_or_active-inactive
[11:23:38] [PASSED] inactive-2nd_or_active-inactive
[11:23:38] [PASSED] inactive-last_or_active-inactive
[11:23:38] [PASSED] inactive-no_or_active-inactive
[11:23:38] ============== [PASSED] xe_rtp_process_tests ===============
[11:23:38] ===================== [PASSED] xe_rtp ======================
[11:23:38] ==================== xe_wa (1 subtest) =====================
[11:23:38] ======================== xe_wa_gt  =========================
[11:23:38] [PASSED] TIGERLAKE B0
[11:23:38] [PASSED] DG1 A0
[11:23:38] [PASSED] DG1 B0
[11:23:38] [PASSED] ALDERLAKE_S A0
[11:23:38] [PASSED] ALDERLAKE_S B0
[11:23:38] [PASSED] ALDERLAKE_S C0
[11:23:38] [PASSED] ALDERLAKE_S D0
[11:23:38] [PASSED] ALDERLAKE_P A0
[11:23:38] [PASSED] ALDERLAKE_P B0
[11:23:38] [PASSED] ALDERLAKE_P C0
[11:23:38] [PASSED] ALDERLAKE_S RPLS D0
[11:23:38] [PASSED] ALDERLAKE_P RPLU E0
[11:23:38] [PASSED] DG2 G10 C0
[11:23:38] [PASSED] DG2 G11 B1
[11:23:38] [PASSED] DG2 G12 A1
[11:23:38] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:23:38] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:23:38] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[11:23:38] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[11:23:38] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[11:23:38] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[11:23:38] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[11:23:38] ==================== [PASSED] xe_wa_gt =====================
[11:23:38] ====================== [PASSED] xe_wa ======================
[11:23:38] ============================================================
[11:23:38] Testing complete. Ran 510 tests: passed: 492, skipped: 18
[11:23:38] Elapsed time: 42.676s total, 4.239s configuring, 37.969s building, 0.460s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[11:23:38] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:23:40] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:24:05] Starting KUnit Kernel (1/1)...
[11:24:05] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:24:06] ============ drm_test_pick_cmdline (2 subtests) ============
[11:24:06] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[11:24:06] =============== drm_test_pick_cmdline_named  ===============
[11:24:06] [PASSED] NTSC
[11:24:06] [PASSED] NTSC-J
[11:24:06] [PASSED] PAL
[11:24:06] [PASSED] PAL-M
[11:24:06] =========== [PASSED] drm_test_pick_cmdline_named ===========
[11:24:06] ============== [PASSED] drm_test_pick_cmdline ==============
[11:24:06] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[11:24:06] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[11:24:06] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[11:24:06] =========== drm_validate_clone_mode (2 subtests) ===========
[11:24:06] ============== drm_test_check_in_clone_mode  ===============
[11:24:06] [PASSED] in_clone_mode
[11:24:06] [PASSED] not_in_clone_mode
[11:24:06] ========== [PASSED] drm_test_check_in_clone_mode ===========
[11:24:06] =============== drm_test_check_valid_clones  ===============
[11:24:06] [PASSED] not_in_clone_mode
[11:24:06] [PASSED] valid_clone
[11:24:06] [PASSED] invalid_clone
[11:24:06] =========== [PASSED] drm_test_check_valid_clones ===========
[11:24:06] ============= [PASSED] drm_validate_clone_mode =============
[11:24:06] ============= drm_validate_modeset (1 subtest) =============
[11:24:06] [PASSED] drm_test_check_connector_changed_modeset
[11:24:06] ============== [PASSED] drm_validate_modeset ===============
[11:24:06] ====== drm_test_bridge_get_current_state (2 subtests) ======
[11:24:06] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[11:24:06] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[11:24:06] ======== [PASSED] drm_test_bridge_get_current_state ========
[11:24:06] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[11:24:06] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[11:24:06] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[11:24:06] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[11:24:06] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[11:24:06] ============== drm_bridge_alloc (2 subtests) ===============
[11:24:06] [PASSED] drm_test_drm_bridge_alloc_basic
[11:24:06] [PASSED] drm_test_drm_bridge_alloc_get_put
[11:24:06] ================ [PASSED] drm_bridge_alloc =================
[11:24:06] ================== drm_buddy (8 subtests) ==================
[11:24:06] [PASSED] drm_test_buddy_alloc_limit
[11:24:06] [PASSED] drm_test_buddy_alloc_optimistic
[11:24:06] [PASSED] drm_test_buddy_alloc_pessimistic
[11:24:06] [PASSED] drm_test_buddy_alloc_pathological
[11:24:06] [PASSED] drm_test_buddy_alloc_contiguous
[11:24:06] [PASSED] drm_test_buddy_alloc_clear
[11:24:06] [PASSED] drm_test_buddy_alloc_range_bias
[11:24:06] [PASSED] drm_test_buddy_fragmentation_performance
[11:24:06] ==================== [PASSED] drm_buddy ====================
[11:24:06] ============= drm_cmdline_parser (40 subtests) =============
[11:24:06] [PASSED] drm_test_cmdline_force_d_only
[11:24:06] [PASSED] drm_test_cmdline_force_D_only_dvi
[11:24:06] [PASSED] drm_test_cmdline_force_D_only_hdmi
[11:24:06] [PASSED] drm_test_cmdline_force_D_only_not_digital
[11:24:06] [PASSED] drm_test_cmdline_force_e_only
[11:24:06] [PASSED] drm_test_cmdline_res
[11:24:06] [PASSED] drm_test_cmdline_res_vesa
[11:24:06] [PASSED] drm_test_cmdline_res_vesa_rblank
[11:24:06] [PASSED] drm_test_cmdline_res_rblank
[11:24:06] [PASSED] drm_test_cmdline_res_bpp
[11:24:06] [PASSED] drm_test_cmdline_res_refresh
[11:24:06] [PASSED] drm_test_cmdline_res_bpp_refresh
[11:24:06] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[11:24:06] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[11:24:06] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[11:24:06] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[11:24:06] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[11:24:06] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[11:24:06] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[11:24:06] [PASSED] drm_test_cmdline_res_margins_force_on
[11:24:06] [PASSED] drm_test_cmdline_res_vesa_margins
[11:24:06] [PASSED] drm_test_cmdline_name
[11:24:06] [PASSED] drm_test_cmdline_name_bpp
[11:24:06] [PASSED] drm_test_cmdline_name_option
[11:24:06] [PASSED] drm_test_cmdline_name_bpp_option
[11:24:06] [PASSED] drm_test_cmdline_rotate_0
[11:24:06] [PASSED] drm_test_cmdline_rotate_90
[11:24:06] [PASSED] drm_test_cmdline_rotate_180
[11:24:06] [PASSED] drm_test_cmdline_rotate_270
[11:24:06] [PASSED] drm_test_cmdline_hmirror
[11:24:06] [PASSED] drm_test_cmdline_vmirror
[11:24:06] [PASSED] drm_test_cmdline_margin_options
[11:24:06] [PASSED] drm_test_cmdline_multiple_options
[11:24:06] [PASSED] drm_test_cmdline_bpp_extra_and_option
[11:24:06] [PASSED] drm_test_cmdline_extra_and_option
[11:24:06] [PASSED] drm_test_cmdline_freestanding_options
[11:24:06] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[11:24:06] [PASSED] drm_test_cmdline_panel_orientation
[11:24:06] ================ drm_test_cmdline_invalid  =================
[11:24:06] [PASSED] margin_only
[11:24:06] [PASSED] interlace_only
[11:24:06] [PASSED] res_missing_x
[11:24:06] [PASSED] res_missing_y
[11:24:06] [PASSED] res_bad_y
[11:24:06] [PASSED] res_missing_y_bpp
[11:24:06] [PASSED] res_bad_bpp
[11:24:06] [PASSED] res_bad_refresh
[11:24:06] [PASSED] res_bpp_refresh_force_on_off
[11:24:06] [PASSED] res_invalid_mode
[11:24:06] [PASSED] res_bpp_wrong_place_mode
[11:24:06] [PASSED] name_bpp_refresh
[11:24:06] [PASSED] name_refresh
[11:24:06] [PASSED] name_refresh_wrong_mode
[11:24:06] [PASSED] name_refresh_invalid_mode
[11:24:06] [PASSED] rotate_multiple
[11:24:06] [PASSED] rotate_invalid_val
[11:24:06] [PASSED] rotate_truncated
[11:24:06] [PASSED] invalid_option
[11:24:06] [PASSED] invalid_tv_option
[11:24:06] [PASSED] truncated_tv_option
[11:24:06] ============ [PASSED] drm_test_cmdline_invalid =============
[11:24:06] =============== drm_test_cmdline_tv_options  ===============
[11:24:06] [PASSED] NTSC
[11:24:06] [PASSED] NTSC_443
[11:24:06] [PASSED] NTSC_J
[11:24:06] [PASSED] PAL
[11:24:06] [PASSED] PAL_M
[11:24:06] [PASSED] PAL_N
[11:24:06] [PASSED] SECAM
[11:24:06] [PASSED] MONO_525
[11:24:06] [PASSED] MONO_625
[11:24:06] =========== [PASSED] drm_test_cmdline_tv_options ===========
[11:24:06] =============== [PASSED] drm_cmdline_parser ================
[11:24:06] ========== drmm_connector_hdmi_init (20 subtests) ==========
[11:24:06] [PASSED] drm_test_connector_hdmi_init_valid
[11:24:06] [PASSED] drm_test_connector_hdmi_init_bpc_8
[11:24:06] [PASSED] drm_test_connector_hdmi_init_bpc_10
[11:24:06] [PASSED] drm_test_connector_hdmi_init_bpc_12
[11:24:06] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[11:24:06] [PASSED] drm_test_connector_hdmi_init_bpc_null
[11:24:06] [PASSED] drm_test_connector_hdmi_init_formats_empty
[11:24:06] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[11:24:06] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[11:24:06] [PASSED] supported_formats=0x9 yuv420_allowed=1
[11:24:06] [PASSED] supported_formats=0x9 yuv420_allowed=0
[11:24:06] [PASSED] supported_formats=0x3 yuv420_allowed=1
[11:24:06] [PASSED] supported_formats=0x3 yuv420_allowed=0
[11:24:06] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[11:24:06] [PASSED] drm_test_connector_hdmi_init_null_ddc
[11:24:06] [PASSED] drm_test_connector_hdmi_init_null_product
[11:24:06] [PASSED] drm_test_connector_hdmi_init_null_vendor
[11:24:06] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[11:24:06] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[11:24:06] [PASSED] drm_test_connector_hdmi_init_product_valid
[11:24:06] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[11:24:06] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[11:24:06] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[11:24:06] ========= drm_test_connector_hdmi_init_type_valid  =========
[11:24:06] [PASSED] HDMI-A
[11:24:06] [PASSED] HDMI-B
[11:24:06] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[11:24:06] ======== drm_test_connector_hdmi_init_type_invalid  ========
[11:24:06] [PASSED] Unknown
[11:24:06] [PASSED] VGA
[11:24:06] [PASSED] DVI-I
[11:24:06] [PASSED] DVI-D
[11:24:06] [PASSED] DVI-A
[11:24:06] [PASSED] Composite
[11:24:06] [PASSED] SVIDEO
[11:24:06] [PASSED] LVDS
[11:24:06] [PASSED] Component
[11:24:06] [PASSED] DIN
[11:24:06] [PASSED] DP
[11:24:06] [PASSED] TV
[11:24:06] [PASSED] eDP
[11:24:06] [PASSED] Virtual
[11:24:06] [PASSED] DSI
[11:24:06] [PASSED] DPI
[11:24:06] [PASSED] Writeback
[11:24:06] [PASSED] SPI
[11:24:06] [PASSED] USB
[11:24:06] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[11:24:06] ============ [PASSED] drmm_connector_hdmi_init =============
[11:24:06] ============= drmm_connector_init (3 subtests) =============
[11:24:06] [PASSED] drm_test_drmm_connector_init
[11:24:06] [PASSED] drm_test_drmm_connector_init_null_ddc
[11:24:06] ========= drm_test_drmm_connector_init_type_valid  =========
[11:24:06] [PASSED] Unknown
[11:24:06] [PASSED] VGA
[11:24:06] [PASSED] DVI-I
[11:24:06] [PASSED] DVI-D
[11:24:06] [PASSED] DVI-A
[11:24:06] [PASSED] Composite
[11:24:06] [PASSED] SVIDEO
[11:24:06] [PASSED] LVDS
[11:24:06] [PASSED] Component
[11:24:06] [PASSED] DIN
[11:24:06] [PASSED] DP
[11:24:06] [PASSED] HDMI-A
[11:24:06] [PASSED] HDMI-B
[11:24:06] [PASSED] TV
[11:24:06] [PASSED] eDP
[11:24:06] [PASSED] Virtual
[11:24:06] [PASSED] DSI
[11:24:06] [PASSED] DPI
[11:24:06] [PASSED] Writeback
[11:24:06] [PASSED] SPI
[11:24:06] [PASSED] USB
[11:24:06] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[11:24:06] =============== [PASSED] drmm_connector_init ===============
[11:24:06] ========= drm_connector_dynamic_init (6 subtests) ==========
[11:24:06] [PASSED] drm_test_drm_connector_dynamic_init
[11:24:06] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[11:24:06] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[11:24:06] [PASSED] drm_test_drm_connector_dynamic_init_properties
[11:24:06] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[11:24:06] [PASSED] Unknown
[11:24:06] [PASSED] VGA
[11:24:06] [PASSED] DVI-I
[11:24:06] [PASSED] DVI-D
[11:24:06] [PASSED] DVI-A
[11:24:06] [PASSED] Composite
[11:24:06] [PASSED] SVIDEO
[11:24:06] [PASSED] LVDS
[11:24:06] [PASSED] Component
[11:24:06] [PASSED] DIN
[11:24:06] [PASSED] DP
[11:24:06] [PASSED] HDMI-A
[11:24:06] [PASSED] HDMI-B
[11:24:06] [PASSED] TV
[11:24:06] [PASSED] eDP
[11:24:06] [PASSED] Virtual
[11:24:06] [PASSED] DSI
[11:24:06] [PASSED] DPI
[11:24:06] [PASSED] Writeback
[11:24:06] [PASSED] SPI
[11:24:06] [PASSED] USB
[11:24:06] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[11:24:06] ======== drm_test_drm_connector_dynamic_init_name  =========
[11:24:06] [PASSED] Unknown
[11:24:06] [PASSED] VGA
[11:24:06] [PASSED] DVI-I
[11:24:06] [PASSED] DVI-D
[11:24:06] [PASSED] DVI-A
[11:24:06] [PASSED] Composite
[11:24:06] [PASSED] SVIDEO
[11:24:06] [PASSED] LVDS
[11:24:06] [PASSED] Component
[11:24:06] [PASSED] DIN
[11:24:06] [PASSED] DP
[11:24:06] [PASSED] HDMI-A
[11:24:06] [PASSED] HDMI-B
[11:24:06] [PASSED] TV
[11:24:06] [PASSED] eDP
[11:24:06] [PASSED] Virtual
[11:24:06] [PASSED] DSI
[11:24:06] [PASSED] DPI
[11:24:06] [PASSED] Writeback
[11:24:06] [PASSED] SPI
[11:24:06] [PASSED] USB
[11:24:06] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[11:24:06] =========== [PASSED] drm_connector_dynamic_init ============
[11:24:06] ==== drm_connector_dynamic_register_early (4 subtests) =====
[11:24:06] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[11:24:06] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[11:24:06] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[11:24:06] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[11:24:06] ====== [PASSED] drm_connector_dynamic_register_early =======
[11:24:06] ======= drm_connector_dynamic_register (7 subtests) ========
[11:24:06] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[11:24:06] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[11:24:06] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[11:24:06] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[11:24:06] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[11:24:06] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[11:24:06] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[11:24:06] ========= [PASSED] drm_connector_dynamic_register ==========
[11:24:06] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[11:24:06] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[11:24:06] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[11:24:06] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[11:24:06] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[11:24:06] ========== drm_test_get_tv_mode_from_name_valid  ===========
[11:24:06] [PASSED] NTSC
[11:24:06] [PASSED] NTSC-443
[11:24:06] [PASSED] NTSC-J
[11:24:06] [PASSED] PAL
[11:24:06] [PASSED] PAL-M
[11:24:06] [PASSED] PAL-N
[11:24:06] [PASSED] SECAM
[11:24:06] [PASSED] Mono
[11:24:06] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[11:24:06] [PASSED] drm_test_get_tv_mode_from_name_truncated
[11:24:06] ============ [PASSED] drm_get_tv_mode_from_name ============
[11:24:06] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[11:24:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[11:24:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[11:24:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[11:24:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[11:24:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[11:24:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[11:24:06] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[11:24:06] [PASSED] VIC 96
[11:24:06] [PASSED] VIC 97
[11:24:06] [PASSED] VIC 101
[11:24:06] [PASSED] VIC 102
[11:24:06] [PASSED] VIC 106
[11:24:06] [PASSED] VIC 107
[11:24:06] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[11:24:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[11:24:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[11:24:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[11:24:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[11:24:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[11:24:06] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[11:24:06] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[11:24:06] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[11:24:06] [PASSED] Automatic
[11:24:06] [PASSED] Full
[11:24:06] [PASSED] Limited 16:235
[11:24:06] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[11:24:06] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[11:24:06] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[11:24:06] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[11:24:06] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[11:24:06] [PASSED] RGB
[11:24:06] [PASSED] YUV 4:2:0
[11:24:06] [PASSED] YUV 4:2:2
[11:24:06] [PASSED] YUV 4:4:4
[11:24:06] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[11:24:06] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[11:24:06] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[11:24:06] ============= drm_damage_helper (21 subtests) ==============
[11:24:06] [PASSED] drm_test_damage_iter_no_damage
[11:24:06] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[11:24:06] [PASSED] drm_test_damage_iter_no_damage_src_moved
[11:24:06] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[11:24:06] [PASSED] drm_test_damage_iter_no_damage_not_visible
[11:24:06] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[11:24:06] [PASSED] drm_test_damage_iter_no_damage_no_fb
[11:24:06] [PASSED] drm_test_damage_iter_simple_damage
[11:24:06] [PASSED] drm_test_damage_iter_single_damage
[11:24:06] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[11:24:06] [PASSED] drm_test_damage_iter_single_damage_outside_src
[11:24:06] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[11:24:06] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[11:24:06] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[11:24:06] [PASSED] drm_test_damage_iter_single_damage_src_moved
[11:24:06] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[11:24:06] [PASSED] drm_test_damage_iter_damage
[11:24:06] [PASSED] drm_test_damage_iter_damage_one_intersect
[11:24:06] [PASSED] drm_test_damage_iter_damage_one_outside
[11:24:06] [PASSED] drm_test_damage_iter_damage_src_moved
[11:24:06] [PASSED] drm_test_damage_iter_damage_not_visible
[11:24:06] ================ [PASSED] drm_damage_helper ================
[11:24:06] ============== drm_dp_mst_helper (3 subtests) ==============
[11:24:06] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[11:24:06] [PASSED] Clock 154000 BPP 30 DSC disabled
[11:24:06] [PASSED] Clock 234000 BPP 30 DSC disabled
[11:24:06] [PASSED] Clock 297000 BPP 24 DSC disabled
[11:24:06] [PASSED] Clock 332880 BPP 24 DSC enabled
[11:24:06] [PASSED] Clock 324540 BPP 24 DSC enabled
[11:24:06] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[11:24:06] ============== drm_test_dp_mst_calc_pbn_div  ===============
[11:24:06] [PASSED] Link rate 2000000 lane count 4
[11:24:06] [PASSED] Link rate 2000000 lane count 2
[11:24:06] [PASSED] Link rate 2000000 lane count 1
[11:24:06] [PASSED] Link rate 1350000 lane count 4
[11:24:06] [PASSED] Link rate 1350000 lane count 2
[11:24:06] [PASSED] Link rate 1350000 lane count 1
[11:24:06] [PASSED] Link rate 1000000 lane count 4
[11:24:06] [PASSED] Link rate 1000000 lane count 2
[11:24:06] [PASSED] Link rate 1000000 lane count 1
[11:24:06] [PASSED] Link rate 810000 lane count 4
[11:24:06] [PASSED] Link rate 810000 lane count 2
[11:24:06] [PASSED] Link rate 810000 lane count 1
[11:24:06] [PASSED] Link rate 540000 lane count 4
[11:24:06] [PASSED] Link rate 540000 lane count 2
[11:24:06] [PASSED] Link rate 540000 lane count 1
[11:24:06] [PASSED] Link rate 270000 lane count 4
[11:24:06] [PASSED] Link rate 270000 lane count 2
[11:24:06] [PASSED] Link rate 270000 lane count 1
[11:24:06] [PASSED] Link rate 162000 lane count 4
[11:24:06] [PASSED] Link rate 162000 lane count 2
[11:24:06] [PASSED] Link rate 162000 lane count 1
[11:24:06] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[11:24:06] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[11:24:06] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[11:24:06] [PASSED] DP_POWER_UP_PHY with port number
[11:24:06] [PASSED] DP_POWER_DOWN_PHY with port number
[11:24:06] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[11:24:06] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[11:24:06] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[11:24:06] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[11:24:06] [PASSED] DP_QUERY_PAYLOAD with port number
[11:24:06] [PASSED] DP_QUERY_PAYLOAD with VCPI
[11:24:06] [PASSED] DP_REMOTE_DPCD_READ with port number
[11:24:06] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[11:24:06] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[11:24:06] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[11:24:06] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[11:24:06] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[11:24:06] [PASSED] DP_REMOTE_I2C_READ with port number
[11:24:06] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[11:24:06] [PASSED] DP_REMOTE_I2C_READ with transactions array
[11:24:06] [PASSED] DP_REMOTE_I2C_WRITE with port number
[11:24:06] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[11:24:06] [PASSED] DP_REMOTE_I2C_WRITE with data array
[11:24:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[11:24:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[11:24:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[11:24:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[11:24:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[11:24:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[11:24:06] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[11:24:06] ================ [PASSED] drm_dp_mst_helper ================
[11:24:06] ================== drm_exec (7 subtests) ===================
[11:24:06] [PASSED] sanitycheck
[11:24:06] [PASSED] test_lock
[11:24:06] [PASSED] test_lock_unlock
[11:24:06] [PASSED] test_duplicates
[11:24:06] [PASSED] test_prepare
[11:24:06] [PASSED] test_prepare_array
[11:24:06] [PASSED] test_multiple_loops
[11:24:06] ==================== [PASSED] drm_exec =====================
[11:24:06] =========== drm_format_helper_test (17 subtests) ===========
[11:24:06] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[11:24:06] [PASSED] single_pixel_source_buffer
[11:24:06] [PASSED] single_pixel_clip_rectangle
[11:24:06] [PASSED] well_known_colors
[11:24:06] [PASSED] destination_pitch
[11:24:06] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[11:24:06] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[11:24:06] [PASSED] single_pixel_source_buffer
[11:24:06] [PASSED] single_pixel_clip_rectangle
[11:24:06] [PASSED] well_known_colors
[11:24:06] [PASSED] destination_pitch
[11:24:06] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[11:24:06] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[11:24:06] [PASSED] single_pixel_source_buffer
[11:24:06] [PASSED] single_pixel_clip_rectangle
[11:24:06] [PASSED] well_known_colors
[11:24:06] [PASSED] destination_pitch
[11:24:06] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[11:24:06] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[11:24:06] [PASSED] single_pixel_source_buffer
[11:24:06] [PASSED] single_pixel_clip_rectangle
[11:24:06] [PASSED] well_known_colors
[11:24:06] [PASSED] destination_pitch
[11:24:06] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[11:24:06] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[11:24:06] [PASSED] single_pixel_source_buffer
[11:24:06] [PASSED] single_pixel_clip_rectangle
[11:24:06] [PASSED] well_known_colors
[11:24:06] [PASSED] destination_pitch
[11:24:06] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[11:24:06] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[11:24:06] [PASSED] single_pixel_source_buffer
[11:24:06] [PASSED] single_pixel_clip_rectangle
[11:24:06] [PASSED] well_known_colors
[11:24:06] [PASSED] destination_pitch
[11:24:06] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[11:24:06] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[11:24:06] [PASSED] single_pixel_source_buffer
[11:24:06] [PASSED] single_pixel_clip_rectangle
[11:24:06] [PASSED] well_known_colors
[11:24:06] [PASSED] destination_pitch
[11:24:06] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[11:24:06] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[11:24:06] [PASSED] single_pixel_source_buffer
[11:24:06] [PASSED] single_pixel_clip_rectangle
[11:24:06] [PASSED] well_known_colors
[11:24:06] [PASSED] destination_pitch
[11:24:06] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[11:24:06] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[11:24:06] [PASSED] single_pixel_source_buffer
[11:24:06] [PASSED] single_pixel_clip_rectangle
[11:24:06] [PASSED] well_known_colors
[11:24:06] [PASSED] destination_pitch
[11:24:06] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[11:24:06] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[11:24:06] [PASSED] single_pixel_source_buffer
[11:24:06] [PASSED] single_pixel_clip_rectangle
[11:24:06] [PASSED] well_known_colors
[11:24:06] [PASSED] destination_pitch
[11:24:06] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[11:24:06] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[11:24:06] [PASSED] single_pixel_source_buffer
[11:24:06] [PASSED] single_pixel_clip_rectangle
[11:24:06] [PASSED] well_known_colors
[11:24:06] [PASSED] destination_pitch
[11:24:06] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[11:24:06] ============== drm_test_fb_xrgb8888_to_mono  ===============
[11:24:06] [PASSED] single_pixel_source_buffer
[11:24:06] [PASSED] single_pixel_clip_rectangle
[11:24:06] [PASSED] well_known_colors
[11:24:06] [PASSED] destination_pitch
[11:24:06] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[11:24:06] ==================== drm_test_fb_swab  =====================
[11:24:06] [PASSED] single_pixel_source_buffer
[11:24:06] [PASSED] single_pixel_clip_rectangle
[11:24:06] [PASSED] well_known_colors
[11:24:06] [PASSED] destination_pitch
[11:24:06] ================ [PASSED] drm_test_fb_swab =================
[11:24:06] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[11:24:06] [PASSED] single_pixel_source_buffer
[11:24:06] [PASSED] single_pixel_clip_rectangle
[11:24:06] [PASSED] well_known_colors
[11:24:06] [PASSED] destination_pitch
[11:24:06] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[11:24:06] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[11:24:06] [PASSED] single_pixel_source_buffer
[11:24:06] [PASSED] single_pixel_clip_rectangle
[11:24:06] [PASSED] well_known_colors
[11:24:06] [PASSED] destination_pitch
[11:24:06] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[11:24:06] ================= drm_test_fb_clip_offset  =================
[11:24:06] [PASSED] pass through
[11:24:06] [PASSED] horizontal offset
[11:24:06] [PASSED] vertical offset
[11:24:06] [PASSED] horizontal and vertical offset
[11:24:06] [PASSED] horizontal offset (custom pitch)
[11:24:06] [PASSED] vertical offset (custom pitch)
[11:24:06] [PASSED] horizontal and vertical offset (custom pitch)
[11:24:06] ============= [PASSED] drm_test_fb_clip_offset =============
[11:24:06] =================== drm_test_fb_memcpy  ====================
[11:24:06] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[11:24:06] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[11:24:06] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[11:24:06] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[11:24:06] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[11:24:06] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[11:24:06] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[11:24:06] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[11:24:06] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[11:24:06] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[11:24:06] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[11:24:06] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[11:24:06] =============== [PASSED] drm_test_fb_memcpy ================
[11:24:06] ============= [PASSED] drm_format_helper_test ==============
[11:24:06] ================= drm_format (18 subtests) =================
[11:24:06] [PASSED] drm_test_format_block_width_invalid
[11:24:06] [PASSED] drm_test_format_block_width_one_plane
[11:24:06] [PASSED] drm_test_format_block_width_two_plane
[11:24:06] [PASSED] drm_test_format_block_width_three_plane
[11:24:06] [PASSED] drm_test_format_block_width_tiled
[11:24:06] [PASSED] drm_test_format_block_height_invalid
[11:24:06] [PASSED] drm_test_format_block_height_one_plane
[11:24:06] [PASSED] drm_test_format_block_height_two_plane
[11:24:06] [PASSED] drm_test_format_block_height_three_plane
[11:24:06] [PASSED] drm_test_format_block_height_tiled
[11:24:06] [PASSED] drm_test_format_min_pitch_invalid
[11:24:06] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[11:24:06] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[11:24:06] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[11:24:06] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[11:24:06] [PASSED] drm_test_format_min_pitch_two_plane
[11:24:06] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[11:24:06] [PASSED] drm_test_format_min_pitch_tiled
[11:24:06] =================== [PASSED] drm_format ====================
[11:24:06] ============== drm_framebuffer (10 subtests) ===============
[11:24:06] ========== drm_test_framebuffer_check_src_coords  ==========
[11:24:06] [PASSED] Success: source fits into fb
[11:24:06] [PASSED] Fail: overflowing fb with x-axis coordinate
[11:24:06] [PASSED] Fail: overflowing fb with y-axis coordinate
[11:24:06] [PASSED] Fail: overflowing fb with source width
[11:24:06] [PASSED] Fail: overflowing fb with source height
[11:24:06] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[11:24:06] [PASSED] drm_test_framebuffer_cleanup
[11:24:06] =============== drm_test_framebuffer_create  ===============
[11:24:06] [PASSED] ABGR8888 normal sizes
[11:24:06] [PASSED] ABGR8888 max sizes
[11:24:06] [PASSED] ABGR8888 pitch greater than min required
[11:24:06] [PASSED] ABGR8888 pitch less than min required
[11:24:06] [PASSED] ABGR8888 Invalid width
[11:24:06] [PASSED] ABGR8888 Invalid buffer handle
[11:24:06] [PASSED] No pixel format
[11:24:06] [PASSED] ABGR8888 Width 0
[11:24:06] [PASSED] ABGR8888 Height 0
[11:24:06] [PASSED] ABGR8888 Out of bound height * pitch combination
[11:24:06] [PASSED] ABGR8888 Large buffer offset
[11:24:06] [PASSED] ABGR8888 Buffer offset for inexistent plane
[11:24:06] [PASSED] ABGR8888 Invalid flag
[11:24:06] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[11:24:06] [PASSED] ABGR8888 Valid buffer modifier
[11:24:06] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[11:24:06] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[11:24:06] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[11:24:06] [PASSED] NV12 Normal sizes
[11:24:06] [PASSED] NV12 Max sizes
[11:24:06] [PASSED] NV12 Invalid pitch
[11:24:06] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[11:24:06] [PASSED] NV12 different  modifier per-plane
[11:24:06] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[11:24:06] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[11:24:06] [PASSED] NV12 Modifier for inexistent plane
[11:24:06] [PASSED] NV12 Handle for inexistent plane
[11:24:06] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[11:24:06] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[11:24:06] [PASSED] YVU420 Normal sizes
[11:24:06] [PASSED] YVU420 Max sizes
[11:24:06] [PASSED] YVU420 Invalid pitch
[11:24:06] [PASSED] YVU420 Different pitches
[11:24:06] [PASSED] YVU420 Different buffer offsets/pitches
[11:24:06] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[11:24:06] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[11:24:06] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[11:24:06] [PASSED] YVU420 Valid modifier
[11:24:06] [PASSED] YVU420 Different modifiers per plane
[11:24:06] [PASSED] YVU420 Modifier for inexistent plane
[11:24:06] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[11:24:06] [PASSED] X0L2 Normal sizes
[11:24:06] [PASSED] X0L2 Max sizes
[11:24:06] [PASSED] X0L2 Invalid pitch
[11:24:06] [PASSED] X0L2 Pitch greater than minimum required
[11:24:06] [PASSED] X0L2 Handle for inexistent plane
[11:24:06] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[11:24:06] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[11:24:06] [PASSED] X0L2 Valid modifier
[11:24:06] [PASSED] X0L2 Modifier for inexistent plane
[11:24:06] =========== [PASSED] drm_test_framebuffer_create ===========
[11:24:06] [PASSED] drm_test_framebuffer_free
[11:24:06] [PASSED] drm_test_framebuffer_init
[11:24:06] [PASSED] drm_test_framebuffer_init_bad_format
[11:24:06] [PASSED] drm_test_framebuffer_init_dev_mismatch
[11:24:06] [PASSED] drm_test_framebuffer_lookup
[11:24:06] [PASSED] drm_test_framebuffer_lookup_inexistent
[11:24:06] [PASSED] drm_test_framebuffer_modifiers_not_supported
[11:24:06] ================= [PASSED] drm_framebuffer =================
[11:24:06] ================ drm_gem_shmem (8 subtests) ================
[11:24:06] [PASSED] drm_gem_shmem_test_obj_create
[11:24:06] [PASSED] drm_gem_shmem_test_obj_create_private
[11:24:06] [PASSED] drm_gem_shmem_test_pin_pages
[11:24:06] [PASSED] drm_gem_shmem_test_vmap
[11:24:06] [PASSED] drm_gem_shmem_test_get_pages_sgt
[11:24:06] [PASSED] drm_gem_shmem_test_get_sg_table
[11:24:06] [PASSED] drm_gem_shmem_test_madvise
[11:24:06] [PASSED] drm_gem_shmem_test_purge
[11:24:06] ================== [PASSED] drm_gem_shmem ==================
[11:24:06] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[11:24:06] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[11:24:06] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[11:24:06] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[11:24:06] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[11:24:06] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[11:24:06] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[11:24:06] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[11:24:06] [PASSED] Automatic
[11:24:06] [PASSED] Full
[11:24:06] [PASSED] Limited 16:235
[11:24:06] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[11:24:06] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[11:24:06] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[11:24:06] [PASSED] drm_test_check_disable_connector
[11:24:06] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[11:24:06] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[11:24:06] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[11:24:06] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[11:24:06] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[11:24:06] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[11:24:06] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[11:24:06] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[11:24:06] [PASSED] drm_test_check_output_bpc_dvi
[11:24:06] [PASSED] drm_test_check_output_bpc_format_vic_1
[11:24:06] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[11:24:06] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[11:24:06] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[11:24:06] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[11:24:06] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[11:24:06] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[11:24:06] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[11:24:06] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[11:24:06] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[11:24:06] [PASSED] drm_test_check_broadcast_rgb_value
[11:24:06] [PASSED] drm_test_check_bpc_8_value
[11:24:06] [PASSED] drm_test_check_bpc_10_value
[11:24:06] [PASSED] drm_test_check_bpc_12_value
[11:24:06] [PASSED] drm_test_check_format_value
[11:24:06] [PASSED] drm_test_check_tmds_char_value
[11:24:06] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[11:24:06] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[11:24:06] [PASSED] drm_test_check_mode_valid
[11:24:06] [PASSED] drm_test_check_mode_valid_reject
[11:24:06] [PASSED] drm_test_check_mode_valid_reject_rate
[11:24:06] [PASSED] drm_test_check_mode_valid_reject_max_clock
[11:24:06] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[11:24:06] ================= drm_managed (2 subtests) =================
[11:24:06] [PASSED] drm_test_managed_release_action
[11:24:06] [PASSED] drm_test_managed_run_action
[11:24:06] =================== [PASSED] drm_managed ===================
[11:24:06] =================== drm_mm (6 subtests) ====================
[11:24:06] [PASSED] drm_test_mm_init
[11:24:06] [PASSED] drm_test_mm_debug
[11:24:06] [PASSED] drm_test_mm_align32
[11:24:06] [PASSED] drm_test_mm_align64
[11:24:06] [PASSED] drm_test_mm_lowest
[11:24:06] [PASSED] drm_test_mm_highest
[11:24:06] ===================== [PASSED] drm_mm ======================
[11:24:06] ============= drm_modes_analog_tv (5 subtests) =============
[11:24:06] [PASSED] drm_test_modes_analog_tv_mono_576i
[11:24:06] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[11:24:06] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[11:24:06] [PASSED] drm_test_modes_analog_tv_pal_576i
[11:24:06] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[11:24:06] =============== [PASSED] drm_modes_analog_tv ===============
[11:24:06] ============== drm_plane_helper (2 subtests) ===============
[11:24:06] =============== drm_test_check_plane_state  ================
[11:24:06] [PASSED] clipping_simple
[11:24:06] [PASSED] clipping_rotate_reflect
[11:24:06] [PASSED] positioning_simple
[11:24:06] [PASSED] upscaling
[11:24:06] [PASSED] downscaling
[11:24:06] [PASSED] rounding1
[11:24:06] [PASSED] rounding2
[11:24:06] [PASSED] rounding3
[11:24:06] [PASSED] rounding4
[11:24:06] =========== [PASSED] drm_test_check_plane_state ============
[11:24:06] =========== drm_test_check_invalid_plane_state  ============
[11:24:06] [PASSED] positioning_invalid
[11:24:06] [PASSED] upscaling_invalid
[11:24:06] [PASSED] downscaling_invalid
[11:24:06] ======= [PASSED] drm_test_check_invalid_plane_state ========
[11:24:06] ================ [PASSED] drm_plane_helper =================
[11:24:06] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[11:24:06] ====== drm_test_connector_helper_tv_get_modes_check  =======
[11:24:06] [PASSED] None
[11:24:06] [PASSED] PAL
[11:24:06] [PASSED] NTSC
[11:24:06] [PASSED] Both, NTSC Default
[11:24:06] [PASSED] Both, PAL Default
[11:24:06] [PASSED] Both, NTSC Default, with PAL on command-line
[11:24:06] [PASSED] Both, PAL Default, with NTSC on command-line
[11:24:06] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[11:24:06] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[11:24:06] ================== drm_rect (9 subtests) ===================
[11:24:06] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[11:24:06] [PASSED] drm_test_rect_clip_scaled_not_clipped
[11:24:06] [PASSED] drm_test_rect_clip_scaled_clipped
[11:24:06] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[11:24:06] ================= drm_test_rect_intersect  =================
[11:24:06] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[11:24:06] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[11:24:06] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[11:24:06] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[11:24:06] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[11:24:06] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[11:24:06] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[11:24:06] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[11:24:06] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[11:24:06] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[11:24:06] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[11:24:06] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[11:24:06] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[11:24:06] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[11:24:06] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[11:24:06] ============= [PASSED] drm_test_rect_intersect =============
[11:24:06] ================ drm_test_rect_calc_hscale  ================
[11:24:06] [PASSED] normal use
[11:24:06] [PASSED] out of max range
[11:24:06] [PASSED] out of min range
[11:24:06] [PASSED] zero dst
[11:24:06] [PASSED] negative src
[11:24:06] [PASSED] negative dst
[11:24:06] ============ [PASSED] drm_test_rect_calc_hscale ============
[11:24:06] ================ drm_test_rect_calc_vscale  ================
[11:24:06] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[11:24:06] [PASSED] out of max range
[11:24:06] [PASSED] out of min range
[11:24:06] [PASSED] zero dst
[11:24:06] [PASSED] negative src
[11:24:06] [PASSED] negative dst
[11:24:06] ============ [PASSED] drm_test_rect_calc_vscale ============
[11:24:06] ================== drm_test_rect_rotate  ===================
[11:24:06] [PASSED] reflect-x
[11:24:06] [PASSED] reflect-y
[11:24:06] [PASSED] rotate-0
[11:24:06] [PASSED] rotate-90
[11:24:06] [PASSED] rotate-180
[11:24:06] [PASSED] rotate-270
[11:24:06] ============== [PASSED] drm_test_rect_rotate ===============
[11:24:06] ================ drm_test_rect_rotate_inv  =================
[11:24:06] [PASSED] reflect-x
[11:24:06] [PASSED] reflect-y
[11:24:06] [PASSED] rotate-0
[11:24:06] [PASSED] rotate-90
[11:24:06] [PASSED] rotate-180
[11:24:06] [PASSED] rotate-270
[11:24:06] ============ [PASSED] drm_test_rect_rotate_inv =============
[11:24:06] ==================== [PASSED] drm_rect =====================
[11:24:06] ============ drm_sysfb_modeset_test (1 subtest) ============
[11:24:06] ============ drm_test_sysfb_build_fourcc_list  =============
[11:24:06] [PASSED] no native formats
[11:24:06] [PASSED] XRGB8888 as native format
[11:24:06] [PASSED] remove duplicates
[11:24:06] [PASSED] convert alpha formats
[11:24:06] [PASSED] random formats
[11:24:06] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[11:24:06] ============= [PASSED] drm_sysfb_modeset_test ==============
[11:24:06] ============================================================
[11:24:06] Testing complete. Ran 622 tests: passed: 622
[11:24:06] Elapsed time: 27.612s total, 1.671s configuring, 25.522s building, 0.396s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[11:24:06] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:24:08] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:24:17] Starting KUnit Kernel (1/1)...
[11:24:17] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:24:17] ================= ttm_device (5 subtests) ==================
[11:24:17] [PASSED] ttm_device_init_basic
[11:24:17] [PASSED] ttm_device_init_multiple
[11:24:17] [PASSED] ttm_device_fini_basic
[11:24:17] [PASSED] ttm_device_init_no_vma_man
[11:24:17] ================== ttm_device_init_pools  ==================
[11:24:17] [PASSED] No DMA allocations, no DMA32 required
[11:24:17] [PASSED] DMA allocations, DMA32 required
[11:24:17] [PASSED] No DMA allocations, DMA32 required
[11:24:17] [PASSED] DMA allocations, no DMA32 required
[11:24:17] ============== [PASSED] ttm_device_init_pools ==============
[11:24:17] =================== [PASSED] ttm_device ====================
[11:24:17] ================== ttm_pool (8 subtests) ===================
[11:24:17] ================== ttm_pool_alloc_basic  ===================
[11:24:17] [PASSED] One page
[11:24:17] [PASSED] More than one page
[11:24:17] [PASSED] Above the allocation limit
[11:24:17] [PASSED] One page, with coherent DMA mappings enabled
[11:24:17] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:24:17] ============== [PASSED] ttm_pool_alloc_basic ===============
[11:24:17] ============== ttm_pool_alloc_basic_dma_addr  ==============
[11:24:17] [PASSED] One page
[11:24:17] [PASSED] More than one page
[11:24:17] [PASSED] Above the allocation limit
[11:24:17] [PASSED] One page, with coherent DMA mappings enabled
[11:24:17] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:24:17] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[11:24:17] [PASSED] ttm_pool_alloc_order_caching_match
[11:24:17] [PASSED] ttm_pool_alloc_caching_mismatch
[11:24:17] [PASSED] ttm_pool_alloc_order_mismatch
[11:24:17] [PASSED] ttm_pool_free_dma_alloc
[11:24:17] [PASSED] ttm_pool_free_no_dma_alloc
[11:24:17] [PASSED] ttm_pool_fini_basic
[11:24:17] ==================== [PASSED] ttm_pool =====================
[11:24:17] ================ ttm_resource (8 subtests) =================
[11:24:17] ================= ttm_resource_init_basic  =================
[11:24:17] [PASSED] Init resource in TTM_PL_SYSTEM
[11:24:17] [PASSED] Init resource in TTM_PL_VRAM
[11:24:17] [PASSED] Init resource in a private placement
[11:24:17] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[11:24:17] ============= [PASSED] ttm_resource_init_basic =============
[11:24:17] [PASSED] ttm_resource_init_pinned
[11:24:17] [PASSED] ttm_resource_fini_basic
[11:24:17] [PASSED] ttm_resource_manager_init_basic
[11:24:17] [PASSED] ttm_resource_manager_usage_basic
[11:24:17] [PASSED] ttm_resource_manager_set_used_basic
[11:24:17] [PASSED] ttm_sys_man_alloc_basic
[11:24:17] [PASSED] ttm_sys_man_free_basic
[11:24:17] ================== [PASSED] ttm_resource ===================
[11:24:17] =================== ttm_tt (15 subtests) ===================
[11:24:17] ==================== ttm_tt_init_basic  ====================
[11:24:17] [PASSED] Page-aligned size
[11:24:17] [PASSED] Extra pages requested
[11:24:17] ================ [PASSED] ttm_tt_init_basic ================
[11:24:17] [PASSED] ttm_tt_init_misaligned
[11:24:17] [PASSED] ttm_tt_fini_basic
[11:24:17] [PASSED] ttm_tt_fini_sg
[11:24:17] [PASSED] ttm_tt_fini_shmem
[11:24:17] [PASSED] ttm_tt_create_basic
[11:24:17] [PASSED] ttm_tt_create_invalid_bo_type
[11:24:17] [PASSED] ttm_tt_create_ttm_exists
[11:24:17] [PASSED] ttm_tt_create_failed
[11:24:17] [PASSED] ttm_tt_destroy_basic
[11:24:17] [PASSED] ttm_tt_populate_null_ttm
[11:24:17] [PASSED] ttm_tt_populate_populated_ttm
[11:24:17] [PASSED] ttm_tt_unpopulate_basic
[11:24:17] [PASSED] ttm_tt_unpopulate_empty_ttm
[11:24:17] [PASSED] ttm_tt_swapin_basic
[11:24:17] ===================== [PASSED] ttm_tt ======================
[11:24:17] =================== ttm_bo (14 subtests) ===================
[11:24:17] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[11:24:17] [PASSED] Cannot be interrupted and sleeps
[11:24:17] [PASSED] Cannot be interrupted, locks straight away
[11:24:17] [PASSED] Can be interrupted, sleeps
[11:24:17] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[11:24:17] [PASSED] ttm_bo_reserve_locked_no_sleep
[11:24:17] [PASSED] ttm_bo_reserve_no_wait_ticket
[11:24:17] [PASSED] ttm_bo_reserve_double_resv
[11:24:17] [PASSED] ttm_bo_reserve_interrupted
[11:24:17] [PASSED] ttm_bo_reserve_deadlock
[11:24:17] [PASSED] ttm_bo_unreserve_basic
[11:24:17] [PASSED] ttm_bo_unreserve_pinned
[11:24:17] [PASSED] ttm_bo_unreserve_bulk
[11:24:17] [PASSED] ttm_bo_fini_basic
[11:24:17] [PASSED] ttm_bo_fini_shared_resv
[11:24:17] [PASSED] ttm_bo_pin_basic
[11:24:17] [PASSED] ttm_bo_pin_unpin_resource
[11:24:17] [PASSED] ttm_bo_multiple_pin_one_unpin
[11:24:17] ===================== [PASSED] ttm_bo ======================
[11:24:17] ============== ttm_bo_validate (21 subtests) ===============
[11:24:17] ============== ttm_bo_init_reserved_sys_man  ===============
[11:24:17] [PASSED] Buffer object for userspace
[11:24:17] [PASSED] Kernel buffer object
[11:24:17] [PASSED] Shared buffer object
[11:24:17] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[11:24:17] ============== ttm_bo_init_reserved_mock_man  ==============
[11:24:17] [PASSED] Buffer object for userspace
[11:24:17] [PASSED] Kernel buffer object
[11:24:17] [PASSED] Shared buffer object
[11:24:17] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[11:24:17] [PASSED] ttm_bo_init_reserved_resv
[11:24:17] ================== ttm_bo_validate_basic  ==================
[11:24:17] [PASSED] Buffer object for userspace
[11:24:17] [PASSED] Kernel buffer object
[11:24:17] [PASSED] Shared buffer object
[11:24:17] ============== [PASSED] ttm_bo_validate_basic ==============
[11:24:17] [PASSED] ttm_bo_validate_invalid_placement
[11:24:17] ============= ttm_bo_validate_same_placement  ==============
[11:24:17] [PASSED] System manager
[11:24:17] [PASSED] VRAM manager
[11:24:17] ========= [PASSED] ttm_bo_validate_same_placement ==========
[11:24:17] [PASSED] ttm_bo_validate_failed_alloc
[11:24:17] [PASSED] ttm_bo_validate_pinned
[11:24:17] [PASSED] ttm_bo_validate_busy_placement
[11:24:17] ================ ttm_bo_validate_multihop  =================
[11:24:17] [PASSED] Buffer object for userspace
[11:24:17] [PASSED] Kernel buffer object
[11:24:17] [PASSED] Shared buffer object
[11:24:17] ============ [PASSED] ttm_bo_validate_multihop =============
[11:24:17] ========== ttm_bo_validate_no_placement_signaled  ==========
[11:24:17] [PASSED] Buffer object in system domain, no page vector
[11:24:17] [PASSED] Buffer object in system domain with an existing page vector
[11:24:17] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[11:24:17] ======== ttm_bo_validate_no_placement_not_signaled  ========
[11:24:17] [PASSED] Buffer object for userspace
[11:24:17] [PASSED] Kernel buffer object
[11:24:17] [PASSED] Shared buffer object
[11:24:17] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[11:24:17] [PASSED] ttm_bo_validate_move_fence_signaled
[11:24:17] ========= ttm_bo_validate_move_fence_not_signaled  =========
[11:24:17] [PASSED] Waits for GPU
[11:24:17] [PASSED] Tries to lock straight away
[11:24:17] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[11:24:17] [PASSED] ttm_bo_validate_happy_evict
[11:24:17] [PASSED] ttm_bo_validate_all_pinned_evict
[11:24:17] [PASSED] ttm_bo_validate_allowed_only_evict
[11:24:17] [PASSED] ttm_bo_validate_deleted_evict
[11:24:17] [PASSED] ttm_bo_validate_busy_domain_evict
[11:24:17] [PASSED] ttm_bo_validate_evict_gutting
[11:24:17] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[11:24:17] ================= [PASSED] ttm_bo_validate =================
[11:24:17] ============================================================
[11:24:17] Testing complete. Ran 101 tests: passed: 101
[11:24:17] Elapsed time: 11.255s total, 1.688s configuring, 9.351s building, 0.188s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ CI.checksparse: warning for drm/i915: call irq and rps through the parent interface

[Patchwork]

== Series Details ==

Series: drm/i915: call irq and rps through the parent interface
URL   : https://patchwork.freedesktop.org/series/157576/
State : warning

== Summary ==

+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast 09454f8115d510182b41dd65a887e1eca1bce610
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_hotplug.c: note: in included file:
+drivers/gpu/drm/i915/gt/intel_reset.c:1569:12: warning: context imbalance in '_intel_gt_reset_lock' - different lock contexts for basic block
+drivers/gpu/drm/i915/i915_irq.c:467:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:467:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:475:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:475:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:480:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:480:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:480:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:518:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:518:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:526:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:526:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:531:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:531:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:531:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:575:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:575:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:578:15: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:578:15: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:582:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:582:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:589:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:589:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:589:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:589:9: warning: unreplaced symbol '<noident>'

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/i915: call irq and rps through the parent interface

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 5356 bytes --]

== Series Details ==

Series: drm/i915: call irq and rps through the parent interface
URL   : https://patchwork.freedesktop.org/series/157576/
State : success

== Summary ==

CI Bug Log - changes from xe-4105-fcced1dc80e617aa10794e4abc525895212e3678_BAT -> xe-pw-157576v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-157576v1_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][1] ([Intel XE#623])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/bat-dg2-oem2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_dsc@dsc-basic:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][2] ([Intel XE#455])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/bat-dg2-oem2/igt@kms_dsc@dsc-basic.html

  * igt@kms_psr@psr-cursor-plane-move:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][3] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +2 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/bat-dg2-oem2/igt@kms_psr@psr-cursor-plane-move.html

  * igt@sriov_basic@enable-vfs-autoprobe-off:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][4] ([Intel XE#1091] / [Intel XE#2849]) +1 other test skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/bat-dg2-oem2/igt@sriov_basic@enable-vfs-autoprobe-off.html

  * igt@xe_exec_fault_mode@twice-bindexecqueue-userptr:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][5] ([Intel XE#288]) +32 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/bat-dg2-oem2/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr.html

  * igt@xe_huc_copy@huc_copy:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][6] ([Intel XE#255])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/bat-dg2-oem2/igt@xe_huc_copy@huc_copy.html

  * igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][7] ([Intel XE#2229])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/bat-dg2-oem2/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html

  * igt@xe_pat@pat-index-xe2:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][8] ([Intel XE#977])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/bat-dg2-oem2/igt@xe_pat@pat-index-xe2.html

  * igt@xe_pat@pat-index-xehpc:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][9] ([Intel XE#2838] / [Intel XE#979])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/bat-dg2-oem2/igt@xe_pat@pat-index-xehpc.html

  * igt@xe_pat@pat-index-xelpg:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][10] ([Intel XE#979])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/bat-dg2-oem2/igt@xe_pat@pat-index-xelpg.html

  * igt@xe_sriov_flr@flr-vf1-clear:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][11] ([Intel XE#3342])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/bat-dg2-oem2/igt@xe_sriov_flr@flr-vf1-clear.html

  * igt@xe_waitfence@engine:
    - bat-dg2-oem2:       NOTRUN -> [FAIL][12] ([Intel XE#6519])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/bat-dg2-oem2/igt@xe_waitfence@engine.html

  
#### Possible fixes ####

  * igt@xe_module_load@load:
    - bat-dg2-oem2:       [ABORT][13] ([Intel XE#6610]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/bat-dg2-oem2/igt@xe_module_load@load.html
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/bat-dg2-oem2/igt@xe_module_load@load.html

  
  [Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
  [Intel XE#255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/255
  [Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
  [Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#623]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/623
  [Intel XE#6519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6519
  [Intel XE#6610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6610
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
  [Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979


Build changes
-------------

  * Linux: xe-4105-fcced1dc80e617aa10794e4abc525895212e3678 -> xe-pw-157576v1

  IGT_8623: 8623
  xe-4105-fcced1dc80e617aa10794e4abc525895212e3678: fcced1dc80e617aa10794e4abc525895212e3678
  xe-pw-157576v1: 157576v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/index.html

[-- Attachment #2: Type: text/html, Size: 6259 bytes --]

Re: [PATCH 03/10] drm/{i915,xe}/display: move irq calls to parent interface

[Ville Syrjälä]

On Fri, Nov 14, 2025 at 12:26:42PM +0200, Jani Nikula wrote:
> Add an irq parent driver interface for the .enabled and .synchronize
> calls. This lets us drop the dependency on i915_drv.h and i915_irq.h in
> multiple places, and subsequently remove the compat i915_irq.h and
> i915_irq.c files along with the display/ext directory from xe
> altogether.
> 
> Introduce new intel_parent.[ch] as the wrapper layer to chase the
> function pointers and convert between generic and more specific display
> types.
> 
> v2: Keep static wrappers in intel_display_irq.c (Ville)
> 
> v3: Full blown wrappers in intel_parent.[ch] (Ville)
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/Makefile                 |  1 +
>  .../gpu/drm/i915/display/intel_display_irq.c  | 37 ++++++-------------
>  .../drm/i915/display/intel_display_power.c    |  5 +--
>  .../i915/display/intel_display_power_well.c   | 15 ++------
>  drivers/gpu/drm/i915/display/intel_gmbus.c    |  6 +--
>  drivers/gpu/drm/i915/display/intel_hotplug.c  |  6 +--
>  .../gpu/drm/i915/display/intel_lpe_audio.c    |  1 -
>  drivers/gpu/drm/i915/display/intel_parent.c   | 33 +++++++++++++++++
>  drivers/gpu/drm/i915/display/intel_parent.h   | 14 +++++++
>  drivers/gpu/drm/i915/display/intel_pipe_crc.c |  6 +--
>  drivers/gpu/drm/i915/i915_driver.c            |  1 +
>  drivers/gpu/drm/i915/i915_irq.c               | 16 ++++++++
>  drivers/gpu/drm/i915/i915_irq.h               |  2 +
>  drivers/gpu/drm/xe/Makefile                   |  5 +--
>  .../gpu/drm/xe/compat-i915-headers/i915_irq.h |  6 ---
>  drivers/gpu/drm/xe/display/ext/i915_irq.c     | 18 ---------
>  drivers/gpu/drm/xe/display/xe_display.c       | 18 +++++++++
>  include/drm/intel/display_parent_interface.h  |  8 ++++
>  18 files changed, 119 insertions(+), 79 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/display/intel_parent.c
>  create mode 100644 drivers/gpu/drm/i915/display/intel_parent.h
>  delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
>  delete mode 100644 drivers/gpu/drm/xe/display/ext/i915_irq.c
> 
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 7c89e5e0a277..9a4f89c9a1cd 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -292,6 +292,7 @@ i915-y += \
>  	display/intel_modeset_verify.o \
>  	display/intel_overlay.o \
>  	display/intel_panic.o \
> +	display/intel_parent.o \
>  	display/intel_pch.o \
>  	display/intel_pch_display.o \
>  	display/intel_pch_refclk.o \
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index 2a92ca6c2f82..d2933ac3acb4 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -6,8 +6,6 @@
>  #include <drm/drm_print.h>
>  #include <drm/drm_vblank.h>
>  
> -#include "i915_drv.h"
> -#include "i915_irq.h"
>  #include "i915_reg.h"
>  #include "icl_dsi_regs.h"
>  #include "intel_crtc.h"
> @@ -25,6 +23,7 @@
>  #include "intel_fifo_underrun.h"
>  #include "intel_gmbus.h"
>  #include "intel_hotplug_irq.h"
> +#include "intel_parent.h"
>  #include "intel_pipe_crc_regs.h"
>  #include "intel_plane.h"
>  #include "intel_pmdemand.h"
> @@ -160,7 +159,6 @@ intel_handle_vblank(struct intel_display *display, enum pipe pipe)
>  void ilk_update_display_irq(struct intel_display *display,
>  			    u32 interrupt_mask, u32 enabled_irq_mask)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	u32 new_val;
>  
>  	lockdep_assert_held(&display->irq.lock);
> @@ -171,7 +169,7 @@ void ilk_update_display_irq(struct intel_display *display,
>  	new_val |= (~enabled_irq_mask & interrupt_mask);
>  
>  	if (new_val != display->irq.ilk_de_imr_mask &&
> -	    !drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv))) {
> +	    !drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display))) {

I think the fact that the call goes all the way out to the parent
driver is more of an implementation detail on many of these places.
I think we should be rather checking for display_irqs_enabled in
many of these places. Granted that only differs from the parent
irq state on vlv/chv, but still would be the logcally correct thing
to check.

But this stuff is already kinda borked anyway, so this isn't making
the situation any worse.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

>  		display->irq.ilk_de_imr_mask = new_val;
>  		intel_de_write(display, DEIMR, display->irq.ilk_de_imr_mask);
>  		intel_de_posting_read(display, DEIMR);
> @@ -197,7 +195,6 @@ void ilk_disable_display_irq(struct intel_display *display, u32 bits)
>  void bdw_update_port_irq(struct intel_display *display,
>  			 u32 interrupt_mask, u32 enabled_irq_mask)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	u32 new_val;
>  	u32 old_val;
>  
> @@ -205,7 +202,7 @@ void bdw_update_port_irq(struct intel_display *display,
>  
>  	drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
>  
> -	if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
> +	if (drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display)))
>  		return;
>  
>  	old_val = intel_de_read(display, GEN8_DE_PORT_IMR);
> @@ -231,14 +228,13 @@ static void bdw_update_pipe_irq(struct intel_display *display,
>  				enum pipe pipe, u32 interrupt_mask,
>  				u32 enabled_irq_mask)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	u32 new_val;
>  
>  	lockdep_assert_held(&display->irq.lock);
>  
>  	drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
>  
> -	if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
> +	if (drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display)))
>  		return;
>  
>  	new_val = display->irq.de_pipe_imr_mask[pipe];
> @@ -274,7 +270,6 @@ void ibx_display_interrupt_update(struct intel_display *display,
>  				  u32 interrupt_mask,
>  				  u32 enabled_irq_mask)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	u32 sdeimr = intel_de_read(display, SDEIMR);
>  
>  	sdeimr &= ~interrupt_mask;
> @@ -284,7 +279,7 @@ void ibx_display_interrupt_update(struct intel_display *display,
>  
>  	lockdep_assert_held(&display->irq.lock);
>  
> -	if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
> +	if (drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display)))
>  		return;
>  
>  	intel_de_write(display, SDEIMR, sdeimr);
> @@ -348,7 +343,6 @@ u32 i915_pipestat_enable_mask(struct intel_display *display,
>  void i915_enable_pipestat(struct intel_display *display,
>  			  enum pipe pipe, u32 status_mask)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	i915_reg_t reg = PIPESTAT(display, pipe);
>  	u32 enable_mask;
>  
> @@ -357,7 +351,7 @@ void i915_enable_pipestat(struct intel_display *display,
>  		      pipe_name(pipe), status_mask);
>  
>  	lockdep_assert_held(&display->irq.lock);
> -	drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv));
> +	drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display));
>  
>  	if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == status_mask)
>  		return;
> @@ -372,7 +366,6 @@ void i915_enable_pipestat(struct intel_display *display,
>  void i915_disable_pipestat(struct intel_display *display,
>  			   enum pipe pipe, u32 status_mask)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	i915_reg_t reg = PIPESTAT(display, pipe);
>  	u32 enable_mask;
>  
> @@ -381,7 +374,7 @@ void i915_disable_pipestat(struct intel_display *display,
>  		      pipe_name(pipe), status_mask);
>  
>  	lockdep_assert_held(&display->irq.lock);
> -	drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv));
> +	drm_WARN_ON(display->drm, !intel_parent_irq_enabled(display));
>  
>  	if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == 0)
>  		return;
> @@ -2174,14 +2167,13 @@ void gen11_display_irq_reset(struct intel_display *display)
>  void gen8_irq_power_well_post_enable(struct intel_display *display,
>  				     u8 pipe_mask)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	u32 extra_ier = GEN8_PIPE_VBLANK | GEN8_PIPE_FIFO_UNDERRUN |
>  		gen8_de_pipe_flip_done_mask(display);
>  	enum pipe pipe;
>  
>  	spin_lock_irq(&display->irq.lock);
>  
> -	if (!intel_irqs_enabled(dev_priv)) {
> +	if (!intel_parent_irq_enabled(display)) {
>  		spin_unlock_irq(&display->irq.lock);
>  		return;
>  	}
> @@ -2197,12 +2189,11 @@ void gen8_irq_power_well_post_enable(struct intel_display *display,
>  void gen8_irq_power_well_pre_disable(struct intel_display *display,
>  				     u8 pipe_mask)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	enum pipe pipe;
>  
>  	spin_lock_irq(&display->irq.lock);
>  
> -	if (!intel_irqs_enabled(dev_priv)) {
> +	if (!intel_parent_irq_enabled(display)) {
>  		spin_unlock_irq(&display->irq.lock);
>  		return;
>  	}
> @@ -2213,7 +2204,7 @@ void gen8_irq_power_well_pre_disable(struct intel_display *display,
>  	spin_unlock_irq(&display->irq.lock);
>  
>  	/* make sure we're done processing display irqs */
> -	intel_synchronize_irq(dev_priv);
> +	intel_parent_irq_synchronize(display);
>  }
>  
>  /*
> @@ -2246,8 +2237,6 @@ static void ibx_irq_postinstall(struct intel_display *display)
>  
>  void valleyview_enable_display_irqs(struct intel_display *display)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
> -
>  	spin_lock_irq(&display->irq.lock);
>  
>  	if (display->irq.vlv_display_irqs_enabled)
> @@ -2255,7 +2244,7 @@ void valleyview_enable_display_irqs(struct intel_display *display)
>  
>  	display->irq.vlv_display_irqs_enabled = true;
>  
> -	if (intel_irqs_enabled(dev_priv)) {
> +	if (intel_parent_irq_enabled(display)) {
>  		_vlv_display_irq_reset(display);
>  		_vlv_display_irq_postinstall(display);
>  	}
> @@ -2266,8 +2255,6 @@ void valleyview_enable_display_irqs(struct intel_display *display)
>  
>  void valleyview_disable_display_irqs(struct intel_display *display)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
> -
>  	spin_lock_irq(&display->irq.lock);
>  
>  	if (!display->irq.vlv_display_irqs_enabled)
> @@ -2275,7 +2262,7 @@ void valleyview_disable_display_irqs(struct intel_display *display)
>  
>  	display->irq.vlv_display_irqs_enabled = false;
>  
> -	if (intel_irqs_enabled(dev_priv))
> +	if (intel_parent_irq_enabled(display))
>  		_vlv_display_irq_reset(display);
>  out:
>  	spin_unlock_irq(&display->irq.lock);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 2a4cc1dcc293..a383ef23391d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -11,7 +11,6 @@
>  #include "soc/intel_dram.h"
>  
>  #include "i915_drv.h"
> -#include "i915_irq.h"
>  #include "i915_reg.h"
>  #include "intel_backlight_regs.h"
>  #include "intel_cdclk.h"
> @@ -27,6 +26,7 @@
>  #include "intel_display_utils.h"
>  #include "intel_dmc.h"
>  #include "intel_mchbar_regs.h"
> +#include "intel_parent.h"
>  #include "intel_pch_refclk.h"
>  #include "intel_pcode.h"
>  #include "intel_pmdemand.h"
> @@ -1202,7 +1202,6 @@ static void hsw_assert_cdclk(struct intel_display *display)
>  
>  static void assert_can_disable_lcpll(struct intel_display *display)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	struct intel_crtc *crtc;
>  
>  	for_each_intel_crtc(display->drm, crtc)
> @@ -1247,7 +1246,7 @@ static void assert_can_disable_lcpll(struct intel_display *display)
>  	 * gen-specific and since we only disable LCPLL after we fully disable
>  	 * the interrupts, the check below should be enough.
>  	 */
> -	INTEL_DISPLAY_STATE_WARN(display, intel_irqs_enabled(dev_priv),
> +	INTEL_DISPLAY_STATE_WARN(display, intel_parent_irq_enabled(display),
>  				 "IRQs enabled\n");
>  }
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> index f4f7e73acc87..719f58e43269 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> @@ -7,8 +7,6 @@
>  
>  #include <drm/drm_print.h>
>  
> -#include "i915_drv.h"
> -#include "i915_irq.h"
>  #include "i915_reg.h"
>  #include "intel_backlight_regs.h"
>  #include "intel_combo_phy.h"
> @@ -28,6 +26,7 @@
>  #include "intel_dpio_phy.h"
>  #include "intel_dpll.h"
>  #include "intel_hotplug.h"
> +#include "intel_parent.h"
>  #include "intel_pcode.h"
>  #include "intel_pps.h"
>  #include "intel_psr.h"
> @@ -628,8 +627,6 @@ static bool hsw_power_well_enabled(struct intel_display *display,
>  
>  static void assert_can_enable_dc9(struct intel_display *display)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
> -
>  	drm_WARN_ONCE(display->drm,
>  		      (intel_de_read(display, DC_STATE_EN) & DC_STATE_EN_DC9),
>  		      "DC9 already programmed to be enabled.\n");
> @@ -641,7 +638,7 @@ static void assert_can_enable_dc9(struct intel_display *display)
>  		      intel_de_read(display, HSW_PWR_WELL_CTL2) &
>  		      HSW_PWR_WELL_CTL_REQ(SKL_PW_CTL_IDX_PW_2),
>  		      "Power well 2 on.\n");
> -	drm_WARN_ONCE(display->drm, intel_irqs_enabled(dev_priv),
> +	drm_WARN_ONCE(display->drm, intel_parent_irq_enabled(display),
>  		      "Interrupts not disabled yet.\n");
>  
>  	 /*
> @@ -655,9 +652,7 @@ static void assert_can_enable_dc9(struct intel_display *display)
>  
>  static void assert_can_disable_dc9(struct intel_display *display)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
> -
> -	drm_WARN_ONCE(display->drm, intel_irqs_enabled(dev_priv),
> +	drm_WARN_ONCE(display->drm, intel_parent_irq_enabled(display),
>  		      "Interrupts not disabled yet.\n");
>  	drm_WARN_ONCE(display->drm,
>  		      intel_de_read(display, DC_STATE_EN) &
> @@ -1281,12 +1276,10 @@ static void vlv_display_power_well_init(struct intel_display *display)
>  
>  static void vlv_display_power_well_deinit(struct intel_display *display)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
> -
>  	valleyview_disable_display_irqs(display);
>  
>  	/* make sure we're done processing display irqs */
> -	intel_synchronize_irq(dev_priv);
> +	intel_parent_irq_synchronize(display);
>  
>  	vlv_pps_reset_all(display);
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
> index 795012d7c24c..acc85853b2a7 100644
> --- a/drivers/gpu/drm/i915/display/intel_gmbus.c
> +++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
> @@ -35,8 +35,6 @@
>  #include <drm/drm_print.h>
>  #include <drm/display/drm_hdcp_helper.h>
>  
> -#include "i915_drv.h"
> -#include "i915_irq.h"
>  #include "i915_reg.h"
>  #include "intel_de.h"
>  #include "intel_display_regs.h"
> @@ -44,6 +42,7 @@
>  #include "intel_display_wa.h"
>  #include "intel_gmbus.h"
>  #include "intel_gmbus_regs.h"
> +#include "intel_parent.h"
>  
>  struct intel_gmbus {
>  	struct i2c_adapter adapter;
> @@ -391,12 +390,11 @@ intel_gpio_setup(struct intel_gmbus *bus, i915_reg_t gpio_reg)
>  
>  static bool has_gmbus_irq(struct intel_display *display)
>  {
> -	struct drm_i915_private *i915 = to_i915(display->drm);
>  	/*
>  	 * encoder->shutdown() may want to use GMBUS
>  	 * after irqs have already been disabled.
>  	 */
> -	return HAS_GMBUS_IRQ(display) && intel_irqs_enabled(i915);
> +	return HAS_GMBUS_IRQ(display) && intel_parent_irq_enabled(display);
>  }
>  
>  static int gmbus_wait(struct intel_display *display, u32 status, u32 irq_en)
> diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
> index 235706229ffb..7575a063f7be 100644
> --- a/drivers/gpu/drm/i915/display/intel_hotplug.c
> +++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
> @@ -27,8 +27,6 @@
>  #include <drm/drm_print.h>
>  #include <drm/drm_probe_helper.h>
>  
> -#include "i915_drv.h"
> -#include "i915_irq.h"
>  #include "intel_connector.h"
>  #include "intel_display_core.h"
>  #include "intel_display_power.h"
> @@ -39,6 +37,7 @@
>  #include "intel_hdcp.h"
>  #include "intel_hotplug.h"
>  #include "intel_hotplug_irq.h"
> +#include "intel_parent.h"
>  
>  /**
>   * DOC: Hotplug
> @@ -1177,13 +1176,12 @@ bool intel_hpd_schedule_detection(struct intel_display *display)
>  static int i915_hpd_storm_ctl_show(struct seq_file *m, void *data)
>  {
>  	struct intel_display *display = m->private;
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	struct intel_hotplug *hotplug = &display->hotplug;
>  
>  	/* Synchronize with everything first in case there's been an HPD
>  	 * storm, but we haven't finished handling it in the kernel yet
>  	 */
> -	intel_synchronize_irq(dev_priv);
> +	intel_parent_irq_synchronize(display);
>  	flush_work(&display->hotplug.dig_port_work);
>  	flush_delayed_work(&display->hotplug.hotplug_work);
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_lpe_audio.c b/drivers/gpu/drm/i915/display/intel_lpe_audio.c
> index 42284e9928f2..5b41abe1c64d 100644
> --- a/drivers/gpu/drm/i915/display/intel_lpe_audio.c
> +++ b/drivers/gpu/drm/i915/display/intel_lpe_audio.c
> @@ -71,7 +71,6 @@
>  #include <drm/drm_print.h>
>  #include <drm/intel/intel_lpe_audio.h>
>  
> -#include "i915_irq.h"
>  #include "intel_audio_regs.h"
>  #include "intel_de.h"
>  #include "intel_lpe_audio.h"
> diff --git a/drivers/gpu/drm/i915/display/intel_parent.c b/drivers/gpu/drm/i915/display/intel_parent.c
> new file mode 100644
> index 000000000000..375713f6f411
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_parent.c
> @@ -0,0 +1,33 @@
> +// SPDX-License-Identifier: MIT
> +/* Copyright © 2025 Intel Corporation */
> +
> +/*
> + * Convenience wrapper functions to call the parent interface functions:
> + *
> + * - display->parent->SUBSTRUCT->FUNCTION()
> + * - display->parent->FUNCTION()
> + *
> + * All functions here should be named accordingly:
> + *
> + * - intel_parent_SUBSTRUCT_FUNCTION()
> + * - intel_parent_FUNCTION()
> + *
> + * These functions may use display driver specific types for parameters and
> + * return values, translating them to and from the generic types used in the
> + * function pointer interface.
> + */
> +
> +#include <drm/intel/display_parent_interface.h>
> +
> +#include "intel_display_core.h"
> +#include "intel_parent.h"
> +
> +bool intel_parent_irq_enabled(struct intel_display *display)
> +{
> +	return display->parent->irq->enabled(display->drm);
> +}
> +
> +void intel_parent_irq_synchronize(struct intel_display *display)
> +{
> +	display->parent->irq->synchronize(display->drm);
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_parent.h b/drivers/gpu/drm/i915/display/intel_parent.h
> new file mode 100644
> index 000000000000..3ade493f1008
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_parent.h
> @@ -0,0 +1,14 @@
> +/* SPDX-License-Identifier: MIT */
> +/* Copyright © 2025 Intel Corporation */
> +
> +#ifndef __INTEL_PARENT_H__
> +#define __INTEL_PARENT_H__
> +
> +#include <linux/types.h>
> +
> +struct intel_display;
> +
> +bool intel_parent_irq_enabled(struct intel_display *display);
> +void intel_parent_irq_synchronize(struct intel_display *display);
> +
> +#endif /* __INTEL_PARENT_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_pipe_crc.c b/drivers/gpu/drm/i915/display/intel_pipe_crc.c
> index 1f27643412f1..71cb0178c8b1 100644
> --- a/drivers/gpu/drm/i915/display/intel_pipe_crc.c
> +++ b/drivers/gpu/drm/i915/display/intel_pipe_crc.c
> @@ -30,13 +30,12 @@
>  
>  #include <drm/drm_print.h>
>  
> -#include "i915_drv.h"
> -#include "i915_irq.h"
>  #include "intel_atomic.h"
>  #include "intel_de.h"
>  #include "intel_display_irq.h"
>  #include "intel_display_regs.h"
>  #include "intel_display_types.h"
> +#include "intel_parent.h"
>  #include "intel_pipe_crc.h"
>  #include "intel_pipe_crc_regs.h"
>  
> @@ -658,7 +657,6 @@ void intel_crtc_enable_pipe_crc(struct intel_crtc *crtc)
>  void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc)
>  {
>  	struct intel_display *display = to_intel_display(crtc);
> -	struct drm_i915_private *dev_priv = to_i915(display->drm);
>  	struct intel_pipe_crc *pipe_crc = &crtc->pipe_crc;
>  	enum pipe pipe = crtc->pipe;
>  
> @@ -669,5 +667,5 @@ void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc)
>  
>  	intel_de_write(display, PIPE_CRC_CTL(display, pipe), 0);
>  	intel_de_posting_read(display, PIPE_CRC_CTL(display, pipe));
> -	intel_synchronize_irq(dev_priv);
> +	intel_parent_irq_synchronize(display);
>  }
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index c97b76771917..07715aef62d3 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -741,6 +741,7 @@ static void i915_welcome_messages(struct drm_i915_private *dev_priv)
>  
>  static const struct intel_display_parent_interface parent = {
>  	.rpm = &i915_display_rpm_interface,
> +	.irq = &i915_display_irq_interface,
>  };
>  
>  const struct intel_display_parent_interface *i915_driver_parent_interface(void)
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 1898be4ddc8b..3fe978d4ea53 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -33,6 +33,7 @@
>  
>  #include <drm/drm_drv.h>
>  #include <drm/drm_print.h>
> +#include <drm/intel/display_parent_interface.h>
>  
>  #include "display/intel_display_irq.h"
>  #include "display/intel_hotplug.h"
> @@ -1252,3 +1253,18 @@ void intel_synchronize_hardirq(struct drm_i915_private *i915)
>  {
>  	synchronize_hardirq(to_pci_dev(i915->drm.dev)->irq);
>  }
> +
> +static bool _intel_irq_enabled(struct drm_device *drm)
> +{
> +	return intel_irqs_enabled(to_i915(drm));
> +}
> +
> +static void _intel_irq_synchronize(struct drm_device *drm)
> +{
> +	return intel_synchronize_irq(to_i915(drm));
> +}
> +
> +const struct intel_display_irq_interface i915_display_irq_interface = {
> +	.enabled = _intel_irq_enabled,
> +	.synchronize = _intel_irq_synchronize,
> +};
> diff --git a/drivers/gpu/drm/i915/i915_irq.h b/drivers/gpu/drm/i915/i915_irq.h
> index 58789b264575..5c87d6d41c74 100644
> --- a/drivers/gpu/drm/i915/i915_irq.h
> +++ b/drivers/gpu/drm/i915/i915_irq.h
> @@ -51,4 +51,6 @@ void gen2_error_reset(struct intel_uncore *uncore, struct i915_error_regs regs);
>  void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
>  		     u32 emr_val);
>  
> +extern const struct intel_display_irq_interface i915_display_irq_interface;
> +
>  #endif /* __I915_IRQ_H__ */
> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> index e4b273b025d2..c2d2303a8198 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -191,7 +191,6 @@ endif
>  
>  # i915 Display compat #defines and #includes
>  subdir-ccflags-$(CONFIG_DRM_XE_DISPLAY) += \
> -	-I$(src)/display/ext \
>  	-I$(src)/compat-i915-headers \
>  	-I$(srctree)/drivers/gpu/drm/i915/display/ \
>  	-Ddrm_i915_private=xe_device
> @@ -208,7 +207,6 @@ $(obj)/i915-display/%.o: $(srctree)/drivers/gpu/drm/i915/display/%.c FORCE
>  
>  # Display code specific to xe
>  xe-$(CONFIG_DRM_XE_DISPLAY) += \
> -	display/ext/i915_irq.o \
>  	display/intel_bo.o \
>  	display/intel_fb_bo.o \
>  	display/intel_fbdev_fb.o \
> @@ -304,10 +302,11 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
>  	i915-display/intel_modeset_setup.o \
>  	i915-display/intel_modeset_verify.o \
>  	i915-display/intel_panel.o \
> +	i915-display/intel_parent.o \
> +	i915-display/intel_pch.o \
>  	i915-display/intel_pfit.o \
>  	i915-display/intel_plane.o \
>  	i915-display/intel_pmdemand.o \
> -	i915-display/intel_pch.o \
>  	i915-display/intel_pps.o \
>  	i915-display/intel_psr.o \
>  	i915-display/intel_qp_tables.o \
> diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
> deleted file mode 100644
> index 61707a07f91f..000000000000
> --- a/drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
> +++ /dev/null
> @@ -1,6 +0,0 @@
> -/* SPDX-License-Identifier: MIT */
> -/*
> - * Copyright © 2023 Intel Corporation
> - */
> -
> -#include "../../i915/i915_irq.h"
> diff --git a/drivers/gpu/drm/xe/display/ext/i915_irq.c b/drivers/gpu/drm/xe/display/ext/i915_irq.c
> deleted file mode 100644
> index 1011c1c754d0..000000000000
> --- a/drivers/gpu/drm/xe/display/ext/i915_irq.c
> +++ /dev/null
> @@ -1,18 +0,0 @@
> -// SPDX-License-Identifier: MIT
> -/*
> - * Copyright © 2023 Intel Corporation
> - */
> -
> -#include "i915_irq.h"
> -#include "i915_reg.h"
> -#include "intel_uncore.h"
> -
> -bool intel_irqs_enabled(struct xe_device *xe)
> -{
> -	return atomic_read(&xe->irq.enabled);
> -}
> -
> -void intel_synchronize_irq(struct xe_device *xe)
> -{
> -	synchronize_irq(to_pci_dev(xe->drm.dev)->irq);
> -}
> diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
> index 8b0afa270216..e3320d9e6314 100644
> --- a/drivers/gpu/drm/xe/display/xe_display.c
> +++ b/drivers/gpu/drm/xe/display/xe_display.c
> @@ -516,8 +516,26 @@ static void display_device_remove(struct drm_device *dev, void *arg)
>  	intel_display_device_remove(display);
>  }
>  
> +static bool irq_enabled(struct drm_device *drm)
> +{
> +	struct xe_device *xe = to_xe_device(drm);
> +
> +	return atomic_read(&xe->irq.enabled);
> +}
> +
> +static void irq_synchronize(struct drm_device *drm)
> +{
> +	synchronize_irq(to_pci_dev(drm->dev)->irq);
> +}
> +
> +static const struct intel_display_irq_interface xe_display_irq_interface = {
> +	.enabled = irq_enabled,
> +	.synchronize = irq_synchronize,
> +};
> +
>  static const struct intel_display_parent_interface parent = {
>  	.rpm = &xe_display_rpm_interface,
> +	.irq = &xe_display_irq_interface,
>  };
>  
>  /**
> diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
> index 26bedc360044..3a008a18eb65 100644
> --- a/include/drm/intel/display_parent_interface.h
> +++ b/include/drm/intel/display_parent_interface.h
> @@ -25,6 +25,11 @@ struct intel_display_rpm_interface {
>  	void (*assert_unblock)(const struct drm_device *drm);
>  };
>  
> +struct intel_display_irq_interface {
> +	bool (*enabled)(struct drm_device *drm);
> +	void (*synchronize)(struct drm_device *drm);
> +};
> +
>  /**
>   * struct intel_display_parent_interface - services parent driver provides to display
>   *
> @@ -40,6 +45,9 @@ struct intel_display_rpm_interface {
>  struct intel_display_parent_interface {
>  	/** @rpm: Runtime PM functions */
>  	const struct intel_display_rpm_interface *rpm;
> +
> +	/** @irq: IRQ interface */
> +	const struct intel_display_irq_interface *irq;
>  };
>  
>  #endif
> -- 
> 2.47.3

-- 
Ville Syrjälä
Intel

Re: [PATCH 04/10] drm/i915: add .vgpu_active to parent interface

[Ville Syrjälä]

On Fri, Nov 14, 2025 at 12:26:43PM +0200, Jani Nikula wrote:
> Add .vgpu_active() to display parent interface, removing more
> dependencies on struct drm_i915_private, i915_drv.h, and i915_vgpu.h.
> 
> This also allows us to remove the xe compat i915_vgpu.h.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_crtc.c      |  6 ++----
>  drivers/gpu/drm/i915/display/intel_fbc.c       |  5 ++---
>  drivers/gpu/drm/i915/display/intel_parent.c    |  5 +++++
>  drivers/gpu/drm/i915/display/intel_parent.h    |  2 ++
>  drivers/gpu/drm/i915/i915_driver.c             |  6 ++++++
>  .../gpu/drm/xe/compat-i915-headers/i915_vgpu.h | 18 ------------------
>  include/drm/intel/display_parent_interface.h   |  3 +++
>  7 files changed, 20 insertions(+), 25 deletions(-)
>  delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/i915_vgpu.h
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
> index 9d2a23c96c61..153ff4b4b52c 100644
> --- a/drivers/gpu/drm/i915/display/intel_crtc.c
> +++ b/drivers/gpu/drm/i915/display/intel_crtc.c
> @@ -13,8 +13,6 @@
>  #include <drm/drm_vblank.h>
>  #include <drm/drm_vblank_work.h>
>  
> -#include "i915_drv.h"
> -#include "i915_vgpu.h"
>  #include "i9xx_plane.h"
>  #include "icl_dsi.h"
>  #include "intel_atomic.h"
> @@ -28,6 +26,7 @@
>  #include "intel_drrs.h"
>  #include "intel_dsi.h"
>  #include "intel_fifo_underrun.h"
> +#include "intel_parent.h"
>  #include "intel_pipe_crc.h"
>  #include "intel_plane.h"
>  #include "intel_psr.h"
> @@ -671,7 +670,6 @@ void intel_pipe_update_end(struct intel_atomic_state *state,
>  	int scanline_end = intel_get_crtc_scanline(crtc);
>  	u32 end_vbl_count = intel_crtc_get_vblank_counter(crtc);
>  	ktime_t end_vbl_time = ktime_get();
> -	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  
>  	drm_WARN_ON(display->drm, new_crtc_state->use_dsb);
>  
> @@ -737,7 +735,7 @@ void intel_pipe_update_end(struct intel_atomic_state *state,
>  
>  	local_irq_enable();
>  
> -	if (intel_vgpu_active(dev_priv))
> +	if (intel_parent_vgpu_active(display))
>  		goto out;
>  
>  	if (crtc->debug.start_vbl_count &&
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 437d2fda20a7..ab0bcea5aa89 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -50,7 +50,6 @@
>  #include "gt/intel_gt_types.h"
>  
>  #include "i915_drv.h"
> -#include "i915_vgpu.h"
>  #include "i915_vma.h"
>  #include "i9xx_plane_regs.h"
>  #include "intel_de.h"
> @@ -64,6 +63,7 @@
>  #include "intel_fbc.h"
>  #include "intel_fbc_regs.h"
>  #include "intel_frontbuffer.h"
> +#include "intel_parent.h"
>  
>  #define for_each_fbc_id(__display, __fbc_id) \
>  	for ((__fbc_id) = INTEL_FBC_A; (__fbc_id) < I915_MAX_FBCS; (__fbc_id)++) \
> @@ -1485,7 +1485,6 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
>  				 struct intel_plane *plane)
>  {
>  	struct intel_display *display = to_intel_display(state->base.dev);
> -	struct drm_i915_private *i915 = to_i915(display->drm);
>  	struct intel_plane_state *plane_state =
>  		intel_atomic_get_new_plane_state(state, plane);
>  	const struct drm_framebuffer *fb = plane_state->hw.fb;
> @@ -1501,7 +1500,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
>  		return 0;
>  	}
>  
> -	if (intel_vgpu_active(i915)) {
> +	if (intel_parent_vgpu_active(display)) {
>  		plane_state->no_fbc_reason = "VGPU active";
>  		return 0;
>  	}
> diff --git a/drivers/gpu/drm/i915/display/intel_parent.c b/drivers/gpu/drm/i915/display/intel_parent.c
> index 375713f6f411..3786fd42827d 100644
> --- a/drivers/gpu/drm/i915/display/intel_parent.c
> +++ b/drivers/gpu/drm/i915/display/intel_parent.c
> @@ -31,3 +31,8 @@ void intel_parent_irq_synchronize(struct intel_display *display)
>  {
>  	display->parent->irq->synchronize(display->drm);
>  }
> +
> +bool intel_parent_vgpu_active(struct intel_display *display)
> +{
> +	return display->parent->vgpu_active && display->parent->vgpu_active(display->drm);
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_parent.h b/drivers/gpu/drm/i915/display/intel_parent.h
> index 3ade493f1008..222c95836d35 100644
> --- a/drivers/gpu/drm/i915/display/intel_parent.h
> +++ b/drivers/gpu/drm/i915/display/intel_parent.h
> @@ -11,4 +11,6 @@ struct intel_display;
>  bool intel_parent_irq_enabled(struct intel_display *display);
>  void intel_parent_irq_synchronize(struct intel_display *display);
>  
> +bool intel_parent_vgpu_active(struct intel_display *display);
> +
>  #endif /* __INTEL_PARENT_H__ */
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index 07715aef62d3..f21f1919a225 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -739,9 +739,15 @@ static void i915_welcome_messages(struct drm_i915_private *dev_priv)
>  			 "DRM_I915_DEBUG_RUNTIME_PM enabled\n");
>  }
>  
> +static bool vgpu_active(struct drm_device *drm)
> +{
> +	return intel_vgpu_active(to_i915(drm));
> +}
> +
>  static const struct intel_display_parent_interface parent = {
>  	.rpm = &i915_display_rpm_interface,
>  	.irq = &i915_display_irq_interface,
> +	.vgpu_active = vgpu_active,
>  };
>  
>  const struct intel_display_parent_interface *i915_driver_parent_interface(void)
> diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_vgpu.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_vgpu.h
> deleted file mode 100644
> index 4931c7198f13..000000000000
> --- a/drivers/gpu/drm/xe/compat-i915-headers/i915_vgpu.h
> +++ /dev/null
> @@ -1,18 +0,0 @@
> -/* SPDX-License-Identifier: MIT */
> -/*
> - * Copyright © 2023 Intel Corporation
> - */
> -
> -#ifndef _I915_VGPU_H_
> -#define _I915_VGPU_H_
> -
> -#include <linux/types.h>
> -
> -struct drm_i915_private;
> -
> -static inline bool intel_vgpu_active(struct drm_i915_private *i915)
> -{
> -	return false;
> -}
> -
> -#endif /* _I915_VGPU_H_ */
> diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
> index 3a008a18eb65..f3834f36ce74 100644
> --- a/include/drm/intel/display_parent_interface.h
> +++ b/include/drm/intel/display_parent_interface.h
> @@ -48,6 +48,9 @@ struct intel_display_parent_interface {
>  
>  	/** @irq: IRQ interface */
>  	const struct intel_display_irq_interface *irq;
> +
> +	/** @vgpu_active: Is vGPU active? Optional. */
> +	bool (*vgpu_active)(struct drm_device *drm);
>  };
>  
>  #endif
> -- 
> 2.47.3

-- 
Ville Syrjälä
Intel

Re: [PATCH 05/10] drm/i915: add .fence_support_legacy to parent interface

[Ville Syrjälä]

On Fri, Nov 14, 2025 at 12:26:44PM +0200, Jani Nikula wrote:
> Add .fence_support_legacy() to display parent interface, removing more
> dependencies on struct drm_i915_private, i915_drv.h, and
> gt/intel_gt_types.h.
> 
> This allows us to remove the xe compat gt/intel_gt_types.h.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c              |  8 ++------
>  drivers/gpu/drm/i915/display/intel_parent.c           |  5 +++++
>  drivers/gpu/drm/i915/display/intel_parent.h           |  2 ++
>  drivers/gpu/drm/i915/i915_driver.c                    |  6 ++++++
>  .../drm/xe/compat-i915-headers/gt/intel_gt_types.h    | 11 -----------
>  include/drm/intel/display_parent_interface.h          |  3 +++
>  6 files changed, 18 insertions(+), 17 deletions(-)
>  delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/gt/intel_gt_types.h
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index ab0bcea5aa89..8c56c87d00a9 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -47,9 +47,6 @@
>  
>  #include "gem/i915_gem_stolen.h"
>  
> -#include "gt/intel_gt_types.h"
> -
> -#include "i915_drv.h"
>  #include "i915_vma.h"
>  #include "i9xx_plane_regs.h"
>  #include "intel_de.h"
> @@ -64,6 +61,7 @@
>  #include "intel_fbc_regs.h"
>  #include "intel_frontbuffer.h"
>  #include "intel_parent.h"
> +#include "intel_step.h"
>  
>  #define for_each_fbc_id(__display, __fbc_id) \
>  	for ((__fbc_id) = INTEL_FBC_A; (__fbc_id) < I915_MAX_FBCS; (__fbc_id)++) \
> @@ -267,9 +265,7 @@ static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state *plane_s
>  
>  static bool intel_fbc_has_fences(struct intel_display *display)
>  {
> -	struct drm_i915_private __maybe_unused *i915 = to_i915(display->drm);
> -
> -	return intel_gt_support_legacy_fencing(to_gt(i915));
> +	return intel_parent_fence_support_legacy(display);

The naming is getting confusing. I'm thinking we should change
all of it to something like *_has_fenced_regions().

>  }
>  
>  static u32 i8xx_fbc_ctl(struct intel_fbc *fbc)
> diff --git a/drivers/gpu/drm/i915/display/intel_parent.c b/drivers/gpu/drm/i915/display/intel_parent.c
> index 3786fd42827d..3dd31852e2e1 100644
> --- a/drivers/gpu/drm/i915/display/intel_parent.c
> +++ b/drivers/gpu/drm/i915/display/intel_parent.c
> @@ -36,3 +36,8 @@ bool intel_parent_vgpu_active(struct intel_display *display)
>  {
>  	return display->parent->vgpu_active && display->parent->vgpu_active(display->drm);
>  }
> +
> +bool intel_parent_fence_support_legacy(struct intel_display *display)
> +{
> +	return display->parent->fence_support_legacy && display->parent->fence_support_legacy(display->drm);
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_parent.h b/drivers/gpu/drm/i915/display/intel_parent.h
> index 222c95836d35..fc6799db0361 100644
> --- a/drivers/gpu/drm/i915/display/intel_parent.h
> +++ b/drivers/gpu/drm/i915/display/intel_parent.h
> @@ -13,4 +13,6 @@ void intel_parent_irq_synchronize(struct intel_display *display);
>  
>  bool intel_parent_vgpu_active(struct intel_display *display);
>  
> +bool intel_parent_fence_support_legacy(struct intel_display *display);
> +
>  #endif /* __INTEL_PARENT_H__ */
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index f21f1919a225..814b430de960 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -744,10 +744,16 @@ static bool vgpu_active(struct drm_device *drm)
>  	return intel_vgpu_active(to_i915(drm));
>  }
>  
> +static bool fence_support_legacy(struct drm_device *drm)
> +{
> +	return intel_gt_support_legacy_fencing(to_gt(to_i915(drm)));
> +}
> +
>  static const struct intel_display_parent_interface parent = {
>  	.rpm = &i915_display_rpm_interface,
>  	.irq = &i915_display_irq_interface,
>  	.vgpu_active = vgpu_active,
> +	.fence_support_legacy = fence_support_legacy,
>  };
>  
>  const struct intel_display_parent_interface *i915_driver_parent_interface(void)
> diff --git a/drivers/gpu/drm/xe/compat-i915-headers/gt/intel_gt_types.h b/drivers/gpu/drm/xe/compat-i915-headers/gt/intel_gt_types.h
> deleted file mode 100644
> index c15806d6c4f7..000000000000
> --- a/drivers/gpu/drm/xe/compat-i915-headers/gt/intel_gt_types.h
> +++ /dev/null
> @@ -1,11 +0,0 @@
> -/* SPDX-License-Identifier: MIT */
> -/*
> - * Copyright © 2023 Intel Corporation
> - */
> -
> -#ifndef __INTEL_GT_TYPES__
> -#define __INTEL_GT_TYPES__
> -
> -#define intel_gt_support_legacy_fencing(gt) 0
> -
> -#endif
> diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
> index f3834f36ce74..11767adb0083 100644
> --- a/include/drm/intel/display_parent_interface.h
> +++ b/include/drm/intel/display_parent_interface.h
> @@ -51,6 +51,9 @@ struct intel_display_parent_interface {
>  
>  	/** @vgpu_active: Is vGPU active? Optional. */
>  	bool (*vgpu_active)(struct drm_device *drm);
> +
> +	/** @fence_support_legacy: Support legacy fencing? Optional. */
> +	bool (*fence_support_legacy)(struct drm_device *drm);
>  };
>  
>  #endif
> -- 
> 2.47.3

-- 
Ville Syrjälä
Intel

Re: [PATCH 06/10] drm/i915/rps: store struct dma_fence in struct wait_rps_boost

[Ville Syrjälä]

On Fri, Nov 14, 2025 at 12:26:45PM +0200, Jani Nikula wrote:
> Prefer the more generic pointer rather than i915 specific data
> type. Also use dma_fence_put() for symmetry with the dma_fence_get()
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display_rps.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_rps.c b/drivers/gpu/drm/i915/display/intel_display_rps.c
> index 82ea1ec482e4..b6720f7c09d9 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_rps.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_rps.c
> @@ -18,14 +18,14 @@ struct wait_rps_boost {
>  	struct wait_queue_entry wait;
>  
>  	struct drm_crtc *crtc;
> -	struct i915_request *request;
> +	struct dma_fence *fence;
>  };
>  
>  static int do_rps_boost(struct wait_queue_entry *_wait,
>  			unsigned mode, int sync, void *key)
>  {
>  	struct wait_rps_boost *wait = container_of(_wait, typeof(*wait), wait);
> -	struct i915_request *rq = wait->request;
> +	struct i915_request *rq = to_request(wait->fence);
>  
>  	/*
>  	 * If we missed the vblank, but the request is already running it
> @@ -34,7 +34,7 @@ static int do_rps_boost(struct wait_queue_entry *_wait,
>  	 */
>  	if (!i915_request_started(rq))
>  		intel_rps_boost(rq);
> -	i915_request_put(rq);
> +	dma_fence_put(wait->fence);
>  
>  	drm_crtc_vblank_put(wait->crtc);
>  
> @@ -64,7 +64,7 @@ void intel_display_rps_boost_after_vblank(struct drm_crtc *crtc,
>  		return;
>  	}
>  
> -	wait->request = to_request(dma_fence_get(fence));
> +	wait->fence = dma_fence_get(fence);
>  	wait->crtc = crtc;
>  
>  	wait->wait.func = do_rps_boost;
> -- 
> 2.47.3

-- 
Ville Syrjälä
Intel

Re: [PATCH 07/10] drm/i915/rps: call RPS functions via the parent interface

[Ville Syrjälä]

On Fri, Nov 14, 2025 at 12:26:46PM +0200, Jani Nikula wrote:
> Add struct intel_display_rps_interface to the display parent interface,
> and call the RPS functions through it. The RPS interface is optional.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  .../gpu/drm/i915/display/intel_display_rps.c  | 32 ++++++++---------
>  drivers/gpu/drm/i915/display/intel_parent.c   | 23 +++++++++++++
>  drivers/gpu/drm/i915/display/intel_parent.h   |  6 ++++
>  drivers/gpu/drm/i915/gt/intel_rps.c           | 34 +++++++++++++++++++
>  drivers/gpu/drm/i915/gt/intel_rps.h           |  2 ++
>  drivers/gpu/drm/i915/i915_driver.c            |  2 ++
>  include/drm/intel/display_parent_interface.h  | 10 ++++++
>  7 files changed, 93 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_rps.c b/drivers/gpu/drm/i915/display/intel_display_rps.c
> index b6720f7c09d9..e70c4f0eab80 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_rps.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_rps.c
> @@ -3,16 +3,18 @@
>   * Copyright © 2023 Intel Corporation
>   */
>  
> +#include <linux/dma-fence.h>
> +
>  #include <drm/drm_crtc.h>
>  #include <drm/drm_vblank.h>
>  
> -#include "gt/intel_rps.h"
> -#include "i915_drv.h"
>  #include "i915_reg.h"
> +#include "i915_request.h"
>  #include "intel_display_core.h"
>  #include "intel_display_irq.h"
>  #include "intel_display_rps.h"
>  #include "intel_display_types.h"
> +#include "intel_parent.h"
>  
>  struct wait_rps_boost {
>  	struct wait_queue_entry wait;
> @@ -25,15 +27,10 @@ static int do_rps_boost(struct wait_queue_entry *_wait,
>  			unsigned mode, int sync, void *key)
>  {
>  	struct wait_rps_boost *wait = container_of(_wait, typeof(*wait), wait);
> -	struct i915_request *rq = to_request(wait->fence);
> -
> -	/*
> -	 * If we missed the vblank, but the request is already running it
> -	 * is reasonable to assume that it will complete before the next
> -	 * vblank without our intervention, so leave RPS alone.
> -	 */
> -	if (!i915_request_started(rq))
> -		intel_rps_boost(rq);
> +	struct intel_display *display = to_intel_display(wait->crtc->dev);
> +
> +	intel_parent_rps_boost(display, wait->fence);
> +
>  	dma_fence_put(wait->fence);
>  
>  	drm_crtc_vblank_put(wait->crtc);
> @@ -49,6 +46,9 @@ void intel_display_rps_boost_after_vblank(struct drm_crtc *crtc,
>  	struct intel_display *display = to_intel_display(crtc->dev);
>  	struct wait_rps_boost *wait;
>  
> +	if (!intel_parent_rps_available(display))
> +		return;
> +
>  	if (!dma_fence_is_i915(fence))
>  		return;
>  
> @@ -77,12 +77,14 @@ void intel_display_rps_mark_interactive(struct intel_display *display,
>  					struct intel_atomic_state *state,
>  					bool interactive)
>  {
> -	struct drm_i915_private *i915 = to_i915(display->drm);
> +	if (!intel_parent_rps_available(display))
> +		return;
>  
>  	if (state->rps_interactive == interactive)
>  		return;
>  
> -	intel_rps_mark_interactive(&to_gt(i915)->rps, interactive);
> +	intel_parent_rps_mark_interactive(display, interactive);
> +
>  	state->rps_interactive = interactive;
>  }
>  
> @@ -102,7 +104,5 @@ void ilk_display_rps_disable(struct intel_display *display)
>  
>  void ilk_display_rps_irq_handler(struct intel_display *display)
>  {
> -	struct drm_i915_private *i915 = to_i915(display->drm);
> -
> -	gen5_rps_irq_handler(&to_gt(i915)->rps);
> +	intel_parent_rps_ilk_irq_handler(display);
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_parent.c b/drivers/gpu/drm/i915/display/intel_parent.c
> index 3dd31852e2e1..9370da9d215c 100644
> --- a/drivers/gpu/drm/i915/display/intel_parent.c
> +++ b/drivers/gpu/drm/i915/display/intel_parent.c
> @@ -32,6 +32,29 @@ void intel_parent_irq_synchronize(struct intel_display *display)
>  	display->parent->irq->synchronize(display->drm);
>  }
>  
> +bool intel_parent_rps_available(struct intel_display *display)
> +{
> +	return display->parent->rps;
> +}
> +
> +void intel_parent_rps_boost(struct intel_display *display, struct dma_fence *fence)
> +{
> +	if (display->parent->rps)
> +		display->parent->rps->boost(fence);
> +}
> +
> +void intel_parent_rps_mark_interactive(struct intel_display *display, bool interactive)
> +{
> +	if (display->parent->rps)
> +		display->parent->rps->mark_interactive(display->drm, interactive);
> +}
> +
> +void intel_parent_rps_ilk_irq_handler(struct intel_display *display)
> +{
> +	if (display->parent->rps)
> +		display->parent->rps->ilk_irq_handler(display->drm);
> +}
> +
>  bool intel_parent_vgpu_active(struct intel_display *display)
>  {
>  	return display->parent->vgpu_active && display->parent->vgpu_active(display->drm);
> diff --git a/drivers/gpu/drm/i915/display/intel_parent.h b/drivers/gpu/drm/i915/display/intel_parent.h
> index fc6799db0361..41d6943786fb 100644
> --- a/drivers/gpu/drm/i915/display/intel_parent.h
> +++ b/drivers/gpu/drm/i915/display/intel_parent.h
> @@ -6,11 +6,17 @@
>  
>  #include <linux/types.h>
>  
> +struct dma_fence;
>  struct intel_display;
>  
>  bool intel_parent_irq_enabled(struct intel_display *display);
>  void intel_parent_irq_synchronize(struct intel_display *display);
>  
> +bool intel_parent_rps_available(struct intel_display *display);
> +void intel_parent_rps_boost(struct intel_display *display, struct dma_fence *fence);
> +void intel_parent_rps_mark_interactive(struct intel_display *display, bool interactive);
> +void intel_parent_rps_ilk_irq_handler(struct intel_display *display);
> +
>  bool intel_parent_vgpu_active(struct intel_display *display);
>  
>  bool intel_parent_fence_support_legacy(struct intel_display *display);
> diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
> index b01c837ab646..61d746bda462 100644
> --- a/drivers/gpu/drm/i915/gt/intel_rps.c
> +++ b/drivers/gpu/drm/i915/gt/intel_rps.c
> @@ -6,6 +6,7 @@
>  #include <linux/string_helpers.h>
>  
>  #include <drm/intel/i915_drm.h>
> +#include <drm/intel/display_parent_interface.h>
>  
>  #include "display/intel_display_rps.h"
>  #include "display/vlv_clock.h"
> @@ -2914,6 +2915,39 @@ bool i915_gpu_turbo_disable(void)
>  }
>  EXPORT_SYMBOL_GPL(i915_gpu_turbo_disable);
>  
> +static void boost(struct dma_fence *fence)
> +{
> +	struct i915_request *rq = to_request(fence);
> +
> +	/*
> +	 * If we missed the vblank, but the request is already running it
> +	 * is reasonable to assume that it will complete before the next
> +	 * vblank without our intervention, so leave RPS alone.
> +	 */

Hmm. The comment is now rather detached from the actual vblank
related details. So I'd kinda prefer to keep the comment in the
caller, but then the request started vs. not started stuff gets
confusing. Argh.

Maybe
a) comment in caller and make this .boost_if_not_started()
b) comment here and make this .boost_after_missed_vblank()
?

Dunno.

> +	if (!i915_request_started(rq))
> +		intel_rps_boost(rq);
> +}
> +
> +static void mark_interactive(struct drm_device *drm, bool interactive)
> +{
> +	struct drm_i915_private *i915 = to_i915(drm);
> +
> +	intel_rps_mark_interactive(&to_gt(i915)->rps, interactive);
> +}
> +
> +static void ilk_irq_handler(struct drm_device *drm)
> +{
> +	struct drm_i915_private *i915 = to_i915(drm);
> +
> +	gen5_rps_irq_handler(&to_gt(i915)->rps);
> +}
> +
> +const struct intel_display_rps_interface i915_display_rps_interface = {
> +	.boost = boost,
> +	.mark_interactive = mark_interactive,
> +	.ilk_irq_handler = ilk_irq_handler,
> +};
> +
>  #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
>  #include "selftest_rps.c"
>  #include "selftest_slpc.c"
> diff --git a/drivers/gpu/drm/i915/gt/intel_rps.h b/drivers/gpu/drm/i915/gt/intel_rps.h
> index 92fb01f5a452..5dbcebd7d4a5 100644
> --- a/drivers/gpu/drm/i915/gt/intel_rps.h
> +++ b/drivers/gpu/drm/i915/gt/intel_rps.h
> @@ -128,4 +128,6 @@ static inline void intel_rps_clear_timer(struct intel_rps *rps)
>  	clear_bit(INTEL_RPS_TIMER, &rps->flags);
>  }
>  
> +extern const struct intel_display_rps_interface i915_display_rps_interface;
> +
>  #endif /* INTEL_RPS_H */
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index 814b430de960..ac189b90f985 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -81,6 +81,7 @@
>  #include "gt/intel_gt_pm.h"
>  #include "gt/intel_gt_print.h"
>  #include "gt/intel_rc6.h"
> +#include "gt/intel_rps.h"
>  
>  #include "pxp/intel_pxp.h"
>  #include "pxp/intel_pxp_debugfs.h"
> @@ -752,6 +753,7 @@ static bool fence_support_legacy(struct drm_device *drm)
>  static const struct intel_display_parent_interface parent = {
>  	.rpm = &i915_display_rpm_interface,
>  	.irq = &i915_display_irq_interface,
> +	.rps = &i915_display_rps_interface,
>  	.vgpu_active = vgpu_active,
>  	.fence_support_legacy = fence_support_legacy,
>  };
> diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
> index 11767adb0083..2ea68a31224d 100644
> --- a/include/drm/intel/display_parent_interface.h
> +++ b/include/drm/intel/display_parent_interface.h
> @@ -6,6 +6,7 @@
>  
>  #include <linux/types.h>
>  
> +struct dma_fence;
>  struct drm_device;
>  struct ref_tracker;
>  
> @@ -30,6 +31,12 @@ struct intel_display_irq_interface {
>  	void (*synchronize)(struct drm_device *drm);
>  };
>  
> +struct intel_display_rps_interface {
> +	void (*boost)(struct dma_fence *fence);
> +	void (*mark_interactive)(struct drm_device *drm, bool interactive);
> +	void (*ilk_irq_handler)(struct drm_device *drm);
> +};
> +
>  /**
>   * struct intel_display_parent_interface - services parent driver provides to display
>   *
> @@ -49,6 +56,9 @@ struct intel_display_parent_interface {
>  	/** @irq: IRQ interface */
>  	const struct intel_display_irq_interface *irq;
>  
> +	/** @rpm: RPS interface. Optional. */
> +	const struct intel_display_rps_interface *rps;
> +
>  	/** @vgpu_active: Is vGPU active? Optional. */
>  	bool (*vgpu_active)(struct drm_device *drm);
>  
> -- 
> 2.47.3

-- 
Ville Syrjälä
Intel

Re: [PATCH 08/10] drm/i915/rps: postpone i915 fence check to boost

[Ville Syrjälä]

On Fri, Nov 14, 2025 at 12:26:47PM +0200, Jani Nikula wrote:
> Make the RPS boost code independent of i915 request code by moving the
> dma_fence_is_i915() check to the RPS boost call.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> 
> ---
> 
> I'm not actually sure what the non-i915 fences would be here, and what
> kind of overhead they would cause.

The fence could be from another GPU driver that did the rendering,
and then we can't convert the fence to i915 request.

At some point we should probably look into using the fence
.set_deadline() stuff instead of this "boost when late"
approach, but that's one of those things that probably needs
some amount of hand tuning, so real work required.

Anyways I think this should be fine, we just set up the vblank
miss thingy even for non-i915 fences now and then do nothing
if it triggers.

aReviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display_rps.c | 4 ----
>  drivers/gpu/drm/i915/gt/intel_rps.c              | 7 ++++++-
>  2 files changed, 6 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_rps.c b/drivers/gpu/drm/i915/display/intel_display_rps.c
> index e70c4f0eab80..86e757423c0a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_rps.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_rps.c
> @@ -9,7 +9,6 @@
>  #include <drm/drm_vblank.h>
>  
>  #include "i915_reg.h"
> -#include "i915_request.h"
>  #include "intel_display_core.h"
>  #include "intel_display_irq.h"
>  #include "intel_display_rps.h"
> @@ -49,9 +48,6 @@ void intel_display_rps_boost_after_vblank(struct drm_crtc *crtc,
>  	if (!intel_parent_rps_available(display))
>  		return;
>  
> -	if (!dma_fence_is_i915(fence))
> -		return;
> -
>  	if (DISPLAY_VER(display) < 6)
>  		return;
>  
> diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
> index 61d746bda462..05b21de6c24b 100644
> --- a/drivers/gpu/drm/i915/gt/intel_rps.c
> +++ b/drivers/gpu/drm/i915/gt/intel_rps.c
> @@ -2917,7 +2917,12 @@ EXPORT_SYMBOL_GPL(i915_gpu_turbo_disable);
>  
>  static void boost(struct dma_fence *fence)
>  {
> -	struct i915_request *rq = to_request(fence);
> +	struct i915_request *rq;
> +
> +	if (!dma_fence_is_i915(fence))
> +		return;
> +
> +	rq = to_request(fence);
>  
>  	/*
>  	 * If we missed the vblank, but the request is already running it
> -- 
> 2.47.3

-- 
Ville Syrjälä
Intel

Re: [PATCH 09/10] drm/i915: add .fence_priority_display to parent interface

[Ville Syrjälä]

On Fri, Nov 14, 2025 at 12:26:48PM +0200, Jani Nikula wrote:
> Add .fence_priority_display() to display parent interface, removing a
> display dependency on gem/i915_gem_object.h.
> 
> This allows us to remove the xe compat gem/i915_gem_object.h.
> 
> v2: Don't mix this with the rps interface (Ville)
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_parent.c         |  6 ++++++
>  drivers/gpu/drm/i915/display/intel_parent.h         |  2 ++
>  drivers/gpu/drm/i915/display/intel_plane.c          |  5 ++---
>  drivers/gpu/drm/i915/i915_driver.c                  |  7 +++++++
>  .../xe/compat-i915-headers/gem/i915_gem_object.h    | 13 -------------
>  include/drm/intel/display_parent_interface.h        |  3 +++
>  6 files changed, 20 insertions(+), 16 deletions(-)
>  delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_parent.c b/drivers/gpu/drm/i915/display/intel_parent.c
> index 9370da9d215c..789bc11a324c 100644
> --- a/drivers/gpu/drm/i915/display/intel_parent.c
> +++ b/drivers/gpu/drm/i915/display/intel_parent.c
> @@ -64,3 +64,9 @@ bool intel_parent_fence_support_legacy(struct intel_display *display)
>  {
>  	return display->parent->fence_support_legacy && display->parent->fence_support_legacy(display->drm);
>  }
> +
> +void intel_parent_fence_priority_display(struct intel_display *display, struct dma_fence *fence)
> +{
> +	if (display->parent->fence_priority_display)
> +		display->parent->fence_priority_display(fence);
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_parent.h b/drivers/gpu/drm/i915/display/intel_parent.h
> index 41d6943786fb..b3cce2c6b017 100644
> --- a/drivers/gpu/drm/i915/display/intel_parent.h
> +++ b/drivers/gpu/drm/i915/display/intel_parent.h
> @@ -21,4 +21,6 @@ bool intel_parent_vgpu_active(struct intel_display *display);
>  
>  bool intel_parent_fence_support_legacy(struct intel_display *display);
>  
> +void intel_parent_fence_priority_display(struct intel_display *display, struct dma_fence *fence);
> +
>  #endif /* __INTEL_PARENT_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c
> index 5105e3278bc4..a7fec5ba6ac0 100644
> --- a/drivers/gpu/drm/i915/display/intel_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_plane.c
> @@ -45,7 +45,6 @@
>  #include <drm/drm_panic.h>
>  #include <drm/drm_print.h>
>  
> -#include "gem/i915_gem_object.h"
>  #include "i9xx_plane_regs.h"
>  #include "intel_cdclk.h"
>  #include "intel_cursor.h"
> @@ -56,6 +55,7 @@
>  #include "intel_fb_pin.h"
>  #include "intel_fbdev.h"
>  #include "intel_panic.h"
> +#include "intel_parent.h"
>  #include "intel_plane.h"
>  #include "intel_psr.h"
>  #include "skl_scaler.h"
> @@ -1180,8 +1180,7 @@ intel_prepare_plane_fb(struct drm_plane *_plane,
>  		goto unpin_fb;
>  
>  	if (new_plane_state->uapi.fence) {
> -		i915_gem_fence_wait_priority_display(new_plane_state->uapi.fence);
> -
> +		intel_parent_fence_priority_display(display, new_plane_state->uapi.fence);
>  		intel_display_rps_boost_after_vblank(new_plane_state->hw.crtc,
>  						     new_plane_state->uapi.fence);
>  	}
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index ac189b90f985..7cc74b76774a 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -750,12 +750,19 @@ static bool fence_support_legacy(struct drm_device *drm)
>  	return intel_gt_support_legacy_fencing(to_gt(to_i915(drm)));
>  }
>  
> +static void fence_priority_display(struct dma_fence *fence)
> +{
> +	if (dma_fence_is_i915(fence))
> +		i915_gem_fence_wait_priority_display(fence);
> +}
> +
>  static const struct intel_display_parent_interface parent = {
>  	.rpm = &i915_display_rpm_interface,
>  	.irq = &i915_display_irq_interface,
>  	.rps = &i915_display_rps_interface,
>  	.vgpu_active = vgpu_active,
>  	.fence_support_legacy = fence_support_legacy,
> +	.fence_priority_display = fence_priority_display,
>  };
>  
>  const struct intel_display_parent_interface *i915_driver_parent_interface(void)
> diff --git a/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h b/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h
> deleted file mode 100644
> index 0548b2e0316f..000000000000
> --- a/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h
> +++ /dev/null
> @@ -1,13 +0,0 @@
> -/* SPDX-License-Identifier: MIT */
> -/* Copyright © 2025 Intel Corporation */
> -
> -#ifndef __I915_GEM_OBJECT_H__
> -#define __I915_GEM_OBJECT_H__
> -
> -struct dma_fence;
> -
> -static inline void i915_gem_fence_wait_priority_display(struct dma_fence *fence)
> -{
> -}
> -
> -#endif
> diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
> index 2ea68a31224d..fd066309184d 100644
> --- a/include/drm/intel/display_parent_interface.h
> +++ b/include/drm/intel/display_parent_interface.h
> @@ -64,6 +64,9 @@ struct intel_display_parent_interface {
>  
>  	/** @fence_support_legacy: Support legacy fencing? Optional. */
>  	bool (*fence_support_legacy)(struct drm_device *drm);
> +
> +	/** @fence_priority_display: Set display priority. Optional. */
> +	void (*fence_priority_display)(struct dma_fence *fence);
>  };
>  
>  #endif
> -- 
> 2.47.3

-- 
Ville Syrjälä
Intel

Re: [PATCH 10/10] drm/xe/rps: build RPS as part of xe

[Ville Syrjälä]

On Fri, Nov 14, 2025 at 12:26:49PM +0200, Jani Nikula wrote:
> Reduce the conditional compilation in i915 by building
> intel_display_rps.c as part of the xe module. This doesn't actually
> enable RPS on xe, because there's no parent interface implementation on
> xe side, but it's a step in the right direction.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  .../gpu/drm/i915/display/intel_display_rps.h  | 21 -------------------
>  drivers/gpu/drm/xe/Makefile                   |  1 +
>  2 files changed, 1 insertion(+), 21 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_rps.h b/drivers/gpu/drm/i915/display/intel_display_rps.h
> index 183d154f2c7c..96b1fd00ead4 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_rps.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_rps.h
> @@ -13,7 +13,6 @@ struct drm_crtc;
>  struct intel_atomic_state;
>  struct intel_display;
>  
> -#ifdef I915
>  void intel_display_rps_boost_after_vblank(struct drm_crtc *crtc,
>  					  struct dma_fence *fence);
>  void intel_display_rps_mark_interactive(struct intel_display *display,
> @@ -22,25 +21,5 @@ void intel_display_rps_mark_interactive(struct intel_display *display,
>  void ilk_display_rps_enable(struct intel_display *display);
>  void ilk_display_rps_disable(struct intel_display *display);
>  void ilk_display_rps_irq_handler(struct intel_display *display);
> -#else
> -static inline void intel_display_rps_boost_after_vblank(struct drm_crtc *crtc,
> -							struct dma_fence *fence)
> -{
> -}
> -static inline void intel_display_rps_mark_interactive(struct intel_display *display,
> -						      struct intel_atomic_state *state,
> -						      bool interactive)
> -{
> -}
> -static inline void ilk_display_rps_enable(struct intel_display *display)
> -{
> -}
> -static inline void ilk_display_rps_disable(struct intel_display *display)
> -{
> -}
> -static inline void ilk_display_rps_irq_handler(struct intel_display *display)
> -{
> -}
> -#endif
>  
>  #endif /* __INTEL_DISPLAY_RPS_H__ */
> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> index c2d2303a8198..1a3aa041820d 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -259,6 +259,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
>  	i915-display/intel_display_power_map.o \
>  	i915-display/intel_display_power_well.o \
>  	i915-display/intel_display_rpm.o \
> +	i915-display/intel_display_rps.o \
>  	i915-display/intel_display_trace.o \
>  	i915-display/intel_display_utils.o \
>  	i915-display/intel_display_wa.o \
> -- 
> 2.47.3

-- 
Ville Syrjälä
Intel

Re: [PATCH 08/10] drm/i915/rps: postpone i915 fence check to boost

[Ville Syrjälä]

On Fri, Nov 14, 2025 at 04:15:59PM +0200, Ville Syrjälä wrote:
> On Fri, Nov 14, 2025 at 12:26:47PM +0200, Jani Nikula wrote:
> > Make the RPS boost code independent of i915 request code by moving the
> > dma_fence_is_i915() check to the RPS boost call.
> > 
> > Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> > 
> > ---
> > 
> > I'm not actually sure what the non-i915 fences would be here, and what
> > kind of overhead they would cause.
> 
> The fence could be from another GPU driver that did the rendering,
> and then we can't convert the fence to i915 request.
> 
> At some point we should probably look into using the fence
> .set_deadline() stuff instead of this "boost when late"
> approach, but that's one of those things that probably needs
> some amount of hand tuning, so real work required.
> 
> Anyways I think this should be fine, we just set up the vblank
> miss thingy even for non-i915 fences now and then do nothing
> if it triggers.
> 
> aReviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Rather
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> 
> > ---
> >  drivers/gpu/drm/i915/display/intel_display_rps.c | 4 ----
> >  drivers/gpu/drm/i915/gt/intel_rps.c              | 7 ++++++-
> >  2 files changed, 6 insertions(+), 5 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_rps.c b/drivers/gpu/drm/i915/display/intel_display_rps.c
> > index e70c4f0eab80..86e757423c0a 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_rps.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_rps.c
> > @@ -9,7 +9,6 @@
> >  #include <drm/drm_vblank.h>
> >  
> >  #include "i915_reg.h"
> > -#include "i915_request.h"
> >  #include "intel_display_core.h"
> >  #include "intel_display_irq.h"
> >  #include "intel_display_rps.h"
> > @@ -49,9 +48,6 @@ void intel_display_rps_boost_after_vblank(struct drm_crtc *crtc,
> >  	if (!intel_parent_rps_available(display))
> >  		return;
> >  
> > -	if (!dma_fence_is_i915(fence))
> > -		return;
> > -
> >  	if (DISPLAY_VER(display) < 6)
> >  		return;
> >  
> > diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
> > index 61d746bda462..05b21de6c24b 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_rps.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_rps.c
> > @@ -2917,7 +2917,12 @@ EXPORT_SYMBOL_GPL(i915_gpu_turbo_disable);
> >  
> >  static void boost(struct dma_fence *fence)
> >  {
> > -	struct i915_request *rq = to_request(fence);
> > +	struct i915_request *rq;
> > +
> > +	if (!dma_fence_is_i915(fence))
> > +		return;
> > +
> > +	rq = to_request(fence);
> >  
> >  	/*
> >  	 * If we missed the vblank, but the request is already running it
> > -- 
> > 2.47.3
> 
> -- 
> Ville Syrjälä
> Intel

-- 
Ville Syrjälä
Intel

[PATCH v2] FIXME drm/i915: add .has_fenced_regions to parent interface

[Jani Nikula]

Add .has_fenced_regions() to display parent interface, removing more
dependencies on struct drm_i915_private, i915_drv.h, and
gt/intel_gt_types.h.

This allows us to remove the xe compat gt/intel_gt_types.h.

v2: s/fence_support_legacy/has_fenced_regions/ (Ville)

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c              |  8 ++------
 drivers/gpu/drm/i915/display/intel_parent.c           |  5 +++++
 drivers/gpu/drm/i915/display/intel_parent.h           |  2 ++
 drivers/gpu/drm/i915/i915_driver.c                    |  6 ++++++
 .../drm/xe/compat-i915-headers/gt/intel_gt_types.h    | 11 -----------
 include/drm/intel/display_parent_interface.h          |  3 +++
 6 files changed, 18 insertions(+), 17 deletions(-)
 delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/gt/intel_gt_types.h

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index ab0bcea5aa89..2facd368a068 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -47,9 +47,6 @@
 
 #include "gem/i915_gem_stolen.h"
 
-#include "gt/intel_gt_types.h"
-
-#include "i915_drv.h"
 #include "i915_vma.h"
 #include "i9xx_plane_regs.h"
 #include "intel_de.h"
@@ -64,6 +61,7 @@
 #include "intel_fbc_regs.h"
 #include "intel_frontbuffer.h"
 #include "intel_parent.h"
+#include "intel_step.h"
 
 #define for_each_fbc_id(__display, __fbc_id) \
 	for ((__fbc_id) = INTEL_FBC_A; (__fbc_id) < I915_MAX_FBCS; (__fbc_id)++) \
@@ -267,9 +265,7 @@ static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state *plane_s
 
 static bool intel_fbc_has_fences(struct intel_display *display)
 {
-	struct drm_i915_private __maybe_unused *i915 = to_i915(display->drm);
-
-	return intel_gt_support_legacy_fencing(to_gt(i915));
+	return intel_parent_has_fenced_regions(display);
 }
 
 static u32 i8xx_fbc_ctl(struct intel_fbc *fbc)
diff --git a/drivers/gpu/drm/i915/display/intel_parent.c b/drivers/gpu/drm/i915/display/intel_parent.c
index 3786fd42827d..535065e57213 100644
--- a/drivers/gpu/drm/i915/display/intel_parent.c
+++ b/drivers/gpu/drm/i915/display/intel_parent.c
@@ -36,3 +36,8 @@ bool intel_parent_vgpu_active(struct intel_display *display)
 {
 	return display->parent->vgpu_active && display->parent->vgpu_active(display->drm);
 }
+
+bool intel_parent_has_fenced_regions(struct intel_display *display)
+{
+	return display->parent->has_fenced_regions && display->parent->has_fenced_regions(display->drm);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_parent.h b/drivers/gpu/drm/i915/display/intel_parent.h
index 222c95836d35..04320d937777 100644
--- a/drivers/gpu/drm/i915/display/intel_parent.h
+++ b/drivers/gpu/drm/i915/display/intel_parent.h
@@ -13,4 +13,6 @@ void intel_parent_irq_synchronize(struct intel_display *display);
 
 bool intel_parent_vgpu_active(struct intel_display *display);
 
+bool intel_parent_has_fenced_regions(struct intel_display *display);
+
 #endif /* __INTEL_PARENT_H__ */
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index f21f1919a225..9ba46850da72 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -744,10 +744,16 @@ static bool vgpu_active(struct drm_device *drm)
 	return intel_vgpu_active(to_i915(drm));
 }
 
+static bool has_fenced_regions(struct drm_device *drm)
+{
+	return intel_gt_support_legacy_fencing(to_gt(to_i915(drm)));
+}
+
 static const struct intel_display_parent_interface parent = {
 	.rpm = &i915_display_rpm_interface,
 	.irq = &i915_display_irq_interface,
 	.vgpu_active = vgpu_active,
+	.has_fenced_regions = has_fenced_regions,
 };
 
 const struct intel_display_parent_interface *i915_driver_parent_interface(void)
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/gt/intel_gt_types.h b/drivers/gpu/drm/xe/compat-i915-headers/gt/intel_gt_types.h
deleted file mode 100644
index c15806d6c4f7..000000000000
--- a/drivers/gpu/drm/xe/compat-i915-headers/gt/intel_gt_types.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#ifndef __INTEL_GT_TYPES__
-#define __INTEL_GT_TYPES__
-
-#define intel_gt_support_legacy_fencing(gt) 0
-
-#endif
diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
index f3834f36ce74..927d964f2071 100644
--- a/include/drm/intel/display_parent_interface.h
+++ b/include/drm/intel/display_parent_interface.h
@@ -51,6 +51,9 @@ struct intel_display_parent_interface {
 
 	/** @vgpu_active: Is vGPU active? Optional. */
 	bool (*vgpu_active)(struct drm_device *drm);
+
+	/** @has_fenced_regions: Support legacy fencing? Optional. */
+	bool (*has_fenced_regions)(struct drm_device *drm);
 };
 
 #endif
-- 
2.47.3

Re: [PATCH v2] FIXME drm/i915: add .has_fenced_regions to parent interface

[Jani Nikula]

Note: This is the real thing, FIXME slipped through.

On Fri, 14 Nov 2025, Jani Nikula <jani.nikula@intel.com> wrote:
> Add .has_fenced_regions() to display parent interface, removing more
> dependencies on struct drm_i915_private, i915_drv.h, and
> gt/intel_gt_types.h.
>
> This allows us to remove the xe compat gt/intel_gt_types.h.
>
> v2: s/fence_support_legacy/has_fenced_regions/ (Ville)
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c              |  8 ++------
>  drivers/gpu/drm/i915/display/intel_parent.c           |  5 +++++
>  drivers/gpu/drm/i915/display/intel_parent.h           |  2 ++
>  drivers/gpu/drm/i915/i915_driver.c                    |  6 ++++++
>  .../drm/xe/compat-i915-headers/gt/intel_gt_types.h    | 11 -----------
>  include/drm/intel/display_parent_interface.h          |  3 +++
>  6 files changed, 18 insertions(+), 17 deletions(-)
>  delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/gt/intel_gt_types.h
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index ab0bcea5aa89..2facd368a068 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -47,9 +47,6 @@
>  
>  #include "gem/i915_gem_stolen.h"
>  
> -#include "gt/intel_gt_types.h"
> -
> -#include "i915_drv.h"
>  #include "i915_vma.h"
>  #include "i9xx_plane_regs.h"
>  #include "intel_de.h"
> @@ -64,6 +61,7 @@
>  #include "intel_fbc_regs.h"
>  #include "intel_frontbuffer.h"
>  #include "intel_parent.h"
> +#include "intel_step.h"
>  
>  #define for_each_fbc_id(__display, __fbc_id) \
>  	for ((__fbc_id) = INTEL_FBC_A; (__fbc_id) < I915_MAX_FBCS; (__fbc_id)++) \
> @@ -267,9 +265,7 @@ static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state *plane_s
>  
>  static bool intel_fbc_has_fences(struct intel_display *display)
>  {
> -	struct drm_i915_private __maybe_unused *i915 = to_i915(display->drm);
> -
> -	return intel_gt_support_legacy_fencing(to_gt(i915));
> +	return intel_parent_has_fenced_regions(display);
>  }
>  
>  static u32 i8xx_fbc_ctl(struct intel_fbc *fbc)
> diff --git a/drivers/gpu/drm/i915/display/intel_parent.c b/drivers/gpu/drm/i915/display/intel_parent.c
> index 3786fd42827d..535065e57213 100644
> --- a/drivers/gpu/drm/i915/display/intel_parent.c
> +++ b/drivers/gpu/drm/i915/display/intel_parent.c
> @@ -36,3 +36,8 @@ bool intel_parent_vgpu_active(struct intel_display *display)
>  {
>  	return display->parent->vgpu_active && display->parent->vgpu_active(display->drm);
>  }
> +
> +bool intel_parent_has_fenced_regions(struct intel_display *display)
> +{
> +	return display->parent->has_fenced_regions && display->parent->has_fenced_regions(display->drm);
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_parent.h b/drivers/gpu/drm/i915/display/intel_parent.h
> index 222c95836d35..04320d937777 100644
> --- a/drivers/gpu/drm/i915/display/intel_parent.h
> +++ b/drivers/gpu/drm/i915/display/intel_parent.h
> @@ -13,4 +13,6 @@ void intel_parent_irq_synchronize(struct intel_display *display);
>  
>  bool intel_parent_vgpu_active(struct intel_display *display);
>  
> +bool intel_parent_has_fenced_regions(struct intel_display *display);
> +
>  #endif /* __INTEL_PARENT_H__ */
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index f21f1919a225..9ba46850da72 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -744,10 +744,16 @@ static bool vgpu_active(struct drm_device *drm)
>  	return intel_vgpu_active(to_i915(drm));
>  }
>  
> +static bool has_fenced_regions(struct drm_device *drm)
> +{
> +	return intel_gt_support_legacy_fencing(to_gt(to_i915(drm)));
> +}
> +
>  static const struct intel_display_parent_interface parent = {
>  	.rpm = &i915_display_rpm_interface,
>  	.irq = &i915_display_irq_interface,
>  	.vgpu_active = vgpu_active,
> +	.has_fenced_regions = has_fenced_regions,
>  };
>  
>  const struct intel_display_parent_interface *i915_driver_parent_interface(void)
> diff --git a/drivers/gpu/drm/xe/compat-i915-headers/gt/intel_gt_types.h b/drivers/gpu/drm/xe/compat-i915-headers/gt/intel_gt_types.h
> deleted file mode 100644
> index c15806d6c4f7..000000000000
> --- a/drivers/gpu/drm/xe/compat-i915-headers/gt/intel_gt_types.h
> +++ /dev/null
> @@ -1,11 +0,0 @@
> -/* SPDX-License-Identifier: MIT */
> -/*
> - * Copyright © 2023 Intel Corporation
> - */
> -
> -#ifndef __INTEL_GT_TYPES__
> -#define __INTEL_GT_TYPES__
> -
> -#define intel_gt_support_legacy_fencing(gt) 0
> -
> -#endif
> diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
> index f3834f36ce74..927d964f2071 100644
> --- a/include/drm/intel/display_parent_interface.h
> +++ b/include/drm/intel/display_parent_interface.h
> @@ -51,6 +51,9 @@ struct intel_display_parent_interface {
>  
>  	/** @vgpu_active: Is vGPU active? Optional. */
>  	bool (*vgpu_active)(struct drm_device *drm);
> +
> +	/** @has_fenced_regions: Support legacy fencing? Optional. */
> +	bool (*has_fenced_regions)(struct drm_device *drm);
>  };
>  
>  #endif

-- 
Jani Nikula, Intel

[PATCH v2] drm/i915/rps: call RPS functions via the parent interface

[Jani Nikula]

Add struct intel_display_rps_interface to the display parent interface,
and call the RPS functions through it. The RPS interface is optional.

v2: s/boost/boost_if_not_started/ and keep comment in caller (Ville)

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../gpu/drm/i915/display/intel_display_rps.c  | 27 ++++++++++-------
 drivers/gpu/drm/i915/display/intel_parent.c   | 23 +++++++++++++++
 drivers/gpu/drm/i915/display/intel_parent.h   |  6 ++++
 drivers/gpu/drm/i915/gt/intel_rps.c           | 29 +++++++++++++++++++
 drivers/gpu/drm/i915/gt/intel_rps.h           |  2 ++
 drivers/gpu/drm/i915/i915_driver.c            |  2 ++
 include/drm/intel/display_parent_interface.h  | 10 +++++++
 7 files changed, 88 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_rps.c b/drivers/gpu/drm/i915/display/intel_display_rps.c
index b6720f7c09d9..d639d9152bf5 100644
--- a/drivers/gpu/drm/i915/display/intel_display_rps.c
+++ b/drivers/gpu/drm/i915/display/intel_display_rps.c
@@ -3,16 +3,18 @@
  * Copyright © 2023 Intel Corporation
  */
 
+#include <linux/dma-fence.h>
+
 #include <drm/drm_crtc.h>
 #include <drm/drm_vblank.h>
 
-#include "gt/intel_rps.h"
-#include "i915_drv.h"
 #include "i915_reg.h"
+#include "i915_request.h"
 #include "intel_display_core.h"
 #include "intel_display_irq.h"
 #include "intel_display_rps.h"
 #include "intel_display_types.h"
+#include "intel_parent.h"
 
 struct wait_rps_boost {
 	struct wait_queue_entry wait;
@@ -25,15 +27,15 @@ static int do_rps_boost(struct wait_queue_entry *_wait,
 			unsigned mode, int sync, void *key)
 {
 	struct wait_rps_boost *wait = container_of(_wait, typeof(*wait), wait);
-	struct i915_request *rq = to_request(wait->fence);
+	struct intel_display *display = to_intel_display(wait->crtc->dev);
 
 	/*
 	 * If we missed the vblank, but the request is already running it
 	 * is reasonable to assume that it will complete before the next
-	 * vblank without our intervention, so leave RPS alone.
+	 * vblank without our intervention, so leave RPS alone if not started.
 	 */
-	if (!i915_request_started(rq))
-		intel_rps_boost(rq);
+	intel_parent_rps_boost_if_not_started(display, wait->fence);
+
 	dma_fence_put(wait->fence);
 
 	drm_crtc_vblank_put(wait->crtc);
@@ -49,6 +51,9 @@ void intel_display_rps_boost_after_vblank(struct drm_crtc *crtc,
 	struct intel_display *display = to_intel_display(crtc->dev);
 	struct wait_rps_boost *wait;
 
+	if (!intel_parent_rps_available(display))
+		return;
+
 	if (!dma_fence_is_i915(fence))
 		return;
 
@@ -77,12 +82,14 @@ void intel_display_rps_mark_interactive(struct intel_display *display,
 					struct intel_atomic_state *state,
 					bool interactive)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
+	if (!intel_parent_rps_available(display))
+		return;
 
 	if (state->rps_interactive == interactive)
 		return;
 
-	intel_rps_mark_interactive(&to_gt(i915)->rps, interactive);
+	intel_parent_rps_mark_interactive(display, interactive);
+
 	state->rps_interactive = interactive;
 }
 
@@ -102,7 +109,5 @@ void ilk_display_rps_disable(struct intel_display *display)
 
 void ilk_display_rps_irq_handler(struct intel_display *display)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
-
-	gen5_rps_irq_handler(&to_gt(i915)->rps);
+	intel_parent_rps_ilk_irq_handler(display);
 }
diff --git a/drivers/gpu/drm/i915/display/intel_parent.c b/drivers/gpu/drm/i915/display/intel_parent.c
index 535065e57213..6c131196718e 100644
--- a/drivers/gpu/drm/i915/display/intel_parent.c
+++ b/drivers/gpu/drm/i915/display/intel_parent.c
@@ -32,6 +32,29 @@ void intel_parent_irq_synchronize(struct intel_display *display)
 	display->parent->irq->synchronize(display->drm);
 }
 
+bool intel_parent_rps_available(struct intel_display *display)
+{
+	return display->parent->rps;
+}
+
+void intel_parent_rps_boost_if_not_started(struct intel_display *display, struct dma_fence *fence)
+{
+	if (display->parent->rps)
+		display->parent->rps->boost_if_not_started(fence);
+}
+
+void intel_parent_rps_mark_interactive(struct intel_display *display, bool interactive)
+{
+	if (display->parent->rps)
+		display->parent->rps->mark_interactive(display->drm, interactive);
+}
+
+void intel_parent_rps_ilk_irq_handler(struct intel_display *display)
+{
+	if (display->parent->rps)
+		display->parent->rps->ilk_irq_handler(display->drm);
+}
+
 bool intel_parent_vgpu_active(struct intel_display *display)
 {
 	return display->parent->vgpu_active && display->parent->vgpu_active(display->drm);
diff --git a/drivers/gpu/drm/i915/display/intel_parent.h b/drivers/gpu/drm/i915/display/intel_parent.h
index 04320d937777..12cfbea95aa1 100644
--- a/drivers/gpu/drm/i915/display/intel_parent.h
+++ b/drivers/gpu/drm/i915/display/intel_parent.h
@@ -6,11 +6,17 @@
 
 #include <linux/types.h>
 
+struct dma_fence;
 struct intel_display;
 
 bool intel_parent_irq_enabled(struct intel_display *display);
 void intel_parent_irq_synchronize(struct intel_display *display);
 
+bool intel_parent_rps_available(struct intel_display *display);
+void intel_parent_rps_boost_if_not_started(struct intel_display *display, struct dma_fence *fence);
+void intel_parent_rps_mark_interactive(struct intel_display *display, bool interactive);
+void intel_parent_rps_ilk_irq_handler(struct intel_display *display);
+
 bool intel_parent_vgpu_active(struct intel_display *display);
 
 bool intel_parent_has_fenced_regions(struct intel_display *display);
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index b01c837ab646..c42a1ee42b58 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -6,6 +6,7 @@
 #include <linux/string_helpers.h>
 
 #include <drm/intel/i915_drm.h>
+#include <drm/intel/display_parent_interface.h>
 
 #include "display/intel_display_rps.h"
 #include "display/vlv_clock.h"
@@ -2914,6 +2915,34 @@ bool i915_gpu_turbo_disable(void)
 }
 EXPORT_SYMBOL_GPL(i915_gpu_turbo_disable);
 
+static void boost_if_not_started(struct dma_fence *fence)
+{
+	struct i915_request *rq = to_request(fence);
+
+	if (!i915_request_started(rq))
+		intel_rps_boost(rq);
+}
+
+static void mark_interactive(struct drm_device *drm, bool interactive)
+{
+	struct drm_i915_private *i915 = to_i915(drm);
+
+	intel_rps_mark_interactive(&to_gt(i915)->rps, interactive);
+}
+
+static void ilk_irq_handler(struct drm_device *drm)
+{
+	struct drm_i915_private *i915 = to_i915(drm);
+
+	gen5_rps_irq_handler(&to_gt(i915)->rps);
+}
+
+const struct intel_display_rps_interface i915_display_rps_interface = {
+	.boost_if_not_started = boost_if_not_started,
+	.mark_interactive = mark_interactive,
+	.ilk_irq_handler = ilk_irq_handler,
+};
+
 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
 #include "selftest_rps.c"
 #include "selftest_slpc.c"
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.h b/drivers/gpu/drm/i915/gt/intel_rps.h
index 92fb01f5a452..5dbcebd7d4a5 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.h
+++ b/drivers/gpu/drm/i915/gt/intel_rps.h
@@ -128,4 +128,6 @@ static inline void intel_rps_clear_timer(struct intel_rps *rps)
 	clear_bit(INTEL_RPS_TIMER, &rps->flags);
 }
 
+extern const struct intel_display_rps_interface i915_display_rps_interface;
+
 #endif /* INTEL_RPS_H */
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 9ba46850da72..7e1dedabf0ee 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -81,6 +81,7 @@
 #include "gt/intel_gt_pm.h"
 #include "gt/intel_gt_print.h"
 #include "gt/intel_rc6.h"
+#include "gt/intel_rps.h"
 
 #include "pxp/intel_pxp.h"
 #include "pxp/intel_pxp_debugfs.h"
@@ -752,6 +753,7 @@ static bool has_fenced_regions(struct drm_device *drm)
 static const struct intel_display_parent_interface parent = {
 	.rpm = &i915_display_rpm_interface,
 	.irq = &i915_display_irq_interface,
+	.rps = &i915_display_rps_interface,
 	.vgpu_active = vgpu_active,
 	.has_fenced_regions = has_fenced_regions,
 };
diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
index 927d964f2071..0a6a26234fbe 100644
--- a/include/drm/intel/display_parent_interface.h
+++ b/include/drm/intel/display_parent_interface.h
@@ -6,6 +6,7 @@
 
 #include <linux/types.h>
 
+struct dma_fence;
 struct drm_device;
 struct ref_tracker;
 
@@ -30,6 +31,12 @@ struct intel_display_irq_interface {
 	void (*synchronize)(struct drm_device *drm);
 };
 
+struct intel_display_rps_interface {
+	void (*boost_if_not_started)(struct dma_fence *fence);
+	void (*mark_interactive)(struct drm_device *drm, bool interactive);
+	void (*ilk_irq_handler)(struct drm_device *drm);
+};
+
 /**
  * struct intel_display_parent_interface - services parent driver provides to display
  *
@@ -49,6 +56,9 @@ struct intel_display_parent_interface {
 	/** @irq: IRQ interface */
 	const struct intel_display_irq_interface *irq;
 
+	/** @rpm: RPS interface. Optional. */
+	const struct intel_display_rps_interface *rps;
+
 	/** @vgpu_active: Is vGPU active? Optional. */
 	bool (*vgpu_active)(struct drm_device *drm);
 
-- 
2.47.3

[PATCH v3] drm/i915: add .fence_priority_display to parent interface

[Jani Nikula]

Add .fence_priority_display() to display parent interface, removing a
display dependency on gem/i915_gem_object.h.

This allows us to remove the xe compat gem/i915_gem_object.h.

v2: Don't mix this with the rps interface (Ville)

v3: Rebase

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_parent.c         |  6 ++++++
 drivers/gpu/drm/i915/display/intel_parent.h         |  2 ++
 drivers/gpu/drm/i915/display/intel_plane.c          |  5 ++---
 drivers/gpu/drm/i915/i915_driver.c                  |  7 +++++++
 .../xe/compat-i915-headers/gem/i915_gem_object.h    | 13 -------------
 include/drm/intel/display_parent_interface.h        |  3 +++
 6 files changed, 20 insertions(+), 16 deletions(-)
 delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h

diff --git a/drivers/gpu/drm/i915/display/intel_parent.c b/drivers/gpu/drm/i915/display/intel_parent.c
index 6c131196718e..27c7ef34ce48 100644
--- a/drivers/gpu/drm/i915/display/intel_parent.c
+++ b/drivers/gpu/drm/i915/display/intel_parent.c
@@ -64,3 +64,9 @@ bool intel_parent_has_fenced_regions(struct intel_display *display)
 {
 	return display->parent->has_fenced_regions && display->parent->has_fenced_regions(display->drm);
 }
+
+void intel_parent_fence_priority_display(struct intel_display *display, struct dma_fence *fence)
+{
+	if (display->parent->fence_priority_display)
+		display->parent->fence_priority_display(fence);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_parent.h b/drivers/gpu/drm/i915/display/intel_parent.h
index 12cfbea95aa1..a8ca40b57ea9 100644
--- a/drivers/gpu/drm/i915/display/intel_parent.h
+++ b/drivers/gpu/drm/i915/display/intel_parent.h
@@ -21,4 +21,6 @@ bool intel_parent_vgpu_active(struct intel_display *display);
 
 bool intel_parent_has_fenced_regions(struct intel_display *display);
 
+void intel_parent_fence_priority_display(struct intel_display *display, struct dma_fence *fence);
+
 #endif /* __INTEL_PARENT_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c
index 5105e3278bc4..a7fec5ba6ac0 100644
--- a/drivers/gpu/drm/i915/display/intel_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_plane.c
@@ -45,7 +45,6 @@
 #include <drm/drm_panic.h>
 #include <drm/drm_print.h>
 
-#include "gem/i915_gem_object.h"
 #include "i9xx_plane_regs.h"
 #include "intel_cdclk.h"
 #include "intel_cursor.h"
@@ -56,6 +55,7 @@
 #include "intel_fb_pin.h"
 #include "intel_fbdev.h"
 #include "intel_panic.h"
+#include "intel_parent.h"
 #include "intel_plane.h"
 #include "intel_psr.h"
 #include "skl_scaler.h"
@@ -1180,8 +1180,7 @@ intel_prepare_plane_fb(struct drm_plane *_plane,
 		goto unpin_fb;
 
 	if (new_plane_state->uapi.fence) {
-		i915_gem_fence_wait_priority_display(new_plane_state->uapi.fence);
-
+		intel_parent_fence_priority_display(display, new_plane_state->uapi.fence);
 		intel_display_rps_boost_after_vblank(new_plane_state->hw.crtc,
 						     new_plane_state->uapi.fence);
 	}
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 7e1dedabf0ee..7c60b6873934 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -750,12 +750,19 @@ static bool has_fenced_regions(struct drm_device *drm)
 	return intel_gt_support_legacy_fencing(to_gt(to_i915(drm)));
 }
 
+static void fence_priority_display(struct dma_fence *fence)
+{
+	if (dma_fence_is_i915(fence))
+		i915_gem_fence_wait_priority_display(fence);
+}
+
 static const struct intel_display_parent_interface parent = {
 	.rpm = &i915_display_rpm_interface,
 	.irq = &i915_display_irq_interface,
 	.rps = &i915_display_rps_interface,
 	.vgpu_active = vgpu_active,
 	.has_fenced_regions = has_fenced_regions,
+	.fence_priority_display = fence_priority_display,
 };
 
 const struct intel_display_parent_interface *i915_driver_parent_interface(void)
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h b/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h
deleted file mode 100644
index 0548b2e0316f..000000000000
--- a/drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/* Copyright © 2025 Intel Corporation */
-
-#ifndef __I915_GEM_OBJECT_H__
-#define __I915_GEM_OBJECT_H__
-
-struct dma_fence;
-
-static inline void i915_gem_fence_wait_priority_display(struct dma_fence *fence)
-{
-}
-
-#endif
diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
index 0a6a26234fbe..4135d1e1a67e 100644
--- a/include/drm/intel/display_parent_interface.h
+++ b/include/drm/intel/display_parent_interface.h
@@ -64,6 +64,9 @@ struct intel_display_parent_interface {
 
 	/** @has_fenced_regions: Support legacy fencing? Optional. */
 	bool (*has_fenced_regions)(struct drm_device *drm);
+
+	/** @fence_priority_display: Set display priority. Optional. */
+	void (*fence_priority_display)(struct dma_fence *fence);
 };
 
 #endif
-- 
2.47.3

Re: [PATCH v2] FIXME drm/i915: add .has_fenced_regions to parent interface

[Ville Syrjälä]

On Fri, Nov 14, 2025 at 05:16:11PM +0200, Jani Nikula wrote:
> Add .has_fenced_regions() to display parent interface, removing more
> dependencies on struct drm_i915_private, i915_drv.h, and
> gt/intel_gt_types.h.
> 
> This allows us to remove the xe compat gt/intel_gt_types.h.
> 
> v2: s/fence_support_legacy/has_fenced_regions/ (Ville)
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

We should probably follow up with a wider renaming to keep the
terminology in sync. But that might require some actual thought,
so perhaps something to look at later.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c              |  8 ++------
>  drivers/gpu/drm/i915/display/intel_parent.c           |  5 +++++
>  drivers/gpu/drm/i915/display/intel_parent.h           |  2 ++
>  drivers/gpu/drm/i915/i915_driver.c                    |  6 ++++++
>  .../drm/xe/compat-i915-headers/gt/intel_gt_types.h    | 11 -----------
>  include/drm/intel/display_parent_interface.h          |  3 +++
>  6 files changed, 18 insertions(+), 17 deletions(-)
>  delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/gt/intel_gt_types.h
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index ab0bcea5aa89..2facd368a068 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -47,9 +47,6 @@
>  
>  #include "gem/i915_gem_stolen.h"
>  
> -#include "gt/intel_gt_types.h"
> -
> -#include "i915_drv.h"
>  #include "i915_vma.h"
>  #include "i9xx_plane_regs.h"
>  #include "intel_de.h"
> @@ -64,6 +61,7 @@
>  #include "intel_fbc_regs.h"
>  #include "intel_frontbuffer.h"
>  #include "intel_parent.h"
> +#include "intel_step.h"
>  
>  #define for_each_fbc_id(__display, __fbc_id) \
>  	for ((__fbc_id) = INTEL_FBC_A; (__fbc_id) < I915_MAX_FBCS; (__fbc_id)++) \
> @@ -267,9 +265,7 @@ static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state *plane_s
>  
>  static bool intel_fbc_has_fences(struct intel_display *display)
>  {
> -	struct drm_i915_private __maybe_unused *i915 = to_i915(display->drm);
> -
> -	return intel_gt_support_legacy_fencing(to_gt(i915));
> +	return intel_parent_has_fenced_regions(display);
>  }
>  
>  static u32 i8xx_fbc_ctl(struct intel_fbc *fbc)
> diff --git a/drivers/gpu/drm/i915/display/intel_parent.c b/drivers/gpu/drm/i915/display/intel_parent.c
> index 3786fd42827d..535065e57213 100644
> --- a/drivers/gpu/drm/i915/display/intel_parent.c
> +++ b/drivers/gpu/drm/i915/display/intel_parent.c
> @@ -36,3 +36,8 @@ bool intel_parent_vgpu_active(struct intel_display *display)
>  {
>  	return display->parent->vgpu_active && display->parent->vgpu_active(display->drm);
>  }
> +
> +bool intel_parent_has_fenced_regions(struct intel_display *display)
> +{
> +	return display->parent->has_fenced_regions && display->parent->has_fenced_regions(display->drm);
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_parent.h b/drivers/gpu/drm/i915/display/intel_parent.h
> index 222c95836d35..04320d937777 100644
> --- a/drivers/gpu/drm/i915/display/intel_parent.h
> +++ b/drivers/gpu/drm/i915/display/intel_parent.h
> @@ -13,4 +13,6 @@ void intel_parent_irq_synchronize(struct intel_display *display);
>  
>  bool intel_parent_vgpu_active(struct intel_display *display);
>  
> +bool intel_parent_has_fenced_regions(struct intel_display *display);
> +
>  #endif /* __INTEL_PARENT_H__ */
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index f21f1919a225..9ba46850da72 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -744,10 +744,16 @@ static bool vgpu_active(struct drm_device *drm)
>  	return intel_vgpu_active(to_i915(drm));
>  }
>  
> +static bool has_fenced_regions(struct drm_device *drm)
> +{
> +	return intel_gt_support_legacy_fencing(to_gt(to_i915(drm)));
> +}
> +
>  static const struct intel_display_parent_interface parent = {
>  	.rpm = &i915_display_rpm_interface,
>  	.irq = &i915_display_irq_interface,
>  	.vgpu_active = vgpu_active,
> +	.has_fenced_regions = has_fenced_regions,
>  };
>  
>  const struct intel_display_parent_interface *i915_driver_parent_interface(void)
> diff --git a/drivers/gpu/drm/xe/compat-i915-headers/gt/intel_gt_types.h b/drivers/gpu/drm/xe/compat-i915-headers/gt/intel_gt_types.h
> deleted file mode 100644
> index c15806d6c4f7..000000000000
> --- a/drivers/gpu/drm/xe/compat-i915-headers/gt/intel_gt_types.h
> +++ /dev/null
> @@ -1,11 +0,0 @@
> -/* SPDX-License-Identifier: MIT */
> -/*
> - * Copyright © 2023 Intel Corporation
> - */
> -
> -#ifndef __INTEL_GT_TYPES__
> -#define __INTEL_GT_TYPES__
> -
> -#define intel_gt_support_legacy_fencing(gt) 0
> -
> -#endif
> diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
> index f3834f36ce74..927d964f2071 100644
> --- a/include/drm/intel/display_parent_interface.h
> +++ b/include/drm/intel/display_parent_interface.h
> @@ -51,6 +51,9 @@ struct intel_display_parent_interface {
>  
>  	/** @vgpu_active: Is vGPU active? Optional. */
>  	bool (*vgpu_active)(struct drm_device *drm);
> +
> +	/** @has_fenced_regions: Support legacy fencing? Optional. */
> +	bool (*has_fenced_regions)(struct drm_device *drm);
>  };
>  
>  #endif
> -- 
> 2.47.3

-- 
Ville Syrjälä
Intel

Re: [PATCH v2] drm/i915/rps: call RPS functions via the parent interface

[Ville Syrjälä]

On Fri, Nov 14, 2025 at 05:31:09PM +0200, Jani Nikula wrote:
> Add struct intel_display_rps_interface to the display parent interface,
> and call the RPS functions through it. The RPS interface is optional.
> 
> v2: s/boost/boost_if_not_started/ and keep comment in caller (Ville)
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  .../gpu/drm/i915/display/intel_display_rps.c  | 27 ++++++++++-------
>  drivers/gpu/drm/i915/display/intel_parent.c   | 23 +++++++++++++++
>  drivers/gpu/drm/i915/display/intel_parent.h   |  6 ++++
>  drivers/gpu/drm/i915/gt/intel_rps.c           | 29 +++++++++++++++++++
>  drivers/gpu/drm/i915/gt/intel_rps.h           |  2 ++
>  drivers/gpu/drm/i915/i915_driver.c            |  2 ++
>  include/drm/intel/display_parent_interface.h  | 10 +++++++
>  7 files changed, 88 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_rps.c b/drivers/gpu/drm/i915/display/intel_display_rps.c
> index b6720f7c09d9..d639d9152bf5 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_rps.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_rps.c
> @@ -3,16 +3,18 @@
>   * Copyright © 2023 Intel Corporation
>   */
>  
> +#include <linux/dma-fence.h>
> +
>  #include <drm/drm_crtc.h>
>  #include <drm/drm_vblank.h>
>  
> -#include "gt/intel_rps.h"
> -#include "i915_drv.h"
>  #include "i915_reg.h"
> +#include "i915_request.h"
>  #include "intel_display_core.h"
>  #include "intel_display_irq.h"
>  #include "intel_display_rps.h"
>  #include "intel_display_types.h"
> +#include "intel_parent.h"
>  
>  struct wait_rps_boost {
>  	struct wait_queue_entry wait;
> @@ -25,15 +27,15 @@ static int do_rps_boost(struct wait_queue_entry *_wait,
>  			unsigned mode, int sync, void *key)
>  {
>  	struct wait_rps_boost *wait = container_of(_wait, typeof(*wait), wait);
> -	struct i915_request *rq = to_request(wait->fence);
> +	struct intel_display *display = to_intel_display(wait->crtc->dev);
>  
>  	/*
>  	 * If we missed the vblank, but the request is already running it
>  	 * is reasonable to assume that it will complete before the next
> -	 * vblank without our intervention, so leave RPS alone.
> +	 * vblank without our intervention, so leave RPS alone if not started.
>  	 */
> -	if (!i915_request_started(rq))
> -		intel_rps_boost(rq);
> +	intel_parent_rps_boost_if_not_started(display, wait->fence);
> +
>  	dma_fence_put(wait->fence);
>  
>  	drm_crtc_vblank_put(wait->crtc);
> @@ -49,6 +51,9 @@ void intel_display_rps_boost_after_vblank(struct drm_crtc *crtc,
>  	struct intel_display *display = to_intel_display(crtc->dev);
>  	struct wait_rps_boost *wait;
>  
> +	if (!intel_parent_rps_available(display))
> +		return;
> +
>  	if (!dma_fence_is_i915(fence))
>  		return;
>  
> @@ -77,12 +82,14 @@ void intel_display_rps_mark_interactive(struct intel_display *display,
>  					struct intel_atomic_state *state,
>  					bool interactive)
>  {
> -	struct drm_i915_private *i915 = to_i915(display->drm);
> +	if (!intel_parent_rps_available(display))
> +		return;
>  
>  	if (state->rps_interactive == interactive)
>  		return;
>  
> -	intel_rps_mark_interactive(&to_gt(i915)->rps, interactive);
> +	intel_parent_rps_mark_interactive(display, interactive);
> +
>  	state->rps_interactive = interactive;
>  }
>  
> @@ -102,7 +109,5 @@ void ilk_display_rps_disable(struct intel_display *display)
>  
>  void ilk_display_rps_irq_handler(struct intel_display *display)
>  {
> -	struct drm_i915_private *i915 = to_i915(display->drm);
> -
> -	gen5_rps_irq_handler(&to_gt(i915)->rps);
> +	intel_parent_rps_ilk_irq_handler(display);
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_parent.c b/drivers/gpu/drm/i915/display/intel_parent.c
> index 535065e57213..6c131196718e 100644
> --- a/drivers/gpu/drm/i915/display/intel_parent.c
> +++ b/drivers/gpu/drm/i915/display/intel_parent.c
> @@ -32,6 +32,29 @@ void intel_parent_irq_synchronize(struct intel_display *display)
>  	display->parent->irq->synchronize(display->drm);
>  }
>  
> +bool intel_parent_rps_available(struct intel_display *display)
> +{
> +	return display->parent->rps;
> +}
> +
> +void intel_parent_rps_boost_if_not_started(struct intel_display *display, struct dma_fence *fence)
> +{
> +	if (display->parent->rps)
> +		display->parent->rps->boost_if_not_started(fence);
> +}
> +
> +void intel_parent_rps_mark_interactive(struct intel_display *display, bool interactive)
> +{
> +	if (display->parent->rps)
> +		display->parent->rps->mark_interactive(display->drm, interactive);
> +}
> +
> +void intel_parent_rps_ilk_irq_handler(struct intel_display *display)
> +{
> +	if (display->parent->rps)
> +		display->parent->rps->ilk_irq_handler(display->drm);
> +}
> +
>  bool intel_parent_vgpu_active(struct intel_display *display)
>  {
>  	return display->parent->vgpu_active && display->parent->vgpu_active(display->drm);
> diff --git a/drivers/gpu/drm/i915/display/intel_parent.h b/drivers/gpu/drm/i915/display/intel_parent.h
> index 04320d937777..12cfbea95aa1 100644
> --- a/drivers/gpu/drm/i915/display/intel_parent.h
> +++ b/drivers/gpu/drm/i915/display/intel_parent.h
> @@ -6,11 +6,17 @@
>  
>  #include <linux/types.h>
>  
> +struct dma_fence;
>  struct intel_display;
>  
>  bool intel_parent_irq_enabled(struct intel_display *display);
>  void intel_parent_irq_synchronize(struct intel_display *display);
>  
> +bool intel_parent_rps_available(struct intel_display *display);
> +void intel_parent_rps_boost_if_not_started(struct intel_display *display, struct dma_fence *fence);
> +void intel_parent_rps_mark_interactive(struct intel_display *display, bool interactive);
> +void intel_parent_rps_ilk_irq_handler(struct intel_display *display);
> +
>  bool intel_parent_vgpu_active(struct intel_display *display);
>  
>  bool intel_parent_has_fenced_regions(struct intel_display *display);
> diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
> index b01c837ab646..c42a1ee42b58 100644
> --- a/drivers/gpu/drm/i915/gt/intel_rps.c
> +++ b/drivers/gpu/drm/i915/gt/intel_rps.c
> @@ -6,6 +6,7 @@
>  #include <linux/string_helpers.h>
>  
>  #include <drm/intel/i915_drm.h>
> +#include <drm/intel/display_parent_interface.h>
>  
>  #include "display/intel_display_rps.h"
>  #include "display/vlv_clock.h"
> @@ -2914,6 +2915,34 @@ bool i915_gpu_turbo_disable(void)
>  }
>  EXPORT_SYMBOL_GPL(i915_gpu_turbo_disable);
>  
> +static void boost_if_not_started(struct dma_fence *fence)
> +{
> +	struct i915_request *rq = to_request(fence);
> +
> +	if (!i915_request_started(rq))
> +		intel_rps_boost(rq);
> +}
> +
> +static void mark_interactive(struct drm_device *drm, bool interactive)
> +{
> +	struct drm_i915_private *i915 = to_i915(drm);
> +
> +	intel_rps_mark_interactive(&to_gt(i915)->rps, interactive);
> +}
> +
> +static void ilk_irq_handler(struct drm_device *drm)
> +{
> +	struct drm_i915_private *i915 = to_i915(drm);
> +
> +	gen5_rps_irq_handler(&to_gt(i915)->rps);
> +}
> +
> +const struct intel_display_rps_interface i915_display_rps_interface = {
> +	.boost_if_not_started = boost_if_not_started,
> +	.mark_interactive = mark_interactive,
> +	.ilk_irq_handler = ilk_irq_handler,
> +};
> +
>  #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
>  #include "selftest_rps.c"
>  #include "selftest_slpc.c"
> diff --git a/drivers/gpu/drm/i915/gt/intel_rps.h b/drivers/gpu/drm/i915/gt/intel_rps.h
> index 92fb01f5a452..5dbcebd7d4a5 100644
> --- a/drivers/gpu/drm/i915/gt/intel_rps.h
> +++ b/drivers/gpu/drm/i915/gt/intel_rps.h
> @@ -128,4 +128,6 @@ static inline void intel_rps_clear_timer(struct intel_rps *rps)
>  	clear_bit(INTEL_RPS_TIMER, &rps->flags);
>  }
>  
> +extern const struct intel_display_rps_interface i915_display_rps_interface;
> +
>  #endif /* INTEL_RPS_H */
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index 9ba46850da72..7e1dedabf0ee 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -81,6 +81,7 @@
>  #include "gt/intel_gt_pm.h"
>  #include "gt/intel_gt_print.h"
>  #include "gt/intel_rc6.h"
> +#include "gt/intel_rps.h"
>  
>  #include "pxp/intel_pxp.h"
>  #include "pxp/intel_pxp_debugfs.h"
> @@ -752,6 +753,7 @@ static bool has_fenced_regions(struct drm_device *drm)
>  static const struct intel_display_parent_interface parent = {
>  	.rpm = &i915_display_rpm_interface,
>  	.irq = &i915_display_irq_interface,
> +	.rps = &i915_display_rps_interface,
>  	.vgpu_active = vgpu_active,
>  	.has_fenced_regions = has_fenced_regions,
>  };
> diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
> index 927d964f2071..0a6a26234fbe 100644
> --- a/include/drm/intel/display_parent_interface.h
> +++ b/include/drm/intel/display_parent_interface.h
> @@ -6,6 +6,7 @@
>  
>  #include <linux/types.h>
>  
> +struct dma_fence;
>  struct drm_device;
>  struct ref_tracker;
>  
> @@ -30,6 +31,12 @@ struct intel_display_irq_interface {
>  	void (*synchronize)(struct drm_device *drm);
>  };
>  
> +struct intel_display_rps_interface {
> +	void (*boost_if_not_started)(struct dma_fence *fence);
> +	void (*mark_interactive)(struct drm_device *drm, bool interactive);
> +	void (*ilk_irq_handler)(struct drm_device *drm);
> +};
> +
>  /**
>   * struct intel_display_parent_interface - services parent driver provides to display
>   *
> @@ -49,6 +56,9 @@ struct intel_display_parent_interface {
>  	/** @irq: IRQ interface */
>  	const struct intel_display_irq_interface *irq;
>  
> +	/** @rpm: RPS interface. Optional. */
> +	const struct intel_display_rps_interface *rps;
> +
>  	/** @vgpu_active: Is vGPU active? Optional. */
>  	bool (*vgpu_active)(struct drm_device *drm);
>  
> -- 
> 2.47.3

-- 
Ville Syrjälä
Intel

✗ Xe.CI.Full: failure for drm/i915: call irq and rps through the parent interface

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 58492 bytes --]

== Series Details ==

Series: drm/i915: call irq and rps through the parent interface
URL   : https://patchwork.freedesktop.org/series/157576/
State : failure

== Summary ==

CI Bug Log - changes from xe-4105-fcced1dc80e617aa10794e4abc525895212e3678_FULL -> xe-pw-157576v1_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-157576v1_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-157576v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-157576v1_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-dg2-set2:     [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-dg2-436/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-435/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  
Known issues
------------

  Here are the changes found in xe-pw-157576v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-bmg:          NOTRUN -> [SKIP][3] ([Intel XE#2370])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-8/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-adlp:         NOTRUN -> [SKIP][4] ([Intel XE#1124]) +1 other test skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@linear-8bpp-rotate-270:
    - shard-dg2-set2:     NOTRUN -> [SKIP][5] ([Intel XE#316])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-463/igt@kms_big_fb@linear-8bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#2327]) +5 other tests skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-0:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#1124]) +11 other tests skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-8/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-16bpp-rotate-180:
    - shard-dg2-set2:     NOTRUN -> [SKIP][8] ([Intel XE#1124]) +2 other tests skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-463/igt@kms_big_fb@yf-tiled-16bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-addfb:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#2328])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-4/igt@kms_big_fb@yf-tiled-addfb.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][10] ([Intel XE#619])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-434/igt@kms_big_fb@yf-tiled-addfb.html

  * igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#2314] / [Intel XE#2894]) +1 other test skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-6/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html

  * igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p:
    - shard-dg2-set2:     NOTRUN -> [SKIP][12] ([Intel XE#2191])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-463/igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p.html

  * igt@kms_bw@linear-tiling-2-displays-2560x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#367]) +3 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-4/igt@kms_bw@linear-tiling-2-displays-2560x1440p.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][14] ([Intel XE#367])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-434/igt@kms_bw@linear-tiling-2-displays-2560x1440p.html

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#2887]) +17 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@bad-pixel-format-yf-tiled-ccs:
    - shard-dg2-set2:     NOTRUN -> [SKIP][16] ([Intel XE#455] / [Intel XE#787]) +11 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-434/igt@kms_ccs@bad-pixel-format-yf-tiled-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [SKIP][17] ([Intel XE#787]) +41 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-434/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-6.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs:
    - shard-adlp:         NOTRUN -> [SKIP][18] ([Intel XE#455] / [Intel XE#787]) +1 other test skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs@pipe-a-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][19] ([Intel XE#787]) +2 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs@pipe-a-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#3432]) +1 other test skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs@pipe-d-hdmi-a-3:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#2652] / [Intel XE#787]) +13 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-8/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs@pipe-d-hdmi-a-3.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6:
    - shard-dg2-set2:     [PASS][22] -> [INCOMPLETE][23] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212]) +1 other test incomplete
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6.html
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6.html

  * igt@kms_cdclk@mode-transition:
    - shard-adlp:         NOTRUN -> [SKIP][24] ([Intel XE#4417] / [Intel XE#455])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@kms_cdclk@mode-transition.html

  * igt@kms_cdclk@mode-transition@pipe-a-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][25] ([Intel XE#4417]) +2 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@kms_cdclk@mode-transition@pipe-a-hdmi-a-1.html

  * igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][26] ([Intel XE#455]) +2 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-1.html

  * igt@kms_chamelium_color@ctm-green-to-red:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#2325]) +2 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@kms_chamelium_color@ctm-green-to-red.html

  * igt@kms_chamelium_color@gamma:
    - shard-dg2-set2:     NOTRUN -> [SKIP][28] ([Intel XE#306])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-434/igt@kms_chamelium_color@gamma.html

  * igt@kms_chamelium_frames@hdmi-crc-single:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#2252]) +10 other tests skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@kms_chamelium_frames@hdmi-crc-single.html

  * igt@kms_chamelium_hpd@dp-hpd-with-enabled-mode:
    - shard-adlp:         NOTRUN -> [SKIP][30] ([Intel XE#373]) +1 other test skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@kms_chamelium_hpd@dp-hpd-with-enabled-mode.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#2390])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-8/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_content_protection@legacy:
    - shard-bmg:          NOTRUN -> [FAIL][32] ([Intel XE#1178]) +3 other tests fail
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@kms_content_protection@legacy.html

  * igt@kms_content_protection@type1:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#2341])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-4/igt@kms_content_protection@type1.html

  * igt@kms_cursor_crc@cursor-offscreen-32x32:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#2320]) +5 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@kms_cursor_crc@cursor-offscreen-32x32.html

  * igt@kms_cursor_crc@cursor-sliding-512x512:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#2321]) +1 other test skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-6/igt@kms_cursor_crc@cursor-sliding-512x512.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
    - shard-bmg:          [PASS][36] -> [SKIP][37] ([Intel XE#2291]) +3 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-bmg-1/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#2291])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html

  * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
    - shard-bmg:          [PASS][39] -> [FAIL][40] ([Intel XE#5299])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-bmg-2/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-8/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#2286])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html

  * igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#1508])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-4/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html

  * igt@kms_dp_link_training@uhbr-sst:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#4354])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-6/igt@kms_dp_link_training@uhbr-sst.html

  * igt@kms_dsc@dsc-with-bpc-formats:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#2244]) +1 other test skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@kms_dsc@dsc-with-bpc-formats.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#5425]) +1 other test skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-8/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_flip@2x-flip-vs-panning-interruptible:
    - shard-adlp:         NOTRUN -> [SKIP][46] ([Intel XE#310])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@kms_flip@2x-flip-vs-panning-interruptible.html

  * igt@kms_flip@2x-flip-vs-panning-vs-hang:
    - shard-bmg:          [PASS][47] -> [SKIP][48] ([Intel XE#2316]) +2 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-bmg-1/igt@kms_flip@2x-flip-vs-panning-vs-hang.html
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-6/igt@kms_flip@2x-flip-vs-panning-vs-hang.html

  * igt@kms_flip@2x-flip-vs-suspend@bd-hdmi-a6-dp4:
    - shard-dg2-set2:     [PASS][49] -> [INCOMPLETE][50] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-dg2-435/igt@kms_flip@2x-flip-vs-suspend@bd-hdmi-a6-dp4.html
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-432/igt@kms_flip@2x-flip-vs-suspend@bd-hdmi-a6-dp4.html

  * igt@kms_flip@2x-plain-flip-ts-check-interruptible:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#2316]) +2 other tests skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-6/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1:
    - shard-adlp:         [PASS][52] -> [DMESG-WARN][53] ([Intel XE#4543]) +8 other tests dmesg-warn
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-adlp-1/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1.html
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-4/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1.html

  * igt@kms_flip@plain-flip-ts-check:
    - shard-bmg:          [PASS][54] -> [FAIL][55] ([Intel XE#3098] / [Intel XE#6266])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-bmg-8/igt@kms_flip@plain-flip-ts-check.html
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-6/igt@kms_flip@plain-flip-ts-check.html

  * igt@kms_flip@plain-flip-ts-check@a-hdmi-a3:
    - shard-bmg:          [PASS][56] -> [FAIL][57] ([Intel XE#3098])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-bmg-8/igt@kms_flip@plain-flip-ts-check@a-hdmi-a3.html
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-6/igt@kms_flip@plain-flip-ts-check@a-hdmi-a3.html

  * igt@kms_flip@plain-flip-ts-check@b-hdmi-a3:
    - shard-bmg:          [PASS][58] -> [FAIL][59] ([Intel XE#6266])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-bmg-8/igt@kms_flip@plain-flip-ts-check@b-hdmi-a3.html
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-6/igt@kms_flip@plain-flip-ts-check@b-hdmi-a3.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#2293] / [Intel XE#2380]) +6 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-valid-mode:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#2293]) +6 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen:
    - shard-dg2-set2:     NOTRUN -> [SKIP][62] ([Intel XE#651]) +7 other tests skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-434/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][63] ([Intel XE#2311]) +32 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render:
    - shard-adlp:         NOTRUN -> [SKIP][64] ([Intel XE#656]) +9 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
    - shard-bmg:          NOTRUN -> [SKIP][65] ([Intel XE#5390]) +16 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-indfb-draw-render:
    - shard-adlp:         NOTRUN -> [SKIP][66] ([Intel XE#651]) +1 other test skip
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-tiling-4:
    - shard-adlp:         NOTRUN -> [SKIP][67] ([Intel XE#1151])
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-4.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][68] ([Intel XE#2312]) +8 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-slowdraw:
    - shard-dg2-set2:     NOTRUN -> [SKIP][69] ([Intel XE#653]) +9 other tests skip
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-463/igt@kms_frontbuffer_tracking@fbcpsr-slowdraw.html

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][70] ([Intel XE#2352])
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][71] ([Intel XE#2313]) +32 other tests skip
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_joiner@basic-big-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][72] ([Intel XE#346])
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-4/igt@kms_joiner@basic-big-joiner.html

  * igt@kms_joiner@basic-max-non-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][73] ([Intel XE#6590])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-6/igt@kms_joiner@basic-max-non-joiner.html

  * igt@kms_panel_fitting@atomic-fastset:
    - shard-bmg:          NOTRUN -> [SKIP][74] ([Intel XE#2486])
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@kms_panel_fitting@atomic-fastset.html

  * igt@kms_plane_multiple@tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][75] ([Intel XE#5020])
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-6/igt@kms_plane_multiple@tiling-y.html

  * igt@kms_plane_scaling@2x-scaler-multi-pipe:
    - shard-bmg:          [PASS][76] -> [SKIP][77] ([Intel XE#2571])
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-bmg-8/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-6/igt@kms_plane_scaling@2x-scaler-multi-pipe.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b:
    - shard-bmg:          NOTRUN -> [SKIP][78] ([Intel XE#2763]) +9 other tests skip
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-6/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b.html

  * igt@kms_pm_backlight@brightness-with-dpms:
    - shard-bmg:          NOTRUN -> [SKIP][79] ([Intel XE#2938])
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@kms_pm_backlight@brightness-with-dpms.html

  * igt@kms_pm_backlight@fade-with-dpms:
    - shard-bmg:          NOTRUN -> [SKIP][80] ([Intel XE#870])
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-8/igt@kms_pm_backlight@fade-with-dpms.html

  * igt@kms_pm_backlight@fade-with-suspend:
    - shard-dg2-set2:     NOTRUN -> [SKIP][81] ([Intel XE#870])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-463/igt@kms_pm_backlight@fade-with-suspend.html

  * igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-adlp:         NOTRUN -> [SKIP][82] ([Intel XE#836])
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@kms_pm_rpm@universal-planes-dpms@plane-83:
    - shard-adlp:         NOTRUN -> [DMESG-WARN][83] ([Intel XE#2953] / [Intel XE#4173])
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-9/igt@kms_pm_rpm@universal-planes-dpms@plane-83.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf:
    - shard-bmg:          NOTRUN -> [SKIP][84] ([Intel XE#1406] / [Intel XE#1489]) +7 other tests skip
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf:
    - shard-adlp:         NOTRUN -> [SKIP][85] ([Intel XE#1406] / [Intel XE#1489])
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf.html

  * igt@kms_psr@fbc-psr2-cursor-plane-move:
    - shard-bmg:          NOTRUN -> [SKIP][86] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +16 other tests skip
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@kms_psr@fbc-psr2-cursor-plane-move.html

  * igt@kms_psr@psr2-primary-blt:
    - shard-adlp:         NOTRUN -> [SKIP][87] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +2 other tests skip
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@kms_psr@psr2-primary-blt.html

  * igt@kms_psr@psr2-sprite-plane-move:
    - shard-dg2-set2:     NOTRUN -> [SKIP][88] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +3 other tests skip
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-434/igt@kms_psr@psr2-sprite-plane-move.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-bmg:          NOTRUN -> [SKIP][89] ([Intel XE#1406] / [Intel XE#2414])
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-8/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_rotation_crc@bad-tiling:
    - shard-dg2-set2:     NOTRUN -> [SKIP][90] ([Intel XE#3414]) +2 other tests skip
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-434/igt@kms_rotation_crc@bad-tiling.html
    - shard-bmg:          NOTRUN -> [SKIP][91] ([Intel XE#3414] / [Intel XE#3904]) +1 other test skip
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-4/igt@kms_rotation_crc@bad-tiling.html

  * igt@kms_rotation_crc@primary-rotation-270:
    - shard-adlp:         NOTRUN -> [SKIP][92] ([Intel XE#3414])
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@kms_rotation_crc@primary-rotation-270.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
    - shard-bmg:          NOTRUN -> [SKIP][93] ([Intel XE#2330])
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html

  * igt@kms_scaling_modes@scaling-mode-full-aspect:
    - shard-bmg:          NOTRUN -> [SKIP][94] ([Intel XE#2413])
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@kms_scaling_modes@scaling-mode-full-aspect.html

  * igt@kms_setmode@invalid-clone-exclusive-crtc:
    - shard-bmg:          NOTRUN -> [SKIP][95] ([Intel XE#1435])
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-6/igt@kms_setmode@invalid-clone-exclusive-crtc.html

  * igt@kms_sharpness_filter@filter-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][96] ([Intel XE#6503]) +2 other tests skip
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@kms_sharpness_filter@filter-suspend.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          NOTRUN -> [SKIP][97] ([Intel XE#2426])
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-6/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@kms_vrr@cmrr@pipe-a-edp-1:
    - shard-lnl:          [PASS][98] -> [FAIL][99] ([Intel XE#4459]) +1 other test fail
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-lnl-3/igt@kms_vrr@cmrr@pipe-a-edp-1.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-lnl-1/igt@kms_vrr@cmrr@pipe-a-edp-1.html

  * igt@kms_vrr@flipline:
    - shard-dg2-set2:     NOTRUN -> [SKIP][100] ([Intel XE#455]) +3 other tests skip
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-434/igt@kms_vrr@flipline.html

  * igt@kms_vrr@lobf:
    - shard-bmg:          NOTRUN -> [SKIP][101] ([Intel XE#2168])
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@kms_vrr@lobf.html

  * igt@kms_vrr@seamless-rr-switch-virtual:
    - shard-bmg:          NOTRUN -> [SKIP][102] ([Intel XE#1499]) +1 other test skip
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-8/igt@kms_vrr@seamless-rr-switch-virtual.html

  * igt@xe_compute_preempt@compute-preempt-many-all-ram:
    - shard-dg2-set2:     NOTRUN -> [SKIP][103] ([Intel XE#6360])
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-463/igt@xe_compute_preempt@compute-preempt-many-all-ram.html

  * igt@xe_create@multigpu-create-massive-size:
    - shard-adlp:         NOTRUN -> [SKIP][104] ([Intel XE#944])
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@xe_create@multigpu-create-massive-size.html

  * igt@xe_eu_stall@invalid-sampling-rate:
    - shard-dg2-set2:     NOTRUN -> [SKIP][105] ([Intel XE#5626])
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-434/igt@xe_eu_stall@invalid-sampling-rate.html

  * igt@xe_eudebug@basic-client-th:
    - shard-adlp:         NOTRUN -> [SKIP][106] ([Intel XE#4837] / [Intel XE#5565])
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@xe_eudebug@basic-client-th.html

  * igt@xe_eudebug_online@set-breakpoint-sigint-debugger:
    - shard-bmg:          NOTRUN -> [SKIP][107] ([Intel XE#4837]) +14 other tests skip
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-4/igt@xe_eudebug_online@set-breakpoint-sigint-debugger.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][108] ([Intel XE#4837]) +2 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-434/igt@xe_eudebug_online@set-breakpoint-sigint-debugger.html

  * igt@xe_eudebug_sriov@deny-sriov:
    - shard-bmg:          NOTRUN -> [SKIP][109] ([Intel XE#5793])
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@xe_eudebug_sriov@deny-sriov.html

  * igt@xe_evict_ccs@evict-overcommit-parallel-nofree-samefd:
    - shard-adlp:         NOTRUN -> [SKIP][110] ([Intel XE#688])
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@xe_evict_ccs@evict-overcommit-parallel-nofree-samefd.html

  * igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][111] ([Intel XE#2322]) +8 other tests skip
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-8/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-rebind.html

  * igt@xe_exec_basic@multigpu-once-null-defer-mmap:
    - shard-adlp:         NOTRUN -> [SKIP][112] ([Intel XE#1392] / [Intel XE#5575])
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@xe_exec_basic@multigpu-once-null-defer-mmap.html

  * igt@xe_exec_fault_mode@once-bindexecqueue-rebind-imm:
    - shard-adlp:         NOTRUN -> [SKIP][113] ([Intel XE#288] / [Intel XE#5561]) +4 other tests skip
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@xe_exec_fault_mode@once-bindexecqueue-rebind-imm.html

  * igt@xe_exec_fault_mode@once-rebind:
    - shard-dg2-set2:     NOTRUN -> [SKIP][114] ([Intel XE#288]) +6 other tests skip
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-434/igt@xe_exec_fault_mode@once-rebind.html

  * igt@xe_exec_mix_modes@exec-simple-batch-store-dma-fence:
    - shard-dg2-set2:     NOTRUN -> [SKIP][115] ([Intel XE#2360])
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-434/igt@xe_exec_mix_modes@exec-simple-batch-store-dma-fence.html

  * igt@xe_exec_system_allocator@many-64k-mmap-huge-nomemset:
    - shard-bmg:          NOTRUN -> [SKIP][116] ([Intel XE#5007])
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-6/igt@xe_exec_system_allocator@many-64k-mmap-huge-nomemset.html

  * igt@xe_exec_system_allocator@many-new-busy:
    - shard-adlp:         NOTRUN -> [SKIP][117] ([Intel XE#4915]) +39 other tests skip
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@xe_exec_system_allocator@many-new-busy.html

  * igt@xe_exec_system_allocator@many-stride-malloc-prefetch:
    - shard-bmg:          [PASS][118] -> [WARN][119] ([Intel XE#5786])
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-bmg-2/igt@xe_exec_system_allocator@many-stride-malloc-prefetch.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-4/igt@xe_exec_system_allocator@many-stride-malloc-prefetch.html

  * igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-nomemset:
    - shard-dg2-set2:     NOTRUN -> [SKIP][120] ([Intel XE#4915]) +78 other tests skip
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-434/igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-nomemset.html

  * igt@xe_exec_system_allocator@threads-many-large-execqueues-mmap-new-huge:
    - shard-bmg:          NOTRUN -> [SKIP][121] ([Intel XE#4943]) +29 other tests skip
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@xe_exec_system_allocator@threads-many-large-execqueues-mmap-new-huge.html

  * igt@xe_huc_copy@huc_copy:
    - shard-dg2-set2:     NOTRUN -> [SKIP][122] ([Intel XE#255])
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-434/igt@xe_huc_copy@huc_copy.html

  * igt@xe_module_load@force-load:
    - shard-bmg:          NOTRUN -> [SKIP][123] ([Intel XE#2457])
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@xe_module_load@force-load.html

  * igt@xe_oa@non-sampling-read-error:
    - shard-adlp:         NOTRUN -> [SKIP][124] ([Intel XE#3573])
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@xe_oa@non-sampling-read-error.html

  * igt@xe_oa@syncs-userptr-wait-cfg:
    - shard-dg2-set2:     NOTRUN -> [SKIP][125] ([Intel XE#3573]) +2 other tests skip
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-434/igt@xe_oa@syncs-userptr-wait-cfg.html

  * igt@xe_pat@pat-index-xelpg:
    - shard-bmg:          NOTRUN -> [SKIP][126] ([Intel XE#2236])
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@xe_pat@pat-index-xelpg.html

  * igt@xe_peer2peer@write@write-gpua-vram01-gpub-system-p2p:
    - shard-dg2-set2:     NOTRUN -> [SKIP][127] ([Intel XE#6566])
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-463/igt@xe_peer2peer@write@write-gpua-vram01-gpub-system-p2p.html

  * igt@xe_pm@d3cold-mmap-vram:
    - shard-bmg:          NOTRUN -> [SKIP][128] ([Intel XE#2284])
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-8/igt@xe_pm@d3cold-mmap-vram.html

  * igt@xe_pm@d3hot-i2c:
    - shard-adlp:         NOTRUN -> [SKIP][129] ([Intel XE#5742])
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@xe_pm@d3hot-i2c.html

  * igt@xe_pm@vram-d3cold-threshold:
    - shard-bmg:          NOTRUN -> [SKIP][130] ([Intel XE#579])
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@xe_pm@vram-d3cold-threshold.html

  * igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_compute0:
    - shard-lnl:          [PASS][131] -> [FAIL][132] ([Intel XE#6251])
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-lnl-1/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_compute0.html
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-lnl-8/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_compute0.html

  * igt@xe_pxp@pxp-termination-key-update-post-rpm:
    - shard-dg2-set2:     NOTRUN -> [SKIP][133] ([Intel XE#4733])
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-463/igt@xe_pxp@pxp-termination-key-update-post-rpm.html

  * igt@xe_pxp@pxp-termination-key-update-post-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][134] ([Intel XE#4733]) +2 other tests skip
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@xe_pxp@pxp-termination-key-update-post-suspend.html

  * igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz:
    - shard-bmg:          NOTRUN -> [SKIP][135] ([Intel XE#944]) +3 other tests skip
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz.html

  * igt@xe_query@multigpu-query-oa-units:
    - shard-dg2-set2:     NOTRUN -> [SKIP][136] ([Intel XE#944]) +1 other test skip
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-463/igt@xe_query@multigpu-query-oa-units.html

  * igt@xe_sriov_scheduling@nonpreempt-engine-resets:
    - shard-dg2-set2:     NOTRUN -> [SKIP][137] ([Intel XE#4351])
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-434/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html

  * igt@xe_sriov_vram@vf-access-beyond:
    - shard-adlp:         NOTRUN -> [SKIP][138] ([Intel XE#6376])
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@xe_sriov_vram@vf-access-beyond.html

  
#### Possible fixes ####

  * igt@kms_3d@basic:
    - shard-adlp:         [ABORT][139] ([Intel XE#2953]) -> [PASS][140]
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-adlp-9/igt@kms_3d@basic.html
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-2/igt@kms_3d@basic.html

  * igt@kms_addfb_basic@bad-pitch-63:
    - shard-adlp:         [DMESG-WARN][141] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][142] +3 other tests pass
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-adlp-3/igt@kms_addfb_basic@bad-pitch-63.html
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-8/igt@kms_addfb_basic@bad-pitch-63.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
    - shard-adlp:         [FAIL][143] ([Intel XE#3908]) -> [PASS][144] +1 other test pass
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-adlp-4/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-1/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
    - shard-adlp:         [DMESG-FAIL][145] ([Intel XE#4543]) -> [PASS][146]
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-adlp-8/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-9/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html

  * igt@kms_display_modes@extended-mode-basic:
    - shard-bmg:          [SKIP][147] ([Intel XE#4302]) -> [PASS][148]
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-bmg-6/igt@kms_display_modes@extended-mode-basic.html
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-4/igt@kms_display_modes@extended-mode-basic.html

  * igt@kms_flip@2x-flip-vs-wf_vblank-interruptible:
    - shard-bmg:          [SKIP][149] ([Intel XE#2316]) -> [PASS][150] +3 other tests pass
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-bmg-6/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-4/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html

  * igt@kms_flip@flip-vs-suspend@b-hdmi-a1:
    - shard-adlp:         [DMESG-WARN][151] ([Intel XE#4543]) -> [PASS][152] +4 other tests pass
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-adlp-1/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-4/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html

  * igt@kms_hdr@static-toggle-suspend:
    - shard-bmg:          [SKIP][153] ([Intel XE#1503]) -> [PASS][154]
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-bmg-6/igt@kms_hdr@static-toggle-suspend.html
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-4/igt@kms_hdr@static-toggle-suspend.html

  * igt@kms_plane_multiple@2x-tiling-x:
    - shard-bmg:          [SKIP][155] ([Intel XE#4596]) -> [PASS][156]
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-x.html
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-4/igt@kms_plane_multiple@2x-tiling-x.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-5-with-modifiers:
    - shard-adlp:         [DMESG-WARN][157] -> [PASS][158]
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-adlp-8/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-modifiers.html
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-9/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-modifiers.html

  * igt@kms_setmode@basic@pipe-b-edp-1:
    - shard-lnl:          [FAIL][159] ([Intel XE#6361]) -> [PASS][160] +2 other tests pass
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-lnl-8/igt@kms_setmode@basic@pipe-b-edp-1.html
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-lnl-5/igt@kms_setmode@basic@pipe-b-edp-1.html

  * igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1:
    - shard-lnl:          [FAIL][161] ([Intel XE#2142]) -> [PASS][162] +1 other test pass
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-lnl-1/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-lnl-8/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html

  * igt@xe_pmu@engine-activity-accuracy-50@engine-drm_xe_engine_class_video_decode0:
    - shard-lnl:          [FAIL][163] ([Intel XE#6251]) -> [PASS][164]
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-lnl-4/igt@xe_pmu@engine-activity-accuracy-50@engine-drm_xe_engine_class_video_decode0.html
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-lnl-3/igt@xe_pmu@engine-activity-accuracy-50@engine-drm_xe_engine_class_video_decode0.html

  * igt@xe_pmu@engine-activity-suspend:
    - shard-adlp:         [FAIL][165] ([Intel XE#6458]) -> [PASS][166]
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-adlp-8/igt@xe_pmu@engine-activity-suspend.html
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-9/igt@xe_pmu@engine-activity-suspend.html

  * igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random:
    - shard-adlp:         [DMESG-FAIL][167] ([Intel XE#3868] / [Intel XE#5213] / [Intel XE#5545]) -> [PASS][168] +1 other test pass
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-adlp-8/igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random.html
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-9/igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random.html

  
#### Warnings ####

  * igt@kms_async_flips@async-flip-suspend-resume:
    - shard-adlp:         [DMESG-WARN][169] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#4543]) -> [DMESG-WARN][170] ([Intel XE#4543]) +1 other test dmesg-warn
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-adlp-3/igt@kms_async_flips@async-flip-suspend-resume.html
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-8/igt@kms_async_flips@async-flip-suspend-resume.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs:
    - shard-dg2-set2:     [INCOMPLETE][171] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4345] / [Intel XE#6168]) -> [INCOMPLETE][172] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345])
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
    - shard-dg2-set2:     [INCOMPLETE][173] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522]) -> [INCOMPLETE][174] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345])
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-blt:
    - shard-bmg:          [SKIP][175] ([Intel XE#2311]) -> [SKIP][176] ([Intel XE#2312]) +8 other tests skip
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-blt.html
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
    - shard-bmg:          [SKIP][177] ([Intel XE#5390]) -> [SKIP][178] ([Intel XE#2312]) +1 other test skip
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt:
    - shard-bmg:          [SKIP][179] ([Intel XE#2312]) -> [SKIP][180] ([Intel XE#5390]) +3 other tests skip
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-spr-indfb-draw-blt:
    - shard-bmg:          [SKIP][181] ([Intel XE#2312]) -> [SKIP][182] ([Intel XE#2311]) +3 other tests skip
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-spr-indfb-draw-blt.html
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-onoff:
    - shard-bmg:          [SKIP][183] ([Intel XE#2312]) -> [SKIP][184] ([Intel XE#2313]) +7 other tests skip
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-onoff.html
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-render:
    - shard-bmg:          [SKIP][185] ([Intel XE#2313]) -> [SKIP][186] ([Intel XE#2312]) +6 other tests skip
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-render.html
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-render.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-bmg:          [SKIP][187] ([Intel XE#5021]) -> [SKIP][188] ([Intel XE#4596])
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-bmg-1/igt@kms_plane_multiple@2x-tiling-yf.html
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_pm_rpm@universal-planes-dpms:
    - shard-adlp:         [SKIP][189] ([Intel XE#6070]) -> [DMESG-WARN][190] ([Intel XE#5750])
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-adlp-8/igt@kms_pm_rpm@universal-planes-dpms.html
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-adlp-9/igt@kms_pm_rpm@universal-planes-dpms.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-dg2-set2:     [SKIP][191] ([Intel XE#362]) -> [SKIP][192] ([Intel XE#1500])
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4105-fcced1dc80e617aa10794e4abc525895212e3678/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/shard-dg2-466/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1151]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1151
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1500]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1500
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2142]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2142
  [Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
  [Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2236]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2236
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
  [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
  [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2328
  [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
  [Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
  [Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370
  [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
  [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
  [Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
  [Intel XE#2414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2414
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
  [Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
  [Intel XE#255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/255
  [Intel XE#2571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2571
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#2938]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2938
  [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
  [Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
  [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
  [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
  [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
  [Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#3868]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3868
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#3908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3908
  [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
  [Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
  [Intel XE#4302]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4302
  [Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
  [Intel XE#4351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4351
  [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
  [Intel XE#4417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4417
  [Intel XE#4459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4459
  [Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5007
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5213]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5213
  [Intel XE#5299]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5299
  [Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
  [Intel XE#5425]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5425
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#5561]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5561
  [Intel XE#5565]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5565
  [Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
  [Intel XE#5626]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5626
  [Intel XE#5742]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5742
  [Intel XE#5750]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5750
  [Intel XE#5786]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5786
  [Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579
  [Intel XE#5793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5793
  [Intel XE#6070]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6070
  [Intel XE#6168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6168
  [Intel XE#619]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/619
  [Intel XE#6251]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6251
  [Intel XE#6266]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6266
  [Intel XE#6360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6360
  [Intel XE#6361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6361
  [Intel XE#6376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6376
  [Intel XE#6458]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6458
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6566]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6566
  [Intel XE#6590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6590
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-4105-fcced1dc80e617aa10794e4abc525895212e3678 -> xe-pw-157576v1

  IGT_8623: 8623
  xe-4105-fcced1dc80e617aa10794e4abc525895212e3678: fcced1dc80e617aa10794e4abc525895212e3678
  xe-pw-157576v1: 157576v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157576v1/index.html

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