RE: [PATCH v3 3/3] drm/i915/cx0: Rename intel_clear_response_ready flag

Garg, Nemesa
2026-01-19T06:43:58Z

> -----Original Message-----
> From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Suraj
> Kandpal
> Sent: Friday, January 16, 2026 2:25 PM
> To: intel-xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Cc: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>; Kandpal, Suraj
> <suraj.kandpal@intel.com>
> Subject: [PATCH v3 3/3] drm/i915/cx0: Rename intel_clear_response_ready
> flag
>
> Rename the non static intel_clear_response_ready_flag to
> intel_cx0_clear_response_ready_flag so that we follow the naming standards
> of non static function.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_cx0_phy.c | 14 +++++++-------
> drivers/gpu/drm/i915/display/intel_cx0_phy.h | 4 ++--
> drivers/gpu/drm/i915/display/intel_lt_phy.c | 2 +-
> 3 files changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> index 5b6b1ce40b0d..3ef25c942f44 100644
> --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> @@ -127,8 +127,8 @@ static void intel_cx0_phy_transaction_end(struct
> intel_encoder *encoder, struct
> intel_display_power_put(display, POWER_DOMAIN_DC_OFF,
> wakeref); }
>
> -void intel_clear_response_ready_flag(struct intel_encoder *encoder,
> - int lane)
> +void intel_cx0_clear_response_ready_flag(struct intel_encoder *encoder,
> + int lane)
> {
> struct intel_display *display = to_intel_display(encoder);
>
> @@ -155,7 +155,7 @@ void intel_cx0_bus_reset(struct intel_encoder
> *encoder, int lane)
> return;
> }
>
> - intel_clear_response_ready_flag(encoder, lane);
> + intel_cx0_clear_response_ready_flag(encoder, lane);
> }
>
> int intel_cx0_wait_for_ack(struct intel_encoder *encoder, @@ -222,7 +222,7
> @@ static int __intel_cx0_read_once(struct intel_encoder *encoder,
> return -ETIMEDOUT;
> }
>
> - intel_clear_response_ready_flag(encoder, lane);
> + intel_cx0_clear_response_ready_flag(encoder, lane);
>
> intel_de_write(display, XELPDP_PORT_M2P_MSGBUS_CTL(display,
> port, lane),
> XELPDP_PORT_M2P_TRANSACTION_PENDING | @@ -
> 233,7 +233,7 @@ static int __intel_cx0_read_once(struct intel_encoder
> *encoder,
> if (ack < 0)
> return ack;
>
> - intel_clear_response_ready_flag(encoder, lane);
> + intel_cx0_clear_response_ready_flag(encoder, lane);
>
> /*
> * FIXME: Workaround to let HW to settle @@ -295,7 +295,7 @@
> static int __intel_cx0_write_once(struct intel_encoder *encoder,
> return -ETIMEDOUT;
> }
>
> - intel_clear_response_ready_flag(encoder, lane);
> + intel_cx0_clear_response_ready_flag(encoder, lane);
>
> intel_de_write(display, XELPDP_PORT_M2P_MSGBUS_CTL(display,
> port, lane),
> XELPDP_PORT_M2P_TRANSACTION_PENDING | @@ -
> 325,7 +325,7 @@ static int __intel_cx0_write_once(struct intel_encoder
> *encoder,
> return -EINVAL;
> }
>
> - intel_clear_response_ready_flag(encoder, lane);
> + intel_cx0_clear_response_ready_flag(encoder, lane);
>
> /*
> * FIXME: Workaround to let HW to settle diff --git
> a/drivers/gpu/drm/i915/display/intel_cx0_phy.h
> b/drivers/gpu/drm/i915/display/intel_cx0_phy.h
> index ae98ac23ea22..87d3bdaca3ec 100644
> --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.h
> +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.h
> @@ -25,8 +25,8 @@ struct intel_dpll_hw_state; struct intel_encoder; struct
> intel_hdmi;
>
> -void intel_clear_response_ready_flag(struct intel_encoder *encoder,
> - int lane);
> +void intel_cx0_clear_response_ready_flag(struct intel_encoder *encoder,
> + int lane);
> bool intel_encoder_is_c10phy(struct intel_encoder *encoder); void
> intel_mtl_pll_enable(struct intel_encoder *encoder,
> struct intel_dpll *pll,
> diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c
> b/drivers/gpu/drm/i915/display/intel_lt_phy.c
> index 6cdae03ee172..e174ca011d50 100644
> --- a/drivers/gpu/drm/i915/display/intel_lt_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c
> @@ -1106,7 +1106,7 @@ static int __intel_lt_phy_p2p_write_once(struct
> intel_encoder *encoder,
> * This is the time PHY takes to settle down after programming the
> PHY.
> */
> udelay(150);
> - intel_clear_response_ready_flag(encoder, lane);
> + intel_cx0_clear_response_ready_flag(encoder, lane);
> intel_lt_phy_clear_status_p2p(encoder, lane);
>
> return 0;
> --
LGTM,
Reviewed-by: Nemesa Garg <nemesa.garg@intel.com>
> 2.34.1