From: Matthew Brost <matthew.brost@intel.com>
To: Xin Wang <x.wang@intel.com>
Cc: <intel-xe@lists.freedesktop.org>,
Shuicheng Lin <shuicheng.lin@intel.com>,
Matt Roper <matthew.d.roper@intel.com>
Subject: Re: [PATCH v2] drm/xe: restrict multi-lrc to VCS/VECS engines
Date: Thu, 19 Feb 2026 10:10:56 -0800 [thread overview]
Message-ID: <aZdSMMklBjAbTGae@lstrano-desk.jf.intel.com> (raw)
In-Reply-To: <20260218233823.369988-1-x.wang@intel.com>
On Wed, Feb 18, 2026 at 11:38:23PM +0000, Xin Wang wrote:
> Tighten uapi validation to restrict multi-lrc support to VIDEO_DECODE and
> VIDEO_ENHANCE engines only. This check should have been in place from the
> start, as the driver typically avoids allowing uapi cases that we have
> no userspace consumer for.
>
This will break IGTs but that is likely fine as long as those are fixed.
> Additionally, the GuC firmware on ModSched platforms no longer supports
> multi-lrc on non-media engines.
>
> V2:
> - correct the typo (Shuicheng)
> - move the check earlier to avoid VM lookup (Shuicheng, Matt)
> - remove the graphics version check (Matt)
> - input more details in the commit info (Matt)
>
> Cc: Shuicheng Lin <shuicheng.lin@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Xin Wang <x.wang@intel.com>
> ---
> drivers/gpu/drm/xe/xe_exec_queue.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
> index 66d0e10ee2c4..36bf570ab221 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> @@ -1184,6 +1184,12 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
> if (XE_IOCTL_DBG(xe, !hwe))
> return -EINVAL;
>
> + /* multi-lrc is only supported on VIDEO_DECODE and VIDEO_ENHANCE engines */
> + if (XE_IOCTL_DBG(xe, args->width > 1 &&
> + eci[0].engine_class != DRM_XE_ENGINE_CLASS_VIDEO_DECODE &&
> + eci[0].engine_class != DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE))
> + return -EOPNOTSUPP;
Would it be better to store a multi-lrc enable class mask in xe->info
and populate from xe_device_desc in xe_pci.c?
Matt
> +
> vm = xe_vm_lookup(xef, args->vm_id);
> if (XE_IOCTL_DBG(xe, !vm))
> return -ENOENT;
> --
> 2.43.0
>
prev parent reply other threads:[~2026-02-19 18:11 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-18 23:38 [PATCH v2] drm/xe: restrict multi-lrc to VCS/VECS engines Xin Wang
2026-02-19 0:41 ` ✓ CI.KUnit: success for " Patchwork
2026-02-19 1:16 ` ✓ Xe.CI.BAT: " Patchwork
2026-02-19 2:21 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-02-19 18:10 ` Matthew Brost [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=aZdSMMklBjAbTGae@lstrano-desk.jf.intel.com \
--to=matthew.brost@intel.com \
--cc=intel-xe@lists.freedesktop.org \
--cc=matthew.d.roper@intel.com \
--cc=shuicheng.lin@intel.com \
--cc=x.wang@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox