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From: "Lis, Tomasz" <tomasz.lis@intel.com>
To: "Michał Winiarski" <michal.winiarski@intel.com>
Cc: intel-xe@lists.freedesktop.org,
	"Michał Wajdeczko" <michal.wajdeczko@intel.com>,
	"Piotr Piórkowski" <piotr.piorkowski@intel.com>,
	"Matthew Brost" <matthew.brost@intel.com>,
	"Lucas De Marchi" <lucas.demarchi@intel.com>
Subject: Re: [PATCH v3 6/7] drm/xe/vf: Rebase MEMIRQ structures for all contexts after migration
Date: Thu, 29 May 2025 03:19:55 +0200	[thread overview]
Message-ID: <aa15a9d5-526f-4c7c-b2a5-c581a9e8faca@intel.com> (raw)
In-Reply-To: <jsmkqmq2m2uh2kee6dyxzklq3g3nm3htbskxf5zobpenchn3tm@mptopuryvmw3>

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On 28.05.2025 12:44, Michał Winiarski wrote:
> On Tue, May 20, 2025 at 01:19:24AM +0200, Tomasz Lis wrote:
>> All contexts require an update of state data, as the data includes
>> GGTT references to memirq-related buffers.
>>
>> Default contexts need these references updated as well, because they
>> are not refreshed when a new context is created from them.
>>
>> v2: Update addresses by xe_lrc_write_ctx_reg() rather than
>>    set_memory_based_intr()
>> v3: Renamed parameter, reordered parameters in some functs
>>
>> Signed-off-by: Tomasz Lis<tomasz.lis@intel.com>
>> Cc: Michal Wajdeczko<michal.wajdeczko@intel.com>
>> ---
>>   drivers/gpu/drm/xe/xe_exec_queue.c |  4 +++-
>>   drivers/gpu/drm/xe/xe_lrc.c        | 35 ++++++++++++++++++++++++++++++
>>   drivers/gpu/drm/xe/xe_lrc.h        |  2 ++
>>   drivers/gpu/drm/xe/xe_sriov_vf.c   | 13 ++++++++++-
>>   4 files changed, 52 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
>> index d696c8410a32..9c3e568400e0 100644
>> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
>> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
>> @@ -1051,6 +1051,8 @@ void xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q)
>>   {
>>   	int i;
>>   
>> -	for (i = 0; i < q->width; ++i)
>> +	for (i = 0; i < q->width; ++i) {
>> +		xe_lrc_update_memirq_regs_with_address(q->lrc[i], q->hwe);
> What if we're not using memirq?

We currently do not support VF Migration with Xe driver on any platform 
without memory-based IRQs.

But will add `xe_device_uses_memirq()` condition - MMIO IRQs should not 
need any additional code within VF recovery (we're already re-enabling 
IRQs during kickstart), so that's the only thing required for the support.

>
>>   		xe_lrc_update_hwctx_regs_with_address(q->lrc[i]);
>> +	}
>>   }
>> diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
>> index 525565480aef..959ac9c5d39a 100644
>> --- a/drivers/gpu/drm/xe/xe_lrc.c
>> +++ b/drivers/gpu/drm/xe/xe_lrc.c
>> @@ -898,6 +898,41 @@ static void *empty_lrc_data(struct xe_hw_engine *hwe)
>>   	return data;
>>   }
>>   
>> +/**
>> + * xe_default_lrc_update_memirq_regs_with_address - Re-compute GGTT references in default LRC
>> + *   of given engine.
>> + * @hwe: the &xe_hw_engine struct instance
>> + */
>> +void xe_default_lrc_update_memirq_regs_with_address(struct xe_hw_engine *hwe)
>> +{
>> +	struct xe_gt *gt = hwe->gt;
>> +	u32 *regs;
>> +
>> +	if (!gt->default_lrc[hwe->class])
>> +		return;
>> +
>> +	regs = gt->default_lrc[hwe->class] + LRC_PPHWSP_SIZE;
>> +	set_memory_based_intr(regs, hwe);
> We're using set_memory_based_intr() for gt->default_lrc, and
> xe_lrc_update_memirq_regs_with_address() for q->lrc.
>
> Why do we need 2 different methods to do that?

Real context state may be in LMEM, while default is just a CPU-side buffer.

In Xe, we use iosys_map struct to write shared memory, and we have 
wrappers over the kernel functions to handle write/read from instances 
of that struct.

Therefore, we cannot reuse `set_memory_based_intr()` for real LRCs. 
Well, we could allocate a cpu-side buffer, copy data to it, call the 
`set_memory_based_intr()` and the copy again. This is actually what I 
did originally - but it was problematic because required `kalloc()` so 
it got changed on previous round of review.

Going opposite way, we could use 
`structiosys_mapmap=IOSYS_MAP_INIT_VADDR(regs);` and use the 
`xe_lrc_update_memirq_regs_with_address()` on both real and default LRC. 
But that would require getting rid of `xe_lrc_write_ctx_reg()` reuse, 
and it wouldn't really eliminate any code - `set_memory_based_intr()` 
still have to stay.

So - yes, we use two different methods, but only one is implemented in 
this patch.

>> +}
>> +
>> +/**
>> + * xe_lrc_update_memirq_regs_with_address - Re-compute GGTT references in mem interrupt data
>> + *   for given LRC.
>> + * @lrc: the &xe_lrc struct instance
>> + * @hwe: the &xe_hw_engine struct instance
>> + */
>> +void xe_lrc_update_memirq_regs_with_address(struct xe_lrc *lrc, struct xe_hw_engine *hwe)
>> +{
>> +	struct xe_memirq *memirq = &gt_to_tile(hwe->gt)->memirq;
>> +
>> +	xe_lrc_write_ctx_reg(lrc, CTX_INT_MASK_ENABLE_PTR,
>> +			     xe_memirq_enable_ptr(memirq));
>> +	xe_lrc_write_ctx_reg(lrc, CTX_INT_STATUS_REPORT_PTR,
>> +			     xe_memirq_status_ptr(memirq, hwe));
>> +	xe_lrc_write_ctx_reg(lrc, CTX_INT_SRC_REPORT_PTR,
>> +			     xe_memirq_source_ptr(memirq, hwe));
>> +}
>> +
>>   static void xe_lrc_set_ppgtt(struct xe_lrc *lrc, struct xe_vm *vm)
>>   {
>>   	u64 desc = xe_vm_pdp4_descriptor(vm, gt_to_tile(lrc->gt));
>> diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
>> index e7a99cfd0abe..801a6b943f6e 100644
>> --- a/drivers/gpu/drm/xe/xe_lrc.h
>> +++ b/drivers/gpu/drm/xe/xe_lrc.h
>> @@ -89,6 +89,8 @@ u32 xe_lrc_indirect_ring_ggtt_addr(struct xe_lrc *lrc);
>>   u32 xe_lrc_ggtt_addr(struct xe_lrc *lrc);
>>   u32 *xe_lrc_regs(struct xe_lrc *lrc);
>>   void xe_lrc_update_hwctx_regs_with_address(struct xe_lrc *lrc);
>> +void xe_default_lrc_update_memirq_regs_with_address(struct xe_hw_engine *hwe);
>> +void xe_lrc_update_memirq_regs_with_address(struct xe_lrc *lrc, struct xe_hw_engine *hwe);
>>   
>>   u32 xe_lrc_read_ctx_reg(struct xe_lrc *lrc, int reg_nr);
>>   void xe_lrc_write_ctx_reg(struct xe_lrc *lrc, int reg_nr, u32 val);
>> diff --git a/drivers/gpu/drm/xe/xe_sriov_vf.c b/drivers/gpu/drm/xe/xe_sriov_vf.c
>> index 0f0d1a97ae1d..0a9761b6ffb5 100644
>> --- a/drivers/gpu/drm/xe/xe_sriov_vf.c
>> +++ b/drivers/gpu/drm/xe/xe_sriov_vf.c
>> @@ -225,13 +225,24 @@ static int vf_post_migration_requery_guc(struct xe_device *xe)
>>   	return ret;
>>   }
>>   
>> +static void xe_gt_default_lrcs_hwsp_rebase(struct xe_gt *gt)
>> +{
>> +	struct xe_hw_engine *hwe;
>> +	enum xe_hw_engine_id id;
>> +
>> +	for_each_hw_engine(hwe, gt, id)
>> +		xe_default_lrc_update_memirq_regs_with_address(hwe);
>> +}
> Device-level functions live in xe_sriov_vf.c, GT-level functions live in
> xe_gt_sriov_vf.c

ack

-Tomasz

> Thanks,
> -Michał
>
>> +
>>   static void vf_post_migration_fixup_contexts(struct xe_device *xe)
>>   {
>>   	struct xe_gt *gt;
>>   	unsigned int id;
>>   
>> -	for_each_gt(gt, xe, id)
>> +	for_each_gt(gt, xe, id) {
>> +		xe_gt_default_lrcs_hwsp_rebase(gt);
>>   		xe_guc_contexts_hwsp_rebase(&gt->uc.guc);
>> +	}
>>   }
>>   
>>   static void vf_post_migration_fixup_ctb(struct xe_device *xe)
>> -- 
>> 2.25.1
>>

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  reply	other threads:[~2025-05-29  1:20 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-19 23:19 [PATCH v3 0/7] drm/xe/vf: Post-migration recovery of queues and jobs Tomasz Lis
2025-05-19 23:19 ` [PATCH v3 1/7] drm/xe/sa: Avoid caching GGTT address within the manager Tomasz Lis
2025-05-19 23:19 ` [PATCH v3 2/7] drm/xe/vf: Finish RESFIX by reset if CTB not enabled Tomasz Lis
2025-05-27 11:56   ` K V P, Satyanarayana
2025-05-27 14:14     ` Lis, Tomasz
2025-05-19 23:19 ` [PATCH v3 3/7] drm/xe/vf: Pause submissions during RESFIX fixups Tomasz Lis
2025-05-27 13:10   ` K V P, Satyanarayana
2025-05-27 14:28     ` Lis, Tomasz
2025-05-28 20:16   ` Michał Winiarski
2025-05-31  0:05     ` Lis, Tomasz
2025-05-19 23:19 ` [PATCH v3 4/7] drm/xe: Block reset while recovering from VF migration Tomasz Lis
2025-05-28 20:02   ` Michał Winiarski
2025-06-03 20:23     ` Lis, Tomasz
2025-05-19 23:19 ` [PATCH v3 5/7] drm/xe/vf: Rebase HWSP of all contexts after migration Tomasz Lis
2025-05-27 13:45   ` K V P, Satyanarayana
2025-05-28 12:49   ` Michał Winiarski
2025-06-03 20:23     ` Lis, Tomasz
2025-05-19 23:19 ` [PATCH v3 6/7] drm/xe/vf: Rebase MEMIRQ structures for " Tomasz Lis
2025-05-27 14:06   ` K V P, Satyanarayana
2025-05-28 10:44   ` Michał Winiarski
2025-05-29  1:19     ` Lis, Tomasz [this message]
2025-05-19 23:19 ` [PATCH v3 7/7] drm/xe/vf: Post migration, repopulate ring area for pending request Tomasz Lis
2025-05-28 10:54   ` Michał Winiarski
2025-05-30 23:03     ` Lis, Tomasz
2025-05-20  0:00 ` ✓ CI.Patch_applied: success for drm/xe/vf: Post-migration recovery of queues and jobs (rev3) Patchwork
2025-05-20  0:00 ` ✗ CI.checkpatch: warning " Patchwork
2025-05-20  0:01 ` ✓ CI.KUnit: success " Patchwork
2025-05-20  0:11 ` ✓ CI.Build: " Patchwork
2025-05-20  0:14 ` ✓ CI.Hooks: " Patchwork
2025-05-20  0:15 ` ✓ CI.checksparse: " Patchwork
2025-05-20  0:39 ` ✓ Xe.CI.BAT: " Patchwork
2025-05-20 12:47 ` ✗ Xe.CI.Full: failure " Patchwork
2025-05-27  5:49 ` ✗ CI.Patch_applied: " Patchwork

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