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SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 On 12-11-2026 03:27 pm, Riana Tauro wrote: > Add support for handling PCIe subsystem errors. PCIe subsystem power > management errors require a Seconday bus reset(SBR) for recovery. Treat all > others as recovered and take no further action. > > Signed-off-by: Riana Tauro LGTM, Reviewed-by: Mallesh Koujalagi > --- > v2: add mapping to cper severity (Badal, Rodrigo) > add abbreviations > fix punctuations (Raag) > > v3: drop fabric patch > > v4: add global_error_status in log (Raag, Mallesh) > --- > drivers/gpu/drm/xe/xe_ras.c | 16 ++++++++++++++++ > drivers/gpu/drm/xe/xe_ras_types.h | 2 ++ > 2 files changed, 18 insertions(+) > > diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c > index 2c01c183d02b..da57ff60c11d 100644 > --- a/drivers/gpu/drm/xe/xe_ras.c > +++ b/drivers/gpu/drm/xe/xe_ras.c > @@ -698,6 +698,19 @@ static u8 handle_device_memory_errors(struct xe_device *xe, struct xe_ras_error_ > return XE_RAS_RECOVERY_ACTION_RECOVERED; > } > > +static u8 handle_pcie_errors(struct xe_device *xe, struct xe_ras_error_array *arr) > +{ > + struct xe_ras_ieh_error *info = (void *)arr->details; > + > + xe_log_comp(xe, ras_sev_to_cper_sev(arr->counter.common.severity), PCIE, &arr->counter, > + sizeof(arr->counter), "error detected: 0x%08x\n", info->global_error_status); > + > + if (info->global_error_status & XE_RAS_PCIE_IEH_GPMA) > + return XE_RAS_RECOVERY_ACTION_RESET; > + > + return XE_RAS_RECOVERY_ACTION_RECOVERED; > +} > + > void xe_ras_counter_threshold_crossed(struct xe_device *xe, > struct xe_sysctrl_event_response *response) > { > @@ -889,6 +902,9 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe) > case XE_RAS_COMP_DEVICE_MEMORY: > action = handle_device_memory_errors(xe, arr); > break; > + case XE_RAS_COMP_PCIE: > + action = handle_pcie_errors(xe, arr); > + break; > default: > /* For any other component, reset */ > action = XE_RAS_RECOVERY_ACTION_RESET; > diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h > index a86f9d2b8c92..36435a3f52e7 100644 > --- a/drivers/gpu/drm/xe/xe_ras_types.h > +++ b/drivers/gpu/drm/xe/xe_ras_types.h > @@ -14,6 +14,8 @@ > #define XE_RAS_NUM_PAGES 25 > /* Error bits in IEH global error status register */ > #define XE_RAS_SOC_IEH_PUNIT BIT(1) > +#define XE_RAS_PCIE_IEH_GPMA BIT(5) > + > /* Device memory error categories */ > #define XE_RAS_MEMORY_DB_ECC BIT(1) > #define XE_RAS_MEMORY_POISON BIT(2)