From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 69343CCD185 for ; Tue, 7 Oct 2025 14:45:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1F5CA10E69F; Tue, 7 Oct 2025 14:45:11 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="Dz+luGCk"; dkim-atps=neutral Received: from tor.source.kernel.org (tor.source.kernel.org [172.105.4.254]) by gabe.freedesktop.org (Postfix) with ESMTPS id 561E910E1AC; Tue, 7 Oct 2025 14:45:09 +0000 (UTC) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 70FF461608; Tue, 7 Oct 2025 14:45:08 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 75BADC4CEF9; Tue, 7 Oct 2025 14:45:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1759848308; bh=stqZpe7AXYgm3Xi9RQkXPgRZUpHQuqJD3/Q7tWQN9eQ=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=Dz+luGCkU/q7b+lUovIWBdPR6tp/x+UDkUmG1jefOKvxEYtdIl3qRNaScxmSSqK9p /51G8JFeKYKPgzKEqefazI902TXbDeLL5/rHn2H4hcOxFEFAPzULk2sxfNCxPl4+4g kDBGqJFG9mSFeLZ4+jN+IALwMo2PcsWTv+efNHfzbnKjdkZdwlnjzAsckncdGFIMOc AvjNYcLoefyrOZnGZp+56QBDpVCduXAHGFf4XQu5o36cjizefLxp0YEOBn4Ady7ZXo 00Ao3rdCyrF/afuMMwn0LIuQPkUNO5KZtY30UrgQHhZaMKpZHBpFDkqQSgbWgVXHnG 740xO3o8jfHag== Message-ID: Date: Tue, 7 Oct 2025 16:44:59 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC v8 00/21] DRM scheduling cgroup controller To: Boris Brezillon Cc: Philipp Stanner , phasta@kernel.org, Tvrtko Ursulin , dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org, kernel-dev@igalia.com, intel-xe@lists.freedesktop.org, cgroups@vger.kernel.org, linux-kernel@vger.kernel.org, =?UTF-8?Q?Christian_K=C3=B6nig?= , Leo Liu , =?UTF-8?Q?Ma=C3=ADra_Canal?= , Matthew Brost , =?UTF-8?Q?Michal_Koutn=C3=BD?= , =?UTF-8?Q?Michel_D=C3=A4nzer?= , Pierre-Eric Pelloux-Prayer , Rob Clark , Tejun Heo , Alexandre Courbot , Alistair Popple , John Hubbard , Joel Fernandes , Timur Tabi , Alex Deucher , Lucas De Marchi , =?UTF-8?Q?Thomas_Hellstr=C3=B6m?= , Rodrigo Vivi , Rob Herring , Steven Price , Liviu Dudau , Daniel Almeida , Alice Ryhl , Boqun Feng , =?UTF-8?B?R3LDqWdvaXJlIFDDqWFu?= , Simona Vetter , airlied@gmail.com References: <20250903152327.66002-1-tvrtko.ursulin@igalia.com> <4453e5989b38e99588efd53af674b69016b2c420.camel@mailbox.org> <20250930121229.4f265e0c@fedora> <20250930135736.02b69c65@fedora> From: Danilo Krummrich Content-Language: en-US In-Reply-To: <20250930135736.02b69c65@fedora> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On 9/30/25 1:57 PM, Boris Brezillon wrote: > Can you remind me what the problem is? I thought the lifetime issue was > coming from the fact the drm_sched ownership model was lax enough that > the job could be owned by both drm_gpu_scheduler and drm_sched_entity > at the same time. I don't think that's (directly) a thing from the perspective of the drm_sched design. A job should be either in the entity queue for the pending_list of the scheduler. However, different drivers do implement their own lifetime (and ownership) model on top of that, because they ultimately have to deal with jobs being either tied to the entity or the scheduler lifetime, which is everything else but strait forward in error cases and tear down paths. And the fundamental problem why drivers implement their own rules on top of this is because it is hard to deal with jobs being tied to entirely different lifetime model depending on their state. So, what I'm saying is that from the perspective of the component itself it's probably fine, but for the application in drivers it's the root cause for a lot of the hacks we see on top of the scheduler in drivers. Some of those hacks even make their way into the scheduler [1]. [1] https://elixir.bootlin.com/linux/v6.17.1/source/drivers/gpu/drm/scheduler/sched_main.c#L1439 >> Instead, I think the new Jobqueue should always own and always dispatch jobs >> directly and provide some "control API" to be instructed by an external >> component (orchestrator) on top of it when and to which ring to dispatch jobs. > > Feels to me that we're getting back to a model where the JobQueue needs > to know about the upper-layer in charge of the scheduling. I mean, it > can work, but you're adding some complexity back to JobQueue, which I > was expecting to be a simple FIFO with a dep-tracking logic. Yes, the Jobqueue would need an interface to the orchestrator. I rather have the complexity encapsulated in the Jobqueue, rather than pushing the complexity to drivers by having a more complex lifetime and ownership model that leaks into drivers as mentioned above. > I have a hard time seeing how it can fully integrate in this > orchestrator model. We can hook ourselves in the JobQueue::run_job() > and schedule the group for execution when we queue a job to the > ringbuf, but the group scheduler would still be something on the side. Can you please expand a bit more on the group model? My understanding is that you have a limited number of firmware rings (R) and each of those rings has N slots, where N is the number of queue types supported by the GPU. So, you need something that can schedule "groups" of queues over all available firmware rings, because it would be pointless to schedule each individual queue independently, as a firmware ring has slots for each of those. Is that correct?