Re: [PATCH v17 1/8] drm/xe: Use write-combine mapping when populating DPT

Rodrigo Vivi
2026-03-03T18:12:14Z

On Wed, Jan 28, 2026 at 10:13:26AM +0000, Tvrtko Ursulin wrote:
> The fallback case for DPT backing store is a buffer object in system
> memory buffer, which by default use a write-back CPU caching policy.
>
> If this fallback gets triggered, and since there is currently no flushing,
> the DPT writes made when pinning a buffer to display are not guaranteed to
> be seen by the display engine.
>
> To fix this, since both the local memory and the stolen memory DPT
> placement use write-combine, let us make the system memory option follow
> suit by marking the buffer with the scanout flag.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/xe/display/xe_fb_pin.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> index d2c4e94180fa..b285cc446f57 100644
> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> @@ -123,7 +123,8 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
> ttm_bo_type_kernel,
> XE_BO_FLAG_SYSTEM |
> XE_BO_FLAG_GGTT |
> - XE_BO_FLAG_PAGETABLE,
> + XE_BO_FLAG_PAGETABLE |
> + XE_BO_FLAG_SCANOUT, /* Force WC mapping */

This kind of changes the semantics of the flag.

Could you please change this internal name to something like
s/XE_BO_FLAG_SCANOUT/XE_BO_FLAG_FORCE_WC

Then we will have something like

/*
* Display scanout is always non-coherent with the CPU cache.
*
* For Xe_LPG and beyond up to NVL-P (excluding), PPGTT PTE
* lookups are also non-coherent and require a CPU:WC mapping.
*/
if (args->flags & DRM_XE_GEM_CREATE_FLAG_SCANOUT)
bo_flags |= XE_BO_FLAG_FORCE_WC;

> alignment, false);
> if (IS_ERR(dpt))
> return PTR_ERR(dpt);
> --
> 2.52.0
>