Re: [PATCH v18 2/9] drm/xe: Use write-combine mapping when populating DPT

Rodrigo Vivi
2026-03-04T13:51:13Z

On Wed, Mar 04, 2026 at 01:03:07PM +0000, Tvrtko Ursulin wrote:
> The fallback case for DPT backing store is a buffer object in system
> memory buffer, which by default use a write-back CPU caching policy.
>
> If this fallback gets triggered, and since there is currently no flushing,
> the DPT writes made when pinning a buffer to display are not guaranteed to
> be seen by the display engine.
>
> To fix this, since both the local memory and the stolen memory DPT
> placements already use write-combine, let us make the system memory option
> follow suit by passing down the appropriate flag.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
> drivers/gpu/drm/xe/display/xe_fb_pin.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> index d4a9eb550cae..df7d305c6fcd 100644
> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> @@ -122,7 +122,8 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
> ttm_bo_type_kernel,
> XE_BO_FLAG_SYSTEM |
> XE_BO_FLAG_GGTT |
> - XE_BO_FLAG_PAGETABLE,
> + XE_BO_FLAG_PAGETABLE |
> + XE_BO_FLAG_FORCE_WC,
> alignment, false);
> if (IS_ERR(dpt))
> return PTR_ERR(dpt);
> --
> 2.52.0
>