Re: [PATCH v2 10/11] drm/xe/xe_ras: Handle Uncorrectable SoC Internal errors

Riana Tauro
2026-03-11T14:56:13Z

On 3/10/2026 6:59 PM, Mallesh, Koujalagi wrote:
>
> On 02-03-2026 03:52 pm, Riana Tauro wrote:
>> Some critical errors such as CSC firmware and Punit are reported under
>> SoC Internal Errors.
>>
>> CSC errors are classified as hardware errors and firmware errors.
>> Hardware errors can be recovered using a SBR whereas firmware errors
>> are critical and require a firmware flash. On such errors, device will
>> be wedged and runtime survivability mode will be enabed to notify
>> userspace that a firmware flash is required.
>>
>> PUNIT uncorrectable errors can only be recovered through a cold reset.
>> TODO: Wedge device and notify userspace that a cold reset is required.
>>
>> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>> ---
>>   drivers/gpu/drm/xe/xe_ras.c | 52 +++++++++++++++++++++++++++++++++++++
>>   1 file changed, 52 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
>> index 61c01a4bfadb..f35d77654c8f 100644
>> --- a/drivers/gpu/drm/xe/xe_ras.c
>> +++ b/drivers/gpu/drm/xe/xe_ras.c
>> @@ -7,6 +7,7 @@
>>   #include "xe_printk.h"
>>   #include "xe_ras.h"
>>   #include "xe_ras_types.h"
>> +#include "xe_survivability_mode.h"
>>   #include "xe_sysctrl_mailbox.h"
>>   #include "xe_sysctrl_mailbox_types.h"
>> @@ -102,6 +103,54 @@ static enum xe_ras_recovery_action
>> handle_compute_errors(struct xe_device *xe,
>>       return XE_RAS_RECOVERY_ACTION_RECOVERED;
>>   }
>> +static enum xe_ras_recovery_action handle_soc_internal_errors(struct
>> xe_device *xe,
>> +                                  struct xe_ras_error_array *arr)
>> +{
>> +    struct xe_ras_soc_error *error_info = (struct xe_ras_soc_error
>> *)arr->error_details;
>> +    struct xe_ras_soc_error_source source = error_info->error_source;
>> +    struct xe_ras_error_common common_info = arr->error_class.common;
>> +    enum xe_ras_recovery_action action;
>> +
>> +    /* Default action */
>> +    action = XE_RAS_RECOVERY_ACTION_RESET;
>> +
>> +    log_ras_error(xe, &arr->error_class);
>> +
>> +    if (source.csc) {
>> +        struct xe_ras_csc_error *csc_error = (struct xe_ras_csc_error
>> *)error_info->additional_details;
>> +
>> +        /*
>> +         * CSC uncorrectable errors are classified as hardware errors
>> and firmware errors.
>> +         * CSC firmware errors are critical errors that can be
>> recovered only by firmware
>> +         * update via SPI driver. PCODE enables FDO mode and sets the
>> bit in the capability
>> +         * register. On receiving this error, the driver enables
>> runtime survivability mode
>> +         * which notifies userspace that a firmware update is required.
>> +         */
>> +        if (csc_error->hec_uncorr_fw_err_dw0) {
>> +            xe_err(xe, "[RAS]: CSC %s error detected: 0x%x\n",
>> +                   severity_to_str(xe, common_info.severity),
>> +                   csc_error->hec_uncorr_fw_err_dw0);
>> +            xe_survivability_mode_runtime_enable(xe);
>> +            action = XE_RAS_RECOVERY_ACTION_DISCONNECT;
>> +        }
>> +    }
>> +
>> +    if (source.soc) {
>> +        struct xe_ras_ieh_error *ieh_error = (struct xe_ras_ieh_error
>> *)error_info->additional_details;
>> +
>> +        if (ieh_error->error_sources_ieh0.punit) {
>> +            xe_err(xe, "[RAS]: PUNIT %s error detected: 0x%x\n",
>> +                   severity_to_str(xe, common_info.severity),
>> +                   ieh_error->error_sources_ieh0.punit);
>> +            /** TODO: Add PUNIT error handling */
>> +            action = XE_RAS_RECOVERY_ACTION_DISCONNECT;
>> +        }
>> +    }
>> +
>
> Use else if in source.soc, since source.csc and source.soc bits are set
> (even it's not happen), the same additional details are
>
> cast two different structure type may cause undefined behavior.

Yeah you are correct. Thanks for catching this.
I can just return the action.

Though will double check if two error bits can be set in a single response

Thanks
Riana

>
> Thanks
>
> -/Mallesh
>
>> +    /* For other SOC internal errors, request a reset as recovery
>> mechanism */
>> +    return action;
>> +}
>> +
>>   static void xe_ras_prepare_sysctrl_command(struct
>> xe_sysctrl_mailbox_command *command,
>>                          u32 cmd_mask, void *request, size_t request_len,
>>                          void *response, size_t response_len)
>> @@ -180,6 +229,9 @@ enum xe_ras_recovery_action
>> xe_ras_process_errors(struct xe_device *xe)
>>               case XE_RAS_COMPONENT_CORE_COMPUTE:
>>                   action = handle_compute_errors(xe, &arr);
>>                   break;
>> +            case XE_RAS_COMPONENT_SOC_INTERNAL:
>> +                action = handle_soc_internal_errors(xe, &arr);
>> +                break;
>>               default:
>>                   xe_err(xe, "[RAS]: Unknown error component %u\n",
>> component);
>>                   break;