RE: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt

Kandpal, Suraj
2026-03-12T03:18:58Z

> Subject: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt
>
> Enable PIPEDMC_ERROR interrupt bit for display version 35+.
>

Add same Bspec link here too

> Signed-off-by: Dibin Moolakadan Subrahmanian
> <dibin.moolakadan.subrahmanian@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dmc.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
> b/drivers/gpu/drm/i915/display/intel_dmc.c
> index 38b284a0db82..e60f1f977070 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> @@ -510,7 +510,8 @@ static void pipedmc_clock_gating_wa(struct
> intel_display *display, bool enable) static u32 pipedmc_interrupt_mask(struct
> intel_display *display) {
> if (DISPLAY_VER(display) >= 35)
> - return PIPEDMC_FLIPQ_PROG_DONE;
> + return PIPEDMC_FLIPQ_PROG_DONE |
> + PIPEDMC_ERROR;
>

Mostly looks okay but here's my question:
I know LNL pipe B had an issue with PIPEDMC_ERROR being triggered on LNL pipe B,
As I can see from Ville's commit message, but is it still the case for PTL ?
Can we have that tested ?
If that works we can add the PIPEDMC_ERROR from PTL onwards.
Then here we can change code to create a mask and then return it finally like :

mask = PIPEDMC_FLIPQ_PROG_DONE

if display ver >= 30
mask |= PIPEDMC_ERROR

if display ver < 35
mask |= PIPEDMC_GTT_FAULT |
PIPEDMC_ATS_FAULT;

Return mask;

Obviously that is if PIPEDMC_ERROR works on PTL properly.

Regards,
Suraj Kandpal

> /*
> * FIXME PIPEDMC_ERROR not enabled for now due to LNL pipe B
> --
> 2.43.0