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d="scan'208";a="259044922" Received: from smoticic-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.244.21]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2026 05:34:29 -0700 Date: Fri, 13 Mar 2026 14:34:26 +0200 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Ankit Nautiyal Cc: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, jouni.hogander@intel.com, animesh.manna@intel.com Subject: Re: [PATCH 12/19] drm/i915/psr: Write the PR config DPCDs in burst mode Message-ID: References: <20260311113611.3393194-1-ankit.k.nautiyal@intel.com> <20260311113611.3393194-13-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260311113611.3393194-13-ankit.k.nautiyal@intel.com> X-Patchwork-Hint: comment Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs Bertel Jungin Aukio 5, 02600 Espoo, Finland X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Wed, Mar 11, 2026 at 05:06:04PM +0530, Ankit Nautiyal wrote: > Replace the consecutive single-byte writes to PANEL_REPLAY_CONFIG and > CONFIG2 with one drm_dp_dpcd_write() burst starting at PANEL_REPLAY_CONFIG, > reducing AUX transactions. > > Suggested-by: Ville Syrjälä > Signed-off-by: Ankit Nautiyal > --- > drivers/gpu/drm/i915/display/intel_psr.c | 18 ++++++++++++------ > 1 file changed, 12 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c > index 5041a5a138d1..ee6e26abd05e 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -774,27 +774,33 @@ static bool psr2_su_region_et_valid(struct intel_connector *connector, bool pane > static void _panel_replay_enable_sink(struct intel_dp *intel_dp, > const struct intel_crtc_state *crtc_state) > { > - u8 val = DP_PANEL_REPLAY_ENABLE | > + struct intel_display *display = to_intel_display(intel_dp); > + u8 panel_replay_config = DP_PANEL_REPLAY_ENABLE | > DP_PANEL_REPLAY_VSC_SDP_CRC_EN | > DP_PANEL_REPLAY_UNRECOVERABLE_ERROR_EN | > DP_PANEL_REPLAY_RFB_STORAGE_ERROR_EN | > DP_PANEL_REPLAY_ACTIVE_FRAME_CRC_ERROR_EN; > u8 panel_replay_config2 = DP_PANEL_REPLAY_CRC_VERIFICATION; > + u8 buf[2]; u8 panel_replay_config[2]; would reduce the number of variables we have to contend with. > + int ret; > > if (crtc_state->has_sel_update) > - val |= DP_PANEL_REPLAY_SU_ENABLE; > + panel_replay_config |= DP_PANEL_REPLAY_SU_ENABLE; > > if (crtc_state->enable_psr2_su_region_et) > - val |= DP_PANEL_REPLAY_ENABLE_SU_REGION_ET; > + panel_replay_config |= DP_PANEL_REPLAY_ENABLE_SU_REGION_ET; > > if (crtc_state->req_psr2_sdp_prior_scanline) > panel_replay_config2 |= > DP_PANEL_REPLAY_SU_REGION_SCANLINE_CAPTURE; > > - drm_dp_dpcd_writeb(&intel_dp->aux, PANEL_REPLAY_CONFIG, val); > + buf[0] = panel_replay_config; > + buf[1] = panel_replay_config2; > + > + ret = drm_dp_dpcd_write(&intel_dp->aux, PANEL_REPLAY_CONFIG, buf, sizeof(buf)); > > - drm_dp_dpcd_writeb(&intel_dp->aux, PANEL_REPLAY_CONFIG2, > - panel_replay_config2); > + if (ret < 0 || ret != sizeof(buf)) The < 0 check is redunadnt. > + drm_dbg_kms(display->drm, "Failed to write Panel Replay Configs\n"); > } > > static void _psr_enable_sink(struct intel_dp *intel_dp, > -- > 2.45.2 -- Ville Syrjälä Intel