* [PATCH v3 DO NOT REVIEW 01/26] drm: writeback: rename drm_writeback_connector_init_with_encoder()
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 11:07 ` [PATCH v3 DO NOT REVIEW 02/26] drm: writeback: Refactor drm_writeback_connector structure Suraj Kandpal
` (26 subsequent siblings)
27 siblings, 0 replies; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Dmitry Baryshkov, Suraj Kandpal, Louis Chauvet
From: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Rename drm_writeback_connector_init_with_encoder() to
drm_writeback_connector_init() and adapt its interface to follow
drmm_writeback_connector_init().
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Louis Chauvet <louis.chauvet@bootlin.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
.../drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c | 18 +++--
.../arm/display/komeda/komeda_wb_connector.c | 30 ++++----
drivers/gpu/drm/arm/malidp_mw.c | 25 ++++---
drivers/gpu/drm/drm_writeback.c | 69 ++-----------------
drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c | 3 +-
.../drm/renesas/rcar-du/rcar_du_writeback.c | 23 +++++--
drivers/gpu/drm/vc4/vc4_txp.c | 9 ++-
include/drm/drm_writeback.h | 22 +-----
9 files changed, 76 insertions(+), 125 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 646fbdd5688b..02a260127e16 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -10633,7 +10633,7 @@ static void dm_set_writeback(struct amdgpu_display_manager *dm,
return;
}
- acrtc = to_amdgpu_crtc(wb_conn->encoder.crtc);
+ acrtc = to_amdgpu_crtc(crtc_state->base.crtc);
if (!acrtc) {
drm_err(adev_to_drm(adev), "no amdgpu_crtc found\n");
kfree(wb_info);
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c
index d9527c05fc87..80c37487ca77 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c
@@ -171,7 +171,6 @@ static const struct drm_encoder_helper_funcs amdgpu_dm_wb_encoder_helper_funcs =
static const struct drm_connector_funcs amdgpu_dm_wb_connector_funcs = {
.fill_modes = drm_helper_probe_single_connector_modes,
- .destroy = drm_connector_cleanup,
.reset = amdgpu_dm_connector_funcs_reset,
.atomic_duplicate_state = amdgpu_dm_connector_atomic_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
@@ -190,17 +189,26 @@ int amdgpu_dm_wb_connector_init(struct amdgpu_display_manager *dm,
struct dc *dc = dm->dc;
struct dc_link *link = dc_get_link_at_index(dc, link_index);
int res = 0;
+ struct drm_encoder *encoder;
+
+ encoder = drmm_plain_encoder_alloc(&dm->adev->ddev, NULL,
+ DRM_MODE_ENCODER_VIRTUAL, NULL);
+ if (IS_ERR(encoder))
+ return PTR_ERR(encoder);
+
+ drm_encoder_helper_add(encoder, &amdgpu_dm_wb_encoder_helper_funcs);
+
+ encoder->possible_crtcs = amdgpu_dm_get_encoder_crtc_mask(dm->adev);
wbcon->link = link;
drm_connector_helper_add(&wbcon->base.base, &amdgpu_dm_wb_conn_helper_funcs);
- res = drm_writeback_connector_init(&dm->adev->ddev, &wbcon->base,
+ res = drmm_writeback_connector_init(&dm->adev->ddev, &wbcon->base,
&amdgpu_dm_wb_connector_funcs,
- &amdgpu_dm_wb_encoder_helper_funcs,
+ encoder,
amdgpu_dm_wb_formats,
- ARRAY_SIZE(amdgpu_dm_wb_formats),
- amdgpu_dm_get_encoder_crtc_mask(dm->adev));
+ ARRAY_SIZE(amdgpu_dm_wb_formats));
if (res)
return res;
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c b/drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c
index 41cc3e080dc9..bcc53d4015f1 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c
@@ -5,6 +5,7 @@
*
*/
#include <drm/drm_framebuffer.h>
+#include <drm/drm_managed.h>
#include "komeda_dev.h"
#include "komeda_kms.h"
@@ -121,17 +122,10 @@ komeda_wb_connector_fill_modes(struct drm_connector *connector,
return 0;
}
-static void komeda_wb_connector_destroy(struct drm_connector *connector)
-{
- drm_connector_cleanup(connector);
- kfree(to_kconn(to_wb_conn(connector)));
-}
-
static const struct drm_connector_funcs komeda_wb_connector_funcs = {
.reset = drm_atomic_helper_connector_reset,
.detect = komeda_wb_connector_detect,
.fill_modes = komeda_wb_connector_fill_modes,
- .destroy = komeda_wb_connector_destroy,
.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
};
@@ -143,13 +137,15 @@ static int komeda_wb_connector_add(struct komeda_kms_dev *kms,
struct komeda_wb_connector *kwb_conn;
struct drm_writeback_connector *wb_conn;
struct drm_display_info *info;
+ struct drm_encoder *encoder;
+
u32 *formats, n_formats = 0;
int err;
if (!kcrtc->master->wb_layer)
return 0;
- kwb_conn = kzalloc_obj(*kwb_conn);
+ kwb_conn = drmm_kzalloc(&kms->base, sizeof(*kwb_conn), GFP_KERNEL);
if (!kwb_conn)
return -ENOMEM;
@@ -165,11 +161,19 @@ static int komeda_wb_connector_add(struct komeda_kms_dev *kms,
return -ENOMEM;
}
- err = drm_writeback_connector_init(&kms->base, wb_conn,
- &komeda_wb_connector_funcs,
- &komeda_wb_encoder_helper_funcs,
- formats, n_formats,
- BIT(drm_crtc_index(&kcrtc->base)));
+ encoder = drmm_plain_encoder_alloc(&kms->base, NULL,
+ DRM_MODE_ENCODER_VIRTUAL, NULL);
+ if (IS_ERR(encoder))
+ return PTR_ERR(encoder);
+
+ drm_encoder_helper_add(encoder, &komeda_wb_encoder_helper_funcs);
+
+ encoder->possible_crtcs = drm_crtc_mask(&kcrtc->base);
+
+ err = drmm_writeback_connector_init(&kms->base, wb_conn,
+ &komeda_wb_connector_funcs,
+ encoder,
+ formats, n_formats);
komeda_put_fourcc_list(formats);
if (err) {
kfree(kwb_conn);
diff --git a/drivers/gpu/drm/arm/malidp_mw.c b/drivers/gpu/drm/arm/malidp_mw.c
index fad343842038..6e0c78e998aa 100644
--- a/drivers/gpu/drm/arm/malidp_mw.c
+++ b/drivers/gpu/drm/arm/malidp_mw.c
@@ -84,11 +84,6 @@ malidp_mw_connector_detect(struct drm_connector *connector, bool force)
return connector_status_connected;
}
-static void malidp_mw_connector_destroy(struct drm_connector *connector)
-{
- drm_connector_cleanup(connector);
-}
-
static struct drm_connector_state *
malidp_mw_connector_duplicate_state(struct drm_connector *connector)
{
@@ -114,7 +109,6 @@ static const struct drm_connector_funcs malidp_mw_connector_funcs = {
.reset = malidp_mw_connector_reset,
.detect = malidp_mw_connector_detect,
.fill_modes = drm_helper_probe_single_connector_modes,
- .destroy = malidp_mw_connector_destroy,
.atomic_duplicate_state = malidp_mw_connector_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
};
@@ -211,6 +205,7 @@ static u32 *get_writeback_formats(struct malidp_drm *malidp, int *n_formats)
int malidp_mw_connector_init(struct drm_device *drm)
{
struct malidp_drm *malidp = drm_to_malidp(drm);
+ struct drm_encoder *encoder;
u32 *formats;
int ret, n_formats;
@@ -224,11 +219,19 @@ int malidp_mw_connector_init(struct drm_device *drm)
if (!formats)
return -ENOMEM;
- ret = drm_writeback_connector_init(drm, &malidp->mw_connector,
- &malidp_mw_connector_funcs,
- &malidp_mw_encoder_helper_funcs,
- formats, n_formats,
- 1 << drm_crtc_index(&malidp->crtc));
+ encoder = drmm_plain_encoder_alloc(drm, NULL, DRM_MODE_ENCODER_VIRTUAL,
+ NULL);
+ if (IS_ERR(encoder))
+ return PTR_ERR(encoder);
+
+ drm_encoder_helper_add(encoder, &malidp_mw_encoder_helper_funcs);
+
+ encoder->possible_crtcs = drm_crtc_mask(&malidp->crtc);
+
+ ret = drmm_writeback_connector_init(drm, &malidp->mw_connector,
+ &malidp_mw_connector_funcs,
+ encoder,
+ formats, n_formats);
kfree(formats);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/drm_writeback.c b/drivers/gpu/drm/drm_writeback.c
index 4da5d6094721..68fdac745f42 100644
--- a/drivers/gpu/drm/drm_writeback.c
+++ b/drivers/gpu/drm/drm_writeback.c
@@ -142,61 +142,6 @@ static int create_writeback_properties(struct drm_device *dev)
return 0;
}
-static const struct drm_encoder_funcs drm_writeback_encoder_funcs = {
- .destroy = drm_encoder_cleanup,
-};
-
-/**
- * drm_writeback_connector_init - Initialize a writeback connector and its properties
- * @dev: DRM device
- * @wb_connector: Writeback connector to initialize
- * @con_funcs: Connector funcs vtable
- * @enc_helper_funcs: Encoder helper funcs vtable to be used by the internal encoder
- * @formats: Array of supported pixel formats for the writeback engine
- * @n_formats: Length of the formats array
- * @possible_crtcs: possible crtcs for the internal writeback encoder
- *
- * This function creates the writeback-connector-specific properties if they
- * have not been already created, initializes the connector as
- * type DRM_MODE_CONNECTOR_WRITEBACK, and correctly initializes the property
- * values. It will also create an internal encoder associated with the
- * drm_writeback_connector and set it to use the @enc_helper_funcs vtable for
- * the encoder helper.
- *
- * Drivers should always use this function instead of drm_connector_init() to
- * set up writeback connectors.
- *
- * Returns: 0 on success, or a negative error code
- */
-int drm_writeback_connector_init(struct drm_device *dev,
- struct drm_writeback_connector *wb_connector,
- const struct drm_connector_funcs *con_funcs,
- const struct drm_encoder_helper_funcs *enc_helper_funcs,
- const u32 *formats, int n_formats,
- u32 possible_crtcs)
-{
- int ret = 0;
-
- drm_encoder_helper_add(&wb_connector->encoder, enc_helper_funcs);
-
- wb_connector->encoder.possible_crtcs = possible_crtcs;
-
- ret = drm_encoder_init(dev, &wb_connector->encoder,
- &drm_writeback_encoder_funcs,
- DRM_MODE_ENCODER_VIRTUAL, NULL);
- if (ret)
- return ret;
-
- ret = drm_writeback_connector_init_with_encoder(dev, wb_connector, &wb_connector->encoder,
- con_funcs, formats, n_formats);
-
- if (ret)
- drm_encoder_cleanup(&wb_connector->encoder);
-
- return ret;
-}
-EXPORT_SYMBOL(drm_writeback_connector_init);
-
static void delete_writeback_properties(struct drm_device *dev)
{
if (dev->mode_config.writeback_pixel_formats_property) {
@@ -290,7 +235,7 @@ static int __drm_writeback_connector_init(struct drm_device *dev,
}
/**
- * drm_writeback_connector_init_with_encoder - Initialize a writeback connector with
+ * drm_writeback_connector_init - Initialize a writeback connector with
* a custom encoder
*
* @dev: DRM device
@@ -318,11 +263,11 @@ static int __drm_writeback_connector_init(struct drm_device *dev,
*
* Returns: 0 on success, or a negative error code
*/
-int drm_writeback_connector_init_with_encoder(struct drm_device *dev,
- struct drm_writeback_connector *wb_connector,
- struct drm_encoder *enc,
- const struct drm_connector_funcs *con_funcs,
- const u32 *formats, int n_formats)
+int drm_writeback_connector_init(struct drm_device *dev,
+ struct drm_writeback_connector *wb_connector,
+ const struct drm_connector_funcs *con_funcs,
+ struct drm_encoder *enc,
+ const u32 *formats, int n_formats)
{
struct drm_connector *connector = &wb_connector->base;
int ret;
@@ -339,7 +284,7 @@ int drm_writeback_connector_init_with_encoder(struct drm_device *dev,
return ret;
}
-EXPORT_SYMBOL(drm_writeback_connector_init_with_encoder);
+EXPORT_SYMBOL(drm_writeback_connector_init);
/**
* drm_writeback_connector_cleanup - Cleanup the writeback connector
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c
index 7545c0293efb..6f2370c9dd98 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c
@@ -5,6 +5,7 @@
#include <drm/drm_edid.h>
#include <drm/drm_framebuffer.h>
+#include <drm/drm_managed.h>
#include "dpu_writeback.h"
@@ -125,7 +126,7 @@ int dpu_writeback_init(struct drm_device *dev, struct drm_encoder *enc,
struct dpu_wb_connector *dpu_wb_conn;
int rc = 0;
- dpu_wb_conn = devm_kzalloc(dev->dev, sizeof(*dpu_wb_conn), GFP_KERNEL);
+ dpu_wb_conn = drmm_kzalloc(dev, sizeof(*dpu_wb_conn), GFP_KERNEL);
if (!dpu_wb_conn)
return -ENOMEM;
diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_du_writeback.c b/drivers/gpu/drm/renesas/rcar-du/rcar_du_writeback.c
index e5e6e6a156aa..aa37cf99754c 100644
--- a/drivers/gpu/drm/renesas/rcar-du/rcar_du_writeback.c
+++ b/drivers/gpu/drm/renesas/rcar-du/rcar_du_writeback.c
@@ -134,7 +134,6 @@ static void rcar_du_wb_conn_reset(struct drm_connector *connector)
static const struct drm_connector_funcs rcar_du_wb_conn_funcs = {
.reset = rcar_du_wb_conn_reset,
.fill_modes = drm_helper_probe_single_connector_modes,
- .destroy = drm_connector_cleanup,
.atomic_duplicate_state = rcar_du_wb_conn_duplicate_state,
.atomic_destroy_state = rcar_du_wb_conn_destroy_state,
};
@@ -202,15 +201,25 @@ int rcar_du_writeback_init(struct rcar_du_device *rcdu,
{
struct drm_writeback_connector *wb_conn = &rcrtc->writeback;
+ struct drm_encoder *encoder;
+
+ encoder = drmm_plain_encoder_alloc(&rcdu->ddev, NULL,
+ DRM_MODE_ENCODER_VIRTUAL, NULL);
+ if (IS_ERR(encoder))
+ return PTR_ERR(encoder);
+
+ drm_encoder_helper_add(encoder, &rcar_du_wb_enc_helper_funcs);
+
+ encoder->possible_crtcs = drm_crtc_mask(&rcrtc->crtc);
+
drm_connector_helper_add(&wb_conn->base,
&rcar_du_wb_conn_helper_funcs);
- return drm_writeback_connector_init(&rcdu->ddev, wb_conn,
- &rcar_du_wb_conn_funcs,
- &rcar_du_wb_enc_helper_funcs,
- writeback_formats,
- ARRAY_SIZE(writeback_formats),
- 1 << drm_crtc_index(&rcrtc->crtc));
+ return drmm_writeback_connector_init(&rcdu->ddev, wb_conn,
+ &rcar_du_wb_conn_funcs,
+ encoder,
+ writeback_formats,
+ ARRAY_SIZE(writeback_formats));
}
void rcar_du_writeback_setup(struct rcar_du_crtc *rcrtc,
diff --git a/drivers/gpu/drm/vc4/vc4_txp.c b/drivers/gpu/drm/vc4/vc4_txp.c
index 9082902100e4..befdb094c173 100644
--- a/drivers/gpu/drm/vc4/vc4_txp.c
+++ b/drivers/gpu/drm/vc4/vc4_txp.c
@@ -378,7 +378,6 @@ vc4_txp_connector_detect(struct drm_connector *connector, bool force)
static const struct drm_connector_funcs vc4_txp_connector_funcs = {
.detect = vc4_txp_connector_detect,
.fill_modes = drm_helper_probe_single_connector_modes,
- .destroy = drm_connector_cleanup,
.reset = drm_atomic_helper_connector_reset,
.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
@@ -602,10 +601,10 @@ static int vc4_txp_bind(struct device *dev, struct device *master, void *data)
drm_connector_helper_add(&txp->connector.base,
&vc4_txp_connector_helper_funcs);
- ret = drm_writeback_connector_init_with_encoder(drm, &txp->connector,
- encoder,
- &vc4_txp_connector_funcs,
- drm_fmts, ARRAY_SIZE(drm_fmts));
+ ret = drmm_writeback_connector_init(drm, &txp->connector,
+ &vc4_txp_connector_funcs,
+ encoder,
+ drm_fmts, ARRAY_SIZE(drm_fmts));
if (ret)
return ret;
diff --git a/include/drm/drm_writeback.h b/include/drm/drm_writeback.h
index c380a7b8f55a..958466a05e60 100644
--- a/include/drm/drm_writeback.h
+++ b/include/drm/drm_writeback.h
@@ -24,17 +24,6 @@ struct drm_writeback_connector {
*/
struct drm_connector base;
- /**
- * @encoder: Internal encoder used by the connector to fulfill
- * the DRM framework requirements. The users of the
- * @drm_writeback_connector control the behaviour of the @encoder
- * by passing the @enc_funcs parameter to drm_writeback_connector_init()
- * function.
- * For users of drm_writeback_connector_init_with_encoder(), this field
- * is not valid as the encoder is managed within their drivers.
- */
- struct drm_encoder encoder;
-
/**
* @pixel_formats_blob_ptr:
*
@@ -151,15 +140,8 @@ drm_connector_to_writeback(struct drm_connector *connector)
int drm_writeback_connector_init(struct drm_device *dev,
struct drm_writeback_connector *wb_connector,
const struct drm_connector_funcs *con_funcs,
- const struct drm_encoder_helper_funcs *enc_helper_funcs,
- const u32 *formats, int n_formats,
- u32 possible_crtcs);
-
-int drm_writeback_connector_init_with_encoder(struct drm_device *dev,
- struct drm_writeback_connector *wb_connector,
- struct drm_encoder *enc,
- const struct drm_connector_funcs *con_funcs, const u32 *formats,
- int n_formats);
+ struct drm_encoder *enc,
+ const u32 *formats, int n_formats);
int drmm_writeback_connector_init(struct drm_device *dev,
struct drm_writeback_connector *wb_connector,
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* [PATCH v3 DO NOT REVIEW 02/26] drm: writeback: Refactor drm_writeback_connector structure
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
2026-03-25 11:07 ` [PATCH v3 DO NOT REVIEW 01/26] drm: writeback: rename drm_writeback_connector_init_with_encoder() Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 11:07 ` [PATCH v3 03/26] drm/i915/writeback: Add writeback registers Suraj Kandpal
` (25 subsequent siblings)
27 siblings, 0 replies; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal, Liviu Dudau, Louis Chauvet
Some drivers cannot work with the current design where the connector
is embedded within the drm_writeback_connector such as Intel and
some drivers that can get it working end up adding a lot of checks
all around the code to check if it's a writeback conenctor or not,
this is due to the limitation of inheritance in C.
To solve this move the drm_writeback_connector within the
drm_connector and remove the drm_connector base which was in
drm_writeback_connector. Make this drm_writeback_connector
a union with hdmi connector to save memory and since a connector can
never be both writeback and hdmi it should serve us well.
Do all other required modifications that come with these changes
along with addition of new function which returns the drm_connector
when drm_writeback_connector is present.
Modify drivers using the drm_writeback_connector to
allow them to use this connector without breaking them.
The drivers modified here are amd, komeda, mali, vc4, vkms,
rcar_du, msm
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Reviewed-by: Louis Chauvet <louis.chauvet@bootlin.com>
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 10 +--
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 2 +-
.../drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c | 12 +--
.../gpu/drm/arm/display/komeda/komeda_crtc.c | 2 +-
.../gpu/drm/arm/display/komeda/komeda_kms.h | 6 +-
.../arm/display/komeda/komeda_wb_connector.c | 11 +--
drivers/gpu/drm/arm/malidp_crtc.c | 2 +-
drivers/gpu/drm/arm/malidp_drv.h | 2 +-
drivers/gpu/drm/arm/malidp_mw.c | 7 +-
drivers/gpu/drm/drm_atomic_uapi.c | 4 +-
drivers/gpu/drm/drm_writeback.c | 51 ++++++++-----
.../drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 9 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c | 10 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.h | 4 +-
.../gpu/drm/renesas/rcar-du/rcar_du_crtc.h | 4 +-
.../drm/renesas/rcar-du/rcar_du_writeback.c | 12 ++-
drivers/gpu/drm/vc4/vc4_txp.c | 8 +-
drivers/gpu/drm/vkms/vkms_drv.h | 2 +-
drivers/gpu/drm/vkms/vkms_writeback.c | 15 ++--
include/drm/drm_connector.h | 69 ++++++++++++++++-
include/drm/drm_modeset_helper_vtables.h | 4 +-
include/drm/drm_writeback.h | 76 ++-----------------
22 files changed, 162 insertions(+), 160 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 02a260127e16..7900faee6f05 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -679,7 +679,7 @@ static void dm_crtc_high_irq(void *interrupt_params)
100LL, (v_total * stream->timing.h_total));
mdelay(1000 / refresh_hz);
- drm_writeback_signal_completion(acrtc->wb_conn, 0);
+ drm_writeback_signal_completion(acrtc->connector, 0);
dc_stream_fc_disable_writeback(adev->dm.dc,
acrtc->dm_irq_params.stream, 0);
}
@@ -7282,11 +7282,9 @@ create_stream_for_sink(struct drm_connector *connector,
aconnector = to_amdgpu_dm_connector(connector);
link = aconnector->dc_link;
} else {
- struct drm_writeback_connector *wbcon = NULL;
struct amdgpu_dm_wb_connector *dm_wbcon = NULL;
- wbcon = drm_connector_to_writeback(connector);
- dm_wbcon = to_amdgpu_dm_wb_connector(wbcon);
+ dm_wbcon = to_amdgpu_dm_wb_connector(connector);
link = dm_wbcon->link;
}
@@ -10619,7 +10617,7 @@ static void dm_set_writeback(struct amdgpu_display_manager *dm,
struct drm_connector *connector,
struct drm_connector_state *new_con_state)
{
- struct drm_writeback_connector *wb_conn = drm_connector_to_writeback(connector);
+ struct drm_writeback_connector *wb_conn = &connector->writeback;
struct amdgpu_device *adev = dm->adev;
struct amdgpu_crtc *acrtc;
struct dc_writeback_info *wb_info;
@@ -10710,7 +10708,7 @@ static void dm_set_writeback(struct amdgpu_display_manager *dm,
acrtc->wb_pending = true;
acrtc->wb_conn = wb_conn;
- drm_writeback_queue_job(wb_conn, new_con_state);
+ drm_writeback_queue_job(connector, new_con_state);
}
static void amdgpu_dm_update_hdcp(struct drm_atomic_state *state)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
index 83fefd902355..2e1cd7f7853e 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
@@ -882,7 +882,7 @@ static inline void amdgpu_dm_set_mst_status(uint8_t *status,
#define to_amdgpu_dm_connector(x) container_of(x, struct amdgpu_dm_connector, base)
struct amdgpu_dm_wb_connector {
- struct drm_writeback_connector base;
+ struct drm_connector base;
struct dc_link *link;
};
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c
index 80c37487ca77..bf1ecf5d3027 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c
@@ -80,7 +80,7 @@ static int amdgpu_dm_wb_connector_get_modes(struct drm_connector *connector)
return drm_add_modes_noedid(connector, 3840, 2160);
}
-static int amdgpu_dm_wb_prepare_job(struct drm_writeback_connector *wb_connector,
+static int amdgpu_dm_wb_prepare_job(struct drm_connector *connector,
struct drm_writeback_job *job)
{
struct amdgpu_framebuffer *afb;
@@ -144,8 +144,8 @@ static int amdgpu_dm_wb_prepare_job(struct drm_writeback_connector *wb_connector
return r;
}
-static void amdgpu_dm_wb_cleanup_job(struct drm_writeback_connector *connector,
- struct drm_writeback_job *job)
+static void amdgpu_dm_wb_cleanup_job(struct drm_connector *connector,
+ struct drm_writeback_job *job)
{
struct amdgpu_bo *rbo;
int r;
@@ -202,7 +202,7 @@ int amdgpu_dm_wb_connector_init(struct amdgpu_display_manager *dm,
wbcon->link = link;
- drm_connector_helper_add(&wbcon->base.base, &amdgpu_dm_wb_conn_helper_funcs);
+ drm_connector_helper_add(&wbcon->base, &amdgpu_dm_wb_conn_helper_funcs);
res = drmm_writeback_connector_init(&dm->adev->ddev, &wbcon->base,
&amdgpu_dm_wb_connector_funcs,
@@ -216,8 +216,8 @@ int amdgpu_dm_wb_connector_init(struct amdgpu_display_manager *dm,
* Some of the properties below require access to state, like bpc.
* Allocate some default initial connector state with our reset helper.
*/
- if (wbcon->base.base.funcs->reset)
- wbcon->base.base.funcs->reset(&wbcon->base.base);
+ if (wbcon->base.funcs->reset)
+ wbcon->base.funcs->reset(&wbcon->base);
return 0;
}
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c
index 714af5c889d7..b02ab0f4f500 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c
@@ -269,7 +269,7 @@ komeda_crtc_do_flush(struct drm_crtc *crtc,
if (slave && has_bit(slave->id, kcrtc_st->affected_pipes))
komeda_pipeline_update(slave, old->state);
- conn_st = wb_conn ? wb_conn->base.base.state : NULL;
+ conn_st = wb_conn ? wb_conn->base.state : NULL;
if (conn_st && conn_st->writeback_job)
drm_writeback_queue_job(&wb_conn->base, conn_st);
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_kms.h b/drivers/gpu/drm/arm/display/komeda/komeda_kms.h
index 83e61c4080c2..9c34302782c0 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_kms.h
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_kms.h
@@ -53,8 +53,8 @@ struct komeda_plane_state {
* struct komeda_wb_connector
*/
struct komeda_wb_connector {
- /** @base: &drm_writeback_connector */
- struct drm_writeback_connector base;
+ /** @base: &drm_connector */
+ struct drm_connector base;
/** @wb_layer: represents associated writeback pipeline of komeda */
struct komeda_layer *wb_layer;
@@ -139,7 +139,7 @@ struct komeda_kms_dev {
static inline bool is_writeback_only(struct drm_crtc_state *st)
{
struct komeda_wb_connector *wb_conn = to_kcrtc(st->crtc)->wb_conn;
- struct drm_connector *conn = wb_conn ? &wb_conn->base.base : NULL;
+ struct drm_connector *conn = wb_conn ? &wb_conn->base : NULL;
return conn && (st->connector_mask == BIT(drm_connector_index(conn)));
}
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c b/drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c
index bcc53d4015f1..85b34375d275 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c
@@ -53,7 +53,7 @@ komeda_wb_encoder_atomic_check(struct drm_encoder *encoder,
return -EINVAL;
}
- wb_layer = to_kconn(to_wb_conn(conn_st->connector))->wb_layer;
+ wb_layer = to_kconn(conn_st->connector)->wb_layer;
/*
* No need for a full modested when the only connector changed is the
@@ -135,7 +135,6 @@ static int komeda_wb_connector_add(struct komeda_kms_dev *kms,
{
struct komeda_dev *mdev = kms->base.dev_private;
struct komeda_wb_connector *kwb_conn;
- struct drm_writeback_connector *wb_conn;
struct drm_display_info *info;
struct drm_encoder *encoder;
@@ -151,8 +150,6 @@ static int komeda_wb_connector_add(struct komeda_kms_dev *kms,
kwb_conn->wb_layer = kcrtc->master->wb_layer;
- wb_conn = &kwb_conn->base;
-
formats = komeda_get_layer_fourcc_list(&mdev->fmt_tbl,
kwb_conn->wb_layer->layer_type,
&n_formats);
@@ -170,7 +167,7 @@ static int komeda_wb_connector_add(struct komeda_kms_dev *kms,
encoder->possible_crtcs = drm_crtc_mask(&kcrtc->base);
- err = drmm_writeback_connector_init(&kms->base, wb_conn,
+ err = drmm_writeback_connector_init(&kms->base, &kwb_conn->base,
&komeda_wb_connector_funcs,
encoder,
formats, n_formats);
@@ -180,9 +177,9 @@ static int komeda_wb_connector_add(struct komeda_kms_dev *kms,
return err;
}
- drm_connector_helper_add(&wb_conn->base, &komeda_wb_conn_helper_funcs);
+ drm_connector_helper_add(&kwb_conn->base, &komeda_wb_conn_helper_funcs);
- info = &kwb_conn->base.base.display_info;
+ info = &kwb_conn->base.display_info;
info->bpc = __fls(kcrtc->master->improc->supported_color_depths);
info->color_formats = kcrtc->master->improc->supported_color_formats;
diff --git a/drivers/gpu/drm/arm/malidp_crtc.c b/drivers/gpu/drm/arm/malidp_crtc.c
index 18e6157b1047..68fa6024be9b 100644
--- a/drivers/gpu/drm/arm/malidp_crtc.c
+++ b/drivers/gpu/drm/arm/malidp_crtc.c
@@ -421,7 +421,7 @@ static int malidp_crtc_atomic_check(struct drm_crtc *crtc,
u32 new_mask = crtc_state->connector_mask;
if ((old_mask ^ new_mask) ==
- (1 << drm_connector_index(&malidp->mw_connector.base)))
+ (1 << drm_connector_index(&malidp->mw_connector)))
crtc_state->connectors_changed = false;
}
diff --git a/drivers/gpu/drm/arm/malidp_drv.h b/drivers/gpu/drm/arm/malidp_drv.h
index bc0387876dea..aa5599467d27 100644
--- a/drivers/gpu/drm/arm/malidp_drv.h
+++ b/drivers/gpu/drm/arm/malidp_drv.h
@@ -32,7 +32,7 @@ struct malidp_drm {
struct drm_device base;
struct malidp_hw_device *dev;
struct drm_crtc crtc;
- struct drm_writeback_connector mw_connector;
+ struct drm_connector mw_connector;
wait_queue_head_t wq;
struct drm_pending_vblank_event *event;
atomic_t config_valid;
diff --git a/drivers/gpu/drm/arm/malidp_mw.c b/drivers/gpu/drm/arm/malidp_mw.c
index 6e0c78e998aa..af31d6570231 100644
--- a/drivers/gpu/drm/arm/malidp_mw.c
+++ b/drivers/gpu/drm/arm/malidp_mw.c
@@ -212,7 +212,7 @@ int malidp_mw_connector_init(struct drm_device *drm)
if (!malidp->dev->hw->enable_memwrite)
return 0;
- drm_connector_helper_add(&malidp->mw_connector.base,
+ drm_connector_helper_add(&malidp->mw_connector,
&malidp_mw_connector_helper_funcs);
formats = get_writeback_formats(malidp, &n_formats);
@@ -243,8 +243,7 @@ void malidp_mw_atomic_commit(struct drm_device *drm,
struct drm_atomic_state *old_state)
{
struct malidp_drm *malidp = drm_to_malidp(drm);
- struct drm_writeback_connector *mw_conn = &malidp->mw_connector;
- struct drm_connector_state *conn_state = mw_conn->base.state;
+ struct drm_connector_state *conn_state = malidp->mw_connector.state;
struct malidp_hw_device *hwdev = malidp->dev;
struct malidp_mw_connector_state *mw_state;
@@ -263,7 +262,7 @@ void malidp_mw_atomic_commit(struct drm_device *drm,
&mw_state->addrs[0],
mw_state->format);
- drm_writeback_queue_job(mw_conn, conn_state);
+ drm_writeback_queue_job(&malidp->mw_connector, conn_state);
hwdev->hw->enable_memwrite(hwdev, mw_state->addrs,
mw_state->pitches, mw_state->n_planes,
fb->width, fb->height, mw_state->format,
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
index 5bd5bf6661df..2a7b388bdc6f 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -1450,7 +1450,6 @@ static int prepare_signaling(struct drm_device *dev,
}
for_each_new_connector_in_state(state, conn, conn_state, i) {
- struct drm_writeback_connector *wb_conn;
struct drm_out_fence_state *f;
struct dma_fence *fence;
s32 __user *fence_ptr;
@@ -1472,8 +1471,7 @@ static int prepare_signaling(struct drm_device *dev,
f[*num_fences].out_fence_ptr = fence_ptr;
*fence_state = f;
- wb_conn = drm_connector_to_writeback(conn);
- fence = drm_writeback_get_out_fence(wb_conn);
+ fence = drm_writeback_get_out_fence(conn);
if (!fence)
return -ENOMEM;
diff --git a/drivers/gpu/drm/drm_writeback.c b/drivers/gpu/drm/drm_writeback.c
index 68fdac745f42..1134be412cde 100644
--- a/drivers/gpu/drm/drm_writeback.c
+++ b/drivers/gpu/drm/drm_writeback.c
@@ -89,8 +89,10 @@ static const char *drm_writeback_fence_get_driver_name(struct dma_fence *fence)
{
struct drm_writeback_connector *wb_connector =
fence_to_wb_connector(fence);
+ struct drm_connector *connector =
+ drm_writeback_to_connector(wb_connector);
- return wb_connector->base.dev->driver->name;
+ return connector->dev->driver->name;
}
static const char *
@@ -187,7 +189,8 @@ static int __drm_writeback_connector_init(struct drm_device *dev,
struct drm_encoder *enc, const u32 *formats,
int n_formats)
{
- struct drm_connector *connector = &wb_connector->base;
+ struct drm_connector *connector =
+ drm_writeback_to_connector(wb_connector);
struct drm_mode_config *config = &dev->mode_config;
struct drm_property_blob *blob;
int ret = create_writeback_properties(dev);
@@ -239,7 +242,7 @@ static int __drm_writeback_connector_init(struct drm_device *dev,
* a custom encoder
*
* @dev: DRM device
- * @wb_connector: Writeback connector to initialize
+ * @connector: Drm connector which contains the writeback connector to initialize
* @enc: handle to the already initialized drm encoder
* @con_funcs: Connector funcs vtable
* @formats: Array of supported pixel formats for the writeback engine
@@ -264,12 +267,12 @@ static int __drm_writeback_connector_init(struct drm_device *dev,
* Returns: 0 on success, or a negative error code
*/
int drm_writeback_connector_init(struct drm_device *dev,
- struct drm_writeback_connector *wb_connector,
+ struct drm_connector *connector,
const struct drm_connector_funcs *con_funcs,
struct drm_encoder *enc,
const u32 *formats, int n_formats)
{
- struct drm_connector *connector = &wb_connector->base;
+ struct drm_writeback_connector *wb_connector = &connector->writeback;
int ret;
ret = drm_connector_init(dev, connector, con_funcs,
@@ -318,7 +321,7 @@ static void drm_writeback_connector_cleanup(struct drm_device *dev,
* a custom encoder
*
* @dev: DRM device
- * @wb_connector: Writeback connector to initialize
+ * @connector: Drm connector containing the writeback connector to initialize
* @con_funcs: Connector funcs vtable
* @enc: Encoder to connect this writeback connector
* @formats: Array of supported pixel formats for the writeback engine
@@ -334,12 +337,12 @@ static void drm_writeback_connector_cleanup(struct drm_device *dev,
* Returns: 0 on success, or a negative error code
*/
int drmm_writeback_connector_init(struct drm_device *dev,
- struct drm_writeback_connector *wb_connector,
+ struct drm_connector *connector,
const struct drm_connector_funcs *con_funcs,
struct drm_encoder *enc,
const u32 *formats, int n_formats)
{
- struct drm_connector *connector = &wb_connector->base;
+ struct drm_writeback_connector *wb_connector = &connector->writeback;
int ret;
ret = drmm_connector_init(dev, connector, con_funcs,
@@ -372,7 +375,7 @@ int drm_writeback_set_fb(struct drm_connector_state *conn_state,
return -ENOMEM;
conn_state->writeback_job->connector =
- drm_connector_to_writeback(conn_state->connector);
+ &conn_state->connector->writeback;
}
drm_framebuffer_assign(&conn_state->writeback_job->fb, fb);
@@ -381,9 +384,11 @@ int drm_writeback_set_fb(struct drm_connector_state *conn_state,
int drm_writeback_prepare_job(struct drm_writeback_job *job)
{
- struct drm_writeback_connector *connector = job->connector;
+ struct drm_writeback_connector *wb_connector = job->connector;
+ struct drm_connector *connector =
+ drm_writeback_to_connector(wb_connector);
const struct drm_connector_helper_funcs *funcs =
- connector->base.helper_private;
+ connector->helper_private;
int ret;
if (funcs->prepare_writeback_job) {
@@ -399,7 +404,8 @@ EXPORT_SYMBOL(drm_writeback_prepare_job);
/**
* drm_writeback_queue_job - Queue a writeback job for later signalling
- * @wb_connector: The writeback connector to queue a job on
+ * @connector: The drm connector which contains the writeback connector to
+ * queue a job on
* @conn_state: The connector state containing the job to queue
*
* This function adds the job contained in @conn_state to the job_queue for a
@@ -416,9 +422,10 @@ EXPORT_SYMBOL(drm_writeback_prepare_job);
*
* See also: drm_writeback_signal_completion()
*/
-void drm_writeback_queue_job(struct drm_writeback_connector *wb_connector,
+void drm_writeback_queue_job(struct drm_connector *connector,
struct drm_connector_state *conn_state)
{
+ struct drm_writeback_connector *wb_connector = &connector->writeback;
struct drm_writeback_job *job;
unsigned long flags;
@@ -433,9 +440,11 @@ EXPORT_SYMBOL(drm_writeback_queue_job);
void drm_writeback_cleanup_job(struct drm_writeback_job *job)
{
- struct drm_writeback_connector *connector = job->connector;
+ struct drm_writeback_connector *wb_connector = job->connector;
+ struct drm_connector *connector =
+ drm_writeback_to_connector(wb_connector);
const struct drm_connector_helper_funcs *funcs =
- connector->base.helper_private;
+ connector->helper_private;
if (job->prepared && funcs->cleanup_writeback_job)
funcs->cleanup_writeback_job(connector, job);
@@ -468,7 +477,8 @@ static void cleanup_work(struct work_struct *work)
/**
* drm_writeback_signal_completion - Signal the completion of a writeback job
- * @wb_connector: The writeback connector whose job is complete
+ * @connector: The drm connector whicha has the drm_writeback_connector whose
+ * job is complete
* @status: Status code to set in the writeback out_fence (0 for success)
*
* Drivers should call this to signal the completion of a previously queued
@@ -483,10 +493,11 @@ static void cleanup_work(struct work_struct *work)
* See also: drm_writeback_queue_job()
*/
void
-drm_writeback_signal_completion(struct drm_writeback_connector *wb_connector,
+drm_writeback_signal_completion(struct drm_connector *connector,
int status)
{
unsigned long flags;
+ struct drm_writeback_connector *wb_connector = &connector->writeback;
struct drm_writeback_job *job;
struct dma_fence *out_fence;
@@ -517,11 +528,13 @@ drm_writeback_signal_completion(struct drm_writeback_connector *wb_connector,
EXPORT_SYMBOL(drm_writeback_signal_completion);
struct dma_fence *
-drm_writeback_get_out_fence(struct drm_writeback_connector *wb_connector)
+drm_writeback_get_out_fence(struct drm_connector *connector)
{
struct dma_fence *fence;
+ struct drm_writeback_connector *wb_connector =
+ &connector->writeback;
- if (WARN_ON(wb_connector->base.connector_type !=
+ if (WARN_ON(connector->connector_type !=
DRM_MODE_CONNECTOR_WRITEBACK))
return NULL;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
index 6d28f2281c76..0311aba2bc73 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
@@ -371,7 +371,7 @@ static void dpu_encoder_phys_wb_done_irq(void *arg)
spin_unlock_irqrestore(phys_enc->enc_spinlock, lock_flags);
if (wb_enc->wb_conn)
- drm_writeback_signal_completion(wb_enc->wb_conn, 0);
+ drm_writeback_signal_completion(drm_writeback_to_connector(wb_enc->wb_conn), 0);
/* Signal any waiting atomic commit thread */
wake_up_all(&phys_enc->pending_kickoff_wq);
@@ -432,7 +432,7 @@ static void _dpu_encoder_phys_wb_handle_wbdone_timeout(
phys_enc->enable_state = DPU_ENC_ERR_NEEDS_HW_RESET;
if (wb_enc->wb_conn)
- drm_writeback_signal_completion(wb_enc->wb_conn, 0);
+ drm_writeback_signal_completion(drm_writeback_to_connector(wb_enc->wb_conn), 0);
dpu_encoder_frame_done_callback(phys_enc->parent, phys_enc, frame_event);
}
@@ -482,11 +482,12 @@ static void dpu_encoder_phys_wb_prepare_for_kickoff(
return;
}
- drm_conn = &wb_enc->wb_conn->base;
+ drm_conn =
+ drm_writeback_to_connector(wb_enc->wb_conn);
state = drm_conn->state;
if (wb_enc->wb_conn && wb_enc->wb_job)
- drm_writeback_queue_job(wb_enc->wb_conn, state);
+ drm_writeback_queue_job(drm_conn, state);
dpu_encoder_phys_wb_setup(phys_enc);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c
index 6f2370c9dd98..8e10d71ad292 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c
@@ -29,8 +29,7 @@ static int dpu_wb_conn_get_modes(struct drm_connector *connector)
static int dpu_wb_conn_atomic_check(struct drm_connector *connector,
struct drm_atomic_state *state)
{
- struct drm_writeback_connector *wb_conn = drm_connector_to_writeback(connector);
- struct dpu_wb_connector *dpu_wb_conn = to_dpu_wb_conn(wb_conn);
+ struct dpu_wb_connector *dpu_wb_conn = to_dpu_wb_conn(connector);
struct drm_connector_state *conn_state =
drm_atomic_get_new_connector_state(state, connector);
struct drm_crtc *crtc;
@@ -88,10 +87,9 @@ static const struct drm_connector_funcs dpu_wb_conn_funcs = {
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
};
-static int dpu_wb_conn_prepare_job(struct drm_writeback_connector *connector,
+static int dpu_wb_conn_prepare_job(struct drm_connector *connector,
struct drm_writeback_job *job)
{
-
struct dpu_wb_connector *dpu_wb_conn = to_dpu_wb_conn(connector);
if (!job->fb)
@@ -102,7 +100,7 @@ static int dpu_wb_conn_prepare_job(struct drm_writeback_connector *connector,
return 0;
}
-static void dpu_wb_conn_cleanup_job(struct drm_writeback_connector *connector,
+static void dpu_wb_conn_cleanup_job(struct drm_connector *connector,
struct drm_writeback_job *job)
{
struct dpu_wb_connector *dpu_wb_conn = to_dpu_wb_conn(connector);
@@ -132,7 +130,7 @@ int dpu_writeback_init(struct drm_device *dev, struct drm_encoder *enc,
dpu_wb_conn->maxlinewidth = maxlinewidth;
- drm_connector_helper_add(&dpu_wb_conn->base.base, &dpu_wb_conn_helper_funcs);
+ drm_connector_helper_add(&dpu_wb_conn->base, &dpu_wb_conn_helper_funcs);
rc = drmm_writeback_connector_init(dev, &dpu_wb_conn->base,
&dpu_wb_conn_funcs, enc,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.h
index 4b11cca8014c..9ebf15392b20 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.h
@@ -16,12 +16,12 @@
#include "dpu_encoder_phys.h"
struct dpu_wb_connector {
- struct drm_writeback_connector base;
+ struct drm_connector base;
struct drm_encoder *wb_enc;
u32 maxlinewidth;
};
-static inline struct dpu_wb_connector *to_dpu_wb_conn(struct drm_writeback_connector *conn)
+static inline struct dpu_wb_connector *to_dpu_wb_conn(struct drm_connector *conn)
{
return container_of(conn, struct dpu_wb_connector, base);
}
diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.h b/drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.h
index d0f38a8b3561..11937e70e308 100644
--- a/drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.h
+++ b/drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.h
@@ -42,7 +42,7 @@ struct rcar_du_vsp;
* @cmm: CMM associated with this CRTC
* @vsp: VSP feeding video to this CRTC
* @vsp_pipe: index of the VSP pipeline feeding video to this CRTC
- * @writeback: the writeback connector
+ * @writeback: the drm connector which contains the writeback connector
*/
struct rcar_du_crtc {
struct drm_crtc crtc;
@@ -72,7 +72,7 @@ struct rcar_du_crtc {
const char *const *sources;
unsigned int sources_count;
- struct drm_writeback_connector writeback;
+ struct drm_connector writeback;
};
#define to_rcar_crtc(c) container_of(c, struct rcar_du_crtc, crtc)
diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_du_writeback.c b/drivers/gpu/drm/renesas/rcar-du/rcar_du_writeback.c
index aa37cf99754c..5553b7fcbd3a 100644
--- a/drivers/gpu/drm/renesas/rcar-du/rcar_du_writeback.c
+++ b/drivers/gpu/drm/renesas/rcar-du/rcar_du_writeback.c
@@ -47,7 +47,7 @@ static int rcar_du_wb_conn_get_modes(struct drm_connector *connector)
dev->mode_config.max_height);
}
-static int rcar_du_wb_prepare_job(struct drm_writeback_connector *connector,
+static int rcar_du_wb_prepare_job(struct drm_connector *connector,
struct drm_writeback_job *job)
{
struct rcar_du_crtc *rcrtc = wb_to_rcar_crtc(connector);
@@ -72,7 +72,7 @@ static int rcar_du_wb_prepare_job(struct drm_writeback_connector *connector,
return 0;
}
-static void rcar_du_wb_cleanup_job(struct drm_writeback_connector *connector,
+static void rcar_du_wb_cleanup_job(struct drm_connector *connector,
struct drm_writeback_job *job)
{
struct rcar_du_crtc *rcrtc = wb_to_rcar_crtc(connector);
@@ -199,8 +199,6 @@ static const u32 writeback_formats[] = {
int rcar_du_writeback_init(struct rcar_du_device *rcdu,
struct rcar_du_crtc *rcrtc)
{
- struct drm_writeback_connector *wb_conn = &rcrtc->writeback;
-
struct drm_encoder *encoder;
encoder = drmm_plain_encoder_alloc(&rcdu->ddev, NULL,
@@ -212,10 +210,10 @@ int rcar_du_writeback_init(struct rcar_du_device *rcdu,
encoder->possible_crtcs = drm_crtc_mask(&rcrtc->crtc);
- drm_connector_helper_add(&wb_conn->base,
+ drm_connector_helper_add(&rcrtc->writeback,
&rcar_du_wb_conn_helper_funcs);
- return drmm_writeback_connector_init(&rcdu->ddev, wb_conn,
+ return drmm_writeback_connector_init(&rcdu->ddev, &rcrtc->writeback,
&rcar_du_wb_conn_funcs,
encoder,
writeback_formats,
@@ -231,7 +229,7 @@ void rcar_du_writeback_setup(struct rcar_du_crtc *rcrtc,
struct drm_framebuffer *fb;
unsigned int i;
- state = rcrtc->writeback.base.state;
+ state = rcrtc->writeback.state;
if (!state || !state->writeback_job)
return;
diff --git a/drivers/gpu/drm/vc4/vc4_txp.c b/drivers/gpu/drm/vc4/vc4_txp.c
index befdb094c173..23c8783f9f3c 100644
--- a/drivers/gpu/drm/vc4/vc4_txp.c
+++ b/drivers/gpu/drm/vc4/vc4_txp.c
@@ -168,7 +168,7 @@ struct vc4_txp {
struct platform_device *pdev;
struct vc4_encoder encoder;
- struct drm_writeback_connector connector;
+ struct drm_connector connector;
void __iomem *regs;
};
@@ -177,7 +177,7 @@ struct vc4_txp {
container_of_const(_encoder, struct vc4_txp, encoder.base)
#define connector_to_vc4_txp(_connector) \
- container_of_const(_connector, struct vc4_txp, connector.base)
+ container_of_const(_connector, struct vc4_txp, connector)
static const struct debugfs_reg32 txp_regs[] = {
VC4_REG32(TXP_DST_PTR),
@@ -599,7 +599,7 @@ static int vc4_txp_bind(struct device *dev, struct device *master, void *data)
if (ret)
return ret;
- drm_connector_helper_add(&txp->connector.base,
+ drm_connector_helper_add(&txp->connector,
&vc4_txp_connector_helper_funcs);
ret = drmm_writeback_connector_init(drm, &txp->connector,
&vc4_txp_connector_funcs,
@@ -623,7 +623,7 @@ static void vc4_txp_unbind(struct device *dev, struct device *master,
{
struct vc4_txp *txp = dev_get_drvdata(dev);
- drm_connector_cleanup(&txp->connector.base);
+ drm_connector_cleanup(&txp->connector);
}
static const struct component_ops vc4_txp_ops = {
diff --git a/drivers/gpu/drm/vkms/vkms_drv.h b/drivers/gpu/drm/vkms/vkms_drv.h
index 0933e4ce0ff0..145a7909388b 100644
--- a/drivers/gpu/drm/vkms/vkms_drv.h
+++ b/drivers/gpu/drm/vkms/vkms_drv.h
@@ -217,7 +217,7 @@ struct vkms_crtc_state {
*/
struct vkms_output {
struct drm_crtc crtc;
- struct drm_writeback_connector wb_connector;
+ struct drm_connector wb_connector;
struct drm_encoder wb_encoder;
struct workqueue_struct *composer_workq;
spinlock_t lock;
diff --git a/drivers/gpu/drm/vkms/vkms_writeback.c b/drivers/gpu/drm/vkms/vkms_writeback.c
index 908b7e602ffb..fffdee585e4a 100644
--- a/drivers/gpu/drm/vkms/vkms_writeback.c
+++ b/drivers/gpu/drm/vkms/vkms_writeback.c
@@ -72,7 +72,7 @@ static int vkms_wb_connector_get_modes(struct drm_connector *connector)
dev->mode_config.max_height);
}
-static int vkms_wb_prepare_job(struct drm_writeback_connector *wb_connector,
+static int vkms_wb_prepare_job(struct drm_connector *connector,
struct drm_writeback_job *job)
{
struct vkms_writeback_job *vkmsjob;
@@ -103,7 +103,7 @@ static int vkms_wb_prepare_job(struct drm_writeback_connector *wb_connector,
return ret;
}
-static void vkms_wb_cleanup_job(struct drm_writeback_connector *connector,
+static void vkms_wb_cleanup_job(struct drm_connector *connector,
struct drm_writeback_job *job)
{
struct vkms_writeback_job *vkmsjob = job->priv;
@@ -128,8 +128,7 @@ static void vkms_wb_atomic_commit(struct drm_connector *conn,
struct drm_connector_state *connector_state = drm_atomic_get_new_connector_state(state,
conn);
struct vkms_output *output = drm_crtc_to_vkms_output(connector_state->crtc);
- struct drm_writeback_connector *wb_conn = &output->wb_connector;
- struct drm_connector_state *conn_state = wb_conn->base.state;
+ struct drm_connector_state *conn_state = output->wb_connector.state;
struct vkms_crtc_state *crtc_state = output->composer_state;
struct drm_framebuffer *fb = connector_state->writeback_job->fb;
u16 crtc_height = crtc_state->base.mode.vdisplay;
@@ -150,7 +149,7 @@ static void vkms_wb_atomic_commit(struct drm_connector *conn,
crtc_state->active_writeback = active_wb;
crtc_state->wb_pending = true;
spin_unlock_irq(&output->composer_lock);
- drm_writeback_queue_job(wb_conn, connector_state);
+ drm_writeback_queue_job(&output->wb_connector, connector_state);
active_wb->pixel_write = get_pixel_write_function(wb_format);
drm_rect_init(&wb_frame_info->src, 0, 0, crtc_width, crtc_height);
drm_rect_init(&wb_frame_info->dst, 0, 0, crtc_width, crtc_height);
@@ -167,7 +166,6 @@ static const struct drm_connector_helper_funcs vkms_wb_conn_helper_funcs = {
int vkms_enable_writeback_connector(struct vkms_device *vkmsdev,
struct vkms_output *vkms_output)
{
- struct drm_writeback_connector *wb = &vkms_output->wb_connector;
int ret;
ret = drmm_encoder_init(&vkmsdev->drm, &vkms_output->wb_encoder,
@@ -178,9 +176,10 @@ int vkms_enable_writeback_connector(struct vkms_device *vkmsdev,
vkms_output->wb_encoder.possible_clones |=
drm_encoder_mask(&vkms_output->wb_encoder);
- drm_connector_helper_add(&wb->base, &vkms_wb_conn_helper_funcs);
+ drm_connector_helper_add(&vkms_output->wb_connector, &vkms_wb_conn_helper_funcs);
- return drmm_writeback_connector_init(&vkmsdev->drm, wb,
+ return drmm_writeback_connector_init(&vkmsdev->drm,
+ &vkms_output->wb_connector,
&vkms_wb_connector_funcs,
&vkms_output->wb_encoder,
vkms_wb_formats,
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index af8b92d2d5b7..41e19fc1c086 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -1949,6 +1949,61 @@ struct drm_connector_cec {
void *data;
};
+/**
+ * struct drm_writeback_connector - DRM writeback connector
+ */
+struct drm_writeback_connector {
+ /**
+ * @pixel_formats_blob_ptr:
+ *
+ * DRM blob property data for the pixel formats list on writeback
+ * connectors
+ * See also drm_writeback_connector_init()
+ */
+ struct drm_property_blob *pixel_formats_blob_ptr;
+
+ /** @job_lock: Protects job_queue */
+ spinlock_t job_lock;
+
+ /**
+ * @job_queue:
+ *
+ * Holds a list of a connector's writeback jobs; the last item is the
+ * most recent. The first item may be either waiting for the hardware
+ * to begin writing, or currently being written.
+ *
+ * See also: drm_writeback_queue_job() and
+ * drm_writeback_signal_completion()
+ */
+ struct list_head job_queue;
+
+ /**
+ * @fence_context:
+ *
+ * timeline context used for fence operations.
+ */
+ unsigned int fence_context;
+ /**
+ * @fence_lock:
+ *
+ * spinlock to protect the fences in the fence_context.
+ */
+ spinlock_t fence_lock;
+ /**
+ * @fence_seqno:
+ *
+ * Seqno variable used as monotonic counter for the fences
+ * created on the connector's timeline.
+ */
+ unsigned long fence_seqno;
+ /**
+ * @timeline_name:
+ *
+ * The name of the connector's fence timeline.
+ */
+ char timeline_name[32];
+};
+
/**
* struct drm_connector - central DRM connector control structure
*
@@ -2358,10 +2413,16 @@ struct drm_connector {
*/
struct llist_node free_node;
- /**
- * @hdmi: HDMI-related variable and properties.
- */
- struct drm_connector_hdmi hdmi;
+ union {
+ /**
+ * @hdmi: HDMI-related variable and properties.
+ */
+ struct drm_connector_hdmi hdmi;
+ /**
+ * @writeback: Writeback related valriables.
+ */
+ struct drm_writeback_connector writeback;
+ };
/**
* @hdmi_audio: HDMI codec properties and non-DRM state.
diff --git a/include/drm/drm_modeset_helper_vtables.h b/include/drm/drm_modeset_helper_vtables.h
index 3e68213958dd..4a0e7c19dd4e 100644
--- a/include/drm/drm_modeset_helper_vtables.h
+++ b/include/drm/drm_modeset_helper_vtables.h
@@ -1119,7 +1119,7 @@ struct drm_connector_helper_funcs {
*
* This callback is used by the atomic modeset helpers.
*/
- int (*prepare_writeback_job)(struct drm_writeback_connector *connector,
+ int (*prepare_writeback_job)(struct drm_connector *connector,
struct drm_writeback_job *job);
/**
* @cleanup_writeback_job:
@@ -1134,7 +1134,7 @@ struct drm_connector_helper_funcs {
*
* This callback is used by the atomic modeset helpers.
*/
- void (*cleanup_writeback_job)(struct drm_writeback_connector *connector,
+ void (*cleanup_writeback_job)(struct drm_connector *connector,
struct drm_writeback_job *job);
/**
diff --git a/include/drm/drm_writeback.h b/include/drm/drm_writeback.h
index 958466a05e60..2afa48ea7c00 100644
--- a/include/drm/drm_writeback.h
+++ b/include/drm/drm_writeback.h
@@ -15,66 +15,6 @@
#include <drm/drm_encoder.h>
#include <linux/workqueue.h>
-/**
- * struct drm_writeback_connector - DRM writeback connector
- */
-struct drm_writeback_connector {
- /**
- * @base: base drm_connector object
- */
- struct drm_connector base;
-
- /**
- * @pixel_formats_blob_ptr:
- *
- * DRM blob property data for the pixel formats list on writeback
- * connectors
- * See also drm_writeback_connector_init()
- */
- struct drm_property_blob *pixel_formats_blob_ptr;
-
- /** @job_lock: Protects job_queue */
- spinlock_t job_lock;
-
- /**
- * @job_queue:
- *
- * Holds a list of a connector's writeback jobs; the last item is the
- * most recent. The first item may be either waiting for the hardware
- * to begin writing, or currently being written.
- *
- * See also: drm_writeback_queue_job() and
- * drm_writeback_signal_completion()
- */
- struct list_head job_queue;
-
- /**
- * @fence_context:
- *
- * timeline context used for fence operations.
- */
- unsigned int fence_context;
- /**
- * @fence_lock:
- *
- * spinlock to protect the fences in the fence_context.
- */
- spinlock_t fence_lock;
- /**
- * @fence_seqno:
- *
- * Seqno variable used as monotonic counter for the fences
- * created on the connector's timeline.
- */
- unsigned long fence_seqno;
- /**
- * @timeline_name:
- *
- * The name of the connector's fence timeline.
- */
- char timeline_name[32];
-};
-
/**
* struct drm_writeback_job - DRM writeback job
*/
@@ -131,20 +71,20 @@ struct drm_writeback_job {
void *priv;
};
-static inline struct drm_writeback_connector *
-drm_connector_to_writeback(struct drm_connector *connector)
+static inline struct drm_connector *
+drm_writeback_to_connector(struct drm_writeback_connector *wb_connector)
{
- return container_of(connector, struct drm_writeback_connector, base);
+ return container_of(wb_connector, struct drm_connector, writeback);
}
int drm_writeback_connector_init(struct drm_device *dev,
- struct drm_writeback_connector *wb_connector,
+ struct drm_connector *connector,
const struct drm_connector_funcs *con_funcs,
struct drm_encoder *enc,
const u32 *formats, int n_formats);
int drmm_writeback_connector_init(struct drm_device *dev,
- struct drm_writeback_connector *wb_connector,
+ struct drm_connector *connector,
const struct drm_connector_funcs *con_funcs,
struct drm_encoder *enc,
const u32 *formats, int n_formats);
@@ -154,15 +94,15 @@ int drm_writeback_set_fb(struct drm_connector_state *conn_state,
int drm_writeback_prepare_job(struct drm_writeback_job *job);
-void drm_writeback_queue_job(struct drm_writeback_connector *wb_connector,
+void drm_writeback_queue_job(struct drm_connector *wb_connector,
struct drm_connector_state *conn_state);
void drm_writeback_cleanup_job(struct drm_writeback_job *job);
void
-drm_writeback_signal_completion(struct drm_writeback_connector *wb_connector,
+drm_writeback_signal_completion(struct drm_connector *connector,
int status);
struct dma_fence *
-drm_writeback_get_out_fence(struct drm_writeback_connector *wb_connector);
+drm_writeback_get_out_fence(struct drm_connector *connector);
#endif
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* [PATCH v3 03/26] drm/i915/writeback: Add writeback registers
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
2026-03-25 11:07 ` [PATCH v3 DO NOT REVIEW 01/26] drm: writeback: rename drm_writeback_connector_init_with_encoder() Suraj Kandpal
2026-03-25 11:07 ` [PATCH v3 DO NOT REVIEW 02/26] drm: writeback: Refactor drm_writeback_connector structure Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 11:42 ` Ville Syrjälä
2026-03-25 11:07 ` [PATCH v3 04/26] drm/i915/writeback: Add some preliminary writeback definitions Suraj Kandpal
` (24 subsequent siblings)
27 siblings, 1 reply; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal
Add writeback registers to its own file.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
---
.../drm/i915/display/intel_writeback_reg.h | 136 ++++++++++++++++++
1 file changed, 136 insertions(+)
create mode 100644 drivers/gpu/drm/i915/display/intel_writeback_reg.h
diff --git a/drivers/gpu/drm/i915/display/intel_writeback_reg.h b/drivers/gpu/drm/i915/display/intel_writeback_reg.h
new file mode 100644
index 000000000000..ffe302ef3dd9
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_writeback_reg.h
@@ -0,0 +1,136 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2024 Intel Corporation
+ */
+
+#ifndef __INTEL_WRITEBACK_REGS_H__
+#define __INTEL_WRITEBACK_REGS_H__
+
+#include "intel_display_reg_defs.h"
+
+/* WD 0 and 1 */
+#define TRANSCODER_WD0_OFFSET 0x6e000
+#define TRANSCODER_WD1_OFFSET 0x6d800
+
+/* WD 0 and 1 */
+#define PIPE_WD0_OFFSET 0x7e008
+#define PIPE_WD1_OFFSET 0x7d008
+
+/* Gen12 WD */
+#define _MMIO_WD(tc, wd0, wd1) _MMIO_TRANS((tc) - TRANSCODER_WD_0, wd0, wd1)
+
+#define WD_TRANS_ENABLE REG_BIT(31)
+#define WD_TRANS_STATE REG_BIT(30)
+
+/* WD transcoder control */
+#define _WD_TRANS_FUNC_CTL_0 0x6e400
+#define _WD_TRANS_FUNC_CTL_1 0x6ec00
+#define WD_TRANS_FUNC_CTL(tc) _MMIO_WD(tc,\
+ _WD_TRANS_FUNC_CTL_0,\
+ _WD_TRANS_FUNC_CTL_1)
+
+#define TRANS_WD_FUNC_ENABLE REG_BIT(31)
+#define WD_TRIGGERED_CAP_MODE_ENABLE REG_BIT(30)
+#define START_TRIGGER_FRAME REG_BIT(29)
+#define STOP_TRIGGER_FRAME REG_BIT(28)
+#define WD_INPUT_SELECT_MASK REG_GENMASK(14, 12)
+#define WD_INPUT_PIPE_A REG_FIELD_PREP(WD_INPUT_SELECT_MASK, 0)
+#define WD_INPUT_PIPE_B REG_FIELD_PREP(WD_INPUT_SELECT_MASK, 5)
+#define WD_INPUT_PIPE_C REG_FIELD_PREP(WD_INPUT_SELECT_MASK, 6)
+#define WD_INPUT_PIPE_D REG_FIELD_PREP(WD_INPUT_SELECT_MASK, 7)
+#define WD_COLOR_MODE_MASK REG_GENMASK(22, 20)
+#define WD_CONTROL_POINTERS REG_GENMASK(19, 18)
+#define WD_DISABLE_POINTERS REG_FIELD_PREP(WD_CONTROL_POINTERS, 3)
+#define WD_PIX_FMT_YUYV REG_FIELD_PREP(WD_COLOR_MODE_MASK, 1)
+#define WD_PIX_FMT_XYUV8888 REG_FIELD_PREP(WD_COLOR_MODE_MASK, 2)
+#define WD_PIX_FMT_XBGR8888 REG_FIELD_PREP(WD_COLOR_MODE_MASK, 3)
+#define WD_PIX_FMT_Y410 REG_FIELD_PREP(WD_COLOR_MODE_MASK, 4)
+#define WD_PIX_FMT_YUV422 REG_FIELD_PREP(WD_COLOR_MODE_MASK, 5)
+#define WD_PIX_FMT_XBGR2101010 REG_FIELD_PREP(WD_COLOR_MODE_MASK, 6)
+#define WD_PIX_FMT_RGB565 REG_FIELD_PREP(WD_COLOR_MODE_MASK, 7)
+#define WD_FRAME_NUMBER_MASK REG_GENMASK(3, 0)
+#define WD_FRAME_NUMBER(n) REG_FIELD_PREP(WD_FRAME_NUMBER_MASK, n)
+
+#define _WD_STRIDE_0 0x6e510
+#define _WD_STRIDE_1 0x6ed10
+#define WD_STRIDE(tc) _MMIO_WD(tc,\
+ _WD_STRIDE_0,\
+ _WD_STRIDE_1)
+#define WD_STRIDE_MASK REG_GENMASK(15, 6)
+
+#define _WD_STREAMCAP_CTL0 0x6e590
+#define _WD_STREAMCAP_CTL1 0x6ed90
+#define WD_STREAMCAP_CTL(tc) _MMIO_WD(tc,\
+ _WD_STREAMCAP_CTL0,\
+ _WD_STREAMCAP_CTL1)
+
+#define WD_STREAM_CAP_MODE_EN REG_BIT(31)
+#define WD_SLICING_STRAT_MASK REG_GENMASK(25, 24)
+#define WD_SLICING_STRAT_1_1 REG_FIELD_PREP(WD_SLICING_STRAT_MASK, 0)
+#define WD_SLICING_STRAT_2_1 REG_FIELD_PREP(WD_SLICING_STRAT_MASK, 1)
+#define WD_SLICING_STRAT_4_1 REG_FIELD_PREP(WD_SLICING_STRAT_MASK, 2)
+#define WD_SLICING_STRAT_8_1 REG_FIELD_PREP(WD_SLICING_STRAT_MASK, 3)
+#define WD_STREAM_OVERRUN_STATUS 1
+
+#define _WD_SURF_0 0x6e514
+#define _WD_SURF_1 0x6ed14
+#define WD_SURF(tc) _MMIO_WD(tc,\
+ _WD_SURF_0,\
+ _WD_SURF_1)
+
+#define _WD_IMR_0 0x6e560
+#define _WD_IMR_1 0x6ed60
+#define WD_IMR(tc) _MMIO_WD(tc,\
+ _WD_IMR_0,\
+ _WD_IMR_1)
+#define WD_FRAME_COMPLETE_INT REG_BIT(7)
+#define WD_GTT_FAULT_INT REG_BIT(6)
+#define WD_VBLANK_INT REG_BIT(5)
+#define WD_OVERRUN_INT REG_BIT(4)
+#define WD_CAPTURING_INT REG_BIT(3)
+#define WD_WRITE_COMPLETE_INT REG_BIT(2)
+
+#define _WD_IIR_0 0x6e564
+#define _WD_IIR_1 0x6ed64
+#define WD_IIR(tc) _MMIO_WD(tc,\
+ _WD_IIR_0,\
+ _WD_IIR_1)
+
+#define _WD_FRAME_STATUS_0 0x6e568
+#define _WD_FRAME_STATUS_1 0x6ed68
+#define WD_FRAME_STATUS(tc) _MMIO_WD(tc,\
+ _WD_FRAME_STATUS_0,\
+ _WD_FRAME_STATUS_1)
+
+#define WD_FRAME_COMPLETE REG_BIT(31)
+#define WD_STATE_MASK REG_GENMASK(26, 24)
+#define WD_STATE_IDLE REG_FIELD_PREP(WD_STATE_MASK, 0)
+#define WD_STATE_CAPSTART REG_FIELD_PREP(WD_STATE_MASK, 1)
+#define WD_STATE_FRAME_START REG_FIELD_PREP(WD_STATE_MASK, 2)
+#define WD_STATE_CAPACITIVE REG_FIELD_PREP(WD_STATE_MASK, 3)
+#define WD_STATE_TG_DONE REG_FIELD_PREP(WD_STATE_MASK, 4)
+#define WD_STATE_WDX_DONE REG_FIELD_PREP(WD_STATE_MASK, 5)
+#define WD_STATE_QUICK_CAP REG_FIELD_PREP(WD_STATE_MASK, 6)
+
+#define _WD_27_M_0 0x6e524
+#define _WD_27_M_1 0x6ed24
+#define WD_27_M(tc) _MMIO_WD(tc,\
+ _WD_27_M_0,\
+ _WD_27_M_1)
+
+#define _WD_27_N_0 0x6e528
+
+/* Address looks wrong in bspec: */
+#define _WD_27_N_1 0x6ec28
+#define WD_27_N(tc) _MMIO_WD(tc,\
+ _WD_27_N_0,\
+ _WD_27_N_1)
+
+#define _WD_TAIL_CFG_0 0x6e520
+#define _WD_TAIL_CFG_1 0x6ed20
+
+#define WD_TAIL_CFG(tc) _MMIO_WD(tc,\
+ _WD_TAIL_CFG_0,\
+ _WD_TAIL_CFG_1)
+
+#endif /* __INTEL_WRITEBACK_REGS_H__ */
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* Re: [PATCH v3 03/26] drm/i915/writeback: Add writeback registers
2026-03-25 11:07 ` [PATCH v3 03/26] drm/i915/writeback: Add writeback registers Suraj Kandpal
@ 2026-03-25 11:42 ` Ville Syrjälä
2026-03-26 2:31 ` Kandpal, Suraj
0 siblings, 1 reply; 60+ messages in thread
From: Ville Syrjälä @ 2026-03-25 11:42 UTC (permalink / raw)
To: Suraj Kandpal
Cc: intel-xe, intel-gfx, sowmiya.s, uma.shankar, swati2.sharma,
chaitanya.kumar.borah, arun.r.murthy
On Wed, Mar 25, 2026 at 04:37:21PM +0530, Suraj Kandpal wrote:
> Add writeback registers to its own file.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
> ---
> .../drm/i915/display/intel_writeback_reg.h | 136 ++++++++++++++++++
> 1 file changed, 136 insertions(+)
> create mode 100644 drivers/gpu/drm/i915/display/intel_writeback_reg.h
>
> diff --git a/drivers/gpu/drm/i915/display/intel_writeback_reg.h b/drivers/gpu/drm/i915/display/intel_writeback_reg.h
> new file mode 100644
> index 000000000000..ffe302ef3dd9
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_writeback_reg.h
> @@ -0,0 +1,136 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2024 Intel Corporation
> + */
> +
> +#ifndef __INTEL_WRITEBACK_REGS_H__
> +#define __INTEL_WRITEBACK_REGS_H__
> +
> +#include "intel_display_reg_defs.h"
> +
> +/* WD 0 and 1 */
> +#define TRANSCODER_WD0_OFFSET 0x6e000
> +#define TRANSCODER_WD1_OFFSET 0x6d800
> +
> +/* WD 0 and 1 */
> +#define PIPE_WD0_OFFSET 0x7e008
> +#define PIPE_WD1_OFFSET 0x7d008
These don't belong here.
> +
> +/* Gen12 WD */
BDW+
> +#define _MMIO_WD(tc, wd0, wd1) _MMIO_TRANS((tc) - TRANSCODER_WD_0, wd0, wd1)
'tc' is a name we never use anywhere else.
> +
> +#define WD_TRANS_ENABLE REG_BIT(31)
> +#define WD_TRANS_STATE REG_BIT(30)
> +
> +/* WD transcoder control */
> +#define _WD_TRANS_FUNC_CTL_0 0x6e400
> +#define _WD_TRANS_FUNC_CTL_1 0x6ec00
> +#define WD_TRANS_FUNC_CTL(tc) _MMIO_WD(tc,\
> + _WD_TRANS_FUNC_CTL_0,\
> + _WD_TRANS_FUNC_CTL_1)
> +
> +#define TRANS_WD_FUNC_ENABLE REG_BIT(31)
> +#define WD_TRIGGERED_CAP_MODE_ENABLE REG_BIT(30)
> +#define START_TRIGGER_FRAME REG_BIT(29)
> +#define STOP_TRIGGER_FRAME REG_BIT(28)
> +#define WD_INPUT_SELECT_MASK REG_GENMASK(14, 12)
> +#define WD_INPUT_PIPE_A REG_FIELD_PREP(WD_INPUT_SELECT_MASK, 0)
> +#define WD_INPUT_PIPE_B REG_FIELD_PREP(WD_INPUT_SELECT_MASK, 5)
> +#define WD_INPUT_PIPE_C REG_FIELD_PREP(WD_INPUT_SELECT_MASK, 6)
> +#define WD_INPUT_PIPE_D REG_FIELD_PREP(WD_INPUT_SELECT_MASK, 7)
> +#define WD_COLOR_MODE_MASK REG_GENMASK(22, 20)
> +#define WD_CONTROL_POINTERS REG_GENMASK(19, 18)
> +#define WD_DISABLE_POINTERS REG_FIELD_PREP(WD_CONTROL_POINTERS, 3)
> +#define WD_PIX_FMT_YUYV REG_FIELD_PREP(WD_COLOR_MODE_MASK, 1)
> +#define WD_PIX_FMT_XYUV8888 REG_FIELD_PREP(WD_COLOR_MODE_MASK, 2)
> +#define WD_PIX_FMT_XBGR8888 REG_FIELD_PREP(WD_COLOR_MODE_MASK, 3)
> +#define WD_PIX_FMT_Y410 REG_FIELD_PREP(WD_COLOR_MODE_MASK, 4)
> +#define WD_PIX_FMT_YUV422 REG_FIELD_PREP(WD_COLOR_MODE_MASK, 5)
> +#define WD_PIX_FMT_XBGR2101010 REG_FIELD_PREP(WD_COLOR_MODE_MASK, 6)
> +#define WD_PIX_FMT_RGB565 REG_FIELD_PREP(WD_COLOR_MODE_MASK, 7)
> +#define WD_FRAME_NUMBER_MASK REG_GENMASK(3, 0)
> +#define WD_FRAME_NUMBER(n) REG_FIELD_PREP(WD_FRAME_NUMBER_MASK, n)
> +
> +#define _WD_STRIDE_0 0x6e510
> +#define _WD_STRIDE_1 0x6ed10
> +#define WD_STRIDE(tc) _MMIO_WD(tc,\
> + _WD_STRIDE_0,\
> + _WD_STRIDE_1)
> +#define WD_STRIDE_MASK REG_GENMASK(15, 6)
> +
> +#define _WD_STREAMCAP_CTL0 0x6e590
> +#define _WD_STREAMCAP_CTL1 0x6ed90
> +#define WD_STREAMCAP_CTL(tc) _MMIO_WD(tc,\
> + _WD_STREAMCAP_CTL0,\
> + _WD_STREAMCAP_CTL1)
> +
> +#define WD_STREAM_CAP_MODE_EN REG_BIT(31)
> +#define WD_SLICING_STRAT_MASK REG_GENMASK(25, 24)
> +#define WD_SLICING_STRAT_1_1 REG_FIELD_PREP(WD_SLICING_STRAT_MASK, 0)
> +#define WD_SLICING_STRAT_2_1 REG_FIELD_PREP(WD_SLICING_STRAT_MASK, 1)
> +#define WD_SLICING_STRAT_4_1 REG_FIELD_PREP(WD_SLICING_STRAT_MASK, 2)
> +#define WD_SLICING_STRAT_8_1 REG_FIELD_PREP(WD_SLICING_STRAT_MASK, 3)
> +#define WD_STREAM_OVERRUN_STATUS 1
> +
> +#define _WD_SURF_0 0x6e514
> +#define _WD_SURF_1 0x6ed14
> +#define WD_SURF(tc) _MMIO_WD(tc,\
> + _WD_SURF_0,\
> + _WD_SURF_1)
> +
> +#define _WD_IMR_0 0x6e560
> +#define _WD_IMR_1 0x6ed60
> +#define WD_IMR(tc) _MMIO_WD(tc,\
> + _WD_IMR_0,\
> + _WD_IMR_1)
> +#define WD_FRAME_COMPLETE_INT REG_BIT(7)
> +#define WD_GTT_FAULT_INT REG_BIT(6)
> +#define WD_VBLANK_INT REG_BIT(5)
> +#define WD_OVERRUN_INT REG_BIT(4)
> +#define WD_CAPTURING_INT REG_BIT(3)
> +#define WD_WRITE_COMPLETE_INT REG_BIT(2)
> +
> +#define _WD_IIR_0 0x6e564
> +#define _WD_IIR_1 0x6ed64
> +#define WD_IIR(tc) _MMIO_WD(tc,\
> + _WD_IIR_0,\
> + _WD_IIR_1)
> +
> +#define _WD_FRAME_STATUS_0 0x6e568
> +#define _WD_FRAME_STATUS_1 0x6ed68
> +#define WD_FRAME_STATUS(tc) _MMIO_WD(tc,\
> + _WD_FRAME_STATUS_0,\
> + _WD_FRAME_STATUS_1)
> +
> +#define WD_FRAME_COMPLETE REG_BIT(31)
> +#define WD_STATE_MASK REG_GENMASK(26, 24)
> +#define WD_STATE_IDLE REG_FIELD_PREP(WD_STATE_MASK, 0)
> +#define WD_STATE_CAPSTART REG_FIELD_PREP(WD_STATE_MASK, 1)
> +#define WD_STATE_FRAME_START REG_FIELD_PREP(WD_STATE_MASK, 2)
> +#define WD_STATE_CAPACITIVE REG_FIELD_PREP(WD_STATE_MASK, 3)
> +#define WD_STATE_TG_DONE REG_FIELD_PREP(WD_STATE_MASK, 4)
> +#define WD_STATE_WDX_DONE REG_FIELD_PREP(WD_STATE_MASK, 5)
> +#define WD_STATE_QUICK_CAP REG_FIELD_PREP(WD_STATE_MASK, 6)
> +
> +#define _WD_27_M_0 0x6e524
> +#define _WD_27_M_1 0x6ed24
> +#define WD_27_M(tc) _MMIO_WD(tc,\
> + _WD_27_M_0,\
> + _WD_27_M_1)
> +
> +#define _WD_27_N_0 0x6e528
> +
> +/* Address looks wrong in bspec: */
> +#define _WD_27_N_1 0x6ec28
> +#define WD_27_N(tc) _MMIO_WD(tc,\
> + _WD_27_N_0,\
> + _WD_27_N_1)
> +
> +#define _WD_TAIL_CFG_0 0x6e520
> +#define _WD_TAIL_CFG_1 0x6ed20
> +
> +#define WD_TAIL_CFG(tc) _MMIO_WD(tc,\
> + _WD_TAIL_CFG_0,\
> + _WD_TAIL_CFG_1)
> +
> +#endif /* __INTEL_WRITEBACK_REGS_H__ */
> --
> 2.34.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 60+ messages in thread
* RE: [PATCH v3 03/26] drm/i915/writeback: Add writeback registers
2026-03-25 11:42 ` Ville Syrjälä
@ 2026-03-26 2:31 ` Kandpal, Suraj
0 siblings, 0 replies; 60+ messages in thread
From: Kandpal, Suraj @ 2026-03-26 2:31 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
S, Sowmiya, Shankar, Uma, Sharma, Swati2, Borah, Chaitanya Kumar,
Murthy, Arun R
> Subject: Re: [PATCH v3 03/26] drm/i915/writeback: Add writeback registers
>
> On Wed, Mar 25, 2026 at 04:37:21PM +0530, Suraj Kandpal wrote:
> > Add writeback registers to its own file.
> >
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
> > ---
> > .../drm/i915/display/intel_writeback_reg.h | 136 ++++++++++++++++++
> > 1 file changed, 136 insertions(+)
> > create mode 100644 drivers/gpu/drm/i915/display/intel_writeback_reg.h
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_writeback_reg.h
> > b/drivers/gpu/drm/i915/display/intel_writeback_reg.h
> > new file mode 100644
> > index 000000000000..ffe302ef3dd9
> > --- /dev/null
> > +++ b/drivers/gpu/drm/i915/display/intel_writeback_reg.h
> > @@ -0,0 +1,136 @@
> > +/* SPDX-License-Identifier: MIT */
> > +/*
> > + * Copyright © 2024 Intel Corporation */
> > +
> > +#ifndef __INTEL_WRITEBACK_REGS_H__
> > +#define __INTEL_WRITEBACK_REGS_H__
> > +
> > +#include "intel_display_reg_defs.h"
> > +
> > +/* WD 0 and 1 */
> > +#define TRANSCODER_WD0_OFFSET 0x6e000
> > +#define TRANSCODER_WD1_OFFSET 0x6d800
> > +
> > +/* WD 0 and 1 */
> > +#define PIPE_WD0_OFFSET 0x7e008
> > +#define PIPE_WD1_OFFSET 0x7d008
>
> These don't belong here.
Sure will move it to the correct place
>
> > +
> > +/* Gen12 WD */
>
> BDW+
Got it
>
> > +#define _MMIO_WD(tc, wd0, wd1) _MMIO_TRANS((tc) -
> TRANSCODER_WD_0, wd0, wd1)
>
> 'tc' is a name we never use anywhere else.
Yes slight oversight will rename
Regards,
Suraj Kandpal
>
> > +
> > +#define WD_TRANS_ENABLE REG_BIT(31)
> > +#define WD_TRANS_STATE REG_BIT(30)
> > +
> > +/* WD transcoder control */
> > +#define _WD_TRANS_FUNC_CTL_0 0x6e400
> > +#define _WD_TRANS_FUNC_CTL_1 0x6ec00
> > +#define WD_TRANS_FUNC_CTL(tc) _MMIO_WD(tc,\
> > + _WD_TRANS_FUNC_CTL_0,\
> > + _WD_TRANS_FUNC_CTL_1)
> > +
> > +#define TRANS_WD_FUNC_ENABLE REG_BIT(31)
> > +#define WD_TRIGGERED_CAP_MODE_ENABLE REG_BIT(30)
> > +#define START_TRIGGER_FRAME REG_BIT(29)
> > +#define STOP_TRIGGER_FRAME REG_BIT(28)
> > +#define WD_INPUT_SELECT_MASK REG_GENMASK(14, 12)
> > +#define WD_INPUT_PIPE_A
> REG_FIELD_PREP(WD_INPUT_SELECT_MASK, 0)
> > +#define WD_INPUT_PIPE_B
> REG_FIELD_PREP(WD_INPUT_SELECT_MASK, 5)
> > +#define WD_INPUT_PIPE_C
> REG_FIELD_PREP(WD_INPUT_SELECT_MASK, 6)
> > +#define WD_INPUT_PIPE_D
> REG_FIELD_PREP(WD_INPUT_SELECT_MASK, 7)
> > +#define WD_COLOR_MODE_MASK REG_GENMASK(22, 20)
> > +#define WD_CONTROL_POINTERS REG_GENMASK(19, 18)
> > +#define WD_DISABLE_POINTERS
> REG_FIELD_PREP(WD_CONTROL_POINTERS, 3)
> > +#define WD_PIX_FMT_YUYV
> REG_FIELD_PREP(WD_COLOR_MODE_MASK, 1)
> > +#define WD_PIX_FMT_XYUV8888
> REG_FIELD_PREP(WD_COLOR_MODE_MASK, 2)
> > +#define WD_PIX_FMT_XBGR8888
> REG_FIELD_PREP(WD_COLOR_MODE_MASK, 3)
> > +#define WD_PIX_FMT_Y410
> REG_FIELD_PREP(WD_COLOR_MODE_MASK, 4)
> > +#define WD_PIX_FMT_YUV422
> REG_FIELD_PREP(WD_COLOR_MODE_MASK, 5)
> > +#define WD_PIX_FMT_XBGR2101010
> REG_FIELD_PREP(WD_COLOR_MODE_MASK, 6)
> > +#define WD_PIX_FMT_RGB565
> REG_FIELD_PREP(WD_COLOR_MODE_MASK, 7)
> > +#define WD_FRAME_NUMBER_MASK REG_GENMASK(3, 0)
> > +#define WD_FRAME_NUMBER(n)
> REG_FIELD_PREP(WD_FRAME_NUMBER_MASK, n)
> > +
> > +#define _WD_STRIDE_0 0x6e510
> > +#define _WD_STRIDE_1 0x6ed10
> > +#define WD_STRIDE(tc) _MMIO_WD(tc,\
> > + _WD_STRIDE_0,\
> > + _WD_STRIDE_1)
> > +#define WD_STRIDE_MASK REG_GENMASK(15, 6)
> > +
> > +#define _WD_STREAMCAP_CTL0 0x6e590
> > +#define _WD_STREAMCAP_CTL1 0x6ed90
> > +#define WD_STREAMCAP_CTL(tc) _MMIO_WD(tc,\
> > + _WD_STREAMCAP_CTL0,\
> > + _WD_STREAMCAP_CTL1)
> > +
> > +#define WD_STREAM_CAP_MODE_EN REG_BIT(31)
> > +#define WD_SLICING_STRAT_MASK REG_GENMASK(25, 24)
> > +#define WD_SLICING_STRAT_1_1
> REG_FIELD_PREP(WD_SLICING_STRAT_MASK, 0)
> > +#define WD_SLICING_STRAT_2_1
> REG_FIELD_PREP(WD_SLICING_STRAT_MASK, 1)
> > +#define WD_SLICING_STRAT_4_1
> REG_FIELD_PREP(WD_SLICING_STRAT_MASK, 2)
> > +#define WD_SLICING_STRAT_8_1
> REG_FIELD_PREP(WD_SLICING_STRAT_MASK, 3)
> > +#define WD_STREAM_OVERRUN_STATUS 1
> > +
> > +#define _WD_SURF_0 0x6e514
> > +#define _WD_SURF_1 0x6ed14
> > +#define WD_SURF(tc) _MMIO_WD(tc,\
> > + _WD_SURF_0,\
> > + _WD_SURF_1)
> > +
> > +#define _WD_IMR_0 0x6e560
> > +#define _WD_IMR_1 0x6ed60
> > +#define WD_IMR(tc) _MMIO_WD(tc,\
> > + _WD_IMR_0,\
> > + _WD_IMR_1)
> > +#define WD_FRAME_COMPLETE_INT REG_BIT(7)
> > +#define WD_GTT_FAULT_INT REG_BIT(6)
> > +#define WD_VBLANK_INT REG_BIT(5)
> > +#define WD_OVERRUN_INT REG_BIT(4)
> > +#define WD_CAPTURING_INT REG_BIT(3)
> > +#define WD_WRITE_COMPLETE_INT REG_BIT(2)
> > +
> > +#define _WD_IIR_0 0x6e564
> > +#define _WD_IIR_1 0x6ed64
> > +#define WD_IIR(tc) _MMIO_WD(tc,\
> > + _WD_IIR_0,\
> > + _WD_IIR_1)
> > +
> > +#define _WD_FRAME_STATUS_0 0x6e568
> > +#define _WD_FRAME_STATUS_1 0x6ed68
> > +#define WD_FRAME_STATUS(tc) _MMIO_WD(tc,\
> > + _WD_FRAME_STATUS_0,\
> > + _WD_FRAME_STATUS_1)
> > +
> > +#define WD_FRAME_COMPLETE REG_BIT(31)
> > +#define WD_STATE_MASK REG_GENMASK(26, 24)
> > +#define WD_STATE_IDLE
> REG_FIELD_PREP(WD_STATE_MASK, 0)
> > +#define WD_STATE_CAPSTART
> REG_FIELD_PREP(WD_STATE_MASK, 1)
> > +#define WD_STATE_FRAME_START
> REG_FIELD_PREP(WD_STATE_MASK, 2)
> > +#define WD_STATE_CAPACITIVE
> REG_FIELD_PREP(WD_STATE_MASK, 3)
> > +#define WD_STATE_TG_DONE
> REG_FIELD_PREP(WD_STATE_MASK, 4)
> > +#define WD_STATE_WDX_DONE
> REG_FIELD_PREP(WD_STATE_MASK, 5)
> > +#define WD_STATE_QUICK_CAP
> REG_FIELD_PREP(WD_STATE_MASK, 6)
> > +
> > +#define _WD_27_M_0 0x6e524
> > +#define _WD_27_M_1 0x6ed24
> > +#define WD_27_M(tc) _MMIO_WD(tc,\
> > + _WD_27_M_0,\
> > + _WD_27_M_1)
> > +
> > +#define _WD_27_N_0 0x6e528
> > +
> > +/* Address looks wrong in bspec: */
> > +#define _WD_27_N_1 0x6ec28
> > +#define WD_27_N(tc) _MMIO_WD(tc,\
> > + _WD_27_N_0,\
> > + _WD_27_N_1)
> > +
> > +#define _WD_TAIL_CFG_0 0x6e520
> > +#define _WD_TAIL_CFG_1 0x6ed20
> > +
> > +#define WD_TAIL_CFG(tc) _MMIO_WD(tc,\
> > + _WD_TAIL_CFG_0,\
> > + _WD_TAIL_CFG_1)
> > +
> > +#endif /* __INTEL_WRITEBACK_REGS_H__ */
> > --
> > 2.34.1
>
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH v3 04/26] drm/i915/writeback: Add some preliminary writeback definitions
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (2 preceding siblings ...)
2026-03-25 11:07 ` [PATCH v3 03/26] drm/i915/writeback: Add writeback registers Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 11:52 ` Ville Syrjälä
2026-03-25 11:07 ` [PATCH v3 05/26] drm/i915/writeback: Init writeback connector Suraj Kandpal
` (23 subsequent siblings)
27 siblings, 1 reply; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal
Add some preliminary definitions like, output type and transcoder
related to the writeback functionality.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_acpi.c | 1 +
.../drm/i915/display/intel_crtc_state_dump.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 3 +-
drivers/gpu/drm/i915/display/intel_display.h | 4 +++
.../drm/i915/display/intel_display_device.c | 29 +++++++++++++++++--
.../drm/i915/display/intel_display_device.h | 2 +-
.../drm/i915/display/intel_display_limits.h | 2 ++
.../drm/i915/display/intel_display_power.c | 4 +++
.../drm/i915/display/intel_display_power.h | 2 ++
.../drm/i915/display/intel_display_types.h | 1 +
10 files changed, 44 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_acpi.c b/drivers/gpu/drm/i915/display/intel_acpi.c
index e06f324027be..89b8d3b4f1f2 100644
--- a/drivers/gpu/drm/i915/display/intel_acpi.c
+++ b/drivers/gpu/drm/i915/display/intel_acpi.c
@@ -256,6 +256,7 @@ static u32 acpi_display_type(struct intel_connector *connector)
break;
case DRM_MODE_CONNECTOR_Unknown:
case DRM_MODE_CONNECTOR_VIRTUAL:
+ case DRM_MODE_CONNECTOR_WRITEBACK:
display_type = ACPI_DISPLAY_TYPE_OTHER;
break;
default:
diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
index 234843b8f83a..4e9e880d2778 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
@@ -53,7 +53,6 @@ intel_dump_infoframe(struct intel_display *display,
}
#define OUTPUT_TYPE(x) [INTEL_OUTPUT_ ## x] = #x
-
static const char * const output_type_str[] = {
OUTPUT_TYPE(UNUSED),
OUTPUT_TYPE(ANALOG),
@@ -67,6 +66,7 @@ static const char * const output_type_str[] = {
OUTPUT_TYPE(DSI),
OUTPUT_TYPE(DDI),
OUTPUT_TYPE(DP_MST),
+ OUTPUT_TYPE(WRITEBACK),
};
#undef OUTPUT_TYPE
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 10b6c6fcb03f..d433ffaadd65 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -3768,7 +3768,8 @@ static u8 hsw_panel_transcoders(struct intel_display *display)
u8 panel_transcoder_mask = BIT(TRANSCODER_EDP);
if (DISPLAY_VER(display) >= 11)
- panel_transcoder_mask |= BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1);
+ panel_transcoder_mask |= BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1) |
+ BIT(TRANSCODER_WD_0) | BIT(TRANSCODER_WD_1);
return panel_transcoder_mask;
}
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 552a59d19e0f..07d9f62e0866 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -66,6 +66,10 @@ static inline const char *transcoder_name(enum transcoder transcoder)
return "DSI A";
case TRANSCODER_DSI_C:
return "DSI C";
+ case TRANSCODER_WD_0:
+ return "WD 0";
+ case TRANSCODER_WD_1:
+ return "WD 1";
default:
return "<invalid>";
}
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index be55ef8ea617..129b1c561847 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -22,6 +22,7 @@
#include "intel_display_wa.h"
#include "intel_fbc.h"
#include "intel_step.h"
+#include "intel_writeback_reg.h"
__diag_push();
__diag_ignore_all("-Woverride-init", "Allow field initialization overrides for display info");
@@ -145,12 +146,16 @@ static const struct intel_display_device_info no_display = {};
[TRANSCODER_B] = PIPE_B_OFFSET, \
[TRANSCODER_C] = PIPE_C_OFFSET, \
[TRANSCODER_EDP] = PIPE_EDP_OFFSET, \
+ [TRANSCODER_WD_0] = PIPE_WD0_OFFSET, \
+ [TRANSCODER_WD_1] = PIPE_WD1_OFFSET, \
}, \
.trans_offsets = { \
[TRANSCODER_A] = TRANSCODER_A_OFFSET, \
[TRANSCODER_B] = TRANSCODER_B_OFFSET, \
[TRANSCODER_C] = TRANSCODER_C_OFFSET, \
[TRANSCODER_EDP] = TRANSCODER_EDP_OFFSET, \
+ [TRANSCODER_WD_0] = TRANSCODER_WD0_OFFSET, \
+ [TRANSCODER_WD_1] = TRANSCODER_WD1_OFFSET, \
}
#define CHV_PIPE_OFFSETS \
@@ -581,7 +586,8 @@ static const struct platform_desc hsw_desc = {
.__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
.__runtime_defaults.cpu_transcoder_mask =
BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
- BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP),
+ BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) |
+ BIT(TRANSCODER_WD_0) | BIT(TRANSCODER_WD_1),
.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),
.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
},
@@ -678,7 +684,8 @@ static const struct intel_display_device_info skl_display = {
.__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
.__runtime_defaults.cpu_transcoder_mask =
BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
- BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP),
+ BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) |
+ BIT(TRANSCODER_WD_0) | BIT(TRANSCODER_WD_1),
.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),
.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
};
@@ -830,6 +837,7 @@ static const struct platform_desc cml_desc = {
BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
BIT(TRANSCODER_DSI_A) | BIT(TRANSCODER_DSI_C), \
+ BIT(TRANSCODER_WD_0) | BIT(TRANSCODER_WD_0), \
.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C)
static const enum intel_step bxt_steppings[] = {
@@ -884,6 +892,8 @@ static const struct platform_desc glk_desc = {
[TRANSCODER_EDP] = PIPE_EDP_OFFSET, \
[TRANSCODER_DSI_0] = PIPE_DSI0_OFFSET, \
[TRANSCODER_DSI_1] = PIPE_DSI1_OFFSET, \
+ [TRANSCODER_WD_0] = PIPE_WD0_OFFSET, \
+ [TRANSCODER_WD_1] = PIPE_WD1_OFFSET, \
}, \
.trans_offsets = { \
[TRANSCODER_A] = TRANSCODER_A_OFFSET, \
@@ -892,6 +902,8 @@ static const struct platform_desc glk_desc = {
[TRANSCODER_EDP] = TRANSCODER_EDP_OFFSET, \
[TRANSCODER_DSI_0] = TRANSCODER_DSI0_OFFSET, \
[TRANSCODER_DSI_1] = TRANSCODER_DSI1_OFFSET, \
+ [TRANSCODER_WD_0] = TRANSCODER_WD0_OFFSET, \
+ [TRANSCODER_WD_1] = TRANSCODER_WD1_OFFSET, \
}, \
IVB_CURSOR_OFFSETS, \
ICL_COLORS, \
@@ -905,6 +917,7 @@ static const struct platform_desc glk_desc = {
BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1), \
+ BIT(TRANSCODER_WD_0) | BIT(TRANSCODER_WD_1), \
.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A)
static const u16 icl_port_f_ids[] = {
@@ -975,6 +988,8 @@ static const struct platform_desc ehl_desc = {
[TRANSCODER_D] = PIPE_D_OFFSET, \
[TRANSCODER_DSI_0] = PIPE_DSI0_OFFSET, \
[TRANSCODER_DSI_1] = PIPE_DSI1_OFFSET, \
+ [TRANSCODER_WD_0] = PIPE_WD0_OFFSET, \
+ [TRANSCODER_WD_1] = PIPE_WD1_OFFSET, \
}, \
.trans_offsets = { \
[TRANSCODER_A] = TRANSCODER_A_OFFSET, \
@@ -983,6 +998,8 @@ static const struct platform_desc ehl_desc = {
[TRANSCODER_D] = TRANSCODER_D_OFFSET, \
[TRANSCODER_DSI_0] = TRANSCODER_DSI0_OFFSET, \
[TRANSCODER_DSI_1] = TRANSCODER_DSI1_OFFSET, \
+ [TRANSCODER_WD_0] = TRANSCODER_WD0_OFFSET, \
+ [TRANSCODER_WD_1] = TRANSCODER_WD1_OFFSET, \
}, \
TGL_CURSOR_OFFSETS, \
ICL_COLORS, \
@@ -997,6 +1014,7 @@ static const struct platform_desc ehl_desc = {
BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
BIT(TRANSCODER_C) | BIT(TRANSCODER_D) | \
BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1), \
+ BIT(TRANSCODER_WD_0) | BIT(TRANSCODER_WD_1), \
.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A)
static const u16 tgl_uy_ids[] = {
@@ -1142,6 +1160,8 @@ static const struct platform_desc adl_s_desc = {
[TRANSCODER_D] = PIPE_D_OFFSET, \
[TRANSCODER_DSI_0] = PIPE_DSI0_OFFSET, \
[TRANSCODER_DSI_1] = PIPE_DSI1_OFFSET, \
+ [TRANSCODER_WD_0] = PIPE_WD0_OFFSET, \
+ [TRANSCODER_WD_1] = PIPE_WD1_OFFSET, \
}, \
.trans_offsets = { \
[TRANSCODER_A] = TRANSCODER_A_OFFSET, \
@@ -1150,6 +1170,8 @@ static const struct platform_desc adl_s_desc = {
[TRANSCODER_D] = TRANSCODER_D_OFFSET, \
[TRANSCODER_DSI_0] = TRANSCODER_DSI0_OFFSET, \
[TRANSCODER_DSI_1] = TRANSCODER_DSI1_OFFSET, \
+ [TRANSCODER_WD_0] = TRANSCODER_WD0_OFFSET, \
+ [TRANSCODER_WD_1] = TRANSCODER_WD1_OFFSET, \
}, \
TGL_CURSOR_OFFSETS, \
\
@@ -1169,7 +1191,8 @@ static const struct intel_display_device_info xe_lpd_display = {
.__runtime_defaults.cpu_transcoder_mask =
BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
BIT(TRANSCODER_C) | BIT(TRANSCODER_D) |
- BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1),
+ BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1) |
+ BIT(TRANSCODER_WD_0) | BIT(TRANSCODER_WD_1),
.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) |
BIT(PORT_TC1) | BIT(PORT_TC2) | BIT(PORT_TC3) | BIT(PORT_TC4),
};
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 1170ac346615..90aa629595db 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -292,7 +292,7 @@ struct intel_display_runtime_info {
u32 rawclk_freq;
u8 pipe_mask;
- u8 cpu_transcoder_mask;
+ u16 cpu_transcoder_mask;
u16 port_mask;
u8 num_sprites[I915_MAX_PIPES];
diff --git a/drivers/gpu/drm/i915/display/intel_display_limits.h b/drivers/gpu/drm/i915/display/intel_display_limits.h
index 453f7b720815..a99e269b1aee 100644
--- a/drivers/gpu/drm/i915/display/intel_display_limits.h
+++ b/drivers/gpu/drm/i915/display/intel_display_limits.h
@@ -45,6 +45,8 @@ enum transcoder {
TRANSCODER_DSI_1,
TRANSCODER_DSI_A = TRANSCODER_DSI_0, /* legacy DSI */
TRANSCODER_DSI_C = TRANSCODER_DSI_1, /* legacy DSI */
+ TRANSCODER_WD_0,
+ TRANSCODER_WD_1,
I915_MAX_TRANSCODERS
};
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index ec96b141c74c..448f1c57439d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -79,6 +79,10 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
return "TRANSCODER_DSI_A";
case POWER_DOMAIN_TRANSCODER_DSI_C:
return "TRANSCODER_DSI_C";
+ case POWER_DOMAIN_TRANSCODER_WD_0:
+ return "TRANSCODER_WD_0";
+ case POWER_DOMAIN_TRANSCODER_WD_1:
+ return "TRANSCODER_WD_1";
case POWER_DOMAIN_TRANSCODER_VDSC_PW2:
return "TRANSCODER_VDSC_PW2";
case POWER_DOMAIN_PORT_DDI_LANES_A:
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
index d616d5d09cbe..fc24d7153ef8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -42,6 +42,8 @@ enum intel_display_power_domain {
POWER_DOMAIN_TRANSCODER_EDP,
POWER_DOMAIN_TRANSCODER_DSI_A,
POWER_DOMAIN_TRANSCODER_DSI_C,
+ POWER_DOMAIN_TRANSCODER_WD_0,
+ POWER_DOMAIN_TRANSCODER_WD_1,
/* VDSC/joining for eDP/DSI transcoder (ICL) or pipe A (TGL) */
POWER_DOMAIN_TRANSCODER_VDSC_PW2,
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index e2496db1642a..a43625e30430 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -83,6 +83,7 @@ enum intel_output_type {
INTEL_OUTPUT_DSI = 9,
INTEL_OUTPUT_DDI = 10,
INTEL_OUTPUT_DP_MST = 11,
+ INTEL_OUTPUT_WRITEBACK = 12,
};
enum hdmi_force_audio {
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* Re: [PATCH v3 04/26] drm/i915/writeback: Add some preliminary writeback definitions
2026-03-25 11:07 ` [PATCH v3 04/26] drm/i915/writeback: Add some preliminary writeback definitions Suraj Kandpal
@ 2026-03-25 11:52 ` Ville Syrjälä
2026-03-26 2:37 ` Kandpal, Suraj
0 siblings, 1 reply; 60+ messages in thread
From: Ville Syrjälä @ 2026-03-25 11:52 UTC (permalink / raw)
To: Suraj Kandpal
Cc: intel-xe, intel-gfx, sowmiya.s, uma.shankar, swati2.sharma,
chaitanya.kumar.borah, arun.r.murthy
On Wed, Mar 25, 2026 at 04:37:22PM +0530, Suraj Kandpal wrote:
> Add some preliminary definitions like, output type and transcoder
> related to the writeback functionality.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_acpi.c | 1 +
> .../drm/i915/display/intel_crtc_state_dump.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display.c | 3 +-
> drivers/gpu/drm/i915/display/intel_display.h | 4 +++
> .../drm/i915/display/intel_display_device.c | 29 +++++++++++++++++--
> .../drm/i915/display/intel_display_device.h | 2 +-
> .../drm/i915/display/intel_display_limits.h | 2 ++
> .../drm/i915/display/intel_display_power.c | 4 +++
> .../drm/i915/display/intel_display_power.h | 2 ++
> .../drm/i915/display/intel_display_types.h | 1 +
> 10 files changed, 44 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_acpi.c b/drivers/gpu/drm/i915/display/intel_acpi.c
> index e06f324027be..89b8d3b4f1f2 100644
> --- a/drivers/gpu/drm/i915/display/intel_acpi.c
> +++ b/drivers/gpu/drm/i915/display/intel_acpi.c
> @@ -256,6 +256,7 @@ static u32 acpi_display_type(struct intel_connector *connector)
> break;
> case DRM_MODE_CONNECTOR_Unknown:
> case DRM_MODE_CONNECTOR_VIRTUAL:
> + case DRM_MODE_CONNECTOR_WRITEBACK:
> display_type = ACPI_DISPLAY_TYPE_OTHER;
I don't think we want to add this stuff to the DIDL/etc.
Something somewhere needs to exclude these from that.
> break;
> default:
> diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> index 234843b8f83a..4e9e880d2778 100644
> --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> @@ -53,7 +53,6 @@ intel_dump_infoframe(struct intel_display *display,
> }
>
> #define OUTPUT_TYPE(x) [INTEL_OUTPUT_ ## x] = #x
> -
Spurious change.
> static const char * const output_type_str[] = {
> OUTPUT_TYPE(UNUSED),
> OUTPUT_TYPE(ANALOG),
> @@ -67,6 +66,7 @@ static const char * const output_type_str[] = {
> OUTPUT_TYPE(DSI),
> OUTPUT_TYPE(DDI),
> OUTPUT_TYPE(DP_MST),
> + OUTPUT_TYPE(WRITEBACK),
> };
>
> #undef OUTPUT_TYPE
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 10b6c6fcb03f..d433ffaadd65 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -3768,7 +3768,8 @@ static u8 hsw_panel_transcoders(struct intel_display *display)
> u8 panel_transcoder_mask = BIT(TRANSCODER_EDP);
>
> if (DISPLAY_VER(display) >= 11)
> - panel_transcoder_mask |= BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1);
> + panel_transcoder_mask |= BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1) |
> + BIT(TRANSCODER_WD_0) | BIT(TRANSCODER_WD_1);
WD has existed at least since SKL. Looks like the tagging in BSpec is
a bit inconsistent in that the filter only shows this for SKL+, but
I *think* BDW has it already.
>
> return panel_transcoder_mask;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index 552a59d19e0f..07d9f62e0866 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -66,6 +66,10 @@ static inline const char *transcoder_name(enum transcoder transcoder)
> return "DSI A";
> case TRANSCODER_DSI_C:
> return "DSI C";
> + case TRANSCODER_WD_0:
> + return "WD 0";
> + case TRANSCODER_WD_1:
> + return "WD 1";
> default:
> return "<invalid>";
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
> index be55ef8ea617..129b1c561847 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -22,6 +22,7 @@
> #include "intel_display_wa.h"
> #include "intel_fbc.h"
> #include "intel_step.h"
> +#include "intel_writeback_reg.h"
>
> __diag_push();
> __diag_ignore_all("-Woverride-init", "Allow field initialization overrides for display info");
> @@ -145,12 +146,16 @@ static const struct intel_display_device_info no_display = {};
> [TRANSCODER_B] = PIPE_B_OFFSET, \
> [TRANSCODER_C] = PIPE_C_OFFSET, \
> [TRANSCODER_EDP] = PIPE_EDP_OFFSET, \
> + [TRANSCODER_WD_0] = PIPE_WD0_OFFSET, \
> + [TRANSCODER_WD_1] = PIPE_WD1_OFFSET, \
> }, \
> .trans_offsets = { \
> [TRANSCODER_A] = TRANSCODER_A_OFFSET, \
> [TRANSCODER_B] = TRANSCODER_B_OFFSET, \
> [TRANSCODER_C] = TRANSCODER_C_OFFSET, \
> [TRANSCODER_EDP] = TRANSCODER_EDP_OFFSET, \
> + [TRANSCODER_WD_0] = TRANSCODER_WD0_OFFSET, \
> + [TRANSCODER_WD_1] = TRANSCODER_WD1_OFFSET, \
> }
>
> #define CHV_PIPE_OFFSETS \
> @@ -581,7 +586,8 @@ static const struct platform_desc hsw_desc = {
> .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
> .__runtime_defaults.cpu_transcoder_mask =
> BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
> - BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP),
> + BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) |
> + BIT(TRANSCODER_WD_0) | BIT(TRANSCODER_WD_1),
> .__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),
> .__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
> },
> @@ -678,7 +684,8 @@ static const struct intel_display_device_info skl_display = {
> .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
> .__runtime_defaults.cpu_transcoder_mask =
> BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
> - BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP),
> + BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) |
> + BIT(TRANSCODER_WD_0) | BIT(TRANSCODER_WD_1),
> .__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),
> .__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
> };
> @@ -830,6 +837,7 @@ static const struct platform_desc cml_desc = {
> BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
> BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
> BIT(TRANSCODER_DSI_A) | BIT(TRANSCODER_DSI_C), \
> + BIT(TRANSCODER_WD_0) | BIT(TRANSCODER_WD_0), \
> .__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C)
>
> static const enum intel_step bxt_steppings[] = {
> @@ -884,6 +892,8 @@ static const struct platform_desc glk_desc = {
> [TRANSCODER_EDP] = PIPE_EDP_OFFSET, \
> [TRANSCODER_DSI_0] = PIPE_DSI0_OFFSET, \
> [TRANSCODER_DSI_1] = PIPE_DSI1_OFFSET, \
> + [TRANSCODER_WD_0] = PIPE_WD0_OFFSET, \
> + [TRANSCODER_WD_1] = PIPE_WD1_OFFSET, \
> }, \
> .trans_offsets = { \
> [TRANSCODER_A] = TRANSCODER_A_OFFSET, \
> @@ -892,6 +902,8 @@ static const struct platform_desc glk_desc = {
> [TRANSCODER_EDP] = TRANSCODER_EDP_OFFSET, \
> [TRANSCODER_DSI_0] = TRANSCODER_DSI0_OFFSET, \
> [TRANSCODER_DSI_1] = TRANSCODER_DSI1_OFFSET, \
> + [TRANSCODER_WD_0] = TRANSCODER_WD0_OFFSET, \
> + [TRANSCODER_WD_1] = TRANSCODER_WD1_OFFSET, \
> }, \
> IVB_CURSOR_OFFSETS, \
> ICL_COLORS, \
> @@ -905,6 +917,7 @@ static const struct platform_desc glk_desc = {
> BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
> BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
> BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1), \
> + BIT(TRANSCODER_WD_0) | BIT(TRANSCODER_WD_1), \
> .__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A)
>
> static const u16 icl_port_f_ids[] = {
> @@ -975,6 +988,8 @@ static const struct platform_desc ehl_desc = {
> [TRANSCODER_D] = PIPE_D_OFFSET, \
> [TRANSCODER_DSI_0] = PIPE_DSI0_OFFSET, \
> [TRANSCODER_DSI_1] = PIPE_DSI1_OFFSET, \
> + [TRANSCODER_WD_0] = PIPE_WD0_OFFSET, \
> + [TRANSCODER_WD_1] = PIPE_WD1_OFFSET, \
> }, \
> .trans_offsets = { \
> [TRANSCODER_A] = TRANSCODER_A_OFFSET, \
> @@ -983,6 +998,8 @@ static const struct platform_desc ehl_desc = {
> [TRANSCODER_D] = TRANSCODER_D_OFFSET, \
> [TRANSCODER_DSI_0] = TRANSCODER_DSI0_OFFSET, \
> [TRANSCODER_DSI_1] = TRANSCODER_DSI1_OFFSET, \
> + [TRANSCODER_WD_0] = TRANSCODER_WD0_OFFSET, \
> + [TRANSCODER_WD_1] = TRANSCODER_WD1_OFFSET, \
> }, \
> TGL_CURSOR_OFFSETS, \
> ICL_COLORS, \
> @@ -997,6 +1014,7 @@ static const struct platform_desc ehl_desc = {
> BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
> BIT(TRANSCODER_C) | BIT(TRANSCODER_D) | \
> BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1), \
> + BIT(TRANSCODER_WD_0) | BIT(TRANSCODER_WD_1), \
> .__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A)
>
> static const u16 tgl_uy_ids[] = {
> @@ -1142,6 +1160,8 @@ static const struct platform_desc adl_s_desc = {
> [TRANSCODER_D] = PIPE_D_OFFSET, \
> [TRANSCODER_DSI_0] = PIPE_DSI0_OFFSET, \
> [TRANSCODER_DSI_1] = PIPE_DSI1_OFFSET, \
> + [TRANSCODER_WD_0] = PIPE_WD0_OFFSET, \
> + [TRANSCODER_WD_1] = PIPE_WD1_OFFSET, \
> }, \
> .trans_offsets = { \
> [TRANSCODER_A] = TRANSCODER_A_OFFSET, \
> @@ -1150,6 +1170,8 @@ static const struct platform_desc adl_s_desc = {
> [TRANSCODER_D] = TRANSCODER_D_OFFSET, \
> [TRANSCODER_DSI_0] = TRANSCODER_DSI0_OFFSET, \
> [TRANSCODER_DSI_1] = TRANSCODER_DSI1_OFFSET, \
> + [TRANSCODER_WD_0] = TRANSCODER_WD0_OFFSET, \
> + [TRANSCODER_WD_1] = TRANSCODER_WD1_OFFSET, \
> }, \
> TGL_CURSOR_OFFSETS, \
> \
> @@ -1169,7 +1191,8 @@ static const struct intel_display_device_info xe_lpd_display = {
> .__runtime_defaults.cpu_transcoder_mask =
> BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
> BIT(TRANSCODER_C) | BIT(TRANSCODER_D) |
> - BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1),
> + BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1) |
> + BIT(TRANSCODER_WD_0) | BIT(TRANSCODER_WD_1),
> .__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) |
> BIT(PORT_TC1) | BIT(PORT_TC2) | BIT(PORT_TC3) | BIT(PORT_TC4),
> };
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 1170ac346615..90aa629595db 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -292,7 +292,7 @@ struct intel_display_runtime_info {
> u32 rawclk_freq;
>
> u8 pipe_mask;
> - u8 cpu_transcoder_mask;
> + u16 cpu_transcoder_mask;
Ugh. You'll need to go over the entire codebase to make sure we never
use u8 for transcoder masks.
> u16 port_mask;
>
> u8 num_sprites[I915_MAX_PIPES];
> diff --git a/drivers/gpu/drm/i915/display/intel_display_limits.h b/drivers/gpu/drm/i915/display/intel_display_limits.h
> index 453f7b720815..a99e269b1aee 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_limits.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_limits.h
> @@ -45,6 +45,8 @@ enum transcoder {
> TRANSCODER_DSI_1,
> TRANSCODER_DSI_A = TRANSCODER_DSI_0, /* legacy DSI */
> TRANSCODER_DSI_C = TRANSCODER_DSI_1, /* legacy DSI */
> + TRANSCODER_WD_0,
> + TRANSCODER_WD_1,
>
> I915_MAX_TRANSCODERS
> };
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index ec96b141c74c..448f1c57439d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -79,6 +79,10 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
> return "TRANSCODER_DSI_A";
> case POWER_DOMAIN_TRANSCODER_DSI_C:
> return "TRANSCODER_DSI_C";
> + case POWER_DOMAIN_TRANSCODER_WD_0:
> + return "TRANSCODER_WD_0";
> + case POWER_DOMAIN_TRANSCODER_WD_1:
> + return "TRANSCODER_WD_1";
> case POWER_DOMAIN_TRANSCODER_VDSC_PW2:
> return "TRANSCODER_VDSC_PW2";
> case POWER_DOMAIN_PORT_DDI_LANES_A:
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
> index d616d5d09cbe..fc24d7153ef8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.h
> @@ -42,6 +42,8 @@ enum intel_display_power_domain {
> POWER_DOMAIN_TRANSCODER_EDP,
> POWER_DOMAIN_TRANSCODER_DSI_A,
> POWER_DOMAIN_TRANSCODER_DSI_C,
> + POWER_DOMAIN_TRANSCODER_WD_0,
> + POWER_DOMAIN_TRANSCODER_WD_1,
This patch is doing about a dozen different things. Please split it up.
>
> /* VDSC/joining for eDP/DSI transcoder (ICL) or pipe A (TGL) */
> POWER_DOMAIN_TRANSCODER_VDSC_PW2,
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index e2496db1642a..a43625e30430 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -83,6 +83,7 @@ enum intel_output_type {
> INTEL_OUTPUT_DSI = 9,
> INTEL_OUTPUT_DDI = 10,
> INTEL_OUTPUT_DP_MST = 11,
> + INTEL_OUTPUT_WRITEBACK = 12,
> };
>
> enum hdmi_force_audio {
> --
> 2.34.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 60+ messages in thread* RE: [PATCH v3 04/26] drm/i915/writeback: Add some preliminary writeback definitions
2026-03-25 11:52 ` Ville Syrjälä
@ 2026-03-26 2:37 ` Kandpal, Suraj
0 siblings, 0 replies; 60+ messages in thread
From: Kandpal, Suraj @ 2026-03-26 2:37 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
S, Sowmiya, Shankar, Uma, Sharma, Swati2, Borah, Chaitanya Kumar,
Murthy, Arun R
> Subject: Re: [PATCH v3 04/26] drm/i915/writeback: Add some preliminary
> writeback definitions
>
> On Wed, Mar 25, 2026 at 04:37:22PM +0530, Suraj Kandpal wrote:
> > Add some preliminary definitions like, output type and transcoder
> > related to the writeback functionality.
> >
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_acpi.c | 1 +
> > .../drm/i915/display/intel_crtc_state_dump.c | 2 +-
> > drivers/gpu/drm/i915/display/intel_display.c | 3 +-
> > drivers/gpu/drm/i915/display/intel_display.h | 4 +++
> > .../drm/i915/display/intel_display_device.c | 29 +++++++++++++++++--
> > .../drm/i915/display/intel_display_device.h | 2 +-
> > .../drm/i915/display/intel_display_limits.h | 2 ++
> > .../drm/i915/display/intel_display_power.c | 4 +++
> > .../drm/i915/display/intel_display_power.h | 2 ++
> > .../drm/i915/display/intel_display_types.h | 1 +
> > 10 files changed, 44 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_acpi.c
> > b/drivers/gpu/drm/i915/display/intel_acpi.c
> > index e06f324027be..89b8d3b4f1f2 100644
> > --- a/drivers/gpu/drm/i915/display/intel_acpi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_acpi.c
> > @@ -256,6 +256,7 @@ static u32 acpi_display_type(struct intel_connector
> *connector)
> > break;
> > case DRM_MODE_CONNECTOR_Unknown:
> > case DRM_MODE_CONNECTOR_VIRTUAL:
> > + case DRM_MODE_CONNECTOR_WRITEBACK:
> > display_type = ACPI_DISPLAY_TYPE_OTHER;
>
> I don't think we want to add this stuff to the DIDL/etc.
> Something somewhere needs to exclude these from that.
Hmm will have a look how that can be done
>
> > break;
> > default:
> > diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> > b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> > index 234843b8f83a..4e9e880d2778 100644
> > --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> > +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> > @@ -53,7 +53,6 @@ intel_dump_infoframe(struct intel_display *display,
> > }
> >
> > #define OUTPUT_TYPE(x) [INTEL_OUTPUT_ ## x] = #x
> > -
>
> Spurious change.
Ahh sure will remove it.
>
> > static const char * const output_type_str[] = {
> > OUTPUT_TYPE(UNUSED),
> > OUTPUT_TYPE(ANALOG),
> > @@ -67,6 +66,7 @@ static const char * const output_type_str[] = {
> > OUTPUT_TYPE(DSI),
> > OUTPUT_TYPE(DDI),
> > OUTPUT_TYPE(DP_MST),
> > + OUTPUT_TYPE(WRITEBACK),
> > };
> >
> > #undef OUTPUT_TYPE
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index 10b6c6fcb03f..d433ffaadd65 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -3768,7 +3768,8 @@ static u8 hsw_panel_transcoders(struct
> intel_display *display)
> > u8 panel_transcoder_mask = BIT(TRANSCODER_EDP);
> >
> > if (DISPLAY_VER(display) >= 11)
> > - panel_transcoder_mask |= BIT(TRANSCODER_DSI_0) |
> BIT(TRANSCODER_DSI_1);
> > + panel_transcoder_mask |= BIT(TRANSCODER_DSI_0) |
> BIT(TRANSCODER_DSI_1) |
> > + BIT(TRANSCODER_WD_0) |
> BIT(TRANSCODER_WD_1);
>
> WD has existed at least since SKL. Looks like the tagging in BSpec is a bit
> inconsistent in that the filter only shows this for SKL+, but I *think* BDW has it
> already.
>
> >
> > return panel_transcoder_mask;
> > }
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> > b/drivers/gpu/drm/i915/display/intel_display.h
> > index 552a59d19e0f..07d9f62e0866 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display.h
> > @@ -66,6 +66,10 @@ static inline const char *transcoder_name(enum
> transcoder transcoder)
> > return "DSI A";
> > case TRANSCODER_DSI_C:
> > return "DSI C";
> > + case TRANSCODER_WD_0:
> > + return "WD 0";
> > + case TRANSCODER_WD_1:
> > + return "WD 1";
> > default:
> > return "<invalid>";
> > }
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c
> > b/drivers/gpu/drm/i915/display/intel_display_device.c
> > index be55ef8ea617..129b1c561847 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> > @@ -22,6 +22,7 @@
> > #include "intel_display_wa.h"
> > #include "intel_fbc.h"
> > #include "intel_step.h"
> > +#include "intel_writeback_reg.h"
> >
> > __diag_push();
> > __diag_ignore_all("-Woverride-init", "Allow field initialization
> > overrides for display info"); @@ -145,12 +146,16 @@ static const struct
> intel_display_device_info no_display = {};
> > [TRANSCODER_B] = PIPE_B_OFFSET, \
> > [TRANSCODER_C] = PIPE_C_OFFSET, \
> > [TRANSCODER_EDP] = PIPE_EDP_OFFSET, \
> > + [TRANSCODER_WD_0] = PIPE_WD0_OFFSET, \
> > + [TRANSCODER_WD_1] = PIPE_WD1_OFFSET, \
> > }, \
> > .trans_offsets = { \
> > [TRANSCODER_A] = TRANSCODER_A_OFFSET, \
> > [TRANSCODER_B] = TRANSCODER_B_OFFSET, \
> > [TRANSCODER_C] = TRANSCODER_C_OFFSET, \
> > [TRANSCODER_EDP] = TRANSCODER_EDP_OFFSET, \
> > + [TRANSCODER_WD_0] = TRANSCODER_WD0_OFFSET, \
> > + [TRANSCODER_WD_1] = TRANSCODER_WD1_OFFSET, \
> > }
> >
> > #define CHV_PIPE_OFFSETS \
> > @@ -581,7 +586,8 @@ static const struct platform_desc hsw_desc = {
> > .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) |
> BIT(PIPE_C),
> > .__runtime_defaults.cpu_transcoder_mask =
> > BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
> > - BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP),
> > + BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) |
> > + BIT(TRANSCODER_WD_0) | BIT(TRANSCODER_WD_1),
> > .__runtime_defaults.port_mask = BIT(PORT_A) |
> BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),
> > .__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A),
> > },
> > @@ -678,7 +684,8 @@ static const struct intel_display_device_info
> skl_display = {
> > .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) |
> BIT(PIPE_C),
> > .__runtime_defaults.cpu_transcoder_mask =
> > BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
> > - BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP),
> > + BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) |
> > + BIT(TRANSCODER_WD_0) | BIT(TRANSCODER_WD_1),
> > .__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) |
> BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),
> > .__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A), }; @@ -830,6
> > +837,7 @@ static const struct platform_desc cml_desc = {
> > BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
> > BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
> > BIT(TRANSCODER_DSI_A) | BIT(TRANSCODER_DSI_C), \
> > + BIT(TRANSCODER_WD_0) | BIT(TRANSCODER_WD_0), \
> > .__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) |
> > BIT(PORT_C)
> >
> > static const enum intel_step bxt_steppings[] = { @@ -884,6 +892,8 @@
> > static const struct platform_desc glk_desc = {
> > [TRANSCODER_EDP] = PIPE_EDP_OFFSET, \
> > [TRANSCODER_DSI_0] = PIPE_DSI0_OFFSET, \
> > [TRANSCODER_DSI_1] = PIPE_DSI1_OFFSET, \
> > + [TRANSCODER_WD_0] = PIPE_WD0_OFFSET, \
> > + [TRANSCODER_WD_1] = PIPE_WD1_OFFSET, \
> > }, \
> > .trans_offsets = { \
> > [TRANSCODER_A] = TRANSCODER_A_OFFSET, \ @@ -892,6
> +902,8 @@ static
> > const struct platform_desc glk_desc = {
> > [TRANSCODER_EDP] = TRANSCODER_EDP_OFFSET, \
> > [TRANSCODER_DSI_0] = TRANSCODER_DSI0_OFFSET, \
> > [TRANSCODER_DSI_1] = TRANSCODER_DSI1_OFFSET, \
> > + [TRANSCODER_WD_0] = TRANSCODER_WD0_OFFSET, \
> > + [TRANSCODER_WD_1] = TRANSCODER_WD1_OFFSET, \
> > }, \
> > IVB_CURSOR_OFFSETS, \
> > ICL_COLORS, \
> > @@ -905,6 +917,7 @@ static const struct platform_desc glk_desc = {
> > BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
> > BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
> > BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1), \
> > + BIT(TRANSCODER_WD_0) | BIT(TRANSCODER_WD_1), \
> > .__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A)
> >
> > static const u16 icl_port_f_ids[] = { @@ -975,6 +988,8 @@ static
> > const struct platform_desc ehl_desc = {
> > [TRANSCODER_D] = PIPE_D_OFFSET, \
> > [TRANSCODER_DSI_0] = PIPE_DSI0_OFFSET, \
> > [TRANSCODER_DSI_1] = PIPE_DSI1_OFFSET, \
> > + [TRANSCODER_WD_0] = PIPE_WD0_OFFSET, \
> > + [TRANSCODER_WD_1] = PIPE_WD1_OFFSET, \
> > }, \
> > .trans_offsets = { \
> > [TRANSCODER_A] = TRANSCODER_A_OFFSET, \ @@ -983,6
> +998,8 @@ static
> > const struct platform_desc ehl_desc = {
> > [TRANSCODER_D] = TRANSCODER_D_OFFSET, \
> > [TRANSCODER_DSI_0] = TRANSCODER_DSI0_OFFSET, \
> > [TRANSCODER_DSI_1] = TRANSCODER_DSI1_OFFSET, \
> > + [TRANSCODER_WD_0] = TRANSCODER_WD0_OFFSET, \
> > + [TRANSCODER_WD_1] = TRANSCODER_WD1_OFFSET, \
> > }, \
> > TGL_CURSOR_OFFSETS, \
> > ICL_COLORS, \
> > @@ -997,6 +1014,7 @@ static const struct platform_desc ehl_desc = {
> > BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
> > BIT(TRANSCODER_C) | BIT(TRANSCODER_D) | \
> > BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1), \
> > + BIT(TRANSCODER_WD_0) | BIT(TRANSCODER_WD_1), \
> > .__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A)
> >
> > static const u16 tgl_uy_ids[] = {
> > @@ -1142,6 +1160,8 @@ static const struct platform_desc adl_s_desc = {
> > [TRANSCODER_D] = PIPE_D_OFFSET,
> \
> > [TRANSCODER_DSI_0] = PIPE_DSI0_OFFSET,
> \
> > [TRANSCODER_DSI_1] = PIPE_DSI1_OFFSET,
> \
> > + [TRANSCODER_WD_0] = PIPE_WD0_OFFSET, \
> > + [TRANSCODER_WD_1] = PIPE_WD1_OFFSET, \
> > },
> \
> > .trans_offsets = {
> \
> > [TRANSCODER_A] = TRANSCODER_A_OFFSET,
> \
> > @@ -1150,6 +1170,8 @@ static const struct platform_desc adl_s_desc = {
> > [TRANSCODER_D] = TRANSCODER_D_OFFSET,
> \
> > [TRANSCODER_DSI_0] = TRANSCODER_DSI0_OFFSET,
> \
> > [TRANSCODER_DSI_1] = TRANSCODER_DSI1_OFFSET,
> \
> > + [TRANSCODER_WD_0] = TRANSCODER_WD0_OFFSET, \
> > + [TRANSCODER_WD_1] = TRANSCODER_WD1_OFFSET, \
> > },
> \
> > TGL_CURSOR_OFFSETS,
> \
> >
> \
> > @@ -1169,7 +1191,8 @@ static const struct intel_display_device_info
> xe_lpd_display = {
> > .__runtime_defaults.cpu_transcoder_mask =
> > BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
> > BIT(TRANSCODER_C) | BIT(TRANSCODER_D) |
> > - BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1),
> > + BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1) |
> > + BIT(TRANSCODER_WD_0) | BIT(TRANSCODER_WD_1),
> > .__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) |
> > BIT(PORT_TC1) | BIT(PORT_TC2) | BIT(PORT_TC3) |
> BIT(PORT_TC4), };
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> > b/drivers/gpu/drm/i915/display/intel_display_device.h
> > index 1170ac346615..90aa629595db 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> > @@ -292,7 +292,7 @@ struct intel_display_runtime_info {
> > u32 rawclk_freq;
> >
> > u8 pipe_mask;
> > - u8 cpu_transcoder_mask;
> > + u16 cpu_transcoder_mask;
>
> Ugh. You'll need to go over the entire codebase to make sure we never use u8
> for transcoder masks.
>
That's true but currently if this is not done we end up running into an error since now transcoders have increased, do you want me to add a patch in this series that basically makes sure that
We always use a u8 transcoder everywhere or should I send a separate series when I change this from u8 to u16 and the corresponding changes that come with it.
Open to other ideas on how I can get around this issue without having to change transcoder mask.
> > u16 port_mask;
> >
> > u8 num_sprites[I915_MAX_PIPES];
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_limits.h
> > b/drivers/gpu/drm/i915/display/intel_display_limits.h
> > index 453f7b720815..a99e269b1aee 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_limits.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_limits.h
> > @@ -45,6 +45,8 @@ enum transcoder {
> > TRANSCODER_DSI_1,
> > TRANSCODER_DSI_A = TRANSCODER_DSI_0, /* legacy DSI */
> > TRANSCODER_DSI_C = TRANSCODER_DSI_1, /* legacy DSI */
> > + TRANSCODER_WD_0,
> > + TRANSCODER_WD_1,
> >
> > I915_MAX_TRANSCODERS
> > };
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c
> > b/drivers/gpu/drm/i915/display/intel_display_power.c
> > index ec96b141c74c..448f1c57439d 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> > @@ -79,6 +79,10 @@ intel_display_power_domain_str(enum
> intel_display_power_domain domain)
> > return "TRANSCODER_DSI_A";
> > case POWER_DOMAIN_TRANSCODER_DSI_C:
> > return "TRANSCODER_DSI_C";
> > + case POWER_DOMAIN_TRANSCODER_WD_0:
> > + return "TRANSCODER_WD_0";
> > + case POWER_DOMAIN_TRANSCODER_WD_1:
> > + return "TRANSCODER_WD_1";
> > case POWER_DOMAIN_TRANSCODER_VDSC_PW2:
> > return "TRANSCODER_VDSC_PW2";
> > case POWER_DOMAIN_PORT_DDI_LANES_A:
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h
> > b/drivers/gpu/drm/i915/display/intel_display_power.h
> > index d616d5d09cbe..fc24d7153ef8 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_power.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_power.h
> > @@ -42,6 +42,8 @@ enum intel_display_power_domain {
> > POWER_DOMAIN_TRANSCODER_EDP,
> > POWER_DOMAIN_TRANSCODER_DSI_A,
> > POWER_DOMAIN_TRANSCODER_DSI_C,
> > + POWER_DOMAIN_TRANSCODER_WD_0,
> > + POWER_DOMAIN_TRANSCODER_WD_1,
>
> This patch is doing about a dozen different things. Please split it up.
>
Sure will do
Regards,
Suraj Kandpal
> >
> > /* VDSC/joining for eDP/DSI transcoder (ICL) or pipe A (TGL) */
> > POWER_DOMAIN_TRANSCODER_VDSC_PW2,
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index e2496db1642a..a43625e30430 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -83,6 +83,7 @@ enum intel_output_type {
> > INTEL_OUTPUT_DSI = 9,
> > INTEL_OUTPUT_DDI = 10,
> > INTEL_OUTPUT_DP_MST = 11,
> > + INTEL_OUTPUT_WRITEBACK = 12,
> > };
> >
> > enum hdmi_force_audio {
> > --
> > 2.34.1
>
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH v3 05/26] drm/i915/writeback: Init writeback connector
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (3 preceding siblings ...)
2026-03-25 11:07 ` [PATCH v3 04/26] drm/i915/writeback: Add some preliminary writeback definitions Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 12:15 ` Ville Syrjälä
2026-03-25 11:07 ` [PATCH v3 06/26] drm/i915/writeback: Add function to get modes Suraj Kandpal
` (22 subsequent siblings)
27 siblings, 1 reply; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal
Initialize writeback connector initialising the virtual encoder
and intel connector. We also allocate memory for drm_writeback_connector
but not the drm_connector within it due to a constraint
we need all connectors to be an intel_connector.
The writeback_format arrays is used to tell the user which
drm formats are supported by us.
Bspec: 49275
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/Makefile | 1 +
.../gpu/drm/i915/display/intel_writeback.c | 126 ++++++++++++++++++
.../gpu/drm/i915/display/intel_writeback.h | 17 +++
3 files changed, 144 insertions(+)
create mode 100644 drivers/gpu/drm/i915/display/intel_writeback.c
create mode 100644 drivers/gpu/drm/i915/display/intel_writeback.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index b677720a1c2d..1e9140e7713c 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -315,6 +315,7 @@ i915-y += \
display/intel_vblank.o \
display/intel_vga.o \
display/intel_wm.o \
+ display/intel_writeback.o \
display/skl_prefill.o \
display/skl_scaler.o \
display/skl_universal_plane.o \
diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
new file mode 100644
index 000000000000..73101ee17d74
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_writeback.c
@@ -0,0 +1,126 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#include <linux/slab.h>
+#include <drm/drm_atomic_state_helper.h>
+#include <drm/drm_writeback.h>
+#include <drm/drm_modeset_helper_vtables.h>
+#include <drm/drm_probe_helper.h>
+#include <drm/drm_fourcc.h>
+#include <drm/drm_encoder.h>
+
+#include "intel_atomic.h"
+#include "intel_connector.h"
+#include "intel_de.h"
+#include "intel_display_driver.h"
+#include "intel_display_types.h"
+#include "intel_writeback.h"
+
+struct intel_writeback_connector {
+ struct intel_connector connector;
+ struct intel_encoder encoder;
+ enum transcoder trans;
+ int frame_num;
+};
+
+static const u32 writeback_formats[] = {
+ DRM_FORMAT_XYUV8888,
+ DRM_FORMAT_YUYV,
+ DRM_FORMAT_XBGR8888,
+ DRM_FORMAT_XVYU2101010,
+ DRM_FORMAT_VYUY,
+ DRM_FORMAT_XBGR2101010,
+};
+
+static int intel_writeback_connector_init(struct intel_connector *connector)
+{
+ struct intel_digital_connector_state *conn_state;
+
+ conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
+ if (!conn_state)
+ return -ENOMEM;
+
+ __drm_atomic_helper_connector_reset(&connector->base,
+ &conn_state->base);
+ return 0;
+}
+
+static int
+intel_writeback_connector_alloc(struct intel_connector *connector)
+{
+ if (intel_writeback_connector_init(connector) < 0) {
+ kfree(connector);
+ return -ENOMEM;
+ }
+
+ return 0;
+}
+
+static const struct drm_encoder_funcs drm_writeback_encoder_funcs = {
+ .destroy = drm_encoder_cleanup,
+};
+
+const struct drm_connector_funcs conn_funcs = {
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .atomic_duplicate_state = intel_digital_connector_duplicate_state,
+ .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
+};
+
+static const struct drm_connector_helper_funcs conn_helper_funcs = {
+};
+
+int intel_writeback_init(struct intel_display *display)
+{
+ struct intel_encoder *encoder;
+ struct intel_writeback_connector *writeback_conn;
+ struct intel_connector *connector;
+ int ret;
+
+ writeback_conn = kzalloc(sizeof(*writeback_conn), GFP_KERNEL);
+ if (!writeback_conn)
+ return -ENOSPC;
+
+ encoder = &writeback_conn->encoder;
+ encoder->base.possible_crtcs = 0xf;
+ ret = drm_encoder_init(display->drm, &encoder->base,
+ &drm_writeback_encoder_funcs,
+ DRM_MODE_ENCODER_VIRTUAL, NULL);
+ if (ret) {
+ kfree(writeback_conn);
+ return ret;
+ }
+
+ encoder->type = INTEL_OUTPUT_WRITEBACK;
+ encoder->pipe_mask = ~0;
+ encoder->cloneable = 0;
+
+ connector = &writeback_conn->connector;
+ ret = intel_writeback_connector_alloc(connector);
+ if (ret) {
+ kfree(writeback_conn);
+ return ret;
+ }
+
+ connector->base.interlace_allowed = 0;
+ drm_connector_helper_add(&connector->base, &conn_helper_funcs);
+ ret = drm_writeback_connector_init(display->drm, &connector->base,
+ &conn_funcs, &encoder->base,
+ writeback_formats,
+ ARRAY_SIZE(writeback_formats));
+ if (ret) {
+ intel_connector_free(connector);
+ drm_encoder_cleanup(&encoder->base);
+ kfree(&writeback_conn->encoder);
+ kfree(writeback_conn);
+ return ret;
+ }
+
+ intel_connector_attach_encoder(connector, encoder);
+ connector->get_hw_state = intel_connector_get_hw_state;
+ connector->base.status = connector_status_disconnected;
+ writeback_conn->frame_num = 1;
+
+ return 0;
+}
diff --git a/drivers/gpu/drm/i915/display/intel_writeback.h b/drivers/gpu/drm/i915/display/intel_writeback.h
new file mode 100644
index 000000000000..5911684cb81a
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_writeback.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#ifndef __INTEL_WRITEBACK_H__
+#define __INTEL_WRITEBACK_H__
+
+#include <linux/types.h>
+
+struct intel_display;
+struct intel_writeback_connector;
+
+int intel_writeback_init(struct intel_display *display);
+
+#endif /* __INTEL_WRITEBACK_H__ */
+
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* Re: [PATCH v3 05/26] drm/i915/writeback: Init writeback connector
2026-03-25 11:07 ` [PATCH v3 05/26] drm/i915/writeback: Init writeback connector Suraj Kandpal
@ 2026-03-25 12:15 ` Ville Syrjälä
2026-03-26 2:52 ` Kandpal, Suraj
0 siblings, 1 reply; 60+ messages in thread
From: Ville Syrjälä @ 2026-03-25 12:15 UTC (permalink / raw)
To: Suraj Kandpal
Cc: intel-xe, intel-gfx, sowmiya.s, uma.shankar, swati2.sharma,
chaitanya.kumar.borah, arun.r.murthy
On Wed, Mar 25, 2026 at 04:37:23PM +0530, Suraj Kandpal wrote:
> Initialize writeback connector initialising the virtual encoder
> and intel connector. We also allocate memory for drm_writeback_connector
> but not the drm_connector within it due to a constraint
> we need all connectors to be an intel_connector.
> The writeback_format arrays is used to tell the user which
> drm formats are supported by us.
>
> Bspec: 49275
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/Makefile | 1 +
> .../gpu/drm/i915/display/intel_writeback.c | 126 ++++++++++++++++++
> .../gpu/drm/i915/display/intel_writeback.h | 17 +++
> 3 files changed, 144 insertions(+)
> create mode 100644 drivers/gpu/drm/i915/display/intel_writeback.c
> create mode 100644 drivers/gpu/drm/i915/display/intel_writeback.h
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index b677720a1c2d..1e9140e7713c 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -315,6 +315,7 @@ i915-y += \
> display/intel_vblank.o \
> display/intel_vga.o \
> display/intel_wm.o \
> + display/intel_writeback.o \
> display/skl_prefill.o \
> display/skl_scaler.o \
> display/skl_universal_plane.o \
> diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
> new file mode 100644
> index 000000000000..73101ee17d74
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_writeback.c
> @@ -0,0 +1,126 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +#include <linux/slab.h>
> +#include <drm/drm_atomic_state_helper.h>
> +#include <drm/drm_writeback.h>
> +#include <drm/drm_modeset_helper_vtables.h>
> +#include <drm/drm_probe_helper.h>
> +#include <drm/drm_fourcc.h>
> +#include <drm/drm_encoder.h>
> +
> +#include "intel_atomic.h"
> +#include "intel_connector.h"
> +#include "intel_de.h"
> +#include "intel_display_driver.h"
> +#include "intel_display_types.h"
> +#include "intel_writeback.h"
> +
> +struct intel_writeback_connector {
> + struct intel_connector connector;
> + struct intel_encoder encoder;
> + enum transcoder trans;
We don't call it 'trans' anywhere else.
> + int frame_num;
This and 'trans' are unused. Please introduce them when needed, not
here.
> +};
> +
> +static const u32 writeback_formats[] = {
> + DRM_FORMAT_XYUV8888,
> + DRM_FORMAT_YUYV,
> + DRM_FORMAT_XBGR8888,
> + DRM_FORMAT_XVYU2101010,
> + DRM_FORMAT_VYUY,
> + DRM_FORMAT_XBGR2101010,
> +};
> +
> +static int intel_writeback_connector_init(struct intel_connector *connector)
> +{
> + struct intel_digital_connector_state *conn_state;
> +
> + conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
> + if (!conn_state)
> + return -ENOMEM;
> +
> + __drm_atomic_helper_connector_reset(&connector->base,
> + &conn_state->base);
> + return 0;
> +}
> +
> +static int
> +intel_writeback_connector_alloc(struct intel_connector *connector)
> +{
> + if (intel_writeback_connector_init(connector) < 0) {
> + kfree(connector);
> + return -ENOMEM;
> + }
> +
> + return 0;
> +}
> +
> +static const struct drm_encoder_funcs drm_writeback_encoder_funcs = {
> + .destroy = drm_encoder_cleanup,
> +};
> +
> +const struct drm_connector_funcs conn_funcs = {
> + .fill_modes = drm_helper_probe_single_connector_modes,
> + .atomic_duplicate_state = intel_digital_connector_duplicate_state,
> + .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
> +};
> +
> +static const struct drm_connector_helper_funcs conn_helper_funcs = {
> +};
> +
> +int intel_writeback_init(struct intel_display *display)
> +{
> + struct intel_encoder *encoder;
> + struct intel_writeback_connector *writeback_conn;
> + struct intel_connector *connector;
> + int ret;
> +
> + writeback_conn = kzalloc(sizeof(*writeback_conn), GFP_KERNEL);
> + if (!writeback_conn)
> + return -ENOSPC;
> +
> + encoder = &writeback_conn->encoder;
> + encoder->base.possible_crtcs = 0xf;
We have code that takes care of that.
> + ret = drm_encoder_init(display->drm, &encoder->base,
> + &drm_writeback_encoder_funcs,
> + DRM_MODE_ENCODER_VIRTUAL, NULL);
> + if (ret) {
> + kfree(writeback_conn);
> + return ret;
> + }
> +
> + encoder->type = INTEL_OUTPUT_WRITEBACK;
> + encoder->pipe_mask = ~0;
> + encoder->cloneable = 0;
We should probably just nuke all the redundant cloneable=0 assignments
from all the encoders.
> +
> + connector = &writeback_conn->connector;
> + ret = intel_writeback_connector_alloc(connector);
> + if (ret) {
> + kfree(writeback_conn);
> + return ret;
> + }
> +
> + connector->base.interlace_allowed = 0;
redundant
> + drm_connector_helper_add(&connector->base, &conn_helper_funcs);
> + ret = drm_writeback_connector_init(display->drm, &connector->base,
> + &conn_funcs, &encoder->base,
> + writeback_formats,
> + ARRAY_SIZE(writeback_formats));
> + if (ret) {
> + intel_connector_free(connector);
> + drm_encoder_cleanup(&encoder->base);
> + kfree(&writeback_conn->encoder);
> + kfree(writeback_conn);
> + return ret;
> + }
> +
> + intel_connector_attach_encoder(connector, encoder);
> + connector->get_hw_state = intel_connector_get_hw_state;
> + connector->base.status = connector_status_disconnected;
> + writeback_conn->frame_num = 1;
> +
> + return 0;
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_writeback.h b/drivers/gpu/drm/i915/display/intel_writeback.h
> new file mode 100644
> index 000000000000..5911684cb81a
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_writeback.h
> @@ -0,0 +1,17 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +#ifndef __INTEL_WRITEBACK_H__
> +#define __INTEL_WRITEBACK_H__
> +
> +#include <linux/types.h>
> +
> +struct intel_display;
> +struct intel_writeback_connector;
> +
> +int intel_writeback_init(struct intel_display *display);
> +
> +#endif /* __INTEL_WRITEBACK_H__ */
> +
> --
> 2.34.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 60+ messages in thread* RE: [PATCH v3 05/26] drm/i915/writeback: Init writeback connector
2026-03-25 12:15 ` Ville Syrjälä
@ 2026-03-26 2:52 ` Kandpal, Suraj
0 siblings, 0 replies; 60+ messages in thread
From: Kandpal, Suraj @ 2026-03-26 2:52 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
S, Sowmiya, Shankar, Uma, Sharma, Swati2, Borah, Chaitanya Kumar,
Murthy, Arun R
> Subject: Re: [PATCH v3 05/26] drm/i915/writeback: Init writeback connector
>
> On Wed, Mar 25, 2026 at 04:37:23PM +0530, Suraj Kandpal wrote:
> > Initialize writeback connector initialising the virtual encoder and
> > intel connector. We also allocate memory for drm_writeback_connector
> > but not the drm_connector within it due to a constraint we need all
> > connectors to be an intel_connector.
> > The writeback_format arrays is used to tell the user which drm formats
> > are supported by us.
> >
> > Bspec: 49275
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > ---
> > drivers/gpu/drm/i915/Makefile | 1 +
> > .../gpu/drm/i915/display/intel_writeback.c | 126 ++++++++++++++++++
> > .../gpu/drm/i915/display/intel_writeback.h | 17 +++
> > 3 files changed, 144 insertions(+)
> > create mode 100644 drivers/gpu/drm/i915/display/intel_writeback.c
> > create mode 100644 drivers/gpu/drm/i915/display/intel_writeback.h
> >
> > diff --git a/drivers/gpu/drm/i915/Makefile
> > b/drivers/gpu/drm/i915/Makefile index b677720a1c2d..1e9140e7713c
> > 100644
> > --- a/drivers/gpu/drm/i915/Makefile
> > +++ b/drivers/gpu/drm/i915/Makefile
> > @@ -315,6 +315,7 @@ i915-y += \
> > display/intel_vblank.o \
> > display/intel_vga.o \
> > display/intel_wm.o \
> > + display/intel_writeback.o \
> > display/skl_prefill.o \
> > display/skl_scaler.o \
> > display/skl_universal_plane.o \
> > diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c
> > b/drivers/gpu/drm/i915/display/intel_writeback.c
> > new file mode 100644
> > index 000000000000..73101ee17d74
> > --- /dev/null
> > +++ b/drivers/gpu/drm/i915/display/intel_writeback.c
> > @@ -0,0 +1,126 @@
> > +// SPDX-License-Identifier: MIT
> > +/*
> > + * Copyright © 2025 Intel Corporation */
> > +
> > +#include <linux/slab.h>
> > +#include <drm/drm_atomic_state_helper.h> #include
> > +<drm/drm_writeback.h> #include <drm/drm_modeset_helper_vtables.h>
> > +#include <drm/drm_probe_helper.h>
> > +#include <drm/drm_fourcc.h>
> > +#include <drm/drm_encoder.h>
> > +
> > +#include "intel_atomic.h"
> > +#include "intel_connector.h"
> > +#include "intel_de.h"
> > +#include "intel_display_driver.h"
> > +#include "intel_display_types.h"
> > +#include "intel_writeback.h"
> > +
> > +struct intel_writeback_connector {
> > + struct intel_connector connector;
> > + struct intel_encoder encoder;
> > + enum transcoder trans;
>
> We don't call it 'trans' anywhere else.
Yes will call it transcoder my bad.
>
> > + int frame_num;
>
> This and 'trans' are unused. Please introduce them when needed, not here.
>
Got it.
> > +};
> > +
> > +static const u32 writeback_formats[] = {
> > + DRM_FORMAT_XYUV8888,
> > + DRM_FORMAT_YUYV,
> > + DRM_FORMAT_XBGR8888,
> > + DRM_FORMAT_XVYU2101010,
> > + DRM_FORMAT_VYUY,
> > + DRM_FORMAT_XBGR2101010,
> > +};
> > +
> > +static int intel_writeback_connector_init(struct intel_connector
> > +*connector) {
> > + struct intel_digital_connector_state *conn_state;
> > +
> > + conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
> > + if (!conn_state)
> > + return -ENOMEM;
> > +
> > + __drm_atomic_helper_connector_reset(&connector->base,
> > + &conn_state->base);
> > + return 0;
> > +}
> > +
> > +static int
> > +intel_writeback_connector_alloc(struct intel_connector *connector) {
> > + if (intel_writeback_connector_init(connector) < 0) {
> > + kfree(connector);
> > + return -ENOMEM;
> > + }
> > +
> > + return 0;
> > +}
> > +
> > +static const struct drm_encoder_funcs drm_writeback_encoder_funcs = {
> > + .destroy = drm_encoder_cleanup,
> > +};
> > +
> > +const struct drm_connector_funcs conn_funcs = {
> > + .fill_modes = drm_helper_probe_single_connector_modes,
> > + .atomic_duplicate_state = intel_digital_connector_duplicate_state,
> > + .atomic_destroy_state =
> drm_atomic_helper_connector_destroy_state,
> > +};
> > +
> > +static const struct drm_connector_helper_funcs conn_helper_funcs = {
> > +};
> > +
> > +int intel_writeback_init(struct intel_display *display) {
> > + struct intel_encoder *encoder;
> > + struct intel_writeback_connector *writeback_conn;
> > + struct intel_connector *connector;
> > + int ret;
> > +
> > + writeback_conn = kzalloc(sizeof(*writeback_conn), GFP_KERNEL);
> > + if (!writeback_conn)
> > + return -ENOSPC;
> > +
> > + encoder = &writeback_conn->encoder;
> > + encoder->base.possible_crtcs = 0xf;
>
> We have code that takes care of that.
Ohkay. Will remove this.
>
> > + ret = drm_encoder_init(display->drm, &encoder->base,
> > + &drm_writeback_encoder_funcs,
> > + DRM_MODE_ENCODER_VIRTUAL, NULL);
> > + if (ret) {
> > + kfree(writeback_conn);
> > + return ret;
> > + }
> > +
> > + encoder->type = INTEL_OUTPUT_WRITEBACK;
> > + encoder->pipe_mask = ~0;
> > + encoder->cloneable = 0;
>
> We should probably just nuke all the redundant cloneable=0 assignments from
> all the encoders.
Hmm will remove it from here, will try to remove it from all encoder when I get the time to test and float it.
>
> > +
> > + connector = &writeback_conn->connector;
> > + ret = intel_writeback_connector_alloc(connector);
> > + if (ret) {
> > + kfree(writeback_conn);
> > + return ret;
> > + }
> > +
> > + connector->base.interlace_allowed = 0;
>
> redundant
Right will remove it.
Regards,
Suraj Kandpal
>
> > + drm_connector_helper_add(&connector->base, &conn_helper_funcs);
> > + ret = drm_writeback_connector_init(display->drm, &connector->base,
> > + &conn_funcs, &encoder->base,
> > + writeback_formats,
> > + ARRAY_SIZE(writeback_formats));
> > + if (ret) {
> > + intel_connector_free(connector);
> > + drm_encoder_cleanup(&encoder->base);
> > + kfree(&writeback_conn->encoder);
> > + kfree(writeback_conn);
> > + return ret;
> > + }
> > +
> > + intel_connector_attach_encoder(connector, encoder);
> > + connector->get_hw_state = intel_connector_get_hw_state;
> > + connector->base.status = connector_status_disconnected;
> > + writeback_conn->frame_num = 1;
> > +
> > + return 0;
> > +}
> > diff --git a/drivers/gpu/drm/i915/display/intel_writeback.h
> > b/drivers/gpu/drm/i915/display/intel_writeback.h
> > new file mode 100644
> > index 000000000000..5911684cb81a
> > --- /dev/null
> > +++ b/drivers/gpu/drm/i915/display/intel_writeback.h
> > @@ -0,0 +1,17 @@
> > +/* SPDX-License-Identifier: MIT */
> > +/*
> > + * Copyright © 2025 Intel Corporation */
> > +
> > +#ifndef __INTEL_WRITEBACK_H__
> > +#define __INTEL_WRITEBACK_H__
> > +
> > +#include <linux/types.h>
> > +
> > +struct intel_display;
> > +struct intel_writeback_connector;
> > +
> > +int intel_writeback_init(struct intel_display *display);
> > +
> > +#endif /* __INTEL_WRITEBACK_H__ */
> > +
> > --
> > 2.34.1
>
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH v3 06/26] drm/i915/writeback: Add function to get modes
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (4 preceding siblings ...)
2026-03-25 11:07 ` [PATCH v3 05/26] drm/i915/writeback: Init writeback connector Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 11:07 ` [PATCH v3 07/26] drm/i915/writeback: Add hook to check modes Suraj Kandpal
` (21 subsequent siblings)
27 siblings, 0 replies; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal
Add a function that get modes for writeback connector.
Since we have a restriction on supporting only 3840x2160 60Hz modes
at max we will create modes only up until that point.
Bspec: 49275
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_writeback.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
index 73101ee17d74..852951933348 100644
--- a/drivers/gpu/drm/i915/display/intel_writeback.c
+++ b/drivers/gpu/drm/i915/display/intel_writeback.c
@@ -10,6 +10,7 @@
#include <drm/drm_probe_helper.h>
#include <drm/drm_fourcc.h>
#include <drm/drm_encoder.h>
+#include <drm/drm_edid.h>
#include "intel_atomic.h"
#include "intel_connector.h"
@@ -58,6 +59,11 @@ intel_writeback_connector_alloc(struct intel_connector *connector)
return 0;
}
+static int intel_writeback_get_modes(struct drm_connector *connector)
+{
+ return drm_add_modes_noedid(connector, 3840, 2160);
+}
+
static const struct drm_encoder_funcs drm_writeback_encoder_funcs = {
.destroy = drm_encoder_cleanup,
};
@@ -69,6 +75,7 @@ const struct drm_connector_funcs conn_funcs = {
};
static const struct drm_connector_helper_funcs conn_helper_funcs = {
+ .get_modes = intel_writeback_get_modes,
};
int intel_writeback_init(struct intel_display *display)
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* [PATCH v3 07/26] drm/i915/writeback: Add hook to check modes
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (5 preceding siblings ...)
2026-03-25 11:07 ` [PATCH v3 06/26] drm/i915/writeback: Add function to get modes Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 11:07 ` [PATCH v3 08/26] drm/i915/writeback: Define encoder->get_hw_state Suraj Kandpal
` (20 subsequent siblings)
27 siblings, 0 replies; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal
Add connector helper hooks to check if mode is valid or not.
We add this restriction to make sure mode is 3840x2160 60Hz.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
.../gpu/drm/i915/display/intel_writeback.c | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
index 852951933348..765f62fa38f8 100644
--- a/drivers/gpu/drm/i915/display/intel_writeback.c
+++ b/drivers/gpu/drm/i915/display/intel_writeback.c
@@ -59,6 +59,25 @@ intel_writeback_connector_alloc(struct intel_connector *connector)
return 0;
}
+static enum drm_mode_status
+intel_writeback_mode_valid(struct drm_connector *_connector,
+ const struct drm_display_mode *mode)
+{
+ int refresh_rate;
+
+ if (mode->hdisplay > 3840)
+ return MODE_H_ILLEGAL;
+
+ if (mode->vdisplay > 2160)
+ return MODE_V_ILLEGAL;
+
+ refresh_rate = drm_mode_vrefresh(mode);
+ if (refresh_rate > 60)
+ return MODE_BAD;
+
+ return MODE_OK;
+}
+
static int intel_writeback_get_modes(struct drm_connector *connector)
{
return drm_add_modes_noedid(connector, 3840, 2160);
@@ -76,6 +95,7 @@ const struct drm_connector_funcs conn_funcs = {
static const struct drm_connector_helper_funcs conn_helper_funcs = {
.get_modes = intel_writeback_get_modes,
+ .mode_valid = intel_writeback_mode_valid,
};
int intel_writeback_init(struct intel_display *display)
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* [PATCH v3 08/26] drm/i915/writeback: Define encoder->get_hw_state
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (6 preceding siblings ...)
2026-03-25 11:07 ` [PATCH v3 07/26] drm/i915/writeback: Add hook to check modes Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 12:08 ` Ville Syrjälä
2026-03-25 11:07 ` [PATCH v3 09/26] drm/i915/writeback: Fill encoder->get_config Suraj Kandpal
` (19 subsequent siblings)
27 siblings, 1 reply; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal
Define the get_hw_state function for encoder which
get's the encoder state, pipe config.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
.../gpu/drm/i915/display/intel_writeback.c | 49 +++++++++++++++++++
.../drm/i915/display/intel_writeback_reg.h | 3 ++
2 files changed, 52 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
index 765f62fa38f8..64769609aefe 100644
--- a/drivers/gpu/drm/i915/display/intel_writeback.c
+++ b/drivers/gpu/drm/i915/display/intel_writeback.c
@@ -17,7 +17,9 @@
#include "intel_de.h"
#include "intel_display_driver.h"
#include "intel_display_types.h"
+#include "intel_display_utils.h"
#include "intel_writeback.h"
+#include "intel_writeback_reg.h"
struct intel_writeback_connector {
struct intel_connector connector;
@@ -98,6 +100,52 @@ static const struct drm_connector_helper_funcs conn_helper_funcs = {
.mode_valid = intel_writeback_mode_valid,
};
+static bool
+intel_writeback_get_hw_state(struct intel_encoder *encoder,
+ enum pipe *pipe)
+{
+ struct intel_display *display = to_intel_display(encoder);
+ u8 pipe_mask = 0;
+ u32 tmp;
+
+ /* TODO need to be done for both the wd transcoder */
+ tmp = intel_de_read(display,
+ TRANSCONF_WD(TRANSCODER_WD_0));
+ if (!(tmp & WD_TRANS_ENABLE))
+ return false;
+
+ tmp = intel_de_read(display,
+ WD_TRANS_FUNC_CTL(TRANSCODER_WD_0));
+
+ if (!(tmp & TRANS_WD_FUNC_ENABLE))
+ return false;
+
+ switch (tmp & WD_INPUT_SELECT_MASK) {
+ case WD_INPUT_PIPE_A:
+ pipe_mask |= BIT(PIPE_A);
+ break;
+ case WD_INPUT_PIPE_B:
+ pipe_mask |= BIT(PIPE_B);
+ break;
+ case WD_INPUT_PIPE_C:
+ pipe_mask |= BIT(PIPE_C);
+ break;
+ case WD_INPUT_PIPE_D:
+ pipe_mask |= BIT(PIPE_D);
+ break;
+ default:
+ MISSING_CASE(tmp & WD_INPUT_SELECT_MASK);
+ fallthrough;
+ }
+
+ if (pipe_mask == 0)
+ return false;
+
+ *pipe = ffs(pipe_mask) - 1;
+
+ return true;
+}
+
int intel_writeback_init(struct intel_display *display)
{
struct intel_encoder *encoder;
@@ -122,6 +170,7 @@ int intel_writeback_init(struct intel_display *display)
encoder->type = INTEL_OUTPUT_WRITEBACK;
encoder->pipe_mask = ~0;
encoder->cloneable = 0;
+ encoder->get_hw_state = intel_writeback_get_hw_state;
connector = &writeback_conn->connector;
ret = intel_writeback_connector_alloc(connector);
diff --git a/drivers/gpu/drm/i915/display/intel_writeback_reg.h b/drivers/gpu/drm/i915/display/intel_writeback_reg.h
index ffe302ef3dd9..5e7c6c99d191 100644
--- a/drivers/gpu/drm/i915/display/intel_writeback_reg.h
+++ b/drivers/gpu/drm/i915/display/intel_writeback_reg.h
@@ -19,6 +19,9 @@
/* Gen12 WD */
#define _MMIO_WD(tc, wd0, wd1) _MMIO_TRANS((tc) - TRANSCODER_WD_0, wd0, wd1)
+#define TRANSCONF_WD(tc) _MMIO_WD(tc,\
+ PIPE_WD0_OFFSET,\
+ PIPE_WD1_OFFSET)
#define WD_TRANS_ENABLE REG_BIT(31)
#define WD_TRANS_STATE REG_BIT(30)
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* Re: [PATCH v3 08/26] drm/i915/writeback: Define encoder->get_hw_state
2026-03-25 11:07 ` [PATCH v3 08/26] drm/i915/writeback: Define encoder->get_hw_state Suraj Kandpal
@ 2026-03-25 12:08 ` Ville Syrjälä
0 siblings, 0 replies; 60+ messages in thread
From: Ville Syrjälä @ 2026-03-25 12:08 UTC (permalink / raw)
To: Suraj Kandpal
Cc: intel-xe, intel-gfx, sowmiya.s, uma.shankar, swati2.sharma,
chaitanya.kumar.borah, arun.r.murthy
On Wed, Mar 25, 2026 at 04:37:26PM +0530, Suraj Kandpal wrote:
> Define the get_hw_state function for encoder which
> get's the encoder state, pipe config.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> .../gpu/drm/i915/display/intel_writeback.c | 49 +++++++++++++++++++
> .../drm/i915/display/intel_writeback_reg.h | 3 ++
> 2 files changed, 52 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
> index 765f62fa38f8..64769609aefe 100644
> --- a/drivers/gpu/drm/i915/display/intel_writeback.c
> +++ b/drivers/gpu/drm/i915/display/intel_writeback.c
> @@ -17,7 +17,9 @@
> #include "intel_de.h"
> #include "intel_display_driver.h"
> #include "intel_display_types.h"
> +#include "intel_display_utils.h"
> #include "intel_writeback.h"
> +#include "intel_writeback_reg.h"
>
> struct intel_writeback_connector {
> struct intel_connector connector;
> @@ -98,6 +100,52 @@ static const struct drm_connector_helper_funcs conn_helper_funcs = {
> .mode_valid = intel_writeback_mode_valid,
> };
>
> +static bool
> +intel_writeback_get_hw_state(struct intel_encoder *encoder,
> + enum pipe *pipe)
> +{
> + struct intel_display *display = to_intel_display(encoder);
> + u8 pipe_mask = 0;
> + u32 tmp;
> +
> + /* TODO need to be done for both the wd transcoder */
The encoder should know its transcoder.
> + tmp = intel_de_read(display,
> + TRANSCONF_WD(TRANSCODER_WD_0));
> + if (!(tmp & WD_TRANS_ENABLE))
> + return false;
Is this register really different enough from the norm to
warrant its own register definitions?
> +
> + tmp = intel_de_read(display,
> + WD_TRANS_FUNC_CTL(TRANSCODER_WD_0));
> +
> + if (!(tmp & TRANS_WD_FUNC_ENABLE))
> + return false;
> +
> + switch (tmp & WD_INPUT_SELECT_MASK) {
> + case WD_INPUT_PIPE_A:
> + pipe_mask |= BIT(PIPE_A);
> + break;
> + case WD_INPUT_PIPE_B:
> + pipe_mask |= BIT(PIPE_B);
> + break;
> + case WD_INPUT_PIPE_C:
> + pipe_mask |= BIT(PIPE_C);
> + break;
> + case WD_INPUT_PIPE_D:
> + pipe_mask |= BIT(PIPE_D);
> + break;
> + default:
> + MISSING_CASE(tmp & WD_INPUT_SELECT_MASK);
> + fallthrough;
> + }
> +
> + if (pipe_mask == 0)
> + return false;
> +
> + *pipe = ffs(pipe_mask) - 1;
What's the point of this pipe_mask?
> +
> + return true;
> +}
> +
> int intel_writeback_init(struct intel_display *display)
> {
> struct intel_encoder *encoder;
> @@ -122,6 +170,7 @@ int intel_writeback_init(struct intel_display *display)
> encoder->type = INTEL_OUTPUT_WRITEBACK;
> encoder->pipe_mask = ~0;
> encoder->cloneable = 0;
> + encoder->get_hw_state = intel_writeback_get_hw_state;
>
> connector = &writeback_conn->connector;
> ret = intel_writeback_connector_alloc(connector);
> diff --git a/drivers/gpu/drm/i915/display/intel_writeback_reg.h b/drivers/gpu/drm/i915/display/intel_writeback_reg.h
> index ffe302ef3dd9..5e7c6c99d191 100644
> --- a/drivers/gpu/drm/i915/display/intel_writeback_reg.h
> +++ b/drivers/gpu/drm/i915/display/intel_writeback_reg.h
> @@ -19,6 +19,9 @@
> /* Gen12 WD */
> #define _MMIO_WD(tc, wd0, wd1) _MMIO_TRANS((tc) - TRANSCODER_WD_0, wd0, wd1)
>
> +#define TRANSCONF_WD(tc) _MMIO_WD(tc,\
> + PIPE_WD0_OFFSET,\
> + PIPE_WD1_OFFSET)
> #define WD_TRANS_ENABLE REG_BIT(31)
> #define WD_TRANS_STATE REG_BIT(30)
>
> --
> 2.34.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH v3 09/26] drm/i915/writeback: Fill encoder->get_config
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (7 preceding siblings ...)
2026-03-25 11:07 ` [PATCH v3 08/26] drm/i915/writeback: Define encoder->get_hw_state Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 12:15 ` Ville Syrjälä
2026-03-25 11:07 ` [PATCH v3 10/26] drm/i915/writeback: Add private structure for writeback job Suraj Kandpal
` (18 subsequent siblings)
27 siblings, 1 reply; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal
Fill the encoder->get_config hook with relevant data which helps
verify state.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_writeback.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
index 64769609aefe..1df04538d48c 100644
--- a/drivers/gpu/drm/i915/display/intel_writeback.c
+++ b/drivers/gpu/drm/i915/display/intel_writeback.c
@@ -100,6 +100,14 @@ static const struct drm_connector_helper_funcs conn_helper_funcs = {
.mode_valid = intel_writeback_mode_valid,
};
+static void
+intel_writeback_get_config(struct intel_encoder *encoder,
+ struct intel_crtc_state *crtc_state)
+{
+ crtc_state->output_types |= BIT(INTEL_OUTPUT_WRITEBACK);
+ crtc_state->output_format = INTEL_OUTPUT_FORMAT_RGB;
+}
+
static bool
intel_writeback_get_hw_state(struct intel_encoder *encoder,
enum pipe *pipe)
@@ -170,6 +178,7 @@ int intel_writeback_init(struct intel_display *display)
encoder->type = INTEL_OUTPUT_WRITEBACK;
encoder->pipe_mask = ~0;
encoder->cloneable = 0;
+ encoder->get_config = intel_writeback_get_config;
encoder->get_hw_state = intel_writeback_get_hw_state;
connector = &writeback_conn->connector;
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* Re: [PATCH v3 09/26] drm/i915/writeback: Fill encoder->get_config
2026-03-25 11:07 ` [PATCH v3 09/26] drm/i915/writeback: Fill encoder->get_config Suraj Kandpal
@ 2026-03-25 12:15 ` Ville Syrjälä
2026-03-26 2:52 ` Kandpal, Suraj
0 siblings, 1 reply; 60+ messages in thread
From: Ville Syrjälä @ 2026-03-25 12:15 UTC (permalink / raw)
To: Suraj Kandpal
Cc: intel-xe, intel-gfx, sowmiya.s, uma.shankar, swati2.sharma,
chaitanya.kumar.borah, arun.r.murthy
On Wed, Mar 25, 2026 at 04:37:27PM +0530, Suraj Kandpal wrote:
> Fill the encoder->get_config hook with relevant data which helps
> verify state.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_writeback.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
> index 64769609aefe..1df04538d48c 100644
> --- a/drivers/gpu/drm/i915/display/intel_writeback.c
> +++ b/drivers/gpu/drm/i915/display/intel_writeback.c
> @@ -100,6 +100,14 @@ static const struct drm_connector_helper_funcs conn_helper_funcs = {
> .mode_valid = intel_writeback_mode_valid,
> };
>
> +static void
> +intel_writeback_get_config(struct intel_encoder *encoder,
> + struct intel_crtc_state *crtc_state)
> +{
> + crtc_state->output_types |= BIT(INTEL_OUTPUT_WRITEBACK);
> + crtc_state->output_format = INTEL_OUTPUT_FORMAT_RGB;
That should already be covered by hsw_get_pipe_config()
> +}
> +
> static bool
> intel_writeback_get_hw_state(struct intel_encoder *encoder,
> enum pipe *pipe)
> @@ -170,6 +178,7 @@ int intel_writeback_init(struct intel_display *display)
> encoder->type = INTEL_OUTPUT_WRITEBACK;
> encoder->pipe_mask = ~0;
> encoder->cloneable = 0;
> + encoder->get_config = intel_writeback_get_config;
> encoder->get_hw_state = intel_writeback_get_hw_state;
>
> connector = &writeback_conn->connector;
> --
> 2.34.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 60+ messages in thread* RE: [PATCH v3 09/26] drm/i915/writeback: Fill encoder->get_config
2026-03-25 12:15 ` Ville Syrjälä
@ 2026-03-26 2:52 ` Kandpal, Suraj
0 siblings, 0 replies; 60+ messages in thread
From: Kandpal, Suraj @ 2026-03-26 2:52 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
S, Sowmiya, Shankar, Uma, Sharma, Swati2, Borah, Chaitanya Kumar,
Murthy, Arun R
> -----Original Message-----
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Sent: Wednesday, March 25, 2026 5:46 PM
> To: Kandpal, Suraj <suraj.kandpal@intel.com>
> Cc: intel-xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; S, Sowmiya
> <sowmiya.s@intel.com>; Shankar, Uma <uma.shankar@intel.com>; Sharma,
> Swati2 <swati2.sharma@intel.com>; Borah, Chaitanya Kumar
> <chaitanya.kumar.borah@intel.com>; Murthy, Arun R
> <arun.r.murthy@intel.com>
> Subject: Re: [PATCH v3 09/26] drm/i915/writeback: Fill encoder->get_config
>
> On Wed, Mar 25, 2026 at 04:37:27PM +0530, Suraj Kandpal wrote:
> > Fill the encoder->get_config hook with relevant data which helps
> > verify state.
> >
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_writeback.c | 9 +++++++++
> > 1 file changed, 9 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c
> > b/drivers/gpu/drm/i915/display/intel_writeback.c
> > index 64769609aefe..1df04538d48c 100644
> > --- a/drivers/gpu/drm/i915/display/intel_writeback.c
> > +++ b/drivers/gpu/drm/i915/display/intel_writeback.c
> > @@ -100,6 +100,14 @@ static const struct drm_connector_helper_funcs
> conn_helper_funcs = {
> > .mode_valid = intel_writeback_mode_valid, };
> >
> > +static void
> > +intel_writeback_get_config(struct intel_encoder *encoder,
> > + struct intel_crtc_state *crtc_state) {
> > + crtc_state->output_types |= BIT(INTEL_OUTPUT_WRITEBACK);
> > + crtc_state->output_format = INTEL_OUTPUT_FORMAT_RGB;
>
> That should already be covered by hsw_get_pipe_config()
Let me have a look at it once and what modifications this function would require.
Regards,
Suraj Kandpal
>
> > +}
> > +
> > static bool
> > intel_writeback_get_hw_state(struct intel_encoder *encoder,
> > enum pipe *pipe)
> > @@ -170,6 +178,7 @@ int intel_writeback_init(struct intel_display
> *display)
> > encoder->type = INTEL_OUTPUT_WRITEBACK;
> > encoder->pipe_mask = ~0;
> > encoder->cloneable = 0;
> > + encoder->get_config = intel_writeback_get_config;
> > encoder->get_hw_state = intel_writeback_get_hw_state;
> >
> > connector = &writeback_conn->connector;
> > --
> > 2.34.1
>
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH v3 10/26] drm/i915/writeback: Add private structure for writeback job
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (8 preceding siblings ...)
2026-03-25 11:07 ` [PATCH v3 09/26] drm/i915/writeback: Fill encoder->get_config Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 12:17 ` Ville Syrjälä
2026-03-25 11:07 ` [PATCH v3 11/26] drm/i915/writeback: Define function for prepare and cleanup hooks Suraj Kandpal
` (17 subsequent siblings)
27 siblings, 1 reply; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal
Create intel_writeback_job to track drm_writback_job and other structure
we might need to complete the writeback job.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_writeback.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
index 1df04538d48c..02c61dfcacba 100644
--- a/drivers/gpu/drm/i915/display/intel_writeback.c
+++ b/drivers/gpu/drm/i915/display/intel_writeback.c
@@ -24,10 +24,17 @@
struct intel_writeback_connector {
struct intel_connector connector;
struct intel_encoder encoder;
+ struct intel_writeback_job *job;
enum transcoder trans;
int frame_num;
};
+struct intel_writeback_job {
+ struct drm_framebuffer *fb;
+ struct drm_writeback_connector *wb_connector;
+ struct i915_vma *vma;
+};
+
static const u32 writeback_formats[] = {
DRM_FORMAT_XYUV8888,
DRM_FORMAT_YUYV,
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* Re: [PATCH v3 10/26] drm/i915/writeback: Add private structure for writeback job
2026-03-25 11:07 ` [PATCH v3 10/26] drm/i915/writeback: Add private structure for writeback job Suraj Kandpal
@ 2026-03-25 12:17 ` Ville Syrjälä
2026-03-26 2:53 ` Kandpal, Suraj
0 siblings, 1 reply; 60+ messages in thread
From: Ville Syrjälä @ 2026-03-25 12:17 UTC (permalink / raw)
To: Suraj Kandpal
Cc: intel-xe, intel-gfx, sowmiya.s, uma.shankar, swati2.sharma,
chaitanya.kumar.borah, arun.r.murthy
On Wed, Mar 25, 2026 at 04:37:28PM +0530, Suraj Kandpal wrote:
> Create intel_writeback_job to track drm_writback_job and other structure
> we might need to complete the writeback job.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_writeback.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
> index 1df04538d48c..02c61dfcacba 100644
> --- a/drivers/gpu/drm/i915/display/intel_writeback.c
> +++ b/drivers/gpu/drm/i915/display/intel_writeback.c
> @@ -24,10 +24,17 @@
> struct intel_writeback_connector {
> struct intel_connector connector;
> struct intel_encoder encoder;
> + struct intel_writeback_job *job;
> enum transcoder trans;
> int frame_num;
> };
>
> +struct intel_writeback_job {
> + struct drm_framebuffer *fb;
> + struct drm_writeback_connector *wb_connector;
> + struct i915_vma *vma;
> +};
>
Please squash with whatever patch that actually uses this stuff.
> static const u32 writeback_formats[] = {
> DRM_FORMAT_XYUV8888,
> DRM_FORMAT_YUYV,
> --
> 2.34.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 60+ messages in thread* RE: [PATCH v3 10/26] drm/i915/writeback: Add private structure for writeback job
2026-03-25 12:17 ` Ville Syrjälä
@ 2026-03-26 2:53 ` Kandpal, Suraj
0 siblings, 0 replies; 60+ messages in thread
From: Kandpal, Suraj @ 2026-03-26 2:53 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
S, Sowmiya, Shankar, Uma, Sharma, Swati2, Borah, Chaitanya Kumar,
Murthy, Arun R
> Subject: Re: [PATCH v3 10/26] drm/i915/writeback: Add private structure for
> writeback job
>
> On Wed, Mar 25, 2026 at 04:37:28PM +0530, Suraj Kandpal wrote:
> > Create intel_writeback_job to track drm_writback_job and other
> > structure we might need to complete the writeback job.
> >
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_writeback.c | 7 +++++++
> > 1 file changed, 7 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c
> > b/drivers/gpu/drm/i915/display/intel_writeback.c
> > index 1df04538d48c..02c61dfcacba 100644
> > --- a/drivers/gpu/drm/i915/display/intel_writeback.c
> > +++ b/drivers/gpu/drm/i915/display/intel_writeback.c
> > @@ -24,10 +24,17 @@
> > struct intel_writeback_connector {
> > struct intel_connector connector;
> > struct intel_encoder encoder;
> > + struct intel_writeback_job *job;
> > enum transcoder trans;
> > int frame_num;
> > };
> >
> > +struct intel_writeback_job {
> > + struct drm_framebuffer *fb;
> > + struct drm_writeback_connector *wb_connector;
> > + struct i915_vma *vma;
> > +};
> >
>
> Please squash with whatever patch that actually uses this stuff.
>
Sure.
Regards,
Suraj Kandpal
> > static const u32 writeback_formats[] = {
> > DRM_FORMAT_XYUV8888,
> > DRM_FORMAT_YUYV,
> > --
> > 2.34.1
>
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH v3 11/26] drm/i915/writeback: Define function for prepare and cleanup hooks
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (9 preceding siblings ...)
2026-03-25 11:07 ` [PATCH v3 10/26] drm/i915/writeback: Add private structure for writeback job Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 12:29 ` Ville Syrjälä
2026-03-25 11:07 ` [PATCH v3 12/26] drm/i915/writeback: Define compute_config for writeback Suraj Kandpal
` (16 subsequent siblings)
27 siblings, 1 reply; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal
Define function for prepare and cleanup hooks which help map
and unmap drm framebuffer since we need these address to do
register writes in WD_SURF and WD_STRIDE register.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
.../gpu/drm/i915/display/intel_writeback.c | 64 +++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
index 02c61dfcacba..4a40fda639ca 100644
--- a/drivers/gpu/drm/i915/display/intel_writeback.c
+++ b/drivers/gpu/drm/i915/display/intel_writeback.c
@@ -4,13 +4,16 @@
*/
#include <linux/slab.h>
+#include <linux/err.h>
#include <drm/drm_atomic_state_helper.h>
#include <drm/drm_writeback.h>
#include <drm/drm_modeset_helper_vtables.h>
#include <drm/drm_probe_helper.h>
+#include <drm/drm_print.h>
#include <drm/drm_fourcc.h>
#include <drm/drm_encoder.h>
#include <drm/drm_edid.h>
+#include <drm/drm_gem_framebuffer_helper.h>
#include "intel_atomic.h"
#include "intel_connector.h"
@@ -18,6 +21,7 @@
#include "intel_display_driver.h"
#include "intel_display_types.h"
#include "intel_display_utils.h"
+#include "intel_fb_pin.h"
#include "intel_writeback.h"
#include "intel_writeback_reg.h"
@@ -92,6 +96,64 @@ static int intel_writeback_get_modes(struct drm_connector *connector)
return drm_add_modes_noedid(connector, 3840, 2160);
}
+static int intel_writeback_prepare_job(struct drm_connector *connector,
+ struct drm_writeback_job *job)
+{
+ struct i915_vma *vma;
+ struct intel_writeback_job *wb_job;
+ unsigned long out_flags = 0;
+ const struct i915_gtt_view view = {
+ .type = I915_GTT_VIEW_NORMAL,
+ };
+ int ret;
+
+ if (!job->fb)
+ return 0;
+
+ if (job->fb->modifier != DRM_FORMAT_MOD_LINEAR)
+ return -EINVAL;
+
+ wb_job = kzalloc(sizeof(*wb_job), GFP_KERNEL);
+ if (!wb_job)
+ return -ENOMEM;
+
+ vma = intel_fb_pin_to_ggtt(job->fb, &view, 4 * 1024, 0, 0, true, &out_flags);
+ if (IS_ERR(vma)) {
+ drm_err(job->fb->dev, "Failed to map framebuffer: %d\n", ret);
+ ret = PTR_ERR(vma);
+ goto err;
+ }
+
+ wb_job->fb = job->fb;
+ wb_job->vma = vma;
+ drm_framebuffer_get(wb_job->fb);
+ job->priv = wb_job;
+
+ return 0;
+
+err:
+ kfree(wb_job);
+ return ret;
+}
+
+static void intel_writeback_cleanup_job(struct drm_connector *connector,
+ struct drm_writeback_job *job)
+{
+ struct intel_writeback_job *wb_job = job->priv;
+ struct i915_vma *vma;
+ unsigned long out_flags = 0;
+
+ if (!job->fb)
+ return;
+
+ vma = wb_job->vma;
+ wb_job->vma = NULL;
+ intel_fb_unpin_vma(vma, out_flags);
+ drm_framebuffer_put(wb_job->fb);
+ kfree(wb_job);
+ job->priv = NULL;
+}
+
static const struct drm_encoder_funcs drm_writeback_encoder_funcs = {
.destroy = drm_encoder_cleanup,
};
@@ -105,6 +167,8 @@ const struct drm_connector_funcs conn_funcs = {
static const struct drm_connector_helper_funcs conn_helper_funcs = {
.get_modes = intel_writeback_get_modes,
.mode_valid = intel_writeback_mode_valid,
+ .prepare_writeback_job = intel_writeback_prepare_job,
+ .cleanup_writeback_job = intel_writeback_cleanup_job,
};
static void
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* Re: [PATCH v3 11/26] drm/i915/writeback: Define function for prepare and cleanup hooks
2026-03-25 11:07 ` [PATCH v3 11/26] drm/i915/writeback: Define function for prepare and cleanup hooks Suraj Kandpal
@ 2026-03-25 12:29 ` Ville Syrjälä
0 siblings, 0 replies; 60+ messages in thread
From: Ville Syrjälä @ 2026-03-25 12:29 UTC (permalink / raw)
To: Suraj Kandpal
Cc: intel-xe, intel-gfx, sowmiya.s, uma.shankar, swati2.sharma,
chaitanya.kumar.borah, arun.r.murthy
On Wed, Mar 25, 2026 at 04:37:29PM +0530, Suraj Kandpal wrote:
> Define function for prepare and cleanup hooks which help map
> and unmap drm framebuffer since we need these address to do
> register writes in WD_SURF and WD_STRIDE register.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> .../gpu/drm/i915/display/intel_writeback.c | 64 +++++++++++++++++++
> 1 file changed, 64 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
> index 02c61dfcacba..4a40fda639ca 100644
> --- a/drivers/gpu/drm/i915/display/intel_writeback.c
> +++ b/drivers/gpu/drm/i915/display/intel_writeback.c
> @@ -4,13 +4,16 @@
> */
>
> #include <linux/slab.h>
> +#include <linux/err.h>
> #include <drm/drm_atomic_state_helper.h>
> #include <drm/drm_writeback.h>
> #include <drm/drm_modeset_helper_vtables.h>
> #include <drm/drm_probe_helper.h>
> +#include <drm/drm_print.h>
> #include <drm/drm_fourcc.h>
> #include <drm/drm_encoder.h>
> #include <drm/drm_edid.h>
> +#include <drm/drm_gem_framebuffer_helper.h>
>
> #include "intel_atomic.h"
> #include "intel_connector.h"
> @@ -18,6 +21,7 @@
> #include "intel_display_driver.h"
> #include "intel_display_types.h"
> #include "intel_display_utils.h"
> +#include "intel_fb_pin.h"
> #include "intel_writeback.h"
> #include "intel_writeback_reg.h"
>
> @@ -92,6 +96,64 @@ static int intel_writeback_get_modes(struct drm_connector *connector)
> return drm_add_modes_noedid(connector, 3840, 2160);
> }
>
> +static int intel_writeback_prepare_job(struct drm_connector *connector,
> + struct drm_writeback_job *job)
> +{
> + struct i915_vma *vma;
> + struct intel_writeback_job *wb_job;
> + unsigned long out_flags = 0;
> + const struct i915_gtt_view view = {
> + .type = I915_GTT_VIEW_NORMAL,
> + };
> + int ret;
> +
> + if (!job->fb)
> + return 0;
> +
> + if (job->fb->modifier != DRM_FORMAT_MOD_LINEAR)
> + return -EINVAL;
> +
> + wb_job = kzalloc(sizeof(*wb_job), GFP_KERNEL);
> + if (!wb_job)
> + return -ENOMEM;
> +
> + vma = intel_fb_pin_to_ggtt(job->fb, &view, 4 * 1024, 0, 0, true, &out_flags);
> + if (IS_ERR(vma)) {
> + drm_err(job->fb->dev, "Failed to map framebuffer: %d\n", ret);
> + ret = PTR_ERR(vma);
> + goto err;
> + }
This stuff needs something similar to intel_plane_pin_fb().
> +
> + wb_job->fb = job->fb;
> + wb_job->vma = vma;
> + drm_framebuffer_get(wb_job->fb);
> + job->priv = wb_job;
> +
> + return 0;
> +
> +err:
> + kfree(wb_job);
> + return ret;
> +}
> +
> +static void intel_writeback_cleanup_job(struct drm_connector *connector,
> + struct drm_writeback_job *job)
> +{
> + struct intel_writeback_job *wb_job = job->priv;
> + struct i915_vma *vma;
> + unsigned long out_flags = 0;
> +
> + if (!job->fb)
> + return;
> +
> + vma = wb_job->vma;
> + wb_job->vma = NULL;
> + intel_fb_unpin_vma(vma, out_flags);
> + drm_framebuffer_put(wb_job->fb);
> + kfree(wb_job);
> + job->priv = NULL;
> +}
> +
> static const struct drm_encoder_funcs drm_writeback_encoder_funcs = {
> .destroy = drm_encoder_cleanup,
> };
> @@ -105,6 +167,8 @@ const struct drm_connector_funcs conn_funcs = {
> static const struct drm_connector_helper_funcs conn_helper_funcs = {
> .get_modes = intel_writeback_get_modes,
> .mode_valid = intel_writeback_mode_valid,
> + .prepare_writeback_job = intel_writeback_prepare_job,
> + .cleanup_writeback_job = intel_writeback_cleanup_job,
> };
>
> static void
> --
> 2.34.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH v3 12/26] drm/i915/writeback: Define compute_config for writeback
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (10 preceding siblings ...)
2026-03-25 11:07 ` [PATCH v3 11/26] drm/i915/writeback: Define function for prepare and cleanup hooks Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 12:19 ` Ville Syrjälä
2026-03-25 11:07 ` [PATCH v3 13/26] drm/i915/writeback: Define function for connector function detect Suraj Kandpal
` (15 subsequent siblings)
27 siblings, 1 reply; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal
Define the compute config function where we assign the output_type
and add the transcoder that needs to be used. We currently assign
one WD0 transcoder.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
.../gpu/drm/i915/display/intel_writeback.c | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
index 4a40fda639ca..b9350d97de09 100644
--- a/drivers/gpu/drm/i915/display/intel_writeback.c
+++ b/drivers/gpu/drm/i915/display/intel_writeback.c
@@ -171,6 +171,25 @@ static const struct drm_connector_helper_funcs conn_helper_funcs = {
.cleanup_writeback_job = intel_writeback_cleanup_job,
};
+static int
+intel_writeback_compute_config(struct intel_encoder *encoder,
+ struct intel_crtc_state *pipe_config,
+ struct drm_connector_state *conn_state)
+{
+ struct intel_display *display = to_intel_display(encoder);
+
+ if (!conn_state->writeback_job)
+ return 0;
+
+ if (HAS_TRANSCODER(display, TRANSCODER_WD_0))
+ pipe_config->cpu_transcoder = TRANSCODER_WD_0;
+
+ pipe_config->output_types |= BIT(INTEL_OUTPUT_WRITEBACK);
+ pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
+
+ return 0;
+}
+
static void
intel_writeback_get_config(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state)
@@ -251,6 +270,7 @@ int intel_writeback_init(struct intel_display *display)
encoder->cloneable = 0;
encoder->get_config = intel_writeback_get_config;
encoder->get_hw_state = intel_writeback_get_hw_state;
+ encoder->compute_config = intel_writeback_compute_config;
connector = &writeback_conn->connector;
ret = intel_writeback_connector_alloc(connector);
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* Re: [PATCH v3 12/26] drm/i915/writeback: Define compute_config for writeback
2026-03-25 11:07 ` [PATCH v3 12/26] drm/i915/writeback: Define compute_config for writeback Suraj Kandpal
@ 2026-03-25 12:19 ` Ville Syrjälä
2026-03-26 3:38 ` Kandpal, Suraj
0 siblings, 1 reply; 60+ messages in thread
From: Ville Syrjälä @ 2026-03-25 12:19 UTC (permalink / raw)
To: Suraj Kandpal
Cc: intel-xe, intel-gfx, sowmiya.s, uma.shankar, swati2.sharma,
chaitanya.kumar.borah, arun.r.murthy
On Wed, Mar 25, 2026 at 04:37:30PM +0530, Suraj Kandpal wrote:
> Define the compute config function where we assign the output_type
> and add the transcoder that needs to be used. We currently assign
> one WD0 transcoder.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> .../gpu/drm/i915/display/intel_writeback.c | 20 +++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
> index 4a40fda639ca..b9350d97de09 100644
> --- a/drivers/gpu/drm/i915/display/intel_writeback.c
> +++ b/drivers/gpu/drm/i915/display/intel_writeback.c
> @@ -171,6 +171,25 @@ static const struct drm_connector_helper_funcs conn_helper_funcs = {
> .cleanup_writeback_job = intel_writeback_cleanup_job,
> };
>
> +static int
> +intel_writeback_compute_config(struct intel_encoder *encoder,
> + struct intel_crtc_state *pipe_config,
'crtc_state'
> + struct drm_connector_state *conn_state)
> +{
> + struct intel_display *display = to_intel_display(encoder);
> +
> + if (!conn_state->writeback_job)
> + return 0;
> +
> + if (HAS_TRANSCODER(display, TRANSCODER_WD_0))
If we get here and don't have the transcoder then the nothing makes
sense anymore.
> + pipe_config->cpu_transcoder = TRANSCODER_WD_0;
> +
> + pipe_config->output_types |= BIT(INTEL_OUTPUT_WRITEBACK);
> + pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
> +
> + return 0;
> +}
> +
> static void
> intel_writeback_get_config(struct intel_encoder *encoder,
> struct intel_crtc_state *crtc_state)
> @@ -251,6 +270,7 @@ int intel_writeback_init(struct intel_display *display)
> encoder->cloneable = 0;
> encoder->get_config = intel_writeback_get_config;
> encoder->get_hw_state = intel_writeback_get_hw_state;
> + encoder->compute_config = intel_writeback_compute_config;
>
> connector = &writeback_conn->connector;
> ret = intel_writeback_connector_alloc(connector);
> --
> 2.34.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 60+ messages in thread* RE: [PATCH v3 12/26] drm/i915/writeback: Define compute_config for writeback
2026-03-25 12:19 ` Ville Syrjälä
@ 2026-03-26 3:38 ` Kandpal, Suraj
0 siblings, 0 replies; 60+ messages in thread
From: Kandpal, Suraj @ 2026-03-26 3:38 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
S, Sowmiya, Shankar, Uma, Sharma, Swati2, Borah, Chaitanya Kumar,
Murthy, Arun R
> Subject: Re: [PATCH v3 12/26] drm/i915/writeback: Define compute_config
> for writeback
>
> On Wed, Mar 25, 2026 at 04:37:30PM +0530, Suraj Kandpal wrote:
> > Define the compute config function where we assign the output_type and
> > add the transcoder that needs to be used. We currently assign one WD0
> > transcoder.
> >
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > ---
> > .../gpu/drm/i915/display/intel_writeback.c | 20 +++++++++++++++++++
> > 1 file changed, 20 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c
> > b/drivers/gpu/drm/i915/display/intel_writeback.c
> > index 4a40fda639ca..b9350d97de09 100644
> > --- a/drivers/gpu/drm/i915/display/intel_writeback.c
> > +++ b/drivers/gpu/drm/i915/display/intel_writeback.c
> > @@ -171,6 +171,25 @@ static const struct drm_connector_helper_funcs
> conn_helper_funcs = {
> > .cleanup_writeback_job = intel_writeback_cleanup_job, };
> >
> > +static int
> > +intel_writeback_compute_config(struct intel_encoder *encoder,
> > + struct intel_crtc_state *pipe_config,
>
> 'crtc_state'
Sure will rename
>
> > + struct drm_connector_state *conn_state) {
> > + struct intel_display *display = to_intel_display(encoder);
> > +
> > + if (!conn_state->writeback_job)
> > + return 0;
> > +
> > + if (HAS_TRANSCODER(display, TRANSCODER_WD_0))
>
> If we get here and don't have the transcoder then the nothing makes sense
> anymore.
True will fix this
Regards,
Suraj Kandpal
>
> > + pipe_config->cpu_transcoder = TRANSCODER_WD_0;
> > +
> > + pipe_config->output_types |= BIT(INTEL_OUTPUT_WRITEBACK);
> > + pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
> > +
> > + return 0;
> > +}
> > +
> > static void
> > intel_writeback_get_config(struct intel_encoder *encoder,
> > struct intel_crtc_state *crtc_state) @@ -251,6
> +270,7 @@ int
> > intel_writeback_init(struct intel_display *display)
> > encoder->cloneable = 0;
> > encoder->get_config = intel_writeback_get_config;
> > encoder->get_hw_state = intel_writeback_get_hw_state;
> > + encoder->compute_config = intel_writeback_compute_config;
> >
> > connector = &writeback_conn->connector;
> > ret = intel_writeback_connector_alloc(connector);
> > --
> > 2.34.1
>
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH v3 13/26] drm/i915/writeback: Define function for connector function detect
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (11 preceding siblings ...)
2026-03-25 11:07 ` [PATCH v3 12/26] drm/i915/writeback: Define compute_config for writeback Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 12:22 ` Ville Syrjälä
2026-03-25 11:07 ` [PATCH v3 14/26] drm/i915/writeback: Define function to destroy writeback connector Suraj Kandpal
` (14 subsequent siblings)
27 siblings, 1 reply; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal
detect function always returns connector_status_connected if
writeback connector has been initialized.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_writeback.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
index b9350d97de09..e677cdfa6207 100644
--- a/drivers/gpu/drm/i915/display/intel_writeback.c
+++ b/drivers/gpu/drm/i915/display/intel_writeback.c
@@ -154,11 +154,19 @@ static void intel_writeback_cleanup_job(struct drm_connector *connector,
job->priv = NULL;
}
+static enum drm_connector_status
+intel_writeback_detect(struct drm_connector *connector,
+ bool force)
+{
+ return connector_status_connected;
+}
+
static const struct drm_encoder_funcs drm_writeback_encoder_funcs = {
.destroy = drm_encoder_cleanup,
};
const struct drm_connector_funcs conn_funcs = {
+ .detect = intel_writeback_detect,
.fill_modes = drm_helper_probe_single_connector_modes,
.atomic_duplicate_state = intel_digital_connector_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* Re: [PATCH v3 13/26] drm/i915/writeback: Define function for connector function detect
2026-03-25 11:07 ` [PATCH v3 13/26] drm/i915/writeback: Define function for connector function detect Suraj Kandpal
@ 2026-03-25 12:22 ` Ville Syrjälä
0 siblings, 0 replies; 60+ messages in thread
From: Ville Syrjälä @ 2026-03-25 12:22 UTC (permalink / raw)
To: Suraj Kandpal
Cc: intel-xe, intel-gfx, sowmiya.s, uma.shankar, swati2.sharma,
chaitanya.kumar.borah, arun.r.murthy
On Wed, Mar 25, 2026 at 04:37:31PM +0530, Suraj Kandpal wrote:
> detect function always returns connector_status_connected if
> writeback connector has been initialized.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_writeback.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
> index b9350d97de09..e677cdfa6207 100644
> --- a/drivers/gpu/drm/i915/display/intel_writeback.c
> +++ b/drivers/gpu/drm/i915/display/intel_writeback.c
> @@ -154,11 +154,19 @@ static void intel_writeback_cleanup_job(struct drm_connector *connector,
> job->priv = NULL;
> }
>
> +static enum drm_connector_status
> +intel_writeback_detect(struct drm_connector *connector,
> + bool force)
> +{
> + return connector_status_connected;
Pointless. See detect_connector_status() in the probe helper.
> +}
> +
> static const struct drm_encoder_funcs drm_writeback_encoder_funcs = {
> .destroy = drm_encoder_cleanup,
> };
>
> const struct drm_connector_funcs conn_funcs = {
> + .detect = intel_writeback_detect,
> .fill_modes = drm_helper_probe_single_connector_modes,
> .atomic_duplicate_state = intel_digital_connector_duplicate_state,
> .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
> --
> 2.34.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH v3 14/26] drm/i915/writeback: Define function to destroy writeback connector
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (12 preceding siblings ...)
2026-03-25 11:07 ` [PATCH v3 13/26] drm/i915/writeback: Define function for connector function detect Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 12:23 ` Ville Syrjälä
2026-03-25 11:07 ` [PATCH v3 15/26] drm/i915/writeback: Add connector atomic check Suraj Kandpal
` (13 subsequent siblings)
27 siblings, 1 reply; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal
Define function to destroy the drm_writbeack_connector and
drm_connector associated with it.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_writeback.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
index e677cdfa6207..86b53e4603ae 100644
--- a/drivers/gpu/drm/i915/display/intel_writeback.c
+++ b/drivers/gpu/drm/i915/display/intel_writeback.c
@@ -161,6 +161,12 @@ intel_writeback_detect(struct drm_connector *connector,
return connector_status_connected;
}
+static void intel_writeback_connector_destroy(struct drm_connector *connector)
+{
+ drm_connector_cleanup(connector);
+ kfree(connector);
+}
+
static const struct drm_encoder_funcs drm_writeback_encoder_funcs = {
.destroy = drm_encoder_cleanup,
};
@@ -170,6 +176,7 @@ const struct drm_connector_funcs conn_funcs = {
.fill_modes = drm_helper_probe_single_connector_modes,
.atomic_duplicate_state = intel_digital_connector_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
+ .destroy = intel_writeback_connector_destroy,
};
static const struct drm_connector_helper_funcs conn_helper_funcs = {
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* Re: [PATCH v3 14/26] drm/i915/writeback: Define function to destroy writeback connector
2026-03-25 11:07 ` [PATCH v3 14/26] drm/i915/writeback: Define function to destroy writeback connector Suraj Kandpal
@ 2026-03-25 12:23 ` Ville Syrjälä
2026-03-26 3:39 ` Kandpal, Suraj
0 siblings, 1 reply; 60+ messages in thread
From: Ville Syrjälä @ 2026-03-25 12:23 UTC (permalink / raw)
To: Suraj Kandpal
Cc: intel-xe, intel-gfx, sowmiya.s, uma.shankar, swati2.sharma,
chaitanya.kumar.borah, arun.r.murthy
On Wed, Mar 25, 2026 at 04:37:32PM +0530, Suraj Kandpal wrote:
> Define function to destroy the drm_writbeack_connector and
> drm_connector associated with it.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_writeback.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
> index e677cdfa6207..86b53e4603ae 100644
> --- a/drivers/gpu/drm/i915/display/intel_writeback.c
> +++ b/drivers/gpu/drm/i915/display/intel_writeback.c
> @@ -161,6 +161,12 @@ intel_writeback_detect(struct drm_connector *connector,
> return connector_status_connected;
> }
>
> +static void intel_writeback_connector_destroy(struct drm_connector *connector)
> +{
> + drm_connector_cleanup(connector);
> + kfree(connector);
> +}
Please squash with the patch that added the init/allocation.
> +
> static const struct drm_encoder_funcs drm_writeback_encoder_funcs = {
> .destroy = drm_encoder_cleanup,
> };
> @@ -170,6 +176,7 @@ const struct drm_connector_funcs conn_funcs = {
> .fill_modes = drm_helper_probe_single_connector_modes,
> .atomic_duplicate_state = intel_digital_connector_duplicate_state,
> .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
> + .destroy = intel_writeback_connector_destroy,
> };
>
> static const struct drm_connector_helper_funcs conn_helper_funcs = {
> --
> 2.34.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 60+ messages in thread* RE: [PATCH v3 14/26] drm/i915/writeback: Define function to destroy writeback connector
2026-03-25 12:23 ` Ville Syrjälä
@ 2026-03-26 3:39 ` Kandpal, Suraj
0 siblings, 0 replies; 60+ messages in thread
From: Kandpal, Suraj @ 2026-03-26 3:39 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
S, Sowmiya, Shankar, Uma, Sharma, Swati2, Borah, Chaitanya Kumar,
Murthy, Arun R
> Subject: Re: [PATCH v3 14/26] drm/i915/writeback: Define function to destroy
> writeback connector
>
> On Wed, Mar 25, 2026 at 04:37:32PM +0530, Suraj Kandpal wrote:
> > Define function to destroy the drm_writbeack_connector and
> > drm_connector associated with it.
> >
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_writeback.c | 7 +++++++
> > 1 file changed, 7 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c
> > b/drivers/gpu/drm/i915/display/intel_writeback.c
> > index e677cdfa6207..86b53e4603ae 100644
> > --- a/drivers/gpu/drm/i915/display/intel_writeback.c
> > +++ b/drivers/gpu/drm/i915/display/intel_writeback.c
> > @@ -161,6 +161,12 @@ intel_writeback_detect(struct drm_connector
> *connector,
> > return connector_status_connected;
> > }
> >
> > +static void intel_writeback_connector_destroy(struct drm_connector
> > +*connector) {
> > + drm_connector_cleanup(connector);
> > + kfree(connector);
> > +}
>
> Please squash with the patch that added the init/allocation.
Will do.
Regards,
Suraj Kandpal
>
> > +
> > static const struct drm_encoder_funcs drm_writeback_encoder_funcs = {
> > .destroy = drm_encoder_cleanup,
> > };
> > @@ -170,6 +176,7 @@ const struct drm_connector_funcs conn_funcs = {
> > .fill_modes = drm_helper_probe_single_connector_modes,
> > .atomic_duplicate_state = intel_digital_connector_duplicate_state,
> > .atomic_destroy_state =
> drm_atomic_helper_connector_destroy_state,
> > + .destroy = intel_writeback_connector_destroy,
> > };
> >
> > static const struct drm_connector_helper_funcs conn_helper_funcs = {
> > --
> > 2.34.1
>
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH v3 15/26] drm/i915/writeback: Add connector atomic check
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (13 preceding siblings ...)
2026-03-25 11:07 ` [PATCH v3 14/26] drm/i915/writeback: Define function to destroy writeback connector Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 12:25 ` Ville Syrjälä
2026-03-25 11:07 ` [PATCH v3 16/26] drm/i915/writeback: Add writeback to xe Makefile Suraj Kandpal
` (12 subsequent siblings)
27 siblings, 1 reply; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal
Add connector helper function for atomic check which sets the
mode_changed bit and checks if pixel format of fb is valid or not.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
.../gpu/drm/i915/display/intel_writeback.c | 49 +++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
index 86b53e4603ae..ba4c162847c8 100644
--- a/drivers/gpu/drm/i915/display/intel_writeback.c
+++ b/drivers/gpu/drm/i915/display/intel_writeback.c
@@ -167,6 +167,54 @@ static void intel_writeback_connector_destroy(struct drm_connector *connector)
kfree(connector);
}
+static int intel_writeback_check_format(u32 format)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(writeback_formats); i++) {
+ if (writeback_formats[i] == format)
+ return 0;
+ }
+
+ return -EINVAL;
+}
+
+static int intel_writeback_atomic_check(struct drm_connector *connector,
+ struct drm_atomic_state *state)
+{
+ struct drm_connector_state *conn_state =
+ drm_atomic_get_new_connector_state(state, connector);
+ struct drm_crtc_state *crtc_state;
+ struct drm_framebuffer *fb;
+ int ret;
+
+ /* We return 0 since this is called while disabling writeback encoder */
+ if (!conn_state->crtc)
+ return 0;
+
+ /* We do not allow a blank commit when using writeback connector */
+ if (!conn_state->writeback_job)
+ return -EINVAL;
+
+ fb = conn_state->writeback_job->fb;
+ if (!fb)
+ return -EINVAL;
+
+ crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);
+ if (fb->width != crtc_state->mode.hdisplay ||
+ fb->height != crtc_state->mode.vdisplay)
+ return -EINVAL;
+
+ ret = intel_writeback_check_format(fb->format->format);
+ if (ret) {
+ drm_dbg_kms(connector->dev,
+ "Unsupported drm format sent in writeback job\n");
+ return ret;
+ }
+
+ return 0;
+}
+
static const struct drm_encoder_funcs drm_writeback_encoder_funcs = {
.destroy = drm_encoder_cleanup,
};
@@ -182,6 +230,7 @@ const struct drm_connector_funcs conn_funcs = {
static const struct drm_connector_helper_funcs conn_helper_funcs = {
.get_modes = intel_writeback_get_modes,
.mode_valid = intel_writeback_mode_valid,
+ .atomic_check = intel_writeback_atomic_check,
.prepare_writeback_job = intel_writeback_prepare_job,
.cleanup_writeback_job = intel_writeback_cleanup_job,
};
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* Re: [PATCH v3 15/26] drm/i915/writeback: Add connector atomic check
2026-03-25 11:07 ` [PATCH v3 15/26] drm/i915/writeback: Add connector atomic check Suraj Kandpal
@ 2026-03-25 12:25 ` Ville Syrjälä
2026-03-26 3:43 ` Kandpal, Suraj
0 siblings, 1 reply; 60+ messages in thread
From: Ville Syrjälä @ 2026-03-25 12:25 UTC (permalink / raw)
To: Suraj Kandpal
Cc: intel-xe, intel-gfx, sowmiya.s, uma.shankar, swati2.sharma,
chaitanya.kumar.borah, arun.r.murthy
On Wed, Mar 25, 2026 at 04:37:33PM +0530, Suraj Kandpal wrote:
> Add connector helper function for atomic check which sets the
> mode_changed bit and checks if pixel format of fb is valid or not.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> .../gpu/drm/i915/display/intel_writeback.c | 49 +++++++++++++++++++
> 1 file changed, 49 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
> index 86b53e4603ae..ba4c162847c8 100644
> --- a/drivers/gpu/drm/i915/display/intel_writeback.c
> +++ b/drivers/gpu/drm/i915/display/intel_writeback.c
> @@ -167,6 +167,54 @@ static void intel_writeback_connector_destroy(struct drm_connector *connector)
> kfree(connector);
> }
>
> +static int intel_writeback_check_format(u32 format)
> +{
> + int i;
> +
> + for (i = 0; i < ARRAY_SIZE(writeback_formats); i++) {
> + if (writeback_formats[i] == format)
> + return 0;
> + }
> +
> + return -EINVAL;
> +}
> +
> +static int intel_writeback_atomic_check(struct drm_connector *connector,
> + struct drm_atomic_state *state)
> +{
> + struct drm_connector_state *conn_state =
> + drm_atomic_get_new_connector_state(state, connector);
> + struct drm_crtc_state *crtc_state;
> + struct drm_framebuffer *fb;
> + int ret;
> +
> + /* We return 0 since this is called while disabling writeback encoder */
> + if (!conn_state->crtc)
> + return 0;
> +
> + /* We do not allow a blank commit when using writeback connector */
> + if (!conn_state->writeback_job)
> + return -EINVAL;
> +
> + fb = conn_state->writeback_job->fb;
> + if (!fb)
> + return -EINVAL;
> +
> + crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);
> + if (fb->width != crtc_state->mode.hdisplay ||
> + fb->height != crtc_state->mode.vdisplay)
> + return -EINVAL;
> +
> + ret = intel_writeback_check_format(fb->format->format);
> + if (ret) {
> + drm_dbg_kms(connector->dev,
> + "Unsupported drm format sent in writeback job\n");
> + return ret;
> + }
Pretty much all of this look like something that belongs
in the core/helpers.
> +
> + return 0;
> +}
> +
> static const struct drm_encoder_funcs drm_writeback_encoder_funcs = {
> .destroy = drm_encoder_cleanup,
> };
> @@ -182,6 +230,7 @@ const struct drm_connector_funcs conn_funcs = {
> static const struct drm_connector_helper_funcs conn_helper_funcs = {
> .get_modes = intel_writeback_get_modes,
> .mode_valid = intel_writeback_mode_valid,
> + .atomic_check = intel_writeback_atomic_check,
> .prepare_writeback_job = intel_writeback_prepare_job,
> .cleanup_writeback_job = intel_writeback_cleanup_job,
> };
> --
> 2.34.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 60+ messages in thread* RE: [PATCH v3 15/26] drm/i915/writeback: Add connector atomic check
2026-03-25 12:25 ` Ville Syrjälä
@ 2026-03-26 3:43 ` Kandpal, Suraj
0 siblings, 0 replies; 60+ messages in thread
From: Kandpal, Suraj @ 2026-03-26 3:43 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
S, Sowmiya, Shankar, Uma, Sharma, Swati2, Borah, Chaitanya Kumar,
Murthy, Arun R
> Subject: Re: [PATCH v3 15/26] drm/i915/writeback: Add connector atomic
> check
>
> On Wed, Mar 25, 2026 at 04:37:33PM +0530, Suraj Kandpal wrote:
> > Add connector helper function for atomic check which sets the
> > mode_changed bit and checks if pixel format of fb is valid or not.
> >
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > ---
> > .../gpu/drm/i915/display/intel_writeback.c | 49 +++++++++++++++++++
> > 1 file changed, 49 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c
> > b/drivers/gpu/drm/i915/display/intel_writeback.c
> > index 86b53e4603ae..ba4c162847c8 100644
> > --- a/drivers/gpu/drm/i915/display/intel_writeback.c
> > +++ b/drivers/gpu/drm/i915/display/intel_writeback.c
> > @@ -167,6 +167,54 @@ static void
> intel_writeback_connector_destroy(struct drm_connector *connector)
> > kfree(connector);
> > }
> >
> > +static int intel_writeback_check_format(u32 format) {
> > + int i;
> > +
> > + for (i = 0; i < ARRAY_SIZE(writeback_formats); i++) {
> > + if (writeback_formats[i] == format)
> > + return 0;
> > + }
> > +
> > + return -EINVAL;
> > +}
> > +
> > +static int intel_writeback_atomic_check(struct drm_connector *connector,
> > + struct drm_atomic_state *state)
> > +{
> > + struct drm_connector_state *conn_state =
> > + drm_atomic_get_new_connector_state(state, connector);
> > + struct drm_crtc_state *crtc_state;
> > + struct drm_framebuffer *fb;
> > + int ret;
> > +
> > + /* We return 0 since this is called while disabling writeback encoder
> */
> > + if (!conn_state->crtc)
> > + return 0;
> > +
> > + /* We do not allow a blank commit when using writeback connector
> */
> > + if (!conn_state->writeback_job)
> > + return -EINVAL;
> > +
> > + fb = conn_state->writeback_job->fb;
> > + if (!fb)
> > + return -EINVAL;
> > +
> > + crtc_state = drm_atomic_get_new_crtc_state(state, conn_state-
> >crtc);
> > + if (fb->width != crtc_state->mode.hdisplay ||
> > + fb->height != crtc_state->mode.vdisplay)
> > + return -EINVAL;
> > +
> > + ret = intel_writeback_check_format(fb->format->format);
> > + if (ret) {
> > + drm_dbg_kms(connector->dev,
> > + "Unsupported drm format sent in writeback job\n");
> > + return ret;
> > + }
>
> Pretty much all of this look like something that belongs in the core/helpers.
Sure currently some drivers allow blank commit we do not.
But other stuff can be pulled out and be put in a drm writeback helper.
Was wondering if we can keep this here now and I can then send a follow up patches after this putting all this into drm_core
So as to not make the whole series stall.
Regards,
Suraj Kandpal
>
> > +
> > + return 0;
> > +}
> > +
> > static const struct drm_encoder_funcs drm_writeback_encoder_funcs = {
> > .destroy = drm_encoder_cleanup,
> > };
> > @@ -182,6 +230,7 @@ const struct drm_connector_funcs conn_funcs = {
> > static const struct drm_connector_helper_funcs conn_helper_funcs = {
> > .get_modes = intel_writeback_get_modes,
> > .mode_valid = intel_writeback_mode_valid,
> > + .atomic_check = intel_writeback_atomic_check,
> > .prepare_writeback_job = intel_writeback_prepare_job,
> > .cleanup_writeback_job = intel_writeback_cleanup_job, };
> > --
> > 2.34.1
>
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH v3 16/26] drm/i915/writeback: Add writeback to xe Makefile
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (14 preceding siblings ...)
2026-03-25 11:07 ` [PATCH v3 15/26] drm/i915/writeback: Add connector atomic check Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 12:25 ` Ville Syrjälä
2026-03-25 11:07 ` [PATCH v3 17/26] drm/i915/writeback: Add the enable sequence from writeback Suraj Kandpal
` (11 subsequent siblings)
27 siblings, 1 reply; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal
Add a intel_writeback.c to xe so that it builds for xe.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/xe/Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 49de1c22a469..2e456070895a 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -327,6 +327,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
i915-display/intel_vga.o \
i915-display/intel_vrr.o \
i915-display/intel_wm.o \
+ i915-display/intel_writeback.o \
i915-display/skl_prefill.o \
i915-display/skl_scaler.o \
i915-display/skl_universal_plane.o \
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* Re: [PATCH v3 16/26] drm/i915/writeback: Add writeback to xe Makefile
2026-03-25 11:07 ` [PATCH v3 16/26] drm/i915/writeback: Add writeback to xe Makefile Suraj Kandpal
@ 2026-03-25 12:25 ` Ville Syrjälä
2026-03-26 3:44 ` Kandpal, Suraj
0 siblings, 1 reply; 60+ messages in thread
From: Ville Syrjälä @ 2026-03-25 12:25 UTC (permalink / raw)
To: Suraj Kandpal
Cc: intel-xe, intel-gfx, sowmiya.s, uma.shankar, swati2.sharma,
chaitanya.kumar.borah, arun.r.murthy
On Wed, Mar 25, 2026 at 04:37:34PM +0530, Suraj Kandpal wrote:
> Add a intel_writeback.c to xe so that it builds for xe.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/xe/Makefile | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> index 49de1c22a469..2e456070895a 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -327,6 +327,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
> i915-display/intel_vga.o \
> i915-display/intel_vrr.o \
> i915-display/intel_wm.o \
> + i915-display/intel_writeback.o \
Another one that should be squashed.
> i915-display/skl_prefill.o \
> i915-display/skl_scaler.o \
> i915-display/skl_universal_plane.o \
> --
> 2.34.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 60+ messages in thread
* RE: [PATCH v3 16/26] drm/i915/writeback: Add writeback to xe Makefile
2026-03-25 12:25 ` Ville Syrjälä
@ 2026-03-26 3:44 ` Kandpal, Suraj
0 siblings, 0 replies; 60+ messages in thread
From: Kandpal, Suraj @ 2026-03-26 3:44 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
S, Sowmiya, Shankar, Uma, Sharma, Swati2, Borah, Chaitanya Kumar,
Murthy, Arun R
> Subject: Re: [PATCH v3 16/26] drm/i915/writeback: Add writeback to xe
> Makefile
>
> On Wed, Mar 25, 2026 at 04:37:34PM +0530, Suraj Kandpal wrote:
> > Add a intel_writeback.c to xe so that it builds for xe.
> >
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > ---
> > drivers/gpu/drm/xe/Makefile | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> > index 49de1c22a469..2e456070895a 100644
> > --- a/drivers/gpu/drm/xe/Makefile
> > +++ b/drivers/gpu/drm/xe/Makefile
> > @@ -327,6 +327,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
> > i915-display/intel_vga.o \
> > i915-display/intel_vrr.o \
> > i915-display/intel_wm.o \
> > + i915-display/intel_writeback.o \
>
> Another one that should be squashed.
>
Got it
Regards,
Suraj Kandpal
> > i915-display/skl_prefill.o \
> > i915-display/skl_scaler.o \
> > i915-display/skl_universal_plane.o \
> > --
> > 2.34.1
>
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH v3 17/26] drm/i915/writeback: Add the enable sequence from writeback
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (15 preceding siblings ...)
2026-03-25 11:07 ` [PATCH v3 16/26] drm/i915/writeback: Add writeback to xe Makefile Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 12:31 ` Ville Syrjälä
2026-03-25 11:07 ` [PATCH v3 18/26] drm/i915/writeback: Define writeback frame capture function Suraj Kandpal
` (10 subsequent siblings)
27 siblings, 1 reply; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal
Add enable sequence for writeback, use encoder->enable hook to
enable the transcoder.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
.../gpu/drm/i915/display/intel_writeback.c | 103 ++++++++++++++++++
1 file changed, 103 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
index ba4c162847c8..d45d5faaf7cc 100644
--- a/drivers/gpu/drm/i915/display/intel_writeback.c
+++ b/drivers/gpu/drm/i915/display/intel_writeback.c
@@ -17,8 +17,10 @@
#include "intel_atomic.h"
#include "intel_connector.h"
+#include "intel_crtc.h"
#include "intel_de.h"
#include "intel_display_driver.h"
+#include "intel_display_regs.h"
#include "intel_display_types.h"
#include "intel_display_utils.h"
#include "intel_fb_pin.h"
@@ -30,6 +32,7 @@ struct intel_writeback_connector {
struct intel_encoder encoder;
struct intel_writeback_job *job;
enum transcoder trans;
+ enum pipe pipe;
int frame_num;
};
@@ -48,6 +51,12 @@ static const u32 writeback_formats[] = {
DRM_FORMAT_XBGR2101010,
};
+static struct intel_writeback_connector
+*enc_to_intel_writeback_connector(struct intel_encoder *encoder)
+{
+ return container_of(encoder, struct intel_writeback_connector, encoder);
+}
+
static int intel_writeback_connector_init(struct intel_connector *connector)
{
struct intel_digital_connector_state *conn_state;
@@ -215,6 +224,99 @@ static int intel_writeback_atomic_check(struct drm_connector *connector,
return 0;
}
+static void intel_writeback_enable_encoder(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state,
+ const struct drm_connector_state *conn_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+ struct intel_writeback_connector *wb_conn =
+ enc_to_intel_writeback_connector(encoder);
+ struct intel_writeback_job *job = wb_conn->job;
+ const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+ enum transcoder trans = crtc_state->cpu_transcoder;
+ struct intel_crtc *pipe_crtc;
+ struct drm_framebuffer *fb;
+ u32 val = 0, hactive, vactive;
+ int i = 0;
+
+ if (!conn_state->writeback_job)
+ return;
+
+ wb_conn->trans = trans;
+ wb_conn->pipe = crtc->pipe;
+ fb = job->fb;
+ hactive = adjusted_mode->hdisplay;
+ vactive = adjusted_mode->vdisplay;
+
+ /* Configure WD_STRIDE, WD_SURF and WD_TAIL_CFG */
+ /* Enable Planes, Pipes and Transcoder */
+ /* TRANSCODER TIMINGS and other transcoder setting*/
+ /* minimum hactive as per bspec: 64 pixels */
+ if (hactive < 64)
+ drm_err(display->drm, "hactive is less then 64 pixels\n");
+
+ intel_de_write(display, TRANS_HTOTAL(display, trans), HACTIVE(hactive - 1));
+ intel_de_write(display, TRANS_VTOTAL(display, trans), VACTIVE(vactive - 1));
+
+ val = 0;
+ /* 2f) Configure and enable TRANS_WD_FUNC_CTL */
+ switch (crtc->pipe) {
+ default:
+ fallthrough;
+ case PIPE_A:
+ val |= WD_INPUT_PIPE_A;
+ break;
+ case PIPE_B:
+ val |= WD_INPUT_PIPE_B;
+ break;
+ case PIPE_C:
+ val |= WD_INPUT_PIPE_C;
+ break;
+ case PIPE_D:
+ val |= WD_INPUT_PIPE_D;
+ break;
+ }
+
+ switch (fb->format->format) {
+ default:
+ fallthrough;
+ case DRM_FORMAT_YUYV:
+ val |= WD_PIX_FMT_YUYV;
+ break;
+ case DRM_FORMAT_XYUV8888:
+ val |= WD_PIX_FMT_XYUV8888;
+ break;
+ case DRM_FORMAT_XBGR8888:
+ val |= WD_PIX_FMT_XBGR8888;
+ break;
+ case DRM_FORMAT_XBGR2101010:
+ val |= WD_PIX_FMT_XBGR2101010;
+ break;
+ }
+
+ val |= TRANS_WD_FUNC_ENABLE | WD_TRIGGERED_CAP_MODE_ENABLE |
+ WD_DISABLE_POINTERS;
+ intel_de_write(display, WD_TRANS_FUNC_CTL(trans), val);
+
+ if (DISPLAY_VER(display) >= 13)
+ intel_de_rmw(display, PIPE_CHICKEN(crtc->pipe),
+ UNDERRUN_RECOVERY_DISABLE_ADLP,
+ UNDERRUN_RECOVERY_DISABLE_ADLP);
+
+ /* Configure and enable TRANS_CONF */
+ intel_de_write(display, TRANSCONF_WD(trans), WD_TRANS_ENABLE);
+ intel_de_posting_read(display, TRANSCONF_WD(trans));
+
+ for_each_pipe_crtc_modeset_enable(display, pipe_crtc, crtc_state, i) {
+ const struct intel_crtc_state *pipe_crtc_state =
+ intel_atomic_get_new_crtc_state(state, pipe_crtc);
+
+ intel_crtc_vblank_on(pipe_crtc_state);
+ }
+}
+
static const struct drm_encoder_funcs drm_writeback_encoder_funcs = {
.destroy = drm_encoder_cleanup,
};
@@ -335,6 +437,7 @@ int intel_writeback_init(struct intel_display *display)
encoder->get_config = intel_writeback_get_config;
encoder->get_hw_state = intel_writeback_get_hw_state;
encoder->compute_config = intel_writeback_compute_config;
+ encoder->enable = intel_writeback_enable_encoder;
connector = &writeback_conn->connector;
ret = intel_writeback_connector_alloc(connector);
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* Re: [PATCH v3 17/26] drm/i915/writeback: Add the enable sequence from writeback
2026-03-25 11:07 ` [PATCH v3 17/26] drm/i915/writeback: Add the enable sequence from writeback Suraj Kandpal
@ 2026-03-25 12:31 ` Ville Syrjälä
0 siblings, 0 replies; 60+ messages in thread
From: Ville Syrjälä @ 2026-03-25 12:31 UTC (permalink / raw)
To: Suraj Kandpal
Cc: intel-xe, intel-gfx, sowmiya.s, uma.shankar, swati2.sharma,
chaitanya.kumar.borah, arun.r.murthy
On Wed, Mar 25, 2026 at 04:37:35PM +0530, Suraj Kandpal wrote:
> Add enable sequence for writeback, use encoder->enable hook to
> enable the transcoder.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> .../gpu/drm/i915/display/intel_writeback.c | 103 ++++++++++++++++++
> 1 file changed, 103 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
> index ba4c162847c8..d45d5faaf7cc 100644
> --- a/drivers/gpu/drm/i915/display/intel_writeback.c
> +++ b/drivers/gpu/drm/i915/display/intel_writeback.c
> @@ -17,8 +17,10 @@
>
> #include "intel_atomic.h"
> #include "intel_connector.h"
> +#include "intel_crtc.h"
> #include "intel_de.h"
> #include "intel_display_driver.h"
> +#include "intel_display_regs.h"
> #include "intel_display_types.h"
> #include "intel_display_utils.h"
> #include "intel_fb_pin.h"
> @@ -30,6 +32,7 @@ struct intel_writeback_connector {
> struct intel_encoder encoder;
> struct intel_writeback_job *job;
> enum transcoder trans;
> + enum pipe pipe;
> int frame_num;
> };
>
> @@ -48,6 +51,12 @@ static const u32 writeback_formats[] = {
> DRM_FORMAT_XBGR2101010,
> };
>
> +static struct intel_writeback_connector
> +*enc_to_intel_writeback_connector(struct intel_encoder *encoder)
> +{
> + return container_of(encoder, struct intel_writeback_connector, encoder);
> +}
> +
> static int intel_writeback_connector_init(struct intel_connector *connector)
> {
> struct intel_digital_connector_state *conn_state;
> @@ -215,6 +224,99 @@ static int intel_writeback_atomic_check(struct drm_connector *connector,
> return 0;
> }
>
> +static void intel_writeback_enable_encoder(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> + const struct intel_crtc_state *crtc_state,
> + const struct drm_connector_state *conn_state)
> +{
> + struct intel_display *display = to_intel_display(crtc_state);
> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> + struct intel_writeback_connector *wb_conn =
> + enc_to_intel_writeback_connector(encoder);
> + struct intel_writeback_job *job = wb_conn->job;
> + const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> + enum transcoder trans = crtc_state->cpu_transcoder;
> + struct intel_crtc *pipe_crtc;
> + struct drm_framebuffer *fb;
> + u32 val = 0, hactive, vactive;
> + int i = 0;
> +
> + if (!conn_state->writeback_job)
> + return;
> +
> + wb_conn->trans = trans;
> + wb_conn->pipe = crtc->pipe;
> + fb = job->fb;
> + hactive = adjusted_mode->hdisplay;
> + vactive = adjusted_mode->vdisplay;
> +
> + /* Configure WD_STRIDE, WD_SURF and WD_TAIL_CFG */
> + /* Enable Planes, Pipes and Transcoder */
> + /* TRANSCODER TIMINGS and other transcoder setting*/
> + /* minimum hactive as per bspec: 64 pixels */
> + if (hactive < 64)
> + drm_err(display->drm, "hactive is less then 64 pixels\n");
> +
> + intel_de_write(display, TRANS_HTOTAL(display, trans), HACTIVE(hactive - 1));
> + intel_de_write(display, TRANS_VTOTAL(display, trans), VACTIVE(vactive - 1));
> +
> + val = 0;
> + /* 2f) Configure and enable TRANS_WD_FUNC_CTL */
> + switch (crtc->pipe) {
> + default:
> + fallthrough;
> + case PIPE_A:
> + val |= WD_INPUT_PIPE_A;
> + break;
> + case PIPE_B:
> + val |= WD_INPUT_PIPE_B;
> + break;
> + case PIPE_C:
> + val |= WD_INPUT_PIPE_C;
> + break;
> + case PIPE_D:
> + val |= WD_INPUT_PIPE_D;
> + break;
> + }
> +
> + switch (fb->format->format) {
> + default:
> + fallthrough;
> + case DRM_FORMAT_YUYV:
> + val |= WD_PIX_FMT_YUYV;
> + break;
> + case DRM_FORMAT_XYUV8888:
> + val |= WD_PIX_FMT_XYUV8888;
> + break;
> + case DRM_FORMAT_XBGR8888:
> + val |= WD_PIX_FMT_XBGR8888;
> + break;
> + case DRM_FORMAT_XBGR2101010:
> + val |= WD_PIX_FMT_XBGR2101010;
> + break;
> + }
> +
> + val |= TRANS_WD_FUNC_ENABLE | WD_TRIGGERED_CAP_MODE_ENABLE |
> + WD_DISABLE_POINTERS;
> + intel_de_write(display, WD_TRANS_FUNC_CTL(trans), val);
> +
> + if (DISPLAY_VER(display) >= 13)
> + intel_de_rmw(display, PIPE_CHICKEN(crtc->pipe),
> + UNDERRUN_RECOVERY_DISABLE_ADLP,
> + UNDERRUN_RECOVERY_DISABLE_ADLP);
> +
> + /* Configure and enable TRANS_CONF */
> + intel_de_write(display, TRANSCONF_WD(trans), WD_TRANS_ENABLE);
> + intel_de_posting_read(display, TRANSCONF_WD(trans));
> +
> + for_each_pipe_crtc_modeset_enable(display, pipe_crtc, crtc_state, i) {
> + const struct intel_crtc_state *pipe_crtc_state =
> + intel_atomic_get_new_crtc_state(state, pipe_crtc);
> +
> + intel_crtc_vblank_on(pipe_crtc_state);
> + }
Most of this looks like stuff we already do in the normal transcoder
configre/enable sequence.
> +}
> +
> static const struct drm_encoder_funcs drm_writeback_encoder_funcs = {
> .destroy = drm_encoder_cleanup,
> };
> @@ -335,6 +437,7 @@ int intel_writeback_init(struct intel_display *display)
> encoder->get_config = intel_writeback_get_config;
> encoder->get_hw_state = intel_writeback_get_hw_state;
> encoder->compute_config = intel_writeback_compute_config;
> + encoder->enable = intel_writeback_enable_encoder;
>
> connector = &writeback_conn->connector;
> ret = intel_writeback_connector_alloc(connector);
> --
> 2.34.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH v3 18/26] drm/i915/writeback: Define writeback frame capture function
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (16 preceding siblings ...)
2026-03-25 11:07 ` [PATCH v3 17/26] drm/i915/writeback: Add the enable sequence from writeback Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 12:33 ` Ville Syrjälä
2026-03-25 11:07 ` [PATCH v3 19/26] drm/{i915/xe}/writeback: Add a writeback helper to get ggtt address Suraj Kandpal
` (9 subsequent siblings)
27 siblings, 1 reply; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal
Define the commit function to be called at atomic_commit_tail
if drm_writeback_job is available. This function calls the
capture function and queues the job to be called later via
interrupt handler when the job is complete.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 3 +
.../gpu/drm/i915/display/intel_writeback.c | 58 +++++++++++++++++++
.../gpu/drm/i915/display/intel_writeback.h | 4 ++
3 files changed, 65 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index d433ffaadd65..4cc3e0779e8a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -126,6 +126,7 @@
#include "intel_vga.h"
#include "intel_vrr.h"
#include "intel_wm.h"
+#include "intel_writeback.h"
#include "skl_scaler.h"
#include "skl_universal_plane.h"
#include "skl_watermark.h"
@@ -7564,6 +7565,8 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
/* FIXME probably need to sequence this properly */
intel_program_dpkgc_latency(state);
+ intel_writeback_atomic_commit(state);
+
intel_wait_for_vblank_workers(state);
/* FIXME: We should call drm_atomic_helper_commit_hw_done() here
diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
index d45d5faaf7cc..c79e7330b81c 100644
--- a/drivers/gpu/drm/i915/display/intel_writeback.c
+++ b/drivers/gpu/drm/i915/display/intel_writeback.c
@@ -51,6 +51,12 @@ static const u32 writeback_formats[] = {
DRM_FORMAT_XBGR2101010,
};
+static struct intel_writeback_connector
+*conn_to_intel_writeback_connector(struct intel_connector *connector)
+{
+ return container_of(connector, struct intel_writeback_connector, connector);
+}
+
static struct intel_writeback_connector
*enc_to_intel_writeback_connector(struct intel_encoder *encoder)
{
@@ -224,6 +230,58 @@ static int intel_writeback_atomic_check(struct drm_connector *connector,
return 0;
}
+static void intel_writeback_capture(struct intel_atomic_state *state,
+ struct intel_connector *connector)
+{
+ struct intel_display *display = to_intel_display(connector);
+ struct intel_writeback_connector *wb_conn =
+ conn_to_intel_writeback_connector(connector);
+ enum transcoder trans = wb_conn->trans;
+ u32 val = 0;
+
+ val |= START_TRIGGER_FRAME | WD_FRAME_NUMBER(wb_conn->frame_num);
+ intel_de_rmw(display, WD_TRANS_FUNC_CTL(trans),
+ START_TRIGGER_FRAME | WD_FRAME_NUMBER_MASK,
+ val);
+
+ if (intel_de_wait_for_set_ms(display, WD_FRAME_STATUS(trans),
+ WD_FRAME_COMPLETE, 50)) {
+ drm_dbg_kms(display->drm,
+ "Frame was not captured after triggering a capture\n");
+ intel_de_rmw(display, WD_TRANS_FUNC_CTL(trans),
+ STOP_TRIGGER_FRAME,
+ STOP_TRIGGER_FRAME);
+ } else {
+ drm_writeback_signal_completion(&connector->base, 0);
+ intel_de_write(display, WD_FRAME_STATUS(trans), WD_FRAME_COMPLETE);
+ wb_conn->frame_num++;
+ if (wb_conn->frame_num > 7)
+ wb_conn->frame_num = 1;
+ wb_conn->job = NULL;
+ }
+}
+
+void intel_writeback_atomic_commit(struct intel_atomic_state *state)
+{
+ struct drm_connector *connector;
+ struct drm_connector_state *conn_state;
+ int i;
+
+ for_each_new_connector_in_state(&state->base, connector, conn_state, i) {
+ struct intel_connector *intel_connector = to_intel_connector(connector);
+
+ if (!conn_state)
+ return;
+
+ if (conn_state->writeback_job && conn_state->writeback_job->fb) {
+ WARN_ON(connector->connector_type != DRM_MODE_CONNECTOR_WRITEBACK);
+
+ drm_writeback_queue_job(connector, conn_state);
+ intel_writeback_capture(state, intel_connector);
+ }
+ }
+}
+
static void intel_writeback_enable_encoder(struct intel_atomic_state *state,
struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
diff --git a/drivers/gpu/drm/i915/display/intel_writeback.h b/drivers/gpu/drm/i915/display/intel_writeback.h
index 5911684cb81a..3c145cf73e20 100644
--- a/drivers/gpu/drm/i915/display/intel_writeback.h
+++ b/drivers/gpu/drm/i915/display/intel_writeback.h
@@ -8,10 +8,14 @@
#include <linux/types.h>
+#include "intel_display_types.h"
+
+struct intel_atomic_state;
struct intel_display;
struct intel_writeback_connector;
int intel_writeback_init(struct intel_display *display);
+void intel_writeback_atomic_commit(struct intel_atomic_state *state);
#endif /* __INTEL_WRITEBACK_H__ */
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* Re: [PATCH v3 18/26] drm/i915/writeback: Define writeback frame capture function
2026-03-25 11:07 ` [PATCH v3 18/26] drm/i915/writeback: Define writeback frame capture function Suraj Kandpal
@ 2026-03-25 12:33 ` Ville Syrjälä
2026-03-26 3:47 ` Kandpal, Suraj
0 siblings, 1 reply; 60+ messages in thread
From: Ville Syrjälä @ 2026-03-25 12:33 UTC (permalink / raw)
To: Suraj Kandpal
Cc: intel-xe, intel-gfx, sowmiya.s, uma.shankar, swati2.sharma,
chaitanya.kumar.borah, arun.r.murthy
On Wed, Mar 25, 2026 at 04:37:36PM +0530, Suraj Kandpal wrote:
> Define the commit function to be called at atomic_commit_tail
> if drm_writeback_job is available. This function calls the
> capture function and queues the job to be called later via
> interrupt handler when the job is complete.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 3 +
> .../gpu/drm/i915/display/intel_writeback.c | 58 +++++++++++++++++++
> .../gpu/drm/i915/display/intel_writeback.h | 4 ++
> 3 files changed, 65 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index d433ffaadd65..4cc3e0779e8a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -126,6 +126,7 @@
> #include "intel_vga.h"
> #include "intel_vrr.h"
> #include "intel_wm.h"
> +#include "intel_writeback.h"
> #include "skl_scaler.h"
> #include "skl_universal_plane.h"
> #include "skl_watermark.h"
> @@ -7564,6 +7565,8 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
> /* FIXME probably need to sequence this properly */
> intel_program_dpkgc_latency(state);
>
> + intel_writeback_atomic_commit(state);
> +
> intel_wait_for_vblank_workers(state);
>
> /* FIXME: We should call drm_atomic_helper_commit_hw_done() here
> diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
> index d45d5faaf7cc..c79e7330b81c 100644
> --- a/drivers/gpu/drm/i915/display/intel_writeback.c
> +++ b/drivers/gpu/drm/i915/display/intel_writeback.c
> @@ -51,6 +51,12 @@ static const u32 writeback_formats[] = {
> DRM_FORMAT_XBGR2101010,
> };
>
> +static struct intel_writeback_connector
> +*conn_to_intel_writeback_connector(struct intel_connector *connector)
> +{
> + return container_of(connector, struct intel_writeback_connector, connector);
> +}
> +
> static struct intel_writeback_connector
> *enc_to_intel_writeback_connector(struct intel_encoder *encoder)
> {
> @@ -224,6 +230,58 @@ static int intel_writeback_atomic_check(struct drm_connector *connector,
> return 0;
> }
>
> +static void intel_writeback_capture(struct intel_atomic_state *state,
> + struct intel_connector *connector)
> +{
> + struct intel_display *display = to_intel_display(connector);
> + struct intel_writeback_connector *wb_conn =
> + conn_to_intel_writeback_connector(connector);
> + enum transcoder trans = wb_conn->trans;
> + u32 val = 0;
> +
> + val |= START_TRIGGER_FRAME | WD_FRAME_NUMBER(wb_conn->frame_num);
> + intel_de_rmw(display, WD_TRANS_FUNC_CTL(trans),
> + START_TRIGGER_FRAME | WD_FRAME_NUMBER_MASK,
> + val);
> +
> + if (intel_de_wait_for_set_ms(display, WD_FRAME_STATUS(trans),
> + WD_FRAME_COMPLETE, 50)) {
I think we need to hook up the interrupts to avoid this kind of thing.
The trigger we should probably just do from intel_pipe_update_end().
> + drm_dbg_kms(display->drm,
> + "Frame was not captured after triggering a capture\n");
> + intel_de_rmw(display, WD_TRANS_FUNC_CTL(trans),
> + STOP_TRIGGER_FRAME,
> + STOP_TRIGGER_FRAME);
> + } else {
> + drm_writeback_signal_completion(&connector->base, 0);
> + intel_de_write(display, WD_FRAME_STATUS(trans), WD_FRAME_COMPLETE);
> + wb_conn->frame_num++;
> + if (wb_conn->frame_num > 7)
> + wb_conn->frame_num = 1;
> + wb_conn->job = NULL;
> + }
> +}
> +
> +void intel_writeback_atomic_commit(struct intel_atomic_state *state)
> +{
> + struct drm_connector *connector;
> + struct drm_connector_state *conn_state;
> + int i;
> +
> + for_each_new_connector_in_state(&state->base, connector, conn_state, i) {
> + struct intel_connector *intel_connector = to_intel_connector(connector);
> +
> + if (!conn_state)
> + return;
> +
> + if (conn_state->writeback_job && conn_state->writeback_job->fb) {
> + WARN_ON(connector->connector_type != DRM_MODE_CONNECTOR_WRITEBACK);
> +
> + drm_writeback_queue_job(connector, conn_state);
> + intel_writeback_capture(state, intel_connector);
> + }
> + }
> +}
> +
> static void intel_writeback_enable_encoder(struct intel_atomic_state *state,
> struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> diff --git a/drivers/gpu/drm/i915/display/intel_writeback.h b/drivers/gpu/drm/i915/display/intel_writeback.h
> index 5911684cb81a..3c145cf73e20 100644
> --- a/drivers/gpu/drm/i915/display/intel_writeback.h
> +++ b/drivers/gpu/drm/i915/display/intel_writeback.h
> @@ -8,10 +8,14 @@
>
> #include <linux/types.h>
>
> +#include "intel_display_types.h"
> +
> +struct intel_atomic_state;
> struct intel_display;
> struct intel_writeback_connector;
>
> int intel_writeback_init(struct intel_display *display);
> +void intel_writeback_atomic_commit(struct intel_atomic_state *state);
>
> #endif /* __INTEL_WRITEBACK_H__ */
>
> --
> 2.34.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 60+ messages in thread* RE: [PATCH v3 18/26] drm/i915/writeback: Define writeback frame capture function
2026-03-25 12:33 ` Ville Syrjälä
@ 2026-03-26 3:47 ` Kandpal, Suraj
0 siblings, 0 replies; 60+ messages in thread
From: Kandpal, Suraj @ 2026-03-26 3:47 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
S, Sowmiya, Shankar, Uma, Sharma, Swati2, Borah, Chaitanya Kumar,
Murthy, Arun R
> Subject: Re: [PATCH v3 18/26] drm/i915/writeback: Define writeback frame
> capture function
>
> On Wed, Mar 25, 2026 at 04:37:36PM +0530, Suraj Kandpal wrote:
> > Define the commit function to be called at atomic_commit_tail if
> > drm_writeback_job is available. This function calls the capture
> > function and queues the job to be called later via interrupt handler
> > when the job is complete.
> >
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 3 +
> > .../gpu/drm/i915/display/intel_writeback.c | 58 +++++++++++++++++++
> > .../gpu/drm/i915/display/intel_writeback.h | 4 ++
> > 3 files changed, 65 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index d433ffaadd65..4cc3e0779e8a 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -126,6 +126,7 @@
> > #include "intel_vga.h"
> > #include "intel_vrr.h"
> > #include "intel_wm.h"
> > +#include "intel_writeback.h"
> > #include "skl_scaler.h"
> > #include "skl_universal_plane.h"
> > #include "skl_watermark.h"
> > @@ -7564,6 +7565,8 @@ static void intel_atomic_commit_tail(struct
> intel_atomic_state *state)
> > /* FIXME probably need to sequence this properly */
> > intel_program_dpkgc_latency(state);
> >
> > + intel_writeback_atomic_commit(state);
> > +
> > intel_wait_for_vblank_workers(state);
> >
> > /* FIXME: We should call drm_atomic_helper_commit_hw_done()
> here
> > diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c
> > b/drivers/gpu/drm/i915/display/intel_writeback.c
> > index d45d5faaf7cc..c79e7330b81c 100644
> > --- a/drivers/gpu/drm/i915/display/intel_writeback.c
> > +++ b/drivers/gpu/drm/i915/display/intel_writeback.c
> > @@ -51,6 +51,12 @@ static const u32 writeback_formats[] = {
> > DRM_FORMAT_XBGR2101010,
> > };
> >
> > +static struct intel_writeback_connector
> > +*conn_to_intel_writeback_connector(struct intel_connector *connector)
> > +{
> > + return container_of(connector, struct intel_writeback_connector,
> > +connector); }
> > +
> > static struct intel_writeback_connector
> > *enc_to_intel_writeback_connector(struct intel_encoder *encoder) { @@
> > -224,6 +230,58 @@ static int intel_writeback_atomic_check(struct
> drm_connector *connector,
> > return 0;
> > }
> >
> > +static void intel_writeback_capture(struct intel_atomic_state *state,
> > + struct intel_connector *connector) {
> > + struct intel_display *display = to_intel_display(connector);
> > + struct intel_writeback_connector *wb_conn =
> > + conn_to_intel_writeback_connector(connector);
> > + enum transcoder trans = wb_conn->trans;
> > + u32 val = 0;
> > +
> > + val |= START_TRIGGER_FRAME | WD_FRAME_NUMBER(wb_conn-
> >frame_num);
> > + intel_de_rmw(display, WD_TRANS_FUNC_CTL(trans),
> > + START_TRIGGER_FRAME | WD_FRAME_NUMBER_MASK,
> > + val);
> > +
> > + if (intel_de_wait_for_set_ms(display, WD_FRAME_STATUS(trans),
> > + WD_FRAME_COMPLETE, 50)) {
>
> I think we need to hook up the interrupts to avoid this kind of thing.
>
> The trigger we should probably just do from intel_pipe_update_end().
I do hook up interrupts in later patches but I have found the writeback job done interrupt to be a little unreliable.
Could try this out and see if it works out.
Regards,
Suraj Kandpal
>
> > + drm_dbg_kms(display->drm,
> > + "Frame was not captured after triggering a
> capture\n");
> > + intel_de_rmw(display, WD_TRANS_FUNC_CTL(trans),
> > + STOP_TRIGGER_FRAME,
> > + STOP_TRIGGER_FRAME);
> > + } else {
> > + drm_writeback_signal_completion(&connector->base, 0);
> > + intel_de_write(display, WD_FRAME_STATUS(trans),
> WD_FRAME_COMPLETE);
> > + wb_conn->frame_num++;
> > + if (wb_conn->frame_num > 7)
> > + wb_conn->frame_num = 1;
> > + wb_conn->job = NULL;
> > + }
> > +}
> > +
> > +void intel_writeback_atomic_commit(struct intel_atomic_state *state)
> > +{
> > + struct drm_connector *connector;
> > + struct drm_connector_state *conn_state;
> > + int i;
> > +
> > + for_each_new_connector_in_state(&state->base, connector,
> conn_state, i) {
> > + struct intel_connector *intel_connector =
> > +to_intel_connector(connector);
> > +
> > + if (!conn_state)
> > + return;
> > +
> > + if (conn_state->writeback_job && conn_state-
> >writeback_job->fb) {
> > + WARN_ON(connector->connector_type !=
> > +DRM_MODE_CONNECTOR_WRITEBACK);
> > +
> > + drm_writeback_queue_job(connector, conn_state);
> > + intel_writeback_capture(state, intel_connector);
> > + }
> > + }
> > +}
> > +
> > static void intel_writeback_enable_encoder(struct intel_atomic_state
> *state,
> > struct intel_encoder *encoder,
> > const struct intel_crtc_state
> *crtc_state, diff --git
> > a/drivers/gpu/drm/i915/display/intel_writeback.h
> > b/drivers/gpu/drm/i915/display/intel_writeback.h
> > index 5911684cb81a..3c145cf73e20 100644
> > --- a/drivers/gpu/drm/i915/display/intel_writeback.h
> > +++ b/drivers/gpu/drm/i915/display/intel_writeback.h
> > @@ -8,10 +8,14 @@
> >
> > #include <linux/types.h>
> >
> > +#include "intel_display_types.h"
> > +
> > +struct intel_atomic_state;
> > struct intel_display;
> > struct intel_writeback_connector;
> >
> > int intel_writeback_init(struct intel_display *display);
> > +void intel_writeback_atomic_commit(struct intel_atomic_state *state);
> >
> > #endif /* __INTEL_WRITEBACK_H__ */
> >
> > --
> > 2.34.1
>
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH v3 19/26] drm/{i915/xe}/writeback: Add a writeback helper to get ggtt address
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (17 preceding siblings ...)
2026-03-25 11:07 ` [PATCH v3 18/26] drm/i915/writeback: Define writeback frame capture function Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 11:07 ` [PATCH v3 20/26] drm/i915/writeback: Configure WD_STRIDE reg Suraj Kandpal
` (8 subsequent siblings)
27 siblings, 0 replies; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal
We need the ggtt address offset to write in the WD_SURF register.
With i915_vma being defined in xe and i915 and both having different
ways to extract the address this poses an issue.
Add a helper so that correct function is called to extract address
depending on xe/i915 driver.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/intel_writeback.c | 3 ++-
.../gpu/drm/i915/display/intel_writeback_helper.c | 12 ++++++++++++
.../gpu/drm/i915/display/intel_writeback_helper.h | 8 ++++++++
drivers/gpu/drm/xe/Makefile | 3 ++-
drivers/gpu/drm/xe/display/xe_writeback_helper.c | 13 +++++++++++++
6 files changed, 38 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_writeback_helper.c
create mode 100644 drivers/gpu/drm/i915/display/intel_writeback_helper.h
create mode 100644 drivers/gpu/drm/xe/display/xe_writeback_helper.c
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 1e9140e7713c..a1023de728e5 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -316,6 +316,7 @@ i915-y += \
display/intel_vga.o \
display/intel_wm.o \
display/intel_writeback.o \
+ display/intel_writeback_helper.o \
display/skl_prefill.o \
display/skl_scaler.o \
display/skl_universal_plane.o \
diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
index c79e7330b81c..d3c3716a28a9 100644
--- a/drivers/gpu/drm/i915/display/intel_writeback.c
+++ b/drivers/gpu/drm/i915/display/intel_writeback.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: MIT
/*
- * Copyright © 2025 Intel Corporation
+ * Copyright © 2026 Intel Corporation
*/
#include <linux/slab.h>
@@ -25,6 +25,7 @@
#include "intel_display_utils.h"
#include "intel_fb_pin.h"
#include "intel_writeback.h"
+#include "intel_writeback_helper.h"
#include "intel_writeback_reg.h"
struct intel_writeback_connector {
diff --git a/drivers/gpu/drm/i915/display/intel_writeback_helper.c b/drivers/gpu/drm/i915/display/intel_writeback_helper.c
new file mode 100644
index 000000000000..f483ed6ffc6b
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_writeback_helper.c
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include "i915_vma.h"
+#include "intel_writeback_helper.h"
+
+u32 intel_get_ggtt_addr(struct i915_vma *vma)
+{
+ return i915_ggtt_offset(vma);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_writeback_helper.h b/drivers/gpu/drm/i915/display/intel_writeback_helper.h
new file mode 100644
index 000000000000..b46f437c3875
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_writeback_helper.h
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+struct i915_vma;
+
+u32 intel_get_ggtt_addr(struct i915_vma *vma);
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 2e456070895a..4483e97153ba 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -224,7 +224,8 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
display/xe_initial_plane.o \
display/xe_panic.o \
display/xe_stolen.o \
- display/xe_tdf.o
+ display/xe_tdf.o \
+ display/xe_writeback_helper.o
# Display code shared with i915
xe-$(CONFIG_DRM_XE_DISPLAY) += \
diff --git a/drivers/gpu/drm/xe/display/xe_writeback_helper.c b/drivers/gpu/drm/xe/display/xe_writeback_helper.c
new file mode 100644
index 000000000000..5898984b129c
--- /dev/null
+++ b/drivers/gpu/drm/xe/display/xe_writeback_helper.c
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include "xe_ggtt.h"
+#include "xe_display_vma.h"
+#include "intel_writeback_helper.h"
+
+u32 intel_get_ggtt_addr(struct i915_vma *vma)
+{
+ return lower_32_bits(xe_ggtt_node_addr(vma->node));
+}
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* [PATCH v3 20/26] drm/i915/writeback: Configure WD_STRIDE reg
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (18 preceding siblings ...)
2026-03-25 11:07 ` [PATCH v3 19/26] drm/{i915/xe}/writeback: Add a writeback helper to get ggtt address Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 12:35 ` Ville Syrjälä
2026-03-25 11:07 ` [PATCH v3 21/26] drm/i915/writeback: Configure WD_SURF register Suraj Kandpal
` (7 subsequent siblings)
27 siblings, 1 reply; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal
Write to the WD_STRIDE register using the appropriate calculation
based on the color mode and hactive.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
.../gpu/drm/i915/display/intel_writeback.c | 36 +++++++++++++++++++
.../drm/i915/display/intel_writeback_reg.h | 1 +
2 files changed, 37 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
index d3c3716a28a9..e2f7c46015d2 100644
--- a/drivers/gpu/drm/i915/display/intel_writeback.c
+++ b/drivers/gpu/drm/i915/display/intel_writeback.c
@@ -231,15 +231,51 @@ static int intel_writeback_atomic_check(struct drm_connector *connector,
return 0;
}
+static int
+get_color_mode_bpp(struct intel_display *display, u32 color_format)
+{
+ int bpp = 0;
+
+ switch (color_format) {
+ case DRM_FORMAT_XYUV8888:
+ case DRM_FORMAT_YUYV:
+ case DRM_FORMAT_VYUY:
+ case DRM_FORMAT_XBGR8888:
+ case DRM_FORMAT_XBGR2101010:
+ case DRM_FORMAT_XVYU2101010:
+ bpp = 4;
+ break;
+ default:
+ drm_err(display->drm, "Unsupported format for writeback\n");
+ break;
+ }
+
+ return bpp;
+}
+
static void intel_writeback_capture(struct intel_atomic_state *state,
struct intel_connector *connector)
{
struct intel_display *display = to_intel_display(connector);
struct intel_writeback_connector *wb_conn =
conn_to_intel_writeback_connector(connector);
+ struct drm_connector_state *conn_state =
+ drm_atomic_get_new_connector_state(&state->base, &connector->base);
+ struct intel_crtc *crtc = intel_crtc_for_pipe(display, wb_conn->pipe);
+ struct intel_crtc_state *crtc_state =
+ intel_atomic_get_new_crtc_state(state, crtc);
+ const struct drm_display_mode *adjusted_mode =
+ &crtc_state->hw.adjusted_mode;
+ struct drm_writeback_job *wb_job = conn_state->writeback_job;
enum transcoder trans = wb_conn->trans;
u32 val = 0;
+ int bpp;
+ bpp = get_color_mode_bpp(display, wb_job->fb->format->format);
+ val = DIV_ROUND_UP((adjusted_mode->hdisplay * bpp), 64);
+ intel_de_write(display, WD_STRIDE(trans), WD_STRIDE_VAL(val));
+
+ val = 0;
val |= START_TRIGGER_FRAME | WD_FRAME_NUMBER(wb_conn->frame_num);
intel_de_rmw(display, WD_TRANS_FUNC_CTL(trans),
START_TRIGGER_FRAME | WD_FRAME_NUMBER_MASK,
diff --git a/drivers/gpu/drm/i915/display/intel_writeback_reg.h b/drivers/gpu/drm/i915/display/intel_writeback_reg.h
index 5e7c6c99d191..f526af0f9aff 100644
--- a/drivers/gpu/drm/i915/display/intel_writeback_reg.h
+++ b/drivers/gpu/drm/i915/display/intel_writeback_reg.h
@@ -60,6 +60,7 @@
_WD_STRIDE_0,\
_WD_STRIDE_1)
#define WD_STRIDE_MASK REG_GENMASK(15, 6)
+#define WD_STRIDE_VAL(val) REG_FIELD_PREP(WD_STRIDE_MASK, val)
#define _WD_STREAMCAP_CTL0 0x6e590
#define _WD_STREAMCAP_CTL1 0x6ed90
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* Re: [PATCH v3 20/26] drm/i915/writeback: Configure WD_STRIDE reg
2026-03-25 11:07 ` [PATCH v3 20/26] drm/i915/writeback: Configure WD_STRIDE reg Suraj Kandpal
@ 2026-03-25 12:35 ` Ville Syrjälä
2026-03-26 3:52 ` Kandpal, Suraj
0 siblings, 1 reply; 60+ messages in thread
From: Ville Syrjälä @ 2026-03-25 12:35 UTC (permalink / raw)
To: Suraj Kandpal
Cc: intel-xe, intel-gfx, sowmiya.s, uma.shankar, swati2.sharma,
chaitanya.kumar.borah, arun.r.murthy
On Wed, Mar 25, 2026 at 04:37:38PM +0530, Suraj Kandpal wrote:
> Write to the WD_STRIDE register using the appropriate calculation
> based on the color mode and hactive.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> .../gpu/drm/i915/display/intel_writeback.c | 36 +++++++++++++++++++
> .../drm/i915/display/intel_writeback_reg.h | 1 +
> 2 files changed, 37 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
> index d3c3716a28a9..e2f7c46015d2 100644
> --- a/drivers/gpu/drm/i915/display/intel_writeback.c
> +++ b/drivers/gpu/drm/i915/display/intel_writeback.c
> @@ -231,15 +231,51 @@ static int intel_writeback_atomic_check(struct drm_connector *connector,
> return 0;
> }
>
> +static int
> +get_color_mode_bpp(struct intel_display *display, u32 color_format)
> +{
> + int bpp = 0;
> +
> + switch (color_format) {
> + case DRM_FORMAT_XYUV8888:
> + case DRM_FORMAT_YUYV:
> + case DRM_FORMAT_VYUY:
> + case DRM_FORMAT_XBGR8888:
> + case DRM_FORMAT_XBGR2101010:
> + case DRM_FORMAT_XVYU2101010:
> + bpp = 4;
> + break;
> + default:
> + drm_err(display->drm, "Unsupported format for writeback\n");
> + break;
> + }
> +
> + return bpp;
> +}
> +
> static void intel_writeback_capture(struct intel_atomic_state *state,
> struct intel_connector *connector)
> {
> struct intel_display *display = to_intel_display(connector);
> struct intel_writeback_connector *wb_conn =
> conn_to_intel_writeback_connector(connector);
> + struct drm_connector_state *conn_state =
> + drm_atomic_get_new_connector_state(&state->base, &connector->base);
> + struct intel_crtc *crtc = intel_crtc_for_pipe(display, wb_conn->pipe);
> + struct intel_crtc_state *crtc_state =
> + intel_atomic_get_new_crtc_state(state, crtc);
> + const struct drm_display_mode *adjusted_mode =
> + &crtc_state->hw.adjusted_mode;
> + struct drm_writeback_job *wb_job = conn_state->writeback_job;
> enum transcoder trans = wb_conn->trans;
> u32 val = 0;
> + int bpp;
>
> + bpp = get_color_mode_bpp(display, wb_job->fb->format->format);
> + val = DIV_ROUND_UP((adjusted_mode->hdisplay * bpp), 64);
The fb should tell us its stride.
> + intel_de_write(display, WD_STRIDE(trans), WD_STRIDE_VAL(val));
> +
> + val = 0;
> val |= START_TRIGGER_FRAME | WD_FRAME_NUMBER(wb_conn->frame_num);
> intel_de_rmw(display, WD_TRANS_FUNC_CTL(trans),
> START_TRIGGER_FRAME | WD_FRAME_NUMBER_MASK,
> diff --git a/drivers/gpu/drm/i915/display/intel_writeback_reg.h b/drivers/gpu/drm/i915/display/intel_writeback_reg.h
> index 5e7c6c99d191..f526af0f9aff 100644
> --- a/drivers/gpu/drm/i915/display/intel_writeback_reg.h
> +++ b/drivers/gpu/drm/i915/display/intel_writeback_reg.h
> @@ -60,6 +60,7 @@
> _WD_STRIDE_0,\
> _WD_STRIDE_1)
> #define WD_STRIDE_MASK REG_GENMASK(15, 6)
> +#define WD_STRIDE_VAL(val) REG_FIELD_PREP(WD_STRIDE_MASK, val)
>
> #define _WD_STREAMCAP_CTL0 0x6e590
> #define _WD_STREAMCAP_CTL1 0x6ed90
> --
> 2.34.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 60+ messages in thread* RE: [PATCH v3 20/26] drm/i915/writeback: Configure WD_STRIDE reg
2026-03-25 12:35 ` Ville Syrjälä
@ 2026-03-26 3:52 ` Kandpal, Suraj
0 siblings, 0 replies; 60+ messages in thread
From: Kandpal, Suraj @ 2026-03-26 3:52 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
S, Sowmiya, Shankar, Uma, Sharma, Swati2, Borah, Chaitanya Kumar,
Murthy, Arun R
> Subject: Re: [PATCH v3 20/26] drm/i915/writeback: Configure WD_STRIDE reg
>
> On Wed, Mar 25, 2026 at 04:37:38PM +0530, Suraj Kandpal wrote:
> > Write to the WD_STRIDE register using the appropriate calculation
> > based on the color mode and hactive.
> >
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > ---
> > .../gpu/drm/i915/display/intel_writeback.c | 36 +++++++++++++++++++
> > .../drm/i915/display/intel_writeback_reg.h | 1 +
> > 2 files changed, 37 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c
> > b/drivers/gpu/drm/i915/display/intel_writeback.c
> > index d3c3716a28a9..e2f7c46015d2 100644
> > --- a/drivers/gpu/drm/i915/display/intel_writeback.c
> > +++ b/drivers/gpu/drm/i915/display/intel_writeback.c
> > @@ -231,15 +231,51 @@ static int intel_writeback_atomic_check(struct
> drm_connector *connector,
> > return 0;
> > }
> >
> > +static int
> > +get_color_mode_bpp(struct intel_display *display, u32 color_format) {
> > + int bpp = 0;
> > +
> > + switch (color_format) {
> > + case DRM_FORMAT_XYUV8888:
> > + case DRM_FORMAT_YUYV:
> > + case DRM_FORMAT_VYUY:
> > + case DRM_FORMAT_XBGR8888:
> > + case DRM_FORMAT_XBGR2101010:
> > + case DRM_FORMAT_XVYU2101010:
> > + bpp = 4;
> > + break;
> > + default:
> > + drm_err(display->drm, "Unsupported format for
> writeback\n");
> > + break;
> > + }
> > +
> > + return bpp;
> > +}
> > +
> > static void intel_writeback_capture(struct intel_atomic_state *state,
> > struct intel_connector *connector) {
> > struct intel_display *display = to_intel_display(connector);
> > struct intel_writeback_connector *wb_conn =
> > conn_to_intel_writeback_connector(connector);
> > + struct drm_connector_state *conn_state =
> > + drm_atomic_get_new_connector_state(&state->base,
> &connector->base);
> > + struct intel_crtc *crtc = intel_crtc_for_pipe(display, wb_conn->pipe);
> > + struct intel_crtc_state *crtc_state =
> > + intel_atomic_get_new_crtc_state(state, crtc);
> > + const struct drm_display_mode *adjusted_mode =
> > + &crtc_state->hw.adjusted_mode;
> > + struct drm_writeback_job *wb_job = conn_state->writeback_job;
> > enum transcoder trans = wb_conn->trans;
> > u32 val = 0;
> > + int bpp;
> >
> > + bpp = get_color_mode_bpp(display, wb_job->fb->format->format);
> > + val = DIV_ROUND_UP((adjusted_mode->hdisplay * bpp), 64);
>
> The fb should tell us its stride.
Let me experiment with this. Problem is I remember that the fb's stride value was causing some issue when given as a value.
Also I saw this calculation in Bspec which I coded in. Currently I can't tell you what the error exactly since this series was just
Made to accommodate the new drm core changes under review to make sure everything still works for us.
I will experiment with fb's stride value and get back to you on this.
Regards,
Suraj Kandpal
>
> > + intel_de_write(display, WD_STRIDE(trans), WD_STRIDE_VAL(val));
> > +
> > + val = 0;
> > val |= START_TRIGGER_FRAME | WD_FRAME_NUMBER(wb_conn-
> >frame_num);
> > intel_de_rmw(display, WD_TRANS_FUNC_CTL(trans),
> > START_TRIGGER_FRAME | WD_FRAME_NUMBER_MASK,
> diff --git
> > a/drivers/gpu/drm/i915/display/intel_writeback_reg.h
> > b/drivers/gpu/drm/i915/display/intel_writeback_reg.h
> > index 5e7c6c99d191..f526af0f9aff 100644
> > --- a/drivers/gpu/drm/i915/display/intel_writeback_reg.h
> > +++ b/drivers/gpu/drm/i915/display/intel_writeback_reg.h
> > @@ -60,6 +60,7 @@
> > _WD_STRIDE_0,\
> > _WD_STRIDE_1)
> > #define WD_STRIDE_MASK REG_GENMASK(15, 6)
> > +#define WD_STRIDE_VAL(val)
> REG_FIELD_PREP(WD_STRIDE_MASK, val)
> >
> > #define _WD_STREAMCAP_CTL0 0x6e590
> > #define _WD_STREAMCAP_CTL1 0x6ed90
> > --
> > 2.34.1
>
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH v3 21/26] drm/i915/writeback: Configure WD_SURF register
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (19 preceding siblings ...)
2026-03-25 11:07 ` [PATCH v3 20/26] drm/i915/writeback: Configure WD_STRIDE reg Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 11:07 ` [PATCH v3 22/26] drm/i915/writeback: Enable writeback interrupts Suraj Kandpal
` (6 subsequent siblings)
27 siblings, 0 replies; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal
Get the ggtt_offset of the drm_framebuffer which needs to be
written to the surface base address bits of WD_SURF register.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_writeback.c | 4 ++++
drivers/gpu/drm/i915/display/intel_writeback_reg.h | 2 ++
2 files changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
index e2f7c46015d2..54e74450e080 100644
--- a/drivers/gpu/drm/i915/display/intel_writeback.c
+++ b/drivers/gpu/drm/i915/display/intel_writeback.c
@@ -267,6 +267,7 @@ static void intel_writeback_capture(struct intel_atomic_state *state,
const struct drm_display_mode *adjusted_mode =
&crtc_state->hw.adjusted_mode;
struct drm_writeback_job *wb_job = conn_state->writeback_job;
+ struct intel_writeback_job *job = conn_state->writeback_job->priv;
enum transcoder trans = wb_conn->trans;
u32 val = 0;
int bpp;
@@ -275,6 +276,9 @@ static void intel_writeback_capture(struct intel_atomic_state *state,
val = DIV_ROUND_UP((adjusted_mode->hdisplay * bpp), 64);
intel_de_write(display, WD_STRIDE(trans), WD_STRIDE_VAL(val));
+ val = intel_get_ggtt_addr(job->vma);
+ intel_de_write(display, WD_SURF(trans), val);
+
val = 0;
val |= START_TRIGGER_FRAME | WD_FRAME_NUMBER(wb_conn->frame_num);
intel_de_rmw(display, WD_TRANS_FUNC_CTL(trans),
diff --git a/drivers/gpu/drm/i915/display/intel_writeback_reg.h b/drivers/gpu/drm/i915/display/intel_writeback_reg.h
index f526af0f9aff..403f9b64015b 100644
--- a/drivers/gpu/drm/i915/display/intel_writeback_reg.h
+++ b/drivers/gpu/drm/i915/display/intel_writeback_reg.h
@@ -81,6 +81,8 @@
#define WD_SURF(tc) _MMIO_WD(tc,\
_WD_SURF_0,\
_WD_SURF_1)
+#define WD_SURF_ADDR_MASK REG_GENMASK(31, 12)
+#define WD_SURF_ADDR(val) REG_FIELD_PREP(WD_SURF_ADDR_MASK, val)
#define _WD_IMR_0 0x6e560
#define _WD_IMR_1 0x6ed60
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* [PATCH v3 22/26] drm/i915/writeback: Enable writeback interrupts
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (20 preceding siblings ...)
2026-03-25 11:07 ` [PATCH v3 21/26] drm/i915/writeback: Configure WD_SURF register Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 12:59 ` Ville Syrjälä
2026-03-25 11:07 ` [PATCH v3 23/26] drm/i915/writeback: Initialize writeback encoder Suraj Kandpal
` (5 subsequent siblings)
27 siblings, 1 reply; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal
Enable writeback interrupts while enabling writeback
and define the isr handler and schedule work for later
to signal completion job.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
.../gpu/drm/i915/display/intel_display_irq.c | 10 ++++
.../gpu/drm/i915/display/intel_display_regs.h | 1 +
.../gpu/drm/i915/display/intel_writeback.c | 50 +++++++++++++++++++
.../gpu/drm/i915/display/intel_writeback.h | 1 +
4 files changed, 62 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 70c1bba7c0a8..656fb314b985 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -29,6 +29,8 @@
#include "intel_pmdemand.h"
#include "intel_psr.h"
#include "intel_psr_regs.h"
+#include "intel_writeback.h"
+#include "intel_writeback_reg.h"
static void irq_reset(struct intel_display *display, struct i915_irq_regs regs)
{
@@ -1281,6 +1283,11 @@ gen8_de_misc_irq_handler(struct intel_display *display, u32 iir)
found = true;
}
+ if (iir & (GEN8_DE_MISC_WD0)) {
+ intel_writeback_isr_handler(display);
+ found = true;
+ }
+
if (iir & GEN8_DE_EDP_PSR) {
struct intel_encoder *encoder;
u32 psr_iir;
@@ -2337,6 +2344,9 @@ void gen8_de_irq_postinstall(struct intel_display *display)
if (DISPLAY_VER(display) < 11)
de_misc_masked |= GEN8_DE_MISC_GSE;
+ if (DISPLAY_VER(display) >= 13)
+ de_misc_masked |= GEN8_DE_MISC_WD0;
+
if (display->platform.geminilake || display->platform.broxton)
de_port_masked |= BXT_DE_PORT_GMBUS;
diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
index 4746e9ebd920..e637b10597c2 100644
--- a/drivers/gpu/drm/i915/display/intel_display_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
@@ -1495,6 +1495,7 @@
#define XELPDP_RM_TIMEOUT REG_BIT(29)
#define XELPDP_PMDEMAND_RSPTOUT_ERR REG_BIT(27)
#define GEN8_DE_MISC_GSE REG_BIT(27)
+#define GEN8_DE_MISC_WD0 REG_BIT(23)
#define GEN8_DE_EDP_PSR REG_BIT(19)
#define XELPDP_PMDEMAND_RSP REG_BIT(3)
#define XE2LPD_DBUF_OVERLAP_DETECTED REG_BIT(1)
diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
index 54e74450e080..864d4a28de10 100644
--- a/drivers/gpu/drm/i915/display/intel_writeback.c
+++ b/drivers/gpu/drm/i915/display/intel_writeback.c
@@ -14,6 +14,7 @@
#include <drm/drm_encoder.h>
#include <drm/drm_edid.h>
#include <drm/drm_gem_framebuffer_helper.h>
+#include <drm/drm_vblank.h>
#include "intel_atomic.h"
#include "intel_connector.h"
@@ -323,6 +324,20 @@ void intel_writeback_atomic_commit(struct intel_atomic_state *state)
}
}
+static void
+intel_writeback_enable_interrupts(struct intel_display *display,
+ enum transcoder trans)
+{
+ u32 tmp;
+
+ tmp = intel_de_read(display, WD_IIR(trans));
+ intel_de_write_fw(display, WD_IIR(trans), tmp);
+
+ tmp = ~(WD_GTT_FAULT_INT | WD_WRITE_COMPLETE_INT |
+ WD_VBLANK_INT | WD_CAPTURING_INT);
+ intel_de_write(display, WD_IMR(trans), tmp);
+}
+
static void intel_writeback_enable_encoder(struct intel_atomic_state *state,
struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
@@ -348,6 +363,7 @@ static void intel_writeback_enable_encoder(struct intel_atomic_state *state,
fb = job->fb;
hactive = adjusted_mode->hdisplay;
vactive = adjusted_mode->vdisplay;
+ intel_writeback_enable_interrupts(display, trans);
/* Configure WD_STRIDE, WD_SURF and WD_TAIL_CFG */
/* Enable Planes, Pipes and Transcoder */
@@ -509,6 +525,40 @@ intel_writeback_get_hw_state(struct intel_encoder *encoder,
return true;
}
+void intel_writeback_isr_handler(struct intel_display *display)
+{
+ struct intel_encoder *encoder;
+ struct intel_writeback_connector *wb_conn;
+ struct intel_crtc *crtc;
+ u32 iir;
+
+ for_each_intel_encoder(display->drm, encoder) {
+ if (encoder->type != INTEL_OUTPUT_WRITEBACK)
+ continue;
+
+ wb_conn = enc_to_intel_writeback_connector(encoder);
+ if (!wb_conn->job) {
+ drm_err(display->drm, "No writeback job for the connector\n");
+ continue;
+ }
+
+ crtc = intel_crtc_for_pipe(display, wb_conn->pipe);
+ iir = intel_de_read(display, WD_IIR(wb_conn->trans));
+ if (iir & WD_GTT_FAULT_INT)
+ drm_err(display->drm, " GTT fault during writeback\n");
+ if (iir & WD_WRITE_COMPLETE_INT)
+ drm_dbg_kms(display->drm, "Writeback job write completed\n");
+ if (iir & WD_VBLANK_INT) {
+ drm_crtc_handle_vblank(&crtc->base);
+ drm_dbg_kms(display->drm, "Writeback vblank raised\n");
+ }
+ if (iir & WD_CAPTURING_INT)
+ drm_dbg_kms(display->drm, "Writeback job capture has started\n");
+
+ intel_de_write(display, WD_IIR(wb_conn->trans), iir);
+ }
+}
+
int intel_writeback_init(struct intel_display *display)
{
struct intel_encoder *encoder;
diff --git a/drivers/gpu/drm/i915/display/intel_writeback.h b/drivers/gpu/drm/i915/display/intel_writeback.h
index 3c145cf73e20..83a986753c4c 100644
--- a/drivers/gpu/drm/i915/display/intel_writeback.h
+++ b/drivers/gpu/drm/i915/display/intel_writeback.h
@@ -16,6 +16,7 @@ struct intel_writeback_connector;
int intel_writeback_init(struct intel_display *display);
void intel_writeback_atomic_commit(struct intel_atomic_state *state);
+void intel_writeback_isr_handler(struct intel_display *display);
#endif /* __INTEL_WRITEBACK_H__ */
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* Re: [PATCH v3 22/26] drm/i915/writeback: Enable writeback interrupts
2026-03-25 11:07 ` [PATCH v3 22/26] drm/i915/writeback: Enable writeback interrupts Suraj Kandpal
@ 2026-03-25 12:59 ` Ville Syrjälä
0 siblings, 0 replies; 60+ messages in thread
From: Ville Syrjälä @ 2026-03-25 12:59 UTC (permalink / raw)
To: Suraj Kandpal
Cc: intel-xe, intel-gfx, sowmiya.s, uma.shankar, swati2.sharma,
chaitanya.kumar.borah, arun.r.murthy
On Wed, Mar 25, 2026 at 04:37:40PM +0530, Suraj Kandpal wrote:
> Enable writeback interrupts while enabling writeback
> and define the isr handler and schedule work for later
> to signal completion job.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> .../gpu/drm/i915/display/intel_display_irq.c | 10 ++++
> .../gpu/drm/i915/display/intel_display_regs.h | 1 +
> .../gpu/drm/i915/display/intel_writeback.c | 50 +++++++++++++++++++
> .../gpu/drm/i915/display/intel_writeback.h | 1 +
> 4 files changed, 62 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index 70c1bba7c0a8..656fb314b985 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -29,6 +29,8 @@
> #include "intel_pmdemand.h"
> #include "intel_psr.h"
> #include "intel_psr_regs.h"
> +#include "intel_writeback.h"
> +#include "intel_writeback_reg.h"
>
> static void irq_reset(struct intel_display *display, struct i915_irq_regs regs)
> {
> @@ -1281,6 +1283,11 @@ gen8_de_misc_irq_handler(struct intel_display *display, u32 iir)
> found = true;
> }
>
> + if (iir & (GEN8_DE_MISC_WD0)) {
> + intel_writeback_isr_handler(display);
> + found = true;
> + }
> +
> if (iir & GEN8_DE_EDP_PSR) {
> struct intel_encoder *encoder;
> u32 psr_iir;
> @@ -2337,6 +2344,9 @@ void gen8_de_irq_postinstall(struct intel_display *display)
> if (DISPLAY_VER(display) < 11)
> de_misc_masked |= GEN8_DE_MISC_GSE;
>
> + if (DISPLAY_VER(display) >= 13)
> + de_misc_masked |= GEN8_DE_MISC_WD0;
> +
> if (display->platform.geminilake || display->platform.broxton)
> de_port_masked |= BXT_DE_PORT_GMBUS;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
> index 4746e9ebd920..e637b10597c2 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
> @@ -1495,6 +1495,7 @@
> #define XELPDP_RM_TIMEOUT REG_BIT(29)
> #define XELPDP_PMDEMAND_RSPTOUT_ERR REG_BIT(27)
> #define GEN8_DE_MISC_GSE REG_BIT(27)
> +#define GEN8_DE_MISC_WD0 REG_BIT(23)
> #define GEN8_DE_EDP_PSR REG_BIT(19)
> #define XELPDP_PMDEMAND_RSP REG_BIT(3)
> #define XE2LPD_DBUF_OVERLAP_DETECTED REG_BIT(1)
> diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
> index 54e74450e080..864d4a28de10 100644
> --- a/drivers/gpu/drm/i915/display/intel_writeback.c
> +++ b/drivers/gpu/drm/i915/display/intel_writeback.c
> @@ -14,6 +14,7 @@
> #include <drm/drm_encoder.h>
> #include <drm/drm_edid.h>
> #include <drm/drm_gem_framebuffer_helper.h>
> +#include <drm/drm_vblank.h>
>
> #include "intel_atomic.h"
> #include "intel_connector.h"
> @@ -323,6 +324,20 @@ void intel_writeback_atomic_commit(struct intel_atomic_state *state)
> }
> }
>
> +static void
> +intel_writeback_enable_interrupts(struct intel_display *display,
> + enum transcoder trans)
> +{
> + u32 tmp;
> +
> + tmp = intel_de_read(display, WD_IIR(trans));
> + intel_de_write_fw(display, WD_IIR(trans), tmp);
> +
> + tmp = ~(WD_GTT_FAULT_INT | WD_WRITE_COMPLETE_INT |
> + WD_VBLANK_INT | WD_CAPTURING_INT);
> + intel_de_write(display, WD_IMR(trans), tmp);
If this is a double buffered IIR register then we really need to use the
i915_irq_regs stuff to do this properly.
> +}
> +
> static void intel_writeback_enable_encoder(struct intel_atomic_state *state,
> struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> @@ -348,6 +363,7 @@ static void intel_writeback_enable_encoder(struct intel_atomic_state *state,
> fb = job->fb;
> hactive = adjusted_mode->hdisplay;
> vactive = adjusted_mode->vdisplay;
> + intel_writeback_enable_interrupts(display, trans);
>
> /* Configure WD_STRIDE, WD_SURF and WD_TAIL_CFG */
> /* Enable Planes, Pipes and Transcoder */
> @@ -509,6 +525,40 @@ intel_writeback_get_hw_state(struct intel_encoder *encoder,
> return true;
> }
>
> +void intel_writeback_isr_handler(struct intel_display *display)
"isr_handler" is not a term we use anywhere else.
> +{
> + struct intel_encoder *encoder;
> + struct intel_writeback_connector *wb_conn;
> + struct intel_crtc *crtc;
> + u32 iir;
> +
> + for_each_intel_encoder(display->drm, encoder) {
We should already know which WD transcoder generated the interrupt.
Iterating all of them blindly doesn't seem right.
> + if (encoder->type != INTEL_OUTPUT_WRITEBACK)
> + continue;
> +
> + wb_conn = enc_to_intel_writeback_connector(encoder);
> + if (!wb_conn->job) {
The interrupt code shouldn't care about that.
> + drm_err(display->drm, "No writeback job for the connector\n");
> + continue;
> + }
> +
> + crtc = intel_crtc_for_pipe(display, wb_conn->pipe);
Hmm. The pipe assignment will be dynamic. So looks like this stuff
will need some actual thought...
> + iir = intel_de_read(display, WD_IIR(wb_conn->trans));
> + if (iir & WD_GTT_FAULT_INT)
> + drm_err(display->drm, " GTT fault during writeback\n");
Missing at least the ATS fault.
> + if (iir & WD_WRITE_COMPLETE_INT)
> + drm_dbg_kms(display->drm, "Writeback job write completed\n");
> + if (iir & WD_VBLANK_INT) {
> + drm_crtc_handle_vblank(&crtc->base);
I suspect the commit completion needs to happen from
WD_WRITE_COMPLETE_INT. So either we put the vblank handling there, or
we use manual commit completion for WD (ala. async flip/DSB/flip queue).
I guess one option would be something like
/* armed event for flip queue based updates */
struct drm_pending_vblank_event *flipq_event;\
+ /* armed event for each WD transcoder */
struct drm_pending_vblank_event *wd_event[2];
And then we iterate the crtcs, looking for one with an event for the
appropriate WD transcoder.
Another idea that just came to me would be something like this:
struct intel_crtc {
...
struct drm_pending_vblank_event *event;
enum {
EVENT_NONE,
EVENT_FLIP_DONE
EVENT_DSB,
EVENT_FLIP_QUEUE,
EVENT_WD0,
EVENT_WD1,
} event_type;
...
};
And then we keep the event and its type in sync while arming/sending.
Would avoid having to keep so many mutually exclusive event pointers
around.
> + drm_dbg_kms(display->drm, "Writeback vblank raised\n");
> + }
> + if (iir & WD_CAPTURING_INT)
> + drm_dbg_kms(display->drm, "Writeback job capture has started\n");
> +
> + intel_de_write(display, WD_IIR(wb_conn->trans), iir);
> + }
> +}
> +
> int intel_writeback_init(struct intel_display *display)
> {
> struct intel_encoder *encoder;
> diff --git a/drivers/gpu/drm/i915/display/intel_writeback.h b/drivers/gpu/drm/i915/display/intel_writeback.h
> index 3c145cf73e20..83a986753c4c 100644
> --- a/drivers/gpu/drm/i915/display/intel_writeback.h
> +++ b/drivers/gpu/drm/i915/display/intel_writeback.h
> @@ -16,6 +16,7 @@ struct intel_writeback_connector;
>
> int intel_writeback_init(struct intel_display *display);
> void intel_writeback_atomic_commit(struct intel_atomic_state *state);
> +void intel_writeback_isr_handler(struct intel_display *display);
>
> #endif /* __INTEL_WRITEBACK_H__ */
>
> --
> 2.34.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH v3 23/26] drm/i915/writeback: Initialize writeback encoder.
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (21 preceding siblings ...)
2026-03-25 11:07 ` [PATCH v3 22/26] drm/i915/writeback: Enable writeback interrupts Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 13:00 ` Ville Syrjälä
2026-03-25 11:07 ` [PATCH v3 24/26] drm/i915/writeback: Define the disable sequence for writeback Suraj Kandpal
` (4 subsequent siblings)
27 siblings, 1 reply; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal
Call the init function to initialize the writeback encoder
only for ADLP.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 4cc3e0779e8a..b4cf7153b7c8 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8030,6 +8030,9 @@ void intel_setup_outputs(struct intel_display *display)
intel_dvo_init(display);
}
+ if (DISPLAY_VER(display) == 13)
+ intel_writeback_init(display);
+
for_each_intel_encoder(display->drm, encoder) {
encoder->base.possible_crtcs =
intel_encoder_possible_crtcs(encoder);
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* Re: [PATCH v3 23/26] drm/i915/writeback: Initialize writeback encoder.
2026-03-25 11:07 ` [PATCH v3 23/26] drm/i915/writeback: Initialize writeback encoder Suraj Kandpal
@ 2026-03-25 13:00 ` Ville Syrjälä
2026-03-26 4:01 ` Kandpal, Suraj
0 siblings, 1 reply; 60+ messages in thread
From: Ville Syrjälä @ 2026-03-25 13:00 UTC (permalink / raw)
To: Suraj Kandpal
Cc: intel-xe, intel-gfx, sowmiya.s, uma.shankar, swati2.sharma,
chaitanya.kumar.borah, arun.r.murthy
On Wed, Mar 25, 2026 at 04:37:41PM +0530, Suraj Kandpal wrote:
> Call the init function to initialize the writeback encoder
> only for ADLP.
Why only for ADLP?
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 4cc3e0779e8a..b4cf7153b7c8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -8030,6 +8030,9 @@ void intel_setup_outputs(struct intel_display *display)
> intel_dvo_init(display);
> }
>
> + if (DISPLAY_VER(display) == 13)
> + intel_writeback_init(display);
> +
> for_each_intel_encoder(display->drm, encoder) {
> encoder->base.possible_crtcs =
> intel_encoder_possible_crtcs(encoder);
> --
> 2.34.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 60+ messages in thread* RE: [PATCH v3 23/26] drm/i915/writeback: Initialize writeback encoder.
2026-03-25 13:00 ` Ville Syrjälä
@ 2026-03-26 4:01 ` Kandpal, Suraj
0 siblings, 0 replies; 60+ messages in thread
From: Kandpal, Suraj @ 2026-03-26 4:01 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
S, Sowmiya, Shankar, Uma, Sharma, Swati2, Borah, Chaitanya Kumar,
Murthy, Arun R
> Subject: Re: [PATCH v3 23/26] drm/i915/writeback: Initialize writeback
> encoder.
>
> On Wed, Mar 25, 2026 at 04:37:41PM +0530, Suraj Kandpal wrote:
> > Call the init function to initialize the writeback encoder only for
> > ADLP.
>
> Why only for ADLP?
The plan is to enable it for ADLP let the bugs come in fix them,
Then enable for each gen along with any WA's introduced. Since Writeback
has been along for a long time and we are just starting to implement it.
So I don't want the whole CI being polluted because of this activity.
Regards,
Suraj Kandpal
>
> >
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 3 +++
> > 1 file changed, 3 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index 4cc3e0779e8a..b4cf7153b7c8 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -8030,6 +8030,9 @@ void intel_setup_outputs(struct intel_display
> *display)
> > intel_dvo_init(display);
> > }
> >
> > + if (DISPLAY_VER(display) == 13)
> > + intel_writeback_init(display);
> > +
> > for_each_intel_encoder(display->drm, encoder) {
> > encoder->base.possible_crtcs =
> > intel_encoder_possible_crtcs(encoder);
> > --
> > 2.34.1
>
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH v3 24/26] drm/i915/writeback: Define the disable sequence for writeback
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (22 preceding siblings ...)
2026-03-25 11:07 ` [PATCH v3 23/26] drm/i915/writeback: Initialize writeback encoder Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 11:07 ` [PATCH v3 25/26] drm/i915/writeback: Make exception for writeback connector Suraj Kandpal
` (3 subsequent siblings)
27 siblings, 0 replies; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal
Define the disable sequence for a writeback encoder. We only disable
the encoder if no writeback job is pending, if it is then we just
need to disable the wd function so that values can be updated
accordingly.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
.../gpu/drm/i915/display/intel_writeback.c | 28 +++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
index 864d4a28de10..870fbfdddef5 100644
--- a/drivers/gpu/drm/i915/display/intel_writeback.c
+++ b/drivers/gpu/drm/i915/display/intel_writeback.c
@@ -559,6 +559,33 @@ void intel_writeback_isr_handler(struct intel_display *display)
}
}
+static void
+intel_writeback_disable_encoder(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state,
+ const struct drm_connector_state *conn_state)
+{
+ struct intel_display *display = to_intel_display(encoder);
+ struct intel_writeback_connector *wb_conn =
+ enc_to_intel_writeback_connector(encoder);
+ struct intel_crtc *pipe_crtc;
+ int i = 0;
+
+ for_each_pipe_crtc_modeset_disable(display, pipe_crtc, crtc_state, i) {
+ const struct intel_crtc_state *old_pipe_crtc_state =
+ intel_atomic_get_old_crtc_state(state, pipe_crtc);
+
+ intel_crtc_vblank_off(old_pipe_crtc_state);
+ }
+
+ intel_de_rmw(display, TRANSCONF_WD(crtc_state->cpu_transcoder), WD_TRANS_ENABLE,
+ REG_FIELD_PREP(WD_TRANS_ENABLE, 0));
+ intel_de_rmw(display, WD_TRANS_FUNC_CTL(crtc_state->cpu_transcoder),
+ TRANS_WD_FUNC_ENABLE,
+ REG_FIELD_PREP(TRANS_WD_FUNC_ENABLE, 0));
+ wb_conn->frame_num = 1;
+}
+
int intel_writeback_init(struct intel_display *display)
{
struct intel_encoder *encoder;
@@ -587,6 +614,7 @@ int intel_writeback_init(struct intel_display *display)
encoder->get_hw_state = intel_writeback_get_hw_state;
encoder->compute_config = intel_writeback_compute_config;
encoder->enable = intel_writeback_enable_encoder;
+ encoder->disable = intel_writeback_disable_encoder;
connector = &writeback_conn->connector;
ret = intel_writeback_connector_alloc(connector);
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* [PATCH v3 25/26] drm/i915/writeback: Make exception for writeback connector
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (23 preceding siblings ...)
2026-03-25 11:07 ` [PATCH v3 24/26] drm/i915/writeback: Define the disable sequence for writeback Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 11:07 ` [PATCH v3 26/26] drm/i915/writeback: Modify state verify function Suraj Kandpal
` (2 subsequent siblings)
27 siblings, 0 replies; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal
Writeback connector is a special connector as it does not actually
exist. This means a lot of checks and computations need to be skipped
and exceptions need to be made when it comes to this connector.
This commit contains all those changes for a writeback connector.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 115 ++++++++++++++----
.../drm/i915/display/intel_display_debugfs.c | 3 +
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 3 +
drivers/gpu/drm/i915/display/intel_opregion.c | 2 +-
drivers/gpu/drm/i915/display/intel_pmdemand.c | 3 +
drivers/gpu/drm/i915/display/intel_vdsc.c | 4 +
.../gpu/drm/i915/display/intel_writeback.c | 5 +
.../gpu/drm/i915/display/intel_writeback.h | 1 +
8 files changed, 110 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index b4cf7153b7c8..e47b4e667fec 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -127,6 +127,7 @@
#include "intel_vrr.h"
#include "intel_wm.h"
#include "intel_writeback.h"
+#include "intel_writeback_reg.h"
#include "skl_scaler.h"
#include "skl_universal_plane.h"
#include "skl_watermark.h"
@@ -1639,6 +1640,9 @@ static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_sta
intel_set_transcoder_timings(crtc_state);
+ if (intel_writeback_transcoder_is_wd(cpu_transcoder))
+ return;
+
if (cpu_transcoder != TRANSCODER_EDP)
intel_de_write(display, TRANS_MULT(display, cpu_transcoder),
crtc_state->pixel_multiplier - 1);
@@ -2687,6 +2691,10 @@ static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_sta
crtc_vblank_start = adjusted_mode->crtc_vblank_start;
crtc_vblank_end = adjusted_mode->crtc_vblank_end;
+ if (intel_writeback_transcoder_is_wd(cpu_transcoder)) {
+ return;
+ }
+
if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
/* the chip adds 2 halflines automatically */
crtc_vtotal -= 1;
@@ -2881,6 +2889,15 @@ static void intel_get_transcoder_timings(struct intel_crtc *crtc,
struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
u32 tmp;
+ if (intel_writeback_transcoder_is_wd(cpu_transcoder)) {
+ tmp = intel_de_read(display, TRANS_HTOTAL(display, cpu_transcoder));
+ adjusted_mode->crtc_hdisplay = REG_FIELD_GET(HACTIVE_MASK, tmp) + 1;
+
+ tmp = intel_de_read(display, TRANS_VTOTAL(display, cpu_transcoder));
+ adjusted_mode->crtc_vdisplay = REG_FIELD_GET(VACTIVE_MASK, tmp) + 1;
+ return;
+ }
+
tmp = intel_de_read(display, TRANS_HTOTAL(display, cpu_transcoder));
adjusted_mode->crtc_hdisplay = REG_FIELD_GET(HACTIVE_MASK, tmp) + 1;
adjusted_mode->crtc_htotal = REG_FIELD_GET(HTOTAL_MASK, tmp) + 1;
@@ -3794,32 +3811,59 @@ static u8 hsw_enabled_transcoders(struct intel_crtc *crtc)
u32 tmp = 0;
power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
- with_intel_display_power_if_enabled(display, power_domain)
- tmp = intel_de_read(display,
- TRANS_DDI_FUNC_CTL(display, cpu_transcoder));
+ if (cpu_transcoder == TRANSCODER_WD_0 ||
+ cpu_transcoder == TRANSCODER_WD_1) {
+ with_intel_display_power_if_enabled(display, power_domain)
+ tmp = intel_de_read(display,
+ WD_TRANS_FUNC_CTL(cpu_transcoder));
+ if (!(tmp & TRANS_WD_FUNC_ENABLE))
+ continue;
- if (!(tmp & TRANS_DDI_FUNC_ENABLE))
- continue;
+ switch (tmp & WD_INPUT_SELECT_MASK) {
+ case WD_INPUT_PIPE_A:
+ trans_pipe = PIPE_A;
+ break;
+ case WD_INPUT_PIPE_B:
+ trans_pipe = PIPE_B;
+ break;
+ case WD_INPUT_PIPE_C:
+ trans_pipe = PIPE_C;
+ break;
+ case WD_INPUT_PIPE_D:
+ trans_pipe = PIPE_D;
+ break;
+ default:
+ MISSING_CASE(tmp & WD_INPUT_SELECT_MASK);
+ break;
+ }
+ } else {
+ with_intel_display_power_if_enabled(display, power_domain)
+ tmp = intel_de_read(display,
+ TRANS_DDI_FUNC_CTL(display, cpu_transcoder));
- switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
- default:
- drm_WARN(display->drm, 1,
- "unknown pipe linked to transcoder %s\n",
- transcoder_name(cpu_transcoder));
- fallthrough;
- case TRANS_DDI_EDP_INPUT_A_ONOFF:
- case TRANS_DDI_EDP_INPUT_A_ON:
- trans_pipe = PIPE_A;
- break;
- case TRANS_DDI_EDP_INPUT_B_ONOFF:
- trans_pipe = PIPE_B;
- break;
- case TRANS_DDI_EDP_INPUT_C_ONOFF:
- trans_pipe = PIPE_C;
- break;
- case TRANS_DDI_EDP_INPUT_D_ONOFF:
- trans_pipe = PIPE_D;
- break;
+ if (!(tmp & TRANS_DDI_FUNC_ENABLE))
+ continue;
+
+ switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
+ default:
+ drm_WARN(display->drm, 1,
+ "unknown pipe linked to transcoder %s\n",
+ transcoder_name(cpu_transcoder));
+ fallthrough;
+ case TRANS_DDI_EDP_INPUT_A_ONOFF:
+ case TRANS_DDI_EDP_INPUT_A_ON:
+ trans_pipe = PIPE_A;
+ break;
+ case TRANS_DDI_EDP_INPUT_B_ONOFF:
+ trans_pipe = PIPE_B;
+ break;
+ case TRANS_DDI_EDP_INPUT_C_ONOFF:
+ trans_pipe = PIPE_C;
+ break;
+ case TRANS_DDI_EDP_INPUT_D_ONOFF:
+ trans_pipe = PIPE_D;
+ break;
+ }
}
if (trans_pipe == crtc->pipe)
@@ -3908,6 +3952,13 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
pipe_config->pch_pfit.force_thru = true;
}
+ if (intel_writeback_transcoder_is_wd(pipe_config->cpu_transcoder)) {
+ tmp = intel_de_read(display,
+ TRANSCONF_WD(pipe_config->cpu_transcoder));
+
+ return tmp & WD_TRANS_ENABLE;
+ }
+
tmp = intel_de_read(display,
TRANSCONF(display, pipe_config->cpu_transcoder));
@@ -4017,7 +4068,8 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
DISPLAY_VER(display) >= 11)
intel_get_transcoder_timings(crtc, pipe_config);
- if (transcoder_has_vrr(pipe_config))
+ if (!intel_writeback_transcoder_is_wd(pipe_config->cpu_transcoder) &&
+ transcoder_has_vrr(pipe_config))
intel_vrr_get_config(pipe_config);
intel_get_pipe_src_size(crtc, pipe_config);
@@ -4030,6 +4082,8 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
pipe_config->output_format = INTEL_OUTPUT_FORMAT_YCBCR444;
else
pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
+ } else if (intel_writeback_transcoder_is_wd(pipe_config->cpu_transcoder)) {
+ pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
} else {
pipe_config->output_format =
bdw_get_pipe_misc_output_format(crtc);
@@ -4056,6 +4110,7 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
hsw_ips_get_config(pipe_config);
if (pipe_config->cpu_transcoder != TRANSCODER_EDP &&
+ !intel_writeback_transcoder_is_wd(pipe_config->cpu_transcoder) &&
!transcoder_is_dsi(pipe_config->cpu_transcoder)) {
pipe_config->pixel_multiplier =
intel_de_read(display,
@@ -4064,6 +4119,16 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
pipe_config->pixel_multiplier = 1;
}
+ if (!intel_writeback_transcoder_is_wd(pipe_config->cpu_transcoder) &&
+ !transcoder_is_dsi(pipe_config->cpu_transcoder)) {
+ tmp = intel_de_read(display, CHICKEN_TRANS(display, pipe_config->cpu_transcoder));
+
+ pipe_config->framestart_delay = REG_FIELD_GET(HSW_FRAME_START_DELAY_MASK, tmp) + 1;
+ } else {
+ /* no idea if this is correct */
+ pipe_config->framestart_delay = 1;
+ }
+
out:
intel_display_power_put_all_in_set(display, &crtc->hw_readout_power_domains);
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 2614c4863c87..350de3b3589d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -202,6 +202,9 @@ static void intel_panel_info(struct seq_file *m,
{
const struct drm_display_mode *fixed_mode;
+ if (connector->base.connector_type == DRM_MODE_CONNECTOR_WRITEBACK)
+ return;
+
if (list_empty(&connector->panel.fixed_modes))
return;
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index f5d4f7146fbc..4e3b655dc025 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -4830,6 +4830,9 @@ int intel_dpll_compute(struct intel_atomic_state *state,
struct intel_display *display = to_intel_display(state);
const struct intel_dpll_mgr *dpll_mgr = display->dpll.mgr;
+ if (encoder->type == INTEL_OUTPUT_WRITEBACK)
+ return 0;
+
if (drm_WARN_ON(display->drm, !dpll_mgr))
return -EINVAL;
diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
index e25be56e678b..fe01b283f783 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.c
+++ b/drivers/gpu/drm/i915/display/intel_opregion.c
@@ -397,7 +397,7 @@ int intel_opregion_notify_encoder(struct intel_encoder *encoder,
int ret;
/* don't care about old stuff for now */
- if (!HAS_DDI(display))
+ if (!HAS_DDI(display) || encoder->type == INTEL_OUTPUT_WRITEBACK)
return 0;
/* Avoid port out of bounds checks if SWSCI isn't there. */
diff --git a/drivers/gpu/drm/i915/display/intel_pmdemand.c b/drivers/gpu/drm/i915/display/intel_pmdemand.c
index 244806a26da3..e7b6e6d1ba63 100644
--- a/drivers/gpu/drm/i915/display/intel_pmdemand.c
+++ b/drivers/gpu/drm/i915/display/intel_pmdemand.c
@@ -158,6 +158,9 @@ intel_pmdemand_update_phys_mask(struct intel_display *display,
if (!encoder)
return;
+ if (encoder->type == INTEL_OUTPUT_WRITEBACK)
+ return;
+
if (intel_encoder_is_tc(encoder))
return;
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 6c09c6d99ffe..08594afdedd9 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -20,6 +20,7 @@
#include "intel_qp_tables.h"
#include "intel_vdsc.h"
#include "intel_vdsc_regs.h"
+#include "intel_writeback.h"
bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state)
{
@@ -1081,6 +1082,9 @@ void intel_dsc_get_config(struct intel_crtc_state *crtc_state)
if (!intel_dsc_source_support(crtc_state))
return;
+ if (intel_writeback_transcoder_is_wd(cpu_transcoder))
+ return;
+
power_domain = intel_dsc_power_domain(crtc, cpu_transcoder);
wakeref = intel_display_power_get_if_enabled(display, power_domain);
diff --git a/drivers/gpu/drm/i915/display/intel_writeback.c b/drivers/gpu/drm/i915/display/intel_writeback.c
index 870fbfdddef5..52c2d8b91aff 100644
--- a/drivers/gpu/drm/i915/display/intel_writeback.c
+++ b/drivers/gpu/drm/i915/display/intel_writeback.c
@@ -53,6 +53,11 @@ static const u32 writeback_formats[] = {
DRM_FORMAT_XBGR2101010,
};
+bool intel_writeback_transcoder_is_wd(enum transcoder transcoder)
+{
+ return transcoder == TRANSCODER_WD_0 || transcoder == TRANSCODER_WD_1;
+}
+
static struct intel_writeback_connector
*conn_to_intel_writeback_connector(struct intel_connector *connector)
{
diff --git a/drivers/gpu/drm/i915/display/intel_writeback.h b/drivers/gpu/drm/i915/display/intel_writeback.h
index 83a986753c4c..3a99a6526841 100644
--- a/drivers/gpu/drm/i915/display/intel_writeback.h
+++ b/drivers/gpu/drm/i915/display/intel_writeback.h
@@ -17,6 +17,7 @@ struct intel_writeback_connector;
int intel_writeback_init(struct intel_display *display);
void intel_writeback_atomic_commit(struct intel_atomic_state *state);
void intel_writeback_isr_handler(struct intel_display *display);
+bool intel_writeback_transcoder_is_wd(enum transcoder transcoder);
#endif /* __INTEL_WRITEBACK_H__ */
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* [PATCH v3 26/26] drm/i915/writeback: Modify state verify function
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (24 preceding siblings ...)
2026-03-25 11:07 ` [PATCH v3 25/26] drm/i915/writeback: Make exception for writeback connector Suraj Kandpal
@ 2026-03-25 11:07 ` Suraj Kandpal
2026-03-25 13:01 ` Ville Syrjälä
2026-03-25 11:19 ` ✗ CI.checkpatch: warning for Enable Pipe writeback (rev3) Patchwork
2026-03-25 11:20 ` ✓ CI.KUnit: success " Patchwork
27 siblings, 1 reply; 60+ messages in thread
From: Suraj Kandpal @ 2026-03-25 11:07 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: sowmiya.s, uma.shankar, swati2.sharma, chaitanya.kumar.borah,
arun.r.murthy, Suraj Kandpal
Modify the state verify functions to take into account the fact
that writeback does not need all the timings for it to be set.
Moreover there is no need for dpll state nor do we need to set
any sort of flags for it.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 57 ++++++++++++--------
1 file changed, 35 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index e47b4e667fec..59b6c61890bc 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5140,6 +5140,8 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
struct drm_printer p;
u32 exclude_infoframes = 0;
bool ret = true;
+ bool is_writeback =
+ intel_crtc_has_type(current_config, INTEL_OUTPUT_WRITEBACK);
if (fastset)
p = drm_dbg_printer(display->drm, DRM_UT_KMS, NULL);
@@ -5245,20 +5247,25 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
} while (0)
#define PIPE_CONF_CHECK_TIMINGS(name) do { \
- PIPE_CONF_CHECK_I(name.crtc_hdisplay); \
- PIPE_CONF_CHECK_I(name.crtc_htotal); \
- PIPE_CONF_CHECK_I(name.crtc_hblank_start); \
- PIPE_CONF_CHECK_I(name.crtc_hblank_end); \
- PIPE_CONF_CHECK_I(name.crtc_hsync_start); \
- PIPE_CONF_CHECK_I(name.crtc_hsync_end); \
- PIPE_CONF_CHECK_I(name.crtc_vdisplay); \
- if (!fastset || !allow_vblank_delay_fastset(current_config)) \
- PIPE_CONF_CHECK_I(name.crtc_vblank_start); \
- PIPE_CONF_CHECK_I(name.crtc_vsync_start); \
- PIPE_CONF_CHECK_I(name.crtc_vsync_end); \
- if (!fastset || !pipe_config->update_lrr) { \
- PIPE_CONF_CHECK_I(name.crtc_vtotal); \
- PIPE_CONF_CHECK_I(name.crtc_vblank_end); \
+ if (is_writeback) { \
+ PIPE_CONF_CHECK_I(name.crtc_hdisplay); \
+ PIPE_CONF_CHECK_I(name.crtc_vdisplay); \
+ } else { \
+ PIPE_CONF_CHECK_I(name.crtc_hdisplay); \
+ PIPE_CONF_CHECK_I(name.crtc_htotal); \
+ PIPE_CONF_CHECK_I(name.crtc_hblank_start); \
+ PIPE_CONF_CHECK_I(name.crtc_hblank_end); \
+ PIPE_CONF_CHECK_I(name.crtc_hsync_start); \
+ PIPE_CONF_CHECK_I(name.crtc_hsync_end); \
+ PIPE_CONF_CHECK_I(name.crtc_vdisplay); \
+ if (!fastset || !allow_vblank_delay_fastset(current_config)) \
+ PIPE_CONF_CHECK_I(name.crtc_vblank_start); \
+ PIPE_CONF_CHECK_I(name.crtc_vsync_start); \
+ PIPE_CONF_CHECK_I(name.crtc_vsync_end); \
+ if (!fastset || !pipe_config->update_lrr) { \
+ PIPE_CONF_CHECK_I(name.crtc_vtotal); \
+ PIPE_CONF_CHECK_I(name.crtc_vblank_end); \
+ } \
} \
} while (0)
@@ -5387,10 +5394,11 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_I(pixel_multiplier);
- PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
- DRM_MODE_FLAG_INTERLACE);
+ if (!is_writeback)
+ PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
+ DRM_MODE_FLAG_INTERLACE);
- if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) {
+ if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS) && !is_writeback) {
PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
DRM_MODE_FLAG_PHSYNC);
PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
@@ -5441,6 +5449,8 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_BOOL(hw.casf_params.casf_enable);
PIPE_CONF_CHECK_I(hw.casf_params.win_size);
PIPE_CONF_CHECK_I(hw.casf_params.strength);
+ if (!is_writeback)
+ PIPE_CONF_CHECK_I(pixel_rate);
PIPE_CONF_CHECK_X(gamma_mode);
if (display->platform.cherryview)
@@ -5463,24 +5473,27 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_BOOL(double_wide);
- if (display->dpll.mgr)
+ if (display->dpll.mgr && !is_writeback)
PIPE_CONF_CHECK_P(intel_dpll);
/* FIXME convert everything over the dpll_mgr */
- if (display->dpll.mgr || HAS_GMCH(display))
+ if ((display->dpll.mgr || HAS_GMCH(display)) && !is_writeback)
PIPE_CONF_CHECK_PLL(dpll_hw_state);
PIPE_CONF_CHECK_X(dsi_pll.ctrl);
PIPE_CONF_CHECK_X(dsi_pll.div);
- if (display->platform.g4x || DISPLAY_VER(display) >= 5)
+ if ((display->platform.g4x || DISPLAY_VER(display) >= 5) &&
+ !is_writeback)
PIPE_CONF_CHECK_I(pipe_bpp);
- if (!fastset || !pipe_config->update_m_n) {
+ if ((!fastset || !pipe_config->update_m_n) && !is_writeback) {
PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_clock);
PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_clock);
}
- PIPE_CONF_CHECK_I(port_clock);
+
+ if (!is_writeback)
+ PIPE_CONF_CHECK_I(port_clock);
PIPE_CONF_CHECK_I(min_voltage_level);
--
2.34.1
^ permalink raw reply related [flat|nested] 60+ messages in thread* Re: [PATCH v3 26/26] drm/i915/writeback: Modify state verify function
2026-03-25 11:07 ` [PATCH v3 26/26] drm/i915/writeback: Modify state verify function Suraj Kandpal
@ 2026-03-25 13:01 ` Ville Syrjälä
2026-03-26 3:57 ` Kandpal, Suraj
0 siblings, 1 reply; 60+ messages in thread
From: Ville Syrjälä @ 2026-03-25 13:01 UTC (permalink / raw)
To: Suraj Kandpal
Cc: intel-xe, intel-gfx, sowmiya.s, uma.shankar, swati2.sharma,
chaitanya.kumar.borah, arun.r.murthy
On Wed, Mar 25, 2026 at 04:37:44PM +0530, Suraj Kandpal wrote:
> Modify the state verify functions to take into account the fact
> that writeback does not need all the timings for it to be set.
> Moreover there is no need for dpll state nor do we need to set
> any sort of flags for it.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 57 ++++++++++++--------
> 1 file changed, 35 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index e47b4e667fec..59b6c61890bc 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5140,6 +5140,8 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
> struct drm_printer p;
> u32 exclude_infoframes = 0;
> bool ret = true;
> + bool is_writeback =
> + intel_crtc_has_type(current_config, INTEL_OUTPUT_WRITEBACK);
>
> if (fastset)
> p = drm_dbg_printer(display->drm, DRM_UT_KMS, NULL);
> @@ -5245,20 +5247,25 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
> } while (0)
>
> #define PIPE_CONF_CHECK_TIMINGS(name) do { \
> - PIPE_CONF_CHECK_I(name.crtc_hdisplay); \
> - PIPE_CONF_CHECK_I(name.crtc_htotal); \
> - PIPE_CONF_CHECK_I(name.crtc_hblank_start); \
> - PIPE_CONF_CHECK_I(name.crtc_hblank_end); \
> - PIPE_CONF_CHECK_I(name.crtc_hsync_start); \
> - PIPE_CONF_CHECK_I(name.crtc_hsync_end); \
> - PIPE_CONF_CHECK_I(name.crtc_vdisplay); \
> - if (!fastset || !allow_vblank_delay_fastset(current_config)) \
> - PIPE_CONF_CHECK_I(name.crtc_vblank_start); \
> - PIPE_CONF_CHECK_I(name.crtc_vsync_start); \
> - PIPE_CONF_CHECK_I(name.crtc_vsync_end); \
> - if (!fastset || !pipe_config->update_lrr) { \
> - PIPE_CONF_CHECK_I(name.crtc_vtotal); \
> - PIPE_CONF_CHECK_I(name.crtc_vblank_end); \
> + if (is_writeback) { \
> + PIPE_CONF_CHECK_I(name.crtc_hdisplay); \
> + PIPE_CONF_CHECK_I(name.crtc_vdisplay); \
> + } else { \
> + PIPE_CONF_CHECK_I(name.crtc_hdisplay); \
> + PIPE_CONF_CHECK_I(name.crtc_htotal); \
> + PIPE_CONF_CHECK_I(name.crtc_hblank_start); \
> + PIPE_CONF_CHECK_I(name.crtc_hblank_end); \
> + PIPE_CONF_CHECK_I(name.crtc_hsync_start); \
> + PIPE_CONF_CHECK_I(name.crtc_hsync_end); \
> + PIPE_CONF_CHECK_I(name.crtc_vdisplay); \
> + if (!fastset || !allow_vblank_delay_fastset(current_config)) \
> + PIPE_CONF_CHECK_I(name.crtc_vblank_start); \
> + PIPE_CONF_CHECK_I(name.crtc_vsync_start); \
> + PIPE_CONF_CHECK_I(name.crtc_vsync_end); \
> + if (!fastset || !pipe_config->update_lrr) { \
> + PIPE_CONF_CHECK_I(name.crtc_vtotal); \
> + PIPE_CONF_CHECK_I(name.crtc_vblank_end); \
> + } \
This is ugly. I think a much better option is to make sure the
writeback stuff actually does proper compute/readout for all
of this.
> } \
> } while (0)
>
> @@ -5387,10 +5394,11 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>
> PIPE_CONF_CHECK_I(pixel_multiplier);
>
> - PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> - DRM_MODE_FLAG_INTERLACE);
> + if (!is_writeback)
> + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> + DRM_MODE_FLAG_INTERLACE);
>
> - if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) {
> + if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS) && !is_writeback) {
> PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> DRM_MODE_FLAG_PHSYNC);
> PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> @@ -5441,6 +5449,8 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
> PIPE_CONF_CHECK_BOOL(hw.casf_params.casf_enable);
> PIPE_CONF_CHECK_I(hw.casf_params.win_size);
> PIPE_CONF_CHECK_I(hw.casf_params.strength);
> + if (!is_writeback)
> + PIPE_CONF_CHECK_I(pixel_rate);
>
> PIPE_CONF_CHECK_X(gamma_mode);
> if (display->platform.cherryview)
> @@ -5463,24 +5473,27 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>
> PIPE_CONF_CHECK_BOOL(double_wide);
>
> - if (display->dpll.mgr)
> + if (display->dpll.mgr && !is_writeback)
> PIPE_CONF_CHECK_P(intel_dpll);
>
> /* FIXME convert everything over the dpll_mgr */
> - if (display->dpll.mgr || HAS_GMCH(display))
> + if ((display->dpll.mgr || HAS_GMCH(display)) && !is_writeback)
> PIPE_CONF_CHECK_PLL(dpll_hw_state);
>
> PIPE_CONF_CHECK_X(dsi_pll.ctrl);
> PIPE_CONF_CHECK_X(dsi_pll.div);
>
> - if (display->platform.g4x || DISPLAY_VER(display) >= 5)
> + if ((display->platform.g4x || DISPLAY_VER(display) >= 5) &&
> + !is_writeback)
> PIPE_CONF_CHECK_I(pipe_bpp);
>
> - if (!fastset || !pipe_config->update_m_n) {
> + if ((!fastset || !pipe_config->update_m_n) && !is_writeback) {
> PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_clock);
> PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_clock);
> }
> - PIPE_CONF_CHECK_I(port_clock);
> +
> + if (!is_writeback)
> + PIPE_CONF_CHECK_I(port_clock);
>
> PIPE_CONF_CHECK_I(min_voltage_level);
>
> --
> 2.34.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 60+ messages in thread* RE: [PATCH v3 26/26] drm/i915/writeback: Modify state verify function
2026-03-25 13:01 ` Ville Syrjälä
@ 2026-03-26 3:57 ` Kandpal, Suraj
0 siblings, 0 replies; 60+ messages in thread
From: Kandpal, Suraj @ 2026-03-26 3:57 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
S, Sowmiya, Shankar, Uma, Sharma, Swati2, Borah, Chaitanya Kumar,
Murthy, Arun R
> <arun.r.murthy@intel.com>
> Subject: Re: [PATCH v3 26/26] drm/i915/writeback: Modify state verify
> function
>
> On Wed, Mar 25, 2026 at 04:37:44PM +0530, Suraj Kandpal wrote:
> > Modify the state verify functions to take into account the fact that
> > writeback does not need all the timings for it to be set.
> > Moreover there is no need for dpll state nor do we need to set any
> > sort of flags for it.
> >
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 57
> > ++++++++++++--------
> > 1 file changed, 35 insertions(+), 22 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index e47b4e667fec..59b6c61890bc 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -5140,6 +5140,8 @@ intel_pipe_config_compare(const struct
> intel_crtc_state *current_config,
> > struct drm_printer p;
> > u32 exclude_infoframes = 0;
> > bool ret = true;
> > + bool is_writeback =
> > + intel_crtc_has_type(current_config,
> INTEL_OUTPUT_WRITEBACK);
> >
> > if (fastset)
> > p = drm_dbg_printer(display->drm, DRM_UT_KMS, NULL);
> @@ -5245,20
> > +5247,25 @@ intel_pipe_config_compare(const struct intel_crtc_state
> > *current_config, } while (0)
> >
> > #define PIPE_CONF_CHECK_TIMINGS(name) do { \
> > - PIPE_CONF_CHECK_I(name.crtc_hdisplay); \
> > - PIPE_CONF_CHECK_I(name.crtc_htotal); \
> > - PIPE_CONF_CHECK_I(name.crtc_hblank_start); \
> > - PIPE_CONF_CHECK_I(name.crtc_hblank_end); \
> > - PIPE_CONF_CHECK_I(name.crtc_hsync_start); \
> > - PIPE_CONF_CHECK_I(name.crtc_hsync_end); \
> > - PIPE_CONF_CHECK_I(name.crtc_vdisplay); \
> > - if (!fastset || !allow_vblank_delay_fastset(current_config)) \
> > - PIPE_CONF_CHECK_I(name.crtc_vblank_start); \
> > - PIPE_CONF_CHECK_I(name.crtc_vsync_start); \
> > - PIPE_CONF_CHECK_I(name.crtc_vsync_end); \
> > - if (!fastset || !pipe_config->update_lrr) { \
> > - PIPE_CONF_CHECK_I(name.crtc_vtotal); \
> > - PIPE_CONF_CHECK_I(name.crtc_vblank_end); \
> > + if (is_writeback) { \
> > + PIPE_CONF_CHECK_I(name.crtc_hdisplay); \
> > + PIPE_CONF_CHECK_I(name.crtc_vdisplay); \
> > + } else { \
> > + PIPE_CONF_CHECK_I(name.crtc_hdisplay); \
> > + PIPE_CONF_CHECK_I(name.crtc_htotal); \
> > + PIPE_CONF_CHECK_I(name.crtc_hblank_start); \
> > + PIPE_CONF_CHECK_I(name.crtc_hblank_end); \
> > + PIPE_CONF_CHECK_I(name.crtc_hsync_start); \
> > + PIPE_CONF_CHECK_I(name.crtc_hsync_end); \
> > + PIPE_CONF_CHECK_I(name.crtc_vdisplay); \
> > + if (!fastset || !allow_vblank_delay_fastset(current_config)) \
> > + PIPE_CONF_CHECK_I(name.crtc_vblank_start); \
> > + PIPE_CONF_CHECK_I(name.crtc_vsync_start); \
> > + PIPE_CONF_CHECK_I(name.crtc_vsync_end); \
> > + if (!fastset || !pipe_config->update_lrr) { \
> > + PIPE_CONF_CHECK_I(name.crtc_vtotal); \
> > + PIPE_CONF_CHECK_I(name.crtc_vblank_end); \
> > + } \
>
> This is ugly. I think a much better option is to make sure the writeback stuff
> actually does proper compute/readout for all of this.
>
Sure will try optimize this
Regards,
Suraj Kandpal
> > } \
> > } while (0)
> >
> > @@ -5387,10 +5394,11 @@ intel_pipe_config_compare(const struct
> > intel_crtc_state *current_config,
> >
> > PIPE_CONF_CHECK_I(pixel_multiplier);
> >
> > - PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> > - DRM_MODE_FLAG_INTERLACE);
> > + if (!is_writeback)
> > + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> > + DRM_MODE_FLAG_INTERLACE);
> >
> > - if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) {
> > + if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)
> &&
> > +!is_writeback) {
> > PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> > DRM_MODE_FLAG_PHSYNC);
> > PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> > @@ -5441,6 +5449,8 @@ intel_pipe_config_compare(const struct
> intel_crtc_state *current_config,
> > PIPE_CONF_CHECK_BOOL(hw.casf_params.casf_enable);
> > PIPE_CONF_CHECK_I(hw.casf_params.win_size);
> > PIPE_CONF_CHECK_I(hw.casf_params.strength);
> > + if (!is_writeback)
> > + PIPE_CONF_CHECK_I(pixel_rate);
> >
> > PIPE_CONF_CHECK_X(gamma_mode);
> > if (display->platform.cherryview)
> > @@ -5463,24 +5473,27 @@ intel_pipe_config_compare(const struct
> > intel_crtc_state *current_config,
> >
> > PIPE_CONF_CHECK_BOOL(double_wide);
> >
> > - if (display->dpll.mgr)
> > + if (display->dpll.mgr && !is_writeback)
> > PIPE_CONF_CHECK_P(intel_dpll);
> >
> > /* FIXME convert everything over the dpll_mgr */
> > - if (display->dpll.mgr || HAS_GMCH(display))
> > + if ((display->dpll.mgr || HAS_GMCH(display)) && !is_writeback)
> > PIPE_CONF_CHECK_PLL(dpll_hw_state);
> >
> > PIPE_CONF_CHECK_X(dsi_pll.ctrl);
> > PIPE_CONF_CHECK_X(dsi_pll.div);
> >
> > - if (display->platform.g4x || DISPLAY_VER(display) >= 5)
> > + if ((display->platform.g4x || DISPLAY_VER(display) >= 5) &&
> > + !is_writeback)
> > PIPE_CONF_CHECK_I(pipe_bpp);
> >
> > - if (!fastset || !pipe_config->update_m_n) {
> > + if ((!fastset || !pipe_config->update_m_n) && !is_writeback) {
> > PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_clock);
> > PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_clock);
> > }
> > - PIPE_CONF_CHECK_I(port_clock);
> > +
> > + if (!is_writeback)
> > + PIPE_CONF_CHECK_I(port_clock);
> >
> > PIPE_CONF_CHECK_I(min_voltage_level);
> >
> > --
> > 2.34.1
>
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 60+ messages in thread
* ✗ CI.checkpatch: warning for Enable Pipe writeback (rev3)
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (25 preceding siblings ...)
2026-03-25 11:07 ` [PATCH v3 26/26] drm/i915/writeback: Modify state verify function Suraj Kandpal
@ 2026-03-25 11:19 ` Patchwork
2026-03-25 11:20 ` ✓ CI.KUnit: success " Patchwork
27 siblings, 0 replies; 60+ messages in thread
From: Patchwork @ 2026-03-25 11:19 UTC (permalink / raw)
To: Suraj Kandpal; +Cc: intel-xe
== Series Details ==
Series: Enable Pipe writeback (rev3)
URL : https://patchwork.freedesktop.org/series/152105/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 6f8db1a5c2a4ea267f57092339e5a629541b3b83
Author: Suraj Kandpal <suraj.kandpal@intel.com>
Date: Wed Mar 25 16:37:44 2026 +0530
drm/i915/writeback: Modify state verify function
Modify the state verify functions to take into account the fact
that writeback does not need all the timings for it to be set.
Moreover there is no need for dpll state nor do we need to set
any sort of flags for it.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
+ /mt/dim checkpatch 41579e12882a0a3b881bfade003fcb1fd39c347c drm-intel
1fff9a5173ba drm: writeback: rename drm_writeback_connector_init_with_encoder()
e8616b662e6c drm: writeback: Refactor drm_writeback_connector structure
-:95: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#95: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c:84:
+static int amdgpu_dm_wb_prepare_job(struct drm_connector *connector,
struct drm_writeback_job *job)
-:526: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#526: FILE: drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c:91:
+static int dpu_wb_conn_prepare_job(struct drm_connector *connector,
struct drm_writeback_job *job)
-:538: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#538: FILE: drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c:104:
+static void dpu_wb_conn_cleanup_job(struct drm_connector *connector,
struct drm_writeback_job *job)
total: 0 errors, 0 warnings, 3 checks, 797 lines checked
da13b7f38316 drm/i915/writeback: Add writeback registers
-:12: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#12:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 136 lines checked
6432e367776a drm/i915/writeback: Add some preliminary writeback definitions
69530d328f61 drm/i915/writeback: Init writeback connector
-:29: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#29:
new file mode 100644
-:74: WARNING:ALLOC_WITH_SIZEOF: Prefer kzalloc_obj over kzalloc with sizeof
#74: FILE: drivers/gpu/drm/i915/display/intel_writeback.c:41:
+ conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
-:114: WARNING:ALLOC_WITH_SIZEOF: Prefer kzalloc_obj over kzalloc with sizeof
#114: FILE: drivers/gpu/drm/i915/display/intel_writeback.c:81:
+ writeback_conn = kzalloc(sizeof(*writeback_conn), GFP_KERNEL);
total: 0 errors, 3 warnings, 0 checks, 150 lines checked
8f9f2cc3dfeb drm/i915/writeback: Add function to get modes
cbc9b9896fb6 drm/i915/writeback: Add hook to check modes
781165efa00b drm/i915/writeback: Define encoder->get_hw_state
148a1426ca8b drm/i915/writeback: Fill encoder->get_config
7d635e8df130 drm/i915/writeback: Add private structure for writeback job
aadac84702b2 drm/i915/writeback: Define function for prepare and cleanup hooks
-:63: WARNING:ALLOC_WITH_SIZEOF: Prefer kzalloc_obj over kzalloc with sizeof
#63: FILE: drivers/gpu/drm/i915/display/intel_writeback.c:116:
+ wb_job = kzalloc(sizeof(*wb_job), GFP_KERNEL);
total: 0 errors, 1 warnings, 0 checks, 95 lines checked
aec3aa586753 drm/i915/writeback: Define compute_config for writeback
fb4ccf52d3c7 drm/i915/writeback: Define function for connector function detect
5667f1e2ce67 drm/i915/writeback: Define function to destroy writeback connector
0bfb32c81a1b drm/i915/writeback: Add connector atomic check
411f5decd3cc drm/i915/writeback: Add writeback to xe Makefile
b5f382a43721 drm/i915/writeback: Add the enable sequence from writeback
3c60f898a126 drm/i915/writeback: Define writeback frame capture function
8956b20db7f5 drm/{i915/xe}/writeback: Add a writeback helper to get ggtt address
-:48: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#48:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 63 lines checked
b62351cf3d37 drm/i915/writeback: Configure WD_STRIDE reg
f23c7074beca drm/i915/writeback: Configure WD_SURF register
029a7a549a62 drm/i915/writeback: Enable writeback interrupts
09575ced281c drm/i915/writeback: Initialize writeback encoder.
c2a1b282b075 drm/i915/writeback: Define the disable sequence for writeback
d0b6ab4e361e drm/i915/writeback: Make exception for writeback connector
6f8db1a5c2a4 drm/i915/writeback: Modify state verify function
^ permalink raw reply [flat|nested] 60+ messages in thread* ✓ CI.KUnit: success for Enable Pipe writeback (rev3)
2026-03-25 11:07 [PATCH v3 00/26] Enable Pipe writeback Suraj Kandpal
` (26 preceding siblings ...)
2026-03-25 11:19 ` ✗ CI.checkpatch: warning for Enable Pipe writeback (rev3) Patchwork
@ 2026-03-25 11:20 ` Patchwork
27 siblings, 0 replies; 60+ messages in thread
From: Patchwork @ 2026-03-25 11:20 UTC (permalink / raw)
To: Suraj Kandpal; +Cc: intel-xe
== Series Details ==
Series: Enable Pipe writeback (rev3)
URL : https://patchwork.freedesktop.org/series/152105/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[11:19:14] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:19:19] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[11:19:56] Starting KUnit Kernel (1/1)...
[11:19:56] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:19:57] ================== guc_buf (11 subtests) ===================
[11:19:57] [PASSED] test_smallest
[11:19:57] [PASSED] test_largest
[11:19:57] [PASSED] test_granular
[11:19:57] [PASSED] test_unique
[11:19:57] [PASSED] test_overlap
[11:19:57] [PASSED] test_reusable
[11:19:57] [PASSED] test_too_big
[11:19:57] [PASSED] test_flush
[11:19:57] [PASSED] test_lookup
[11:19:57] [PASSED] test_data
[11:19:57] [PASSED] test_class
[11:19:57] ===================== [PASSED] guc_buf =====================
[11:19:57] =================== guc_dbm (7 subtests) ===================
[11:19:57] [PASSED] test_empty
[11:19:57] [PASSED] test_default
[11:19:57] ======================== test_size ========================
[11:19:57] [PASSED] 4
[11:19:57] [PASSED] 8
[11:19:57] [PASSED] 32
[11:19:57] [PASSED] 256
[11:19:57] ==================== [PASSED] test_size ====================
[11:19:57] ======================= test_reuse ========================
[11:19:57] [PASSED] 4
[11:19:57] [PASSED] 8
[11:19:57] [PASSED] 32
[11:19:57] [PASSED] 256
[11:19:57] =================== [PASSED] test_reuse ====================
[11:19:57] =================== test_range_overlap ====================
[11:19:57] [PASSED] 4
[11:19:57] [PASSED] 8
[11:19:57] [PASSED] 32
[11:19:57] [PASSED] 256
[11:19:57] =============== [PASSED] test_range_overlap ================
[11:19:57] =================== test_range_compact ====================
[11:19:57] [PASSED] 4
[11:19:57] [PASSED] 8
[11:19:57] [PASSED] 32
[11:19:57] [PASSED] 256
[11:19:57] =============== [PASSED] test_range_compact ================
[11:19:57] ==================== test_range_spare =====================
[11:19:57] [PASSED] 4
[11:19:57] [PASSED] 8
[11:19:57] [PASSED] 32
[11:19:57] [PASSED] 256
[11:19:57] ================ [PASSED] test_range_spare =================
[11:19:57] ===================== [PASSED] guc_dbm =====================
[11:19:57] =================== guc_idm (6 subtests) ===================
[11:19:57] [PASSED] bad_init
[11:19:57] [PASSED] no_init
[11:19:57] [PASSED] init_fini
[11:19:57] [PASSED] check_used
[11:19:57] [PASSED] check_quota
[11:19:57] [PASSED] check_all
[11:19:57] ===================== [PASSED] guc_idm =====================
[11:19:57] ================== no_relay (3 subtests) ===================
[11:19:57] [PASSED] xe_drops_guc2pf_if_not_ready
[11:19:57] [PASSED] xe_drops_guc2vf_if_not_ready
[11:19:57] [PASSED] xe_rejects_send_if_not_ready
[11:19:57] ==================== [PASSED] no_relay =====================
[11:19:57] ================== pf_relay (14 subtests) ==================
[11:19:57] [PASSED] pf_rejects_guc2pf_too_short
[11:19:57] [PASSED] pf_rejects_guc2pf_too_long
[11:19:57] [PASSED] pf_rejects_guc2pf_no_payload
[11:19:57] [PASSED] pf_fails_no_payload
[11:19:57] [PASSED] pf_fails_bad_origin
[11:19:57] [PASSED] pf_fails_bad_type
[11:19:57] [PASSED] pf_txn_reports_error
[11:19:57] [PASSED] pf_txn_sends_pf2guc
[11:19:57] [PASSED] pf_sends_pf2guc
[11:19:57] [SKIPPED] pf_loopback_nop
[11:19:57] [SKIPPED] pf_loopback_echo
[11:19:57] [SKIPPED] pf_loopback_fail
[11:19:57] [SKIPPED] pf_loopback_busy
[11:19:57] [SKIPPED] pf_loopback_retry
[11:19:57] ==================== [PASSED] pf_relay =====================
[11:19:57] ================== vf_relay (3 subtests) ===================
[11:19:57] [PASSED] vf_rejects_guc2vf_too_short
[11:19:57] [PASSED] vf_rejects_guc2vf_too_long
[11:19:57] [PASSED] vf_rejects_guc2vf_no_payload
[11:19:57] ==================== [PASSED] vf_relay =====================
[11:19:57] ================ pf_gt_config (9 subtests) =================
[11:19:57] [PASSED] fair_contexts_1vf
[11:19:57] [PASSED] fair_doorbells_1vf
[11:19:57] [PASSED] fair_ggtt_1vf
[11:19:57] ====================== fair_vram_1vf ======================
[11:19:57] [PASSED] 3.50 GiB
[11:19:57] [PASSED] 11.5 GiB
[11:19:57] [PASSED] 15.5 GiB
[11:19:57] [PASSED] 31.5 GiB
[11:19:57] [PASSED] 63.5 GiB
[11:19:57] [PASSED] 1.91 GiB
[11:19:57] ================== [PASSED] fair_vram_1vf ==================
[11:19:57] ================ fair_vram_1vf_admin_only =================
[11:19:57] [PASSED] 3.50 GiB
[11:19:57] [PASSED] 11.5 GiB
[11:19:57] [PASSED] 15.5 GiB
[11:19:57] [PASSED] 31.5 GiB
[11:19:57] [PASSED] 63.5 GiB
[11:19:57] [PASSED] 1.91 GiB
[11:19:57] ============ [PASSED] fair_vram_1vf_admin_only =============
[11:19:57] ====================== fair_contexts ======================
[11:19:57] [PASSED] 1 VF
[11:19:57] [PASSED] 2 VFs
[11:19:57] [PASSED] 3 VFs
[11:19:57] [PASSED] 4 VFs
[11:19:57] [PASSED] 5 VFs
[11:19:57] [PASSED] 6 VFs
[11:19:57] [PASSED] 7 VFs
[11:19:57] [PASSED] 8 VFs
[11:19:57] [PASSED] 9 VFs
[11:19:57] [PASSED] 10 VFs
[11:19:57] [PASSED] 11 VFs
[11:19:57] [PASSED] 12 VFs
[11:19:57] [PASSED] 13 VFs
[11:19:57] [PASSED] 14 VFs
[11:19:57] [PASSED] 15 VFs
[11:19:57] [PASSED] 16 VFs
[11:19:57] [PASSED] 17 VFs
[11:19:57] [PASSED] 18 VFs
[11:19:57] [PASSED] 19 VFs
[11:19:57] [PASSED] 20 VFs
[11:19:57] [PASSED] 21 VFs
[11:19:57] [PASSED] 22 VFs
[11:19:57] [PASSED] 23 VFs
[11:19:57] [PASSED] 24 VFs
[11:19:57] [PASSED] 25 VFs
[11:19:57] [PASSED] 26 VFs
[11:19:57] [PASSED] 27 VFs
[11:19:57] [PASSED] 28 VFs
[11:19:57] [PASSED] 29 VFs
[11:19:57] [PASSED] 30 VFs
[11:19:57] [PASSED] 31 VFs
[11:19:57] [PASSED] 32 VFs
[11:19:57] [PASSED] 33 VFs
[11:19:57] [PASSED] 34 VFs
[11:19:57] [PASSED] 35 VFs
[11:19:57] [PASSED] 36 VFs
[11:19:57] [PASSED] 37 VFs
[11:19:57] [PASSED] 38 VFs
[11:19:57] [PASSED] 39 VFs
[11:19:57] [PASSED] 40 VFs
[11:19:57] [PASSED] 41 VFs
[11:19:57] [PASSED] 42 VFs
[11:19:57] [PASSED] 43 VFs
[11:19:57] [PASSED] 44 VFs
[11:19:57] [PASSED] 45 VFs
[11:19:57] [PASSED] 46 VFs
[11:19:57] [PASSED] 47 VFs
[11:19:57] [PASSED] 48 VFs
[11:19:57] [PASSED] 49 VFs
[11:19:57] [PASSED] 50 VFs
[11:19:57] [PASSED] 51 VFs
[11:19:57] [PASSED] 52 VFs
[11:19:57] [PASSED] 53 VFs
[11:19:57] [PASSED] 54 VFs
[11:19:57] [PASSED] 55 VFs
[11:19:57] [PASSED] 56 VFs
[11:19:57] [PASSED] 57 VFs
[11:19:57] [PASSED] 58 VFs
[11:19:57] [PASSED] 59 VFs
[11:19:57] [PASSED] 60 VFs
[11:19:57] [PASSED] 61 VFs
[11:19:57] [PASSED] 62 VFs
[11:19:57] [PASSED] 63 VFs
[11:19:57] ================== [PASSED] fair_contexts ==================
[11:19:57] ===================== fair_doorbells ======================
[11:19:57] [PASSED] 1 VF
[11:19:57] [PASSED] 2 VFs
[11:19:57] [PASSED] 3 VFs
[11:19:57] [PASSED] 4 VFs
[11:19:57] [PASSED] 5 VFs
[11:19:57] [PASSED] 6 VFs
[11:19:57] [PASSED] 7 VFs
[11:19:57] [PASSED] 8 VFs
[11:19:57] [PASSED] 9 VFs
[11:19:57] [PASSED] 10 VFs
[11:19:57] [PASSED] 11 VFs
[11:19:57] [PASSED] 12 VFs
[11:19:57] [PASSED] 13 VFs
[11:19:57] [PASSED] 14 VFs
[11:19:57] [PASSED] 15 VFs
[11:19:57] [PASSED] 16 VFs
[11:19:57] [PASSED] 17 VFs
[11:19:57] [PASSED] 18 VFs
[11:19:57] [PASSED] 19 VFs
[11:19:57] [PASSED] 20 VFs
[11:19:57] [PASSED] 21 VFs
[11:19:57] [PASSED] 22 VFs
[11:19:57] [PASSED] 23 VFs
[11:19:57] [PASSED] 24 VFs
[11:19:57] [PASSED] 25 VFs
[11:19:57] [PASSED] 26 VFs
[11:19:57] [PASSED] 27 VFs
[11:19:57] [PASSED] 28 VFs
[11:19:57] [PASSED] 29 VFs
[11:19:57] [PASSED] 30 VFs
[11:19:57] [PASSED] 31 VFs
[11:19:57] [PASSED] 32 VFs
[11:19:57] [PASSED] 33 VFs
[11:19:57] [PASSED] 34 VFs
[11:19:57] [PASSED] 35 VFs
[11:19:57] [PASSED] 36 VFs
[11:19:57] [PASSED] 37 VFs
[11:19:57] [PASSED] 38 VFs
[11:19:57] [PASSED] 39 VFs
[11:19:57] [PASSED] 40 VFs
[11:19:57] [PASSED] 41 VFs
[11:19:57] [PASSED] 42 VFs
[11:19:57] [PASSED] 43 VFs
[11:19:57] [PASSED] 44 VFs
[11:19:57] [PASSED] 45 VFs
[11:19:57] [PASSED] 46 VFs
[11:19:57] [PASSED] 47 VFs
[11:19:57] [PASSED] 48 VFs
[11:19:57] [PASSED] 49 VFs
[11:19:57] [PASSED] 50 VFs
[11:19:57] [PASSED] 51 VFs
[11:19:57] [PASSED] 52 VFs
[11:19:57] [PASSED] 53 VFs
[11:19:57] [PASSED] 54 VFs
[11:19:57] [PASSED] 55 VFs
[11:19:57] [PASSED] 56 VFs
[11:19:57] [PASSED] 57 VFs
[11:19:57] [PASSED] 58 VFs
[11:19:57] [PASSED] 59 VFs
[11:19:57] [PASSED] 60 VFs
[11:19:57] [PASSED] 61 VFs
[11:19:57] [PASSED] 62 VFs
[11:19:57] [PASSED] 63 VFs
[11:19:57] ================= [PASSED] fair_doorbells ==================
[11:19:57] ======================== fair_ggtt ========================
[11:19:57] [PASSED] 1 VF
[11:19:57] [PASSED] 2 VFs
[11:19:57] [PASSED] 3 VFs
[11:19:57] [PASSED] 4 VFs
[11:19:57] [PASSED] 5 VFs
[11:19:57] [PASSED] 6 VFs
[11:19:57] [PASSED] 7 VFs
[11:19:57] [PASSED] 8 VFs
[11:19:57] [PASSED] 9 VFs
[11:19:57] [PASSED] 10 VFs
[11:19:57] [PASSED] 11 VFs
[11:19:57] [PASSED] 12 VFs
[11:19:57] [PASSED] 13 VFs
[11:19:57] [PASSED] 14 VFs
[11:19:57] [PASSED] 15 VFs
[11:19:57] [PASSED] 16 VFs
[11:19:57] [PASSED] 17 VFs
[11:19:57] [PASSED] 18 VFs
[11:19:57] [PASSED] 19 VFs
[11:19:57] [PASSED] 20 VFs
[11:19:57] [PASSED] 21 VFs
[11:19:57] [PASSED] 22 VFs
[11:19:57] [PASSED] 23 VFs
[11:19:57] [PASSED] 24 VFs
[11:19:57] [PASSED] 25 VFs
[11:19:57] [PASSED] 26 VFs
[11:19:57] [PASSED] 27 VFs
[11:19:57] [PASSED] 28 VFs
[11:19:57] [PASSED] 29 VFs
[11:19:57] [PASSED] 30 VFs
[11:19:57] [PASSED] 31 VFs
[11:19:57] [PASSED] 32 VFs
[11:19:57] [PASSED] 33 VFs
[11:19:57] [PASSED] 34 VFs
[11:19:57] [PASSED] 35 VFs
[11:19:57] [PASSED] 36 VFs
[11:19:57] [PASSED] 37 VFs
[11:19:57] [PASSED] 38 VFs
[11:19:57] [PASSED] 39 VFs
[11:19:57] [PASSED] 40 VFs
[11:19:57] [PASSED] 41 VFs
[11:19:57] [PASSED] 42 VFs
[11:19:57] [PASSED] 43 VFs
[11:19:57] [PASSED] 44 VFs
[11:19:57] [PASSED] 45 VFs
[11:19:57] [PASSED] 46 VFs
[11:19:57] [PASSED] 47 VFs
[11:19:57] [PASSED] 48 VFs
[11:19:57] [PASSED] 49 VFs
[11:19:57] [PASSED] 50 VFs
[11:19:57] [PASSED] 51 VFs
[11:19:57] [PASSED] 52 VFs
[11:19:57] [PASSED] 53 VFs
[11:19:57] [PASSED] 54 VFs
[11:19:57] [PASSED] 55 VFs
[11:19:57] [PASSED] 56 VFs
[11:19:57] [PASSED] 57 VFs
[11:19:57] [PASSED] 58 VFs
[11:19:57] [PASSED] 59 VFs
[11:19:57] [PASSED] 60 VFs
[11:19:57] [PASSED] 61 VFs
[11:19:57] [PASSED] 62 VFs
[11:19:57] [PASSED] 63 VFs
[11:19:57] ==================== [PASSED] fair_ggtt ====================
[11:19:57] ======================== fair_vram ========================
[11:19:57] [PASSED] 1 VF
[11:19:57] [PASSED] 2 VFs
[11:19:57] [PASSED] 3 VFs
[11:19:57] [PASSED] 4 VFs
[11:19:57] [PASSED] 5 VFs
[11:19:57] [PASSED] 6 VFs
[11:19:57] [PASSED] 7 VFs
[11:19:57] [PASSED] 8 VFs
[11:19:57] [PASSED] 9 VFs
[11:19:57] [PASSED] 10 VFs
[11:19:57] [PASSED] 11 VFs
[11:19:57] [PASSED] 12 VFs
[11:19:57] [PASSED] 13 VFs
[11:19:57] [PASSED] 14 VFs
[11:19:57] [PASSED] 15 VFs
[11:19:57] [PASSED] 16 VFs
[11:19:57] [PASSED] 17 VFs
[11:19:57] [PASSED] 18 VFs
[11:19:57] [PASSED] 19 VFs
[11:19:57] [PASSED] 20 VFs
[11:19:57] [PASSED] 21 VFs
[11:19:57] [PASSED] 22 VFs
[11:19:57] [PASSED] 23 VFs
[11:19:57] [PASSED] 24 VFs
[11:19:57] [PASSED] 25 VFs
[11:19:57] [PASSED] 26 VFs
[11:19:57] [PASSED] 27 VFs
[11:19:57] [PASSED] 28 VFs
[11:19:57] [PASSED] 29 VFs
[11:19:57] [PASSED] 30 VFs
[11:19:57] [PASSED] 31 VFs
[11:19:57] [PASSED] 32 VFs
[11:19:57] [PASSED] 33 VFs
[11:19:57] [PASSED] 34 VFs
[11:19:57] [PASSED] 35 VFs
[11:19:57] [PASSED] 36 VFs
[11:19:57] [PASSED] 37 VFs
[11:19:57] [PASSED] 38 VFs
[11:19:57] [PASSED] 39 VFs
[11:19:57] [PASSED] 40 VFs
[11:19:57] [PASSED] 41 VFs
[11:19:57] [PASSED] 42 VFs
[11:19:57] [PASSED] 43 VFs
[11:19:57] [PASSED] 44 VFs
[11:19:57] [PASSED] 45 VFs
[11:19:57] [PASSED] 46 VFs
[11:19:57] [PASSED] 47 VFs
[11:19:57] [PASSED] 48 VFs
[11:19:57] [PASSED] 49 VFs
[11:19:57] [PASSED] 50 VFs
[11:19:57] [PASSED] 51 VFs
[11:19:57] [PASSED] 52 VFs
[11:19:57] [PASSED] 53 VFs
[11:19:57] [PASSED] 54 VFs
[11:19:57] [PASSED] 55 VFs
[11:19:57] [PASSED] 56 VFs
[11:19:57] [PASSED] 57 VFs
[11:19:57] [PASSED] 58 VFs
[11:19:57] [PASSED] 59 VFs
[11:19:57] [PASSED] 60 VFs
[11:19:57] [PASSED] 61 VFs
[11:19:57] [PASSED] 62 VFs
[11:19:57] [PASSED] 63 VFs
[11:19:57] ==================== [PASSED] fair_vram ====================
[11:19:57] ================== [PASSED] pf_gt_config ===================
[11:19:57] ===================== lmtt (1 subtest) =====================
[11:19:57] ======================== test_ops =========================
[11:19:57] [PASSED] 2-level
[11:19:57] [PASSED] multi-level
[11:19:57] ==================== [PASSED] test_ops =====================
[11:19:57] ====================== [PASSED] lmtt =======================
[11:19:57] ================= pf_service (11 subtests) =================
[11:19:57] [PASSED] pf_negotiate_any
[11:19:57] [PASSED] pf_negotiate_base_match
[11:19:57] [PASSED] pf_negotiate_base_newer
[11:19:57] [PASSED] pf_negotiate_base_next
[11:19:57] [SKIPPED] pf_negotiate_base_older
[11:19:57] [PASSED] pf_negotiate_base_prev
[11:19:57] [PASSED] pf_negotiate_latest_match
[11:19:57] [PASSED] pf_negotiate_latest_newer
[11:19:57] [PASSED] pf_negotiate_latest_next
[11:19:57] [SKIPPED] pf_negotiate_latest_older
[11:19:57] [SKIPPED] pf_negotiate_latest_prev
[11:19:57] =================== [PASSED] pf_service ====================
[11:19:57] ================= xe_guc_g2g (2 subtests) ==================
[11:19:57] ============== xe_live_guc_g2g_kunit_default ==============
[11:19:57] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[11:19:57] ============== xe_live_guc_g2g_kunit_allmem ===============
[11:19:57] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[11:19:57] =================== [SKIPPED] xe_guc_g2g ===================
[11:19:57] =================== xe_mocs (2 subtests) ===================
[11:19:57] ================ xe_live_mocs_kernel_kunit ================
[11:19:57] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[11:19:57] ================ xe_live_mocs_reset_kunit =================
[11:19:57] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[11:19:57] ==================== [SKIPPED] xe_mocs =====================
[11:19:57] ================= xe_migrate (2 subtests) ==================
[11:19:57] ================= xe_migrate_sanity_kunit =================
[11:19:57] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[11:19:57] ================== xe_validate_ccs_kunit ==================
[11:19:57] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[11:19:57] =================== [SKIPPED] xe_migrate ===================
[11:19:57] ================== xe_dma_buf (1 subtest) ==================
[11:19:57] ==================== xe_dma_buf_kunit =====================
[11:19:57] ================ [SKIPPED] xe_dma_buf_kunit ================
[11:19:57] =================== [SKIPPED] xe_dma_buf ===================
[11:19:57] ================= xe_bo_shrink (1 subtest) =================
[11:19:57] =================== xe_bo_shrink_kunit ====================
[11:19:57] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[11:19:57] ================== [SKIPPED] xe_bo_shrink ==================
[11:19:57] ==================== xe_bo (2 subtests) ====================
[11:19:57] ================== xe_ccs_migrate_kunit ===================
[11:19:57] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[11:19:57] ==================== xe_bo_evict_kunit ====================
[11:19:57] =============== [SKIPPED] xe_bo_evict_kunit ================
[11:19:57] ===================== [SKIPPED] xe_bo ======================
[11:19:57] ==================== args (13 subtests) ====================
[11:19:57] [PASSED] count_args_test
[11:19:57] [PASSED] call_args_example
[11:19:57] [PASSED] call_args_test
[11:19:57] [PASSED] drop_first_arg_example
[11:19:57] [PASSED] drop_first_arg_test
[11:19:57] [PASSED] first_arg_example
[11:19:57] [PASSED] first_arg_test
[11:19:57] [PASSED] last_arg_example
[11:19:57] [PASSED] last_arg_test
[11:19:57] [PASSED] pick_arg_example
[11:19:57] [PASSED] if_args_example
[11:19:57] [PASSED] if_args_test
[11:19:57] [PASSED] sep_comma_example
[11:19:57] ====================== [PASSED] args =======================
[11:19:57] =================== xe_pci (3 subtests) ====================
[11:19:57] ==================== check_graphics_ip ====================
[11:19:57] [PASSED] 12.00 Xe_LP
[11:19:57] [PASSED] 12.10 Xe_LP+
[11:19:57] [PASSED] 12.55 Xe_HPG
[11:19:57] [PASSED] 12.60 Xe_HPC
[11:19:57] [PASSED] 12.70 Xe_LPG
[11:19:57] [PASSED] 12.71 Xe_LPG
[11:19:57] [PASSED] 12.74 Xe_LPG+
[11:19:57] [PASSED] 20.01 Xe2_HPG
[11:19:57] [PASSED] 20.02 Xe2_HPG
[11:19:57] [PASSED] 20.04 Xe2_LPG
[11:19:57] [PASSED] 30.00 Xe3_LPG
[11:19:57] [PASSED] 30.01 Xe3_LPG
[11:19:57] [PASSED] 30.03 Xe3_LPG
[11:19:57] [PASSED] 30.04 Xe3_LPG
[11:19:57] [PASSED] 30.05 Xe3_LPG
[11:19:57] [PASSED] 35.10 Xe3p_LPG
[11:19:57] [PASSED] 35.11 Xe3p_XPC
[11:19:57] ================ [PASSED] check_graphics_ip ================
[11:19:57] ===================== check_media_ip ======================
[11:19:57] [PASSED] 12.00 Xe_M
[11:19:57] [PASSED] 12.55 Xe_HPM
[11:19:57] [PASSED] 13.00 Xe_LPM+
[11:19:57] [PASSED] 13.01 Xe2_HPM
[11:19:57] [PASSED] 20.00 Xe2_LPM
[11:19:57] [PASSED] 30.00 Xe3_LPM
[11:19:57] [PASSED] 30.02 Xe3_LPM
[11:19:57] [PASSED] 35.00 Xe3p_LPM
[11:19:57] [PASSED] 35.03 Xe3p_HPM
[11:19:57] ================= [PASSED] check_media_ip ==================
[11:19:57] =================== check_platform_desc ===================
[11:19:57] [PASSED] 0x9A60 (TIGERLAKE)
[11:19:57] [PASSED] 0x9A68 (TIGERLAKE)
[11:19:57] [PASSED] 0x9A70 (TIGERLAKE)
[11:19:57] [PASSED] 0x9A40 (TIGERLAKE)
[11:19:57] [PASSED] 0x9A49 (TIGERLAKE)
[11:19:57] [PASSED] 0x9A59 (TIGERLAKE)
[11:19:57] [PASSED] 0x9A78 (TIGERLAKE)
[11:19:57] [PASSED] 0x9AC0 (TIGERLAKE)
[11:19:57] [PASSED] 0x9AC9 (TIGERLAKE)
[11:19:57] [PASSED] 0x9AD9 (TIGERLAKE)
[11:19:57] [PASSED] 0x9AF8 (TIGERLAKE)
[11:19:57] [PASSED] 0x4C80 (ROCKETLAKE)
[11:19:57] [PASSED] 0x4C8A (ROCKETLAKE)
[11:19:57] [PASSED] 0x4C8B (ROCKETLAKE)
[11:19:57] [PASSED] 0x4C8C (ROCKETLAKE)
[11:19:57] [PASSED] 0x4C90 (ROCKETLAKE)
[11:19:57] [PASSED] 0x4C9A (ROCKETLAKE)
[11:19:57] [PASSED] 0x4680 (ALDERLAKE_S)
[11:19:57] [PASSED] 0x4682 (ALDERLAKE_S)
[11:19:57] [PASSED] 0x4688 (ALDERLAKE_S)
[11:19:57] [PASSED] 0x468A (ALDERLAKE_S)
[11:19:57] [PASSED] 0x468B (ALDERLAKE_S)
[11:19:57] [PASSED] 0x4690 (ALDERLAKE_S)
[11:19:57] [PASSED] 0x4692 (ALDERLAKE_S)
[11:19:57] [PASSED] 0x4693 (ALDERLAKE_S)
[11:19:57] [PASSED] 0x46A0 (ALDERLAKE_P)
[11:19:57] [PASSED] 0x46A1 (ALDERLAKE_P)
[11:19:57] [PASSED] 0x46A2 (ALDERLAKE_P)
[11:19:57] [PASSED] 0x46A3 (ALDERLAKE_P)
[11:19:57] [PASSED] 0x46A6 (ALDERLAKE_P)
[11:19:57] [PASSED] 0x46A8 (ALDERLAKE_P)
[11:19:57] [PASSED] 0x46AA (ALDERLAKE_P)
[11:19:57] [PASSED] 0x462A (ALDERLAKE_P)
[11:19:57] [PASSED] 0x4626 (ALDERLAKE_P)
[11:19:57] [PASSED] 0x4628 (ALDERLAKE_P)
[11:19:57] [PASSED] 0x46B0 (ALDERLAKE_P)
[11:19:57] [PASSED] 0x46B1 (ALDERLAKE_P)
[11:19:57] [PASSED] 0x46B2 (ALDERLAKE_P)
[11:19:57] [PASSED] 0x46B3 (ALDERLAKE_P)
[11:19:57] [PASSED] 0x46C0 (ALDERLAKE_P)
[11:19:57] [PASSED] 0x46C1 (ALDERLAKE_P)
[11:19:57] [PASSED] 0x46C2 (ALDERLAKE_P)
[11:19:57] [PASSED] 0x46C3 (ALDERLAKE_P)
[11:19:57] [PASSED] 0x46D0 (ALDERLAKE_N)
[11:19:57] [PASSED] 0x46D1 (ALDERLAKE_N)
[11:19:57] [PASSED] 0x46D2 (ALDERLAKE_N)
[11:19:57] [PASSED] 0x46D3 (ALDERLAKE_N)
[11:19:57] [PASSED] 0x46D4 (ALDERLAKE_N)
[11:19:57] [PASSED] 0xA721 (ALDERLAKE_P)
[11:19:57] [PASSED] 0xA7A1 (ALDERLAKE_P)
[11:19:57] [PASSED] 0xA7A9 (ALDERLAKE_P)
[11:19:57] [PASSED] 0xA7AC (ALDERLAKE_P)
[11:19:57] [PASSED] 0xA7AD (ALDERLAKE_P)
[11:19:57] [PASSED] 0xA720 (ALDERLAKE_P)
[11:19:57] [PASSED] 0xA7A0 (ALDERLAKE_P)
[11:19:57] [PASSED] 0xA7A8 (ALDERLAKE_P)
[11:19:57] [PASSED] 0xA7AA (ALDERLAKE_P)
[11:19:57] [PASSED] 0xA7AB (ALDERLAKE_P)
[11:19:57] [PASSED] 0xA780 (ALDERLAKE_S)
[11:19:57] [PASSED] 0xA781 (ALDERLAKE_S)
[11:19:57] [PASSED] 0xA782 (ALDERLAKE_S)
[11:19:57] [PASSED] 0xA783 (ALDERLAKE_S)
[11:19:57] [PASSED] 0xA788 (ALDERLAKE_S)
[11:19:57] [PASSED] 0xA789 (ALDERLAKE_S)
[11:19:57] [PASSED] 0xA78A (ALDERLAKE_S)
[11:19:57] [PASSED] 0xA78B (ALDERLAKE_S)
[11:19:57] [PASSED] 0x4905 (DG1)
[11:19:57] [PASSED] 0x4906 (DG1)
[11:19:57] [PASSED] 0x4907 (DG1)
[11:19:57] [PASSED] 0x4908 (DG1)
[11:19:57] [PASSED] 0x4909 (DG1)
[11:19:57] [PASSED] 0x56C0 (DG2)
[11:19:57] [PASSED] 0x56C2 (DG2)
[11:19:57] [PASSED] 0x56C1 (DG2)
[11:19:57] [PASSED] 0x7D51 (METEORLAKE)
[11:19:57] [PASSED] 0x7DD1 (METEORLAKE)
[11:19:57] [PASSED] 0x7D41 (METEORLAKE)
[11:19:57] [PASSED] 0x7D67 (METEORLAKE)
[11:19:57] [PASSED] 0xB640 (METEORLAKE)
[11:19:57] [PASSED] 0x56A0 (DG2)
[11:19:57] [PASSED] 0x56A1 (DG2)
[11:19:57] [PASSED] 0x56A2 (DG2)
[11:19:57] [PASSED] 0x56BE (DG2)
[11:19:57] [PASSED] 0x56BF (DG2)
[11:19:57] [PASSED] 0x5690 (DG2)
[11:19:57] [PASSED] 0x5691 (DG2)
[11:19:57] [PASSED] 0x5692 (DG2)
[11:19:57] [PASSED] 0x56A5 (DG2)
[11:19:57] [PASSED] 0x56A6 (DG2)
[11:19:57] [PASSED] 0x56B0 (DG2)
[11:19:57] [PASSED] 0x56B1 (DG2)
[11:19:57] [PASSED] 0x56BA (DG2)
[11:19:57] [PASSED] 0x56BB (DG2)
[11:19:57] [PASSED] 0x56BC (DG2)
[11:19:57] [PASSED] 0x56BD (DG2)
[11:19:57] [PASSED] 0x5693 (DG2)
[11:19:57] [PASSED] 0x5694 (DG2)
[11:19:57] [PASSED] 0x5695 (DG2)
[11:19:57] [PASSED] 0x56A3 (DG2)
[11:19:57] [PASSED] 0x56A4 (DG2)
[11:19:57] [PASSED] 0x56B2 (DG2)
[11:19:57] [PASSED] 0x56B3 (DG2)
[11:19:57] [PASSED] 0x5696 (DG2)
[11:19:57] [PASSED] 0x5697 (DG2)
[11:19:57] [PASSED] 0xB69 (PVC)
[11:19:57] [PASSED] 0xB6E (PVC)
[11:19:57] [PASSED] 0xBD4 (PVC)
[11:19:57] [PASSED] 0xBD5 (PVC)
[11:19:57] [PASSED] 0xBD6 (PVC)
[11:19:57] [PASSED] 0xBD7 (PVC)
[11:19:57] [PASSED] 0xBD8 (PVC)
[11:19:57] [PASSED] 0xBD9 (PVC)
[11:19:57] [PASSED] 0xBDA (PVC)
[11:19:57] [PASSED] 0xBDB (PVC)
[11:19:57] [PASSED] 0xBE0 (PVC)
[11:19:57] [PASSED] 0xBE1 (PVC)
[11:19:57] [PASSED] 0xBE5 (PVC)
[11:19:57] [PASSED] 0x7D40 (METEORLAKE)
[11:19:57] [PASSED] 0x7D45 (METEORLAKE)
[11:19:57] [PASSED] 0x7D55 (METEORLAKE)
[11:19:57] [PASSED] 0x7D60 (METEORLAKE)
[11:19:57] [PASSED] 0x7DD5 (METEORLAKE)
[11:19:57] [PASSED] 0x6420 (LUNARLAKE)
[11:19:57] [PASSED] 0x64A0 (LUNARLAKE)
[11:19:57] [PASSED] 0x64B0 (LUNARLAKE)
[11:19:57] [PASSED] 0xE202 (BATTLEMAGE)
[11:19:57] [PASSED] 0xE209 (BATTLEMAGE)
[11:19:57] [PASSED] 0xE20B (BATTLEMAGE)
[11:19:57] [PASSED] 0xE20C (BATTLEMAGE)
[11:19:57] [PASSED] 0xE20D (BATTLEMAGE)
[11:19:57] [PASSED] 0xE210 (BATTLEMAGE)
[11:19:57] [PASSED] 0xE211 (BATTLEMAGE)
[11:19:57] [PASSED] 0xE212 (BATTLEMAGE)
[11:19:57] [PASSED] 0xE216 (BATTLEMAGE)
[11:19:57] [PASSED] 0xE220 (BATTLEMAGE)
[11:19:57] [PASSED] 0xE221 (BATTLEMAGE)
[11:19:57] [PASSED] 0xE222 (BATTLEMAGE)
[11:19:57] [PASSED] 0xE223 (BATTLEMAGE)
[11:19:57] [PASSED] 0xB080 (PANTHERLAKE)
[11:19:57] [PASSED] 0xB081 (PANTHERLAKE)
[11:19:57] [PASSED] 0xB082 (PANTHERLAKE)
[11:19:57] [PASSED] 0xB083 (PANTHERLAKE)
[11:19:57] [PASSED] 0xB084 (PANTHERLAKE)
[11:19:57] [PASSED] 0xB085 (PANTHERLAKE)
[11:19:57] [PASSED] 0xB086 (PANTHERLAKE)
[11:19:57] [PASSED] 0xB087 (PANTHERLAKE)
[11:19:57] [PASSED] 0xB08F (PANTHERLAKE)
[11:19:57] [PASSED] 0xB090 (PANTHERLAKE)
[11:19:57] [PASSED] 0xB0A0 (PANTHERLAKE)
[11:19:57] [PASSED] 0xB0B0 (PANTHERLAKE)
[11:19:57] [PASSED] 0xFD80 (PANTHERLAKE)
[11:19:57] [PASSED] 0xFD81 (PANTHERLAKE)
[11:19:57] [PASSED] 0xD740 (NOVALAKE_S)
[11:19:57] [PASSED] 0xD741 (NOVALAKE_S)
[11:19:57] [PASSED] 0xD742 (NOVALAKE_S)
[11:19:57] [PASSED] 0xD743 (NOVALAKE_S)
[11:19:57] [PASSED] 0xD744 (NOVALAKE_S)
[11:19:57] [PASSED] 0xD745 (NOVALAKE_S)
[11:19:57] [PASSED] 0x674C (CRESCENTISLAND)
[11:19:57] [PASSED] 0xD750 (NOVALAKE_P)
[11:19:57] [PASSED] 0xD751 (NOVALAKE_P)
[11:19:57] [PASSED] 0xD752 (NOVALAKE_P)
[11:19:57] [PASSED] 0xD753 (NOVALAKE_P)
[11:19:57] [PASSED] 0xD754 (NOVALAKE_P)
[11:19:57] [PASSED] 0xD755 (NOVALAKE_P)
[11:19:57] [PASSED] 0xD756 (NOVALAKE_P)
[11:19:57] [PASSED] 0xD757 (NOVALAKE_P)
[11:19:57] [PASSED] 0xD75F (NOVALAKE_P)
[11:19:57] =============== [PASSED] check_platform_desc ===============
[11:19:57] ===================== [PASSED] xe_pci ======================
[11:19:57] =================== xe_rtp (2 subtests) ====================
[11:19:57] =============== xe_rtp_process_to_sr_tests ================
[11:19:57] [PASSED] coalesce-same-reg
[11:19:57] [PASSED] no-match-no-add
[11:19:57] [PASSED] match-or
[11:19:57] [PASSED] match-or-xfail
[11:19:57] [PASSED] no-match-no-add-multiple-rules
[11:19:57] [PASSED] two-regs-two-entries
[11:19:57] [PASSED] clr-one-set-other
[11:19:57] [PASSED] set-field
[11:19:57] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[11:19:57] [PASSED] conflict-not-disjoint
[11:19:57] [PASSED] conflict-reg-type
[11:19:57] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[11:19:57] ================== xe_rtp_process_tests ===================
[11:19:57] [PASSED] active1
[11:19:57] [PASSED] active2
[11:19:57] [PASSED] active-inactive
[11:19:57] [PASSED] inactive-active
[11:19:57] [PASSED] inactive-1st_or_active-inactive
[11:19:57] [PASSED] inactive-2nd_or_active-inactive
[11:19:57] [PASSED] inactive-last_or_active-inactive
[11:19:57] [PASSED] inactive-no_or_active-inactive
[11:19:57] ============== [PASSED] xe_rtp_process_tests ===============
[11:19:57] ===================== [PASSED] xe_rtp ======================
[11:19:57] ==================== xe_wa (1 subtest) =====================
[11:19:57] ======================== xe_wa_gt =========================
[11:19:57] [PASSED] TIGERLAKE B0
[11:19:57] [PASSED] DG1 A0
[11:19:57] [PASSED] DG1 B0
[11:19:57] [PASSED] ALDERLAKE_S A0
[11:19:57] [PASSED] ALDERLAKE_S B0
[11:19:57] [PASSED] ALDERLAKE_S C0
[11:19:57] [PASSED] ALDERLAKE_S D0
[11:19:57] [PASSED] ALDERLAKE_P A0
[11:19:57] [PASSED] ALDERLAKE_P B0
[11:19:57] [PASSED] ALDERLAKE_P C0
[11:19:57] [PASSED] ALDERLAKE_S RPLS D0
[11:19:57] [PASSED] ALDERLAKE_P RPLU E0
[11:19:57] [PASSED] DG2 G10 C0
[11:19:57] [PASSED] DG2 G11 B1
[11:19:57] [PASSED] DG2 G12 A1
[11:19:57] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:19:57] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:19:57] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[11:19:57] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[11:19:57] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[11:19:57] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[11:19:57] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[11:19:57] ==================== [PASSED] xe_wa_gt =====================
[11:19:57] ====================== [PASSED] xe_wa ======================
[11:19:57] ============================================================
[11:19:57] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[11:19:57] Elapsed time: 42.608s total, 4.368s configuring, 37.572s building, 0.620s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[11:19:57] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:19:59] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[11:20:28] Starting KUnit Kernel (1/1)...
[11:20:28] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:20:28] ============ drm_test_pick_cmdline (2 subtests) ============
[11:20:28] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[11:20:28] =============== drm_test_pick_cmdline_named ===============
[11:20:28] [PASSED] NTSC
[11:20:28] [PASSED] NTSC-J
[11:20:28] [PASSED] PAL
[11:20:28] [PASSED] PAL-M
[11:20:28] =========== [PASSED] drm_test_pick_cmdline_named ===========
[11:20:28] ============== [PASSED] drm_test_pick_cmdline ==============
[11:20:28] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[11:20:28] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[11:20:28] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[11:20:28] =========== drm_validate_clone_mode (2 subtests) ===========
[11:20:28] ============== drm_test_check_in_clone_mode ===============
[11:20:28] [PASSED] in_clone_mode
[11:20:28] [PASSED] not_in_clone_mode
[11:20:28] ========== [PASSED] drm_test_check_in_clone_mode ===========
[11:20:28] =============== drm_test_check_valid_clones ===============
[11:20:28] [PASSED] not_in_clone_mode
[11:20:28] [PASSED] valid_clone
[11:20:28] [PASSED] invalid_clone
[11:20:28] =========== [PASSED] drm_test_check_valid_clones ===========
[11:20:28] ============= [PASSED] drm_validate_clone_mode =============
[11:20:28] ============= drm_validate_modeset (1 subtest) =============
[11:20:28] [PASSED] drm_test_check_connector_changed_modeset
[11:20:28] ============== [PASSED] drm_validate_modeset ===============
[11:20:28] ====== drm_test_bridge_get_current_state (2 subtests) ======
[11:20:28] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[11:20:28] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[11:20:28] ======== [PASSED] drm_test_bridge_get_current_state ========
[11:20:28] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[11:20:28] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[11:20:28] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[11:20:28] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[11:20:28] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[11:20:28] ============== drm_bridge_alloc (2 subtests) ===============
[11:20:28] [PASSED] drm_test_drm_bridge_alloc_basic
[11:20:28] [PASSED] drm_test_drm_bridge_alloc_get_put
[11:20:28] ================ [PASSED] drm_bridge_alloc =================
[11:20:28] ============= drm_cmdline_parser (40 subtests) =============
[11:20:28] [PASSED] drm_test_cmdline_force_d_only
[11:20:28] [PASSED] drm_test_cmdline_force_D_only_dvi
[11:20:28] [PASSED] drm_test_cmdline_force_D_only_hdmi
[11:20:28] [PASSED] drm_test_cmdline_force_D_only_not_digital
[11:20:28] [PASSED] drm_test_cmdline_force_e_only
[11:20:28] [PASSED] drm_test_cmdline_res
[11:20:28] [PASSED] drm_test_cmdline_res_vesa
[11:20:28] [PASSED] drm_test_cmdline_res_vesa_rblank
[11:20:28] [PASSED] drm_test_cmdline_res_rblank
[11:20:28] [PASSED] drm_test_cmdline_res_bpp
[11:20:28] [PASSED] drm_test_cmdline_res_refresh
[11:20:28] [PASSED] drm_test_cmdline_res_bpp_refresh
[11:20:28] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[11:20:28] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[11:20:28] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[11:20:28] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[11:20:28] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[11:20:28] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[11:20:28] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[11:20:28] [PASSED] drm_test_cmdline_res_margins_force_on
[11:20:28] [PASSED] drm_test_cmdline_res_vesa_margins
[11:20:28] [PASSED] drm_test_cmdline_name
[11:20:28] [PASSED] drm_test_cmdline_name_bpp
[11:20:28] [PASSED] drm_test_cmdline_name_option
[11:20:28] [PASSED] drm_test_cmdline_name_bpp_option
[11:20:28] [PASSED] drm_test_cmdline_rotate_0
[11:20:28] [PASSED] drm_test_cmdline_rotate_90
[11:20:28] [PASSED] drm_test_cmdline_rotate_180
[11:20:28] [PASSED] drm_test_cmdline_rotate_270
[11:20:28] [PASSED] drm_test_cmdline_hmirror
[11:20:28] [PASSED] drm_test_cmdline_vmirror
[11:20:28] [PASSED] drm_test_cmdline_margin_options
[11:20:28] [PASSED] drm_test_cmdline_multiple_options
[11:20:28] [PASSED] drm_test_cmdline_bpp_extra_and_option
[11:20:28] [PASSED] drm_test_cmdline_extra_and_option
[11:20:28] [PASSED] drm_test_cmdline_freestanding_options
[11:20:28] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[11:20:28] [PASSED] drm_test_cmdline_panel_orientation
[11:20:28] ================ drm_test_cmdline_invalid =================
[11:20:28] [PASSED] margin_only
[11:20:28] [PASSED] interlace_only
[11:20:28] [PASSED] res_missing_x
[11:20:28] [PASSED] res_missing_y
[11:20:28] [PASSED] res_bad_y
[11:20:28] [PASSED] res_missing_y_bpp
[11:20:28] [PASSED] res_bad_bpp
[11:20:28] [PASSED] res_bad_refresh
[11:20:28] [PASSED] res_bpp_refresh_force_on_off
[11:20:28] [PASSED] res_invalid_mode
[11:20:28] [PASSED] res_bpp_wrong_place_mode
[11:20:28] [PASSED] name_bpp_refresh
[11:20:28] [PASSED] name_refresh
[11:20:28] [PASSED] name_refresh_wrong_mode
[11:20:28] [PASSED] name_refresh_invalid_mode
[11:20:28] [PASSED] rotate_multiple
[11:20:28] [PASSED] rotate_invalid_val
[11:20:28] [PASSED] rotate_truncated
[11:20:28] [PASSED] invalid_option
[11:20:28] [PASSED] invalid_tv_option
[11:20:28] [PASSED] truncated_tv_option
[11:20:28] ============ [PASSED] drm_test_cmdline_invalid =============
[11:20:28] =============== drm_test_cmdline_tv_options ===============
[11:20:28] [PASSED] NTSC
[11:20:28] [PASSED] NTSC_443
[11:20:28] [PASSED] NTSC_J
[11:20:28] [PASSED] PAL
[11:20:28] [PASSED] PAL_M
[11:20:28] [PASSED] PAL_N
[11:20:28] [PASSED] SECAM
[11:20:28] [PASSED] MONO_525
[11:20:28] [PASSED] MONO_625
[11:20:28] =========== [PASSED] drm_test_cmdline_tv_options ===========
[11:20:28] =============== [PASSED] drm_cmdline_parser ================
[11:20:28] ========== drmm_connector_hdmi_init (20 subtests) ==========
[11:20:28] [PASSED] drm_test_connector_hdmi_init_valid
[11:20:28] [PASSED] drm_test_connector_hdmi_init_bpc_8
[11:20:28] [PASSED] drm_test_connector_hdmi_init_bpc_10
[11:20:28] [PASSED] drm_test_connector_hdmi_init_bpc_12
[11:20:28] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[11:20:28] [PASSED] drm_test_connector_hdmi_init_bpc_null
[11:20:28] [PASSED] drm_test_connector_hdmi_init_formats_empty
[11:20:28] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[11:20:28] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[11:20:28] [PASSED] supported_formats=0x9 yuv420_allowed=1
[11:20:28] [PASSED] supported_formats=0x9 yuv420_allowed=0
[11:20:28] [PASSED] supported_formats=0x5 yuv420_allowed=1
[11:20:28] [PASSED] supported_formats=0x5 yuv420_allowed=0
[11:20:28] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[11:20:28] [PASSED] drm_test_connector_hdmi_init_null_ddc
[11:20:28] [PASSED] drm_test_connector_hdmi_init_null_product
[11:20:28] [PASSED] drm_test_connector_hdmi_init_null_vendor
[11:20:28] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[11:20:28] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[11:20:28] [PASSED] drm_test_connector_hdmi_init_product_valid
[11:20:28] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[11:20:28] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[11:20:28] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[11:20:28] ========= drm_test_connector_hdmi_init_type_valid =========
[11:20:28] [PASSED] HDMI-A
[11:20:28] [PASSED] HDMI-B
[11:20:28] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[11:20:28] ======== drm_test_connector_hdmi_init_type_invalid ========
[11:20:28] [PASSED] Unknown
[11:20:28] [PASSED] VGA
[11:20:28] [PASSED] DVI-I
[11:20:28] [PASSED] DVI-D
[11:20:28] [PASSED] DVI-A
[11:20:28] [PASSED] Composite
[11:20:28] [PASSED] SVIDEO
[11:20:28] [PASSED] LVDS
[11:20:28] [PASSED] Component
[11:20:28] [PASSED] DIN
[11:20:28] [PASSED] DP
[11:20:28] [PASSED] TV
[11:20:28] [PASSED] eDP
[11:20:28] [PASSED] Virtual
[11:20:28] [PASSED] DSI
[11:20:28] [PASSED] DPI
[11:20:28] [PASSED] Writeback
[11:20:28] [PASSED] SPI
[11:20:28] [PASSED] USB
[11:20:28] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[11:20:28] ============ [PASSED] drmm_connector_hdmi_init =============
[11:20:28] ============= drmm_connector_init (3 subtests) =============
[11:20:28] [PASSED] drm_test_drmm_connector_init
[11:20:28] [PASSED] drm_test_drmm_connector_init_null_ddc
[11:20:28] ========= drm_test_drmm_connector_init_type_valid =========
[11:20:28] [PASSED] Unknown
[11:20:28] [PASSED] VGA
[11:20:28] [PASSED] DVI-I
[11:20:28] [PASSED] DVI-D
[11:20:28] [PASSED] DVI-A
[11:20:28] [PASSED] Composite
[11:20:28] [PASSED] SVIDEO
[11:20:28] [PASSED] LVDS
[11:20:28] [PASSED] Component
[11:20:28] [PASSED] DIN
[11:20:28] [PASSED] DP
[11:20:28] [PASSED] HDMI-A
[11:20:28] [PASSED] HDMI-B
[11:20:28] [PASSED] TV
[11:20:28] [PASSED] eDP
[11:20:28] [PASSED] Virtual
[11:20:28] [PASSED] DSI
[11:20:28] [PASSED] DPI
[11:20:28] [PASSED] Writeback
[11:20:28] [PASSED] SPI
[11:20:28] [PASSED] USB
[11:20:28] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[11:20:28] =============== [PASSED] drmm_connector_init ===============
[11:20:28] ========= drm_connector_dynamic_init (6 subtests) ==========
[11:20:28] [PASSED] drm_test_drm_connector_dynamic_init
[11:20:28] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[11:20:28] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[11:20:28] [PASSED] drm_test_drm_connector_dynamic_init_properties
[11:20:28] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[11:20:28] [PASSED] Unknown
[11:20:28] [PASSED] VGA
[11:20:28] [PASSED] DVI-I
[11:20:28] [PASSED] DVI-D
[11:20:28] [PASSED] DVI-A
[11:20:28] [PASSED] Composite
[11:20:28] [PASSED] SVIDEO
[11:20:28] [PASSED] LVDS
[11:20:28] [PASSED] Component
[11:20:28] [PASSED] DIN
[11:20:28] [PASSED] DP
[11:20:28] [PASSED] HDMI-A
[11:20:28] [PASSED] HDMI-B
[11:20:28] [PASSED] TV
[11:20:28] [PASSED] eDP
[11:20:28] [PASSED] Virtual
[11:20:28] [PASSED] DSI
[11:20:28] [PASSED] DPI
[11:20:28] [PASSED] Writeback
[11:20:28] [PASSED] SPI
[11:20:28] [PASSED] USB
[11:20:28] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[11:20:28] ======== drm_test_drm_connector_dynamic_init_name =========
[11:20:28] [PASSED] Unknown
[11:20:28] [PASSED] VGA
[11:20:28] [PASSED] DVI-I
[11:20:28] [PASSED] DVI-D
[11:20:28] [PASSED] DVI-A
[11:20:28] [PASSED] Composite
[11:20:28] [PASSED] SVIDEO
[11:20:28] [PASSED] LVDS
[11:20:28] [PASSED] Component
[11:20:28] [PASSED] DIN
[11:20:28] [PASSED] DP
[11:20:28] [PASSED] HDMI-A
[11:20:28] [PASSED] HDMI-B
[11:20:28] [PASSED] TV
[11:20:28] [PASSED] eDP
[11:20:28] [PASSED] Virtual
[11:20:28] [PASSED] DSI
[11:20:28] [PASSED] DPI
[11:20:28] [PASSED] Writeback
[11:20:28] [PASSED] SPI
[11:20:28] [PASSED] USB
[11:20:28] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[11:20:28] =========== [PASSED] drm_connector_dynamic_init ============
[11:20:28] ==== drm_connector_dynamic_register_early (4 subtests) =====
[11:20:28] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[11:20:28] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[11:20:28] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[11:20:28] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[11:20:28] ====== [PASSED] drm_connector_dynamic_register_early =======
[11:20:28] ======= drm_connector_dynamic_register (7 subtests) ========
[11:20:28] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[11:20:28] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[11:20:28] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[11:20:28] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[11:20:28] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[11:20:28] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[11:20:28] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[11:20:28] ========= [PASSED] drm_connector_dynamic_register ==========
[11:20:28] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[11:20:28] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[11:20:28] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[11:20:28] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[11:20:28] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[11:20:28] ========== drm_test_get_tv_mode_from_name_valid ===========
[11:20:28] [PASSED] NTSC
[11:20:28] [PASSED] NTSC-443
[11:20:28] [PASSED] NTSC-J
[11:20:28] [PASSED] PAL
[11:20:28] [PASSED] PAL-M
[11:20:28] [PASSED] PAL-N
[11:20:28] [PASSED] SECAM
[11:20:28] [PASSED] Mono
[11:20:28] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[11:20:28] [PASSED] drm_test_get_tv_mode_from_name_truncated
[11:20:28] ============ [PASSED] drm_get_tv_mode_from_name ============
[11:20:28] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[11:20:28] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[11:20:28] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[11:20:28] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[11:20:28] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[11:20:28] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[11:20:28] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[11:20:28] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[11:20:28] [PASSED] VIC 96
[11:20:28] [PASSED] VIC 97
[11:20:28] [PASSED] VIC 101
[11:20:28] [PASSED] VIC 102
[11:20:28] [PASSED] VIC 106
[11:20:28] [PASSED] VIC 107
[11:20:28] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[11:20:28] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[11:20:28] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[11:20:28] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[11:20:28] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[11:20:28] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[11:20:28] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[11:20:28] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[11:20:28] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[11:20:28] [PASSED] Automatic
[11:20:28] [PASSED] Full
[11:20:28] [PASSED] Limited 16:235
[11:20:28] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[11:20:28] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[11:20:28] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[11:20:28] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[11:20:28] === drm_test_drm_hdmi_connector_get_output_format_name ====
[11:20:28] [PASSED] RGB
[11:20:28] [PASSED] YUV 4:2:0
[11:20:28] [PASSED] YUV 4:2:2
[11:20:28] [PASSED] YUV 4:4:4
[11:20:28] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[11:20:28] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[11:20:28] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[11:20:28] ============= drm_damage_helper (21 subtests) ==============
[11:20:28] [PASSED] drm_test_damage_iter_no_damage
[11:20:28] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[11:20:28] [PASSED] drm_test_damage_iter_no_damage_src_moved
[11:20:28] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[11:20:28] [PASSED] drm_test_damage_iter_no_damage_not_visible
[11:20:28] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[11:20:28] [PASSED] drm_test_damage_iter_no_damage_no_fb
[11:20:28] [PASSED] drm_test_damage_iter_simple_damage
[11:20:28] [PASSED] drm_test_damage_iter_single_damage
[11:20:28] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[11:20:28] [PASSED] drm_test_damage_iter_single_damage_outside_src
[11:20:28] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[11:20:28] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[11:20:28] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[11:20:28] [PASSED] drm_test_damage_iter_single_damage_src_moved
[11:20:28] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[11:20:28] [PASSED] drm_test_damage_iter_damage
[11:20:28] [PASSED] drm_test_damage_iter_damage_one_intersect
[11:20:28] [PASSED] drm_test_damage_iter_damage_one_outside
[11:20:28] [PASSED] drm_test_damage_iter_damage_src_moved
[11:20:28] [PASSED] drm_test_damage_iter_damage_not_visible
[11:20:28] ================ [PASSED] drm_damage_helper ================
[11:20:28] ============== drm_dp_mst_helper (3 subtests) ==============
[11:20:28] ============== drm_test_dp_mst_calc_pbn_mode ==============
[11:20:28] [PASSED] Clock 154000 BPP 30 DSC disabled
[11:20:28] [PASSED] Clock 234000 BPP 30 DSC disabled
[11:20:28] [PASSED] Clock 297000 BPP 24 DSC disabled
[11:20:28] [PASSED] Clock 332880 BPP 24 DSC enabled
[11:20:28] [PASSED] Clock 324540 BPP 24 DSC enabled
[11:20:28] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[11:20:28] ============== drm_test_dp_mst_calc_pbn_div ===============
[11:20:28] [PASSED] Link rate 2000000 lane count 4
[11:20:28] [PASSED] Link rate 2000000 lane count 2
[11:20:28] [PASSED] Link rate 2000000 lane count 1
[11:20:28] [PASSED] Link rate 1350000 lane count 4
[11:20:28] [PASSED] Link rate 1350000 lane count 2
[11:20:28] [PASSED] Link rate 1350000 lane count 1
[11:20:28] [PASSED] Link rate 1000000 lane count 4
[11:20:28] [PASSED] Link rate 1000000 lane count 2
[11:20:28] [PASSED] Link rate 1000000 lane count 1
[11:20:28] [PASSED] Link rate 810000 lane count 4
[11:20:28] [PASSED] Link rate 810000 lane count 2
[11:20:28] [PASSED] Link rate 810000 lane count 1
[11:20:28] [PASSED] Link rate 540000 lane count 4
[11:20:28] [PASSED] Link rate 540000 lane count 2
[11:20:28] [PASSED] Link rate 540000 lane count 1
[11:20:28] [PASSED] Link rate 270000 lane count 4
[11:20:28] [PASSED] Link rate 270000 lane count 2
[11:20:28] [PASSED] Link rate 270000 lane count 1
[11:20:28] [PASSED] Link rate 162000 lane count 4
[11:20:28] [PASSED] Link rate 162000 lane count 2
[11:20:28] [PASSED] Link rate 162000 lane count 1
[11:20:28] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[11:20:28] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[11:20:28] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[11:20:28] [PASSED] DP_POWER_UP_PHY with port number
[11:20:28] [PASSED] DP_POWER_DOWN_PHY with port number
[11:20:28] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[11:20:28] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[11:20:28] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[11:20:28] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[11:20:28] [PASSED] DP_QUERY_PAYLOAD with port number
[11:20:28] [PASSED] DP_QUERY_PAYLOAD with VCPI
[11:20:28] [PASSED] DP_REMOTE_DPCD_READ with port number
[11:20:28] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[11:20:28] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[11:20:28] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[11:20:28] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[11:20:28] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[11:20:28] [PASSED] DP_REMOTE_I2C_READ with port number
[11:20:28] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[11:20:28] [PASSED] DP_REMOTE_I2C_READ with transactions array
[11:20:28] [PASSED] DP_REMOTE_I2C_WRITE with port number
[11:20:28] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[11:20:28] [PASSED] DP_REMOTE_I2C_WRITE with data array
[11:20:28] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[11:20:28] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[11:20:28] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[11:20:28] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[11:20:28] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[11:20:28] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[11:20:28] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[11:20:28] ================ [PASSED] drm_dp_mst_helper ================
[11:20:28] ================== drm_exec (7 subtests) ===================
[11:20:28] [PASSED] sanitycheck
[11:20:28] [PASSED] test_lock
[11:20:28] [PASSED] test_lock_unlock
[11:20:28] [PASSED] test_duplicates
[11:20:28] [PASSED] test_prepare
[11:20:28] [PASSED] test_prepare_array
[11:20:28] [PASSED] test_multiple_loops
[11:20:28] ==================== [PASSED] drm_exec =====================
[11:20:28] =========== drm_format_helper_test (17 subtests) ===========
[11:20:28] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[11:20:28] [PASSED] single_pixel_source_buffer
[11:20:28] [PASSED] single_pixel_clip_rectangle
[11:20:28] [PASSED] well_known_colors
[11:20:28] [PASSED] destination_pitch
[11:20:28] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[11:20:28] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[11:20:28] [PASSED] single_pixel_source_buffer
[11:20:28] [PASSED] single_pixel_clip_rectangle
[11:20:28] [PASSED] well_known_colors
[11:20:28] [PASSED] destination_pitch
[11:20:28] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[11:20:28] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[11:20:28] [PASSED] single_pixel_source_buffer
[11:20:28] [PASSED] single_pixel_clip_rectangle
[11:20:28] [PASSED] well_known_colors
[11:20:28] [PASSED] destination_pitch
[11:20:28] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[11:20:28] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[11:20:28] [PASSED] single_pixel_source_buffer
[11:20:28] [PASSED] single_pixel_clip_rectangle
[11:20:28] [PASSED] well_known_colors
[11:20:28] [PASSED] destination_pitch
[11:20:28] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[11:20:28] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[11:20:28] [PASSED] single_pixel_source_buffer
[11:20:28] [PASSED] single_pixel_clip_rectangle
[11:20:28] [PASSED] well_known_colors
[11:20:28] [PASSED] destination_pitch
[11:20:28] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[11:20:28] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[11:20:28] [PASSED] single_pixel_source_buffer
[11:20:28] [PASSED] single_pixel_clip_rectangle
[11:20:28] [PASSED] well_known_colors
[11:20:28] [PASSED] destination_pitch
[11:20:28] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[11:20:28] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[11:20:28] [PASSED] single_pixel_source_buffer
[11:20:28] [PASSED] single_pixel_clip_rectangle
[11:20:28] [PASSED] well_known_colors
[11:20:28] [PASSED] destination_pitch
[11:20:28] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[11:20:28] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[11:20:28] [PASSED] single_pixel_source_buffer
[11:20:28] [PASSED] single_pixel_clip_rectangle
[11:20:28] [PASSED] well_known_colors
[11:20:28] [PASSED] destination_pitch
[11:20:28] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[11:20:28] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[11:20:28] [PASSED] single_pixel_source_buffer
[11:20:28] [PASSED] single_pixel_clip_rectangle
[11:20:28] [PASSED] well_known_colors
[11:20:28] [PASSED] destination_pitch
[11:20:28] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[11:20:28] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[11:20:28] [PASSED] single_pixel_source_buffer
[11:20:28] [PASSED] single_pixel_clip_rectangle
[11:20:28] [PASSED] well_known_colors
[11:20:28] [PASSED] destination_pitch
[11:20:28] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[11:20:28] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[11:20:28] [PASSED] single_pixel_source_buffer
[11:20:28] [PASSED] single_pixel_clip_rectangle
[11:20:28] [PASSED] well_known_colors
[11:20:28] [PASSED] destination_pitch
[11:20:28] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[11:20:28] ============== drm_test_fb_xrgb8888_to_mono ===============
[11:20:28] [PASSED] single_pixel_source_buffer
[11:20:28] [PASSED] single_pixel_clip_rectangle
[11:20:28] [PASSED] well_known_colors
[11:20:28] [PASSED] destination_pitch
[11:20:28] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[11:20:28] ==================== drm_test_fb_swab =====================
[11:20:28] [PASSED] single_pixel_source_buffer
[11:20:28] [PASSED] single_pixel_clip_rectangle
[11:20:28] [PASSED] well_known_colors
[11:20:28] [PASSED] destination_pitch
[11:20:28] ================ [PASSED] drm_test_fb_swab =================
[11:20:28] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[11:20:28] [PASSED] single_pixel_source_buffer
[11:20:28] [PASSED] single_pixel_clip_rectangle
[11:20:28] [PASSED] well_known_colors
[11:20:28] [PASSED] destination_pitch
[11:20:28] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[11:20:28] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[11:20:28] [PASSED] single_pixel_source_buffer
[11:20:28] [PASSED] single_pixel_clip_rectangle
[11:20:28] [PASSED] well_known_colors
[11:20:28] [PASSED] destination_pitch
[11:20:28] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[11:20:28] ================= drm_test_fb_clip_offset =================
[11:20:28] [PASSED] pass through
[11:20:28] [PASSED] horizontal offset
[11:20:28] [PASSED] vertical offset
[11:20:28] [PASSED] horizontal and vertical offset
[11:20:28] [PASSED] horizontal offset (custom pitch)
[11:20:28] [PASSED] vertical offset (custom pitch)
[11:20:28] [PASSED] horizontal and vertical offset (custom pitch)
[11:20:28] ============= [PASSED] drm_test_fb_clip_offset =============
[11:20:28] =================== drm_test_fb_memcpy ====================
[11:20:28] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[11:20:28] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[11:20:28] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[11:20:28] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[11:20:28] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[11:20:28] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[11:20:28] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[11:20:28] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[11:20:28] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[11:20:28] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[11:20:28] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[11:20:28] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[11:20:28] =============== [PASSED] drm_test_fb_memcpy ================
[11:20:28] ============= [PASSED] drm_format_helper_test ==============
[11:20:28] ================= drm_format (18 subtests) =================
[11:20:28] [PASSED] drm_test_format_block_width_invalid
[11:20:28] [PASSED] drm_test_format_block_width_one_plane
[11:20:28] [PASSED] drm_test_format_block_width_two_plane
[11:20:28] [PASSED] drm_test_format_block_width_three_plane
[11:20:28] [PASSED] drm_test_format_block_width_tiled
[11:20:28] [PASSED] drm_test_format_block_height_invalid
[11:20:28] [PASSED] drm_test_format_block_height_one_plane
[11:20:28] [PASSED] drm_test_format_block_height_two_plane
[11:20:28] [PASSED] drm_test_format_block_height_three_plane
[11:20:28] [PASSED] drm_test_format_block_height_tiled
[11:20:28] [PASSED] drm_test_format_min_pitch_invalid
[11:20:28] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[11:20:28] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[11:20:28] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[11:20:28] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[11:20:28] [PASSED] drm_test_format_min_pitch_two_plane
[11:20:28] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[11:20:28] [PASSED] drm_test_format_min_pitch_tiled
[11:20:28] =================== [PASSED] drm_format ====================
[11:20:28] ============== drm_framebuffer (10 subtests) ===============
[11:20:28] ========== drm_test_framebuffer_check_src_coords ==========
[11:20:28] [PASSED] Success: source fits into fb
[11:20:28] [PASSED] Fail: overflowing fb with x-axis coordinate
[11:20:28] [PASSED] Fail: overflowing fb with y-axis coordinate
[11:20:28] [PASSED] Fail: overflowing fb with source width
[11:20:28] [PASSED] Fail: overflowing fb with source height
[11:20:28] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[11:20:28] [PASSED] drm_test_framebuffer_cleanup
[11:20:28] =============== drm_test_framebuffer_create ===============
[11:20:28] [PASSED] ABGR8888 normal sizes
[11:20:28] [PASSED] ABGR8888 max sizes
[11:20:28] [PASSED] ABGR8888 pitch greater than min required
[11:20:28] [PASSED] ABGR8888 pitch less than min required
[11:20:28] [PASSED] ABGR8888 Invalid width
[11:20:28] [PASSED] ABGR8888 Invalid buffer handle
[11:20:28] [PASSED] No pixel format
[11:20:28] [PASSED] ABGR8888 Width 0
[11:20:28] [PASSED] ABGR8888 Height 0
[11:20:28] [PASSED] ABGR8888 Out of bound height * pitch combination
[11:20:28] [PASSED] ABGR8888 Large buffer offset
[11:20:28] [PASSED] ABGR8888 Buffer offset for inexistent plane
[11:20:28] [PASSED] ABGR8888 Invalid flag
[11:20:28] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[11:20:28] [PASSED] ABGR8888 Valid buffer modifier
[11:20:28] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[11:20:28] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[11:20:28] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[11:20:28] [PASSED] NV12 Normal sizes
[11:20:28] [PASSED] NV12 Max sizes
[11:20:28] [PASSED] NV12 Invalid pitch
[11:20:28] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[11:20:28] [PASSED] NV12 different modifier per-plane
[11:20:28] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[11:20:28] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[11:20:28] [PASSED] NV12 Modifier for inexistent plane
[11:20:28] [PASSED] NV12 Handle for inexistent plane
[11:20:28] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[11:20:28] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[11:20:28] [PASSED] YVU420 Normal sizes
[11:20:28] [PASSED] YVU420 Max sizes
[11:20:28] [PASSED] YVU420 Invalid pitch
[11:20:28] [PASSED] YVU420 Different pitches
[11:20:28] [PASSED] YVU420 Different buffer offsets/pitches
[11:20:28] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[11:20:28] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[11:20:28] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[11:20:28] [PASSED] YVU420 Valid modifier
[11:20:28] [PASSED] YVU420 Different modifiers per plane
[11:20:28] [PASSED] YVU420 Modifier for inexistent plane
[11:20:28] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[11:20:28] [PASSED] X0L2 Normal sizes
[11:20:28] [PASSED] X0L2 Max sizes
[11:20:28] [PASSED] X0L2 Invalid pitch
[11:20:28] [PASSED] X0L2 Pitch greater than minimum required
[11:20:28] [PASSED] X0L2 Handle for inexistent plane
[11:20:28] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[11:20:28] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[11:20:28] [PASSED] X0L2 Valid modifier
[11:20:28] [PASSED] X0L2 Modifier for inexistent plane
[11:20:28] =========== [PASSED] drm_test_framebuffer_create ===========
[11:20:28] [PASSED] drm_test_framebuffer_free
[11:20:28] [PASSED] drm_test_framebuffer_init
[11:20:28] [PASSED] drm_test_framebuffer_init_bad_format
[11:20:28] [PASSED] drm_test_framebuffer_init_dev_mismatch
[11:20:28] [PASSED] drm_test_framebuffer_lookup
[11:20:28] [PASSED] drm_test_framebuffer_lookup_inexistent
[11:20:28] [PASSED] drm_test_framebuffer_modifiers_not_supported
[11:20:28] ================= [PASSED] drm_framebuffer =================
[11:20:28] ================ drm_gem_shmem (8 subtests) ================
[11:20:28] [PASSED] drm_gem_shmem_test_obj_create
[11:20:28] [PASSED] drm_gem_shmem_test_obj_create_private
[11:20:28] [PASSED] drm_gem_shmem_test_pin_pages
[11:20:28] [PASSED] drm_gem_shmem_test_vmap
[11:20:28] [PASSED] drm_gem_shmem_test_get_sg_table
[11:20:28] [PASSED] drm_gem_shmem_test_get_pages_sgt
[11:20:28] [PASSED] drm_gem_shmem_test_madvise
[11:20:28] [PASSED] drm_gem_shmem_test_purge
[11:20:28] ================== [PASSED] drm_gem_shmem ==================
[11:20:28] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[11:20:28] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[11:20:28] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[11:20:28] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[11:20:28] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[11:20:28] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[11:20:28] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[11:20:28] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[11:20:28] [PASSED] Automatic
[11:20:28] [PASSED] Full
[11:20:28] [PASSED] Limited 16:235
[11:20:28] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[11:20:28] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[11:20:28] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[11:20:28] [PASSED] drm_test_check_disable_connector
[11:20:28] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[11:20:28] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[11:20:28] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[11:20:28] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[11:20:28] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[11:20:28] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[11:20:28] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[11:20:28] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[11:20:28] [PASSED] drm_test_check_output_bpc_dvi
[11:20:28] [PASSED] drm_test_check_output_bpc_format_vic_1
[11:20:28] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[11:20:28] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[11:20:28] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[11:20:28] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[11:20:28] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[11:20:28] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[11:20:28] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[11:20:28] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[11:20:28] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[11:20:28] [PASSED] drm_test_check_broadcast_rgb_value
[11:20:28] [PASSED] drm_test_check_bpc_8_value
[11:20:28] [PASSED] drm_test_check_bpc_10_value
[11:20:28] [PASSED] drm_test_check_bpc_12_value
[11:20:28] [PASSED] drm_test_check_format_value
[11:20:28] [PASSED] drm_test_check_tmds_char_value
[11:20:28] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[11:20:28] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[11:20:28] [PASSED] drm_test_check_mode_valid
[11:20:28] [PASSED] drm_test_check_mode_valid_reject
[11:20:28] [PASSED] drm_test_check_mode_valid_reject_rate
[11:20:28] [PASSED] drm_test_check_mode_valid_reject_max_clock
[11:20:28] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[11:20:28] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[11:20:28] [PASSED] drm_test_check_infoframes
[11:20:28] [PASSED] drm_test_check_reject_avi_infoframe
[11:20:28] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[11:20:28] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[11:20:28] [PASSED] drm_test_check_reject_audio_infoframe
[11:20:28] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[11:20:28] ================= drm_managed (2 subtests) =================
[11:20:28] [PASSED] drm_test_managed_release_action
[11:20:28] [PASSED] drm_test_managed_run_action
[11:20:28] =================== [PASSED] drm_managed ===================
[11:20:28] =================== drm_mm (6 subtests) ====================
[11:20:28] [PASSED] drm_test_mm_init
[11:20:28] [PASSED] drm_test_mm_debug
[11:20:28] [PASSED] drm_test_mm_align32
[11:20:28] [PASSED] drm_test_mm_align64
[11:20:28] [PASSED] drm_test_mm_lowest
[11:20:28] [PASSED] drm_test_mm_highest
[11:20:28] ===================== [PASSED] drm_mm ======================
[11:20:28] ============= drm_modes_analog_tv (5 subtests) =============
[11:20:28] [PASSED] drm_test_modes_analog_tv_mono_576i
[11:20:28] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[11:20:28] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[11:20:28] [PASSED] drm_test_modes_analog_tv_pal_576i
[11:20:28] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[11:20:28] =============== [PASSED] drm_modes_analog_tv ===============
[11:20:28] ============== drm_plane_helper (2 subtests) ===============
[11:20:28] =============== drm_test_check_plane_state ================
[11:20:28] [PASSED] clipping_simple
[11:20:28] [PASSED] clipping_rotate_reflect
[11:20:28] [PASSED] positioning_simple
[11:20:28] [PASSED] upscaling
[11:20:28] [PASSED] downscaling
[11:20:28] [PASSED] rounding1
[11:20:28] [PASSED] rounding2
[11:20:28] [PASSED] rounding3
[11:20:28] [PASSED] rounding4
[11:20:28] =========== [PASSED] drm_test_check_plane_state ============
[11:20:28] =========== drm_test_check_invalid_plane_state ============
[11:20:28] [PASSED] positioning_invalid
[11:20:28] [PASSED] upscaling_invalid
[11:20:28] [PASSED] downscaling_invalid
[11:20:28] ======= [PASSED] drm_test_check_invalid_plane_state ========
[11:20:28] ================ [PASSED] drm_plane_helper =================
[11:20:28] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[11:20:28] ====== drm_test_connector_helper_tv_get_modes_check =======
[11:20:28] [PASSED] None
[11:20:28] [PASSED] PAL
[11:20:28] [PASSED] NTSC
[11:20:28] [PASSED] Both, NTSC Default
[11:20:28] [PASSED] Both, PAL Default
[11:20:28] [PASSED] Both, NTSC Default, with PAL on command-line
[11:20:28] [PASSED] Both, PAL Default, with NTSC on command-line
[11:20:28] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[11:20:28] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[11:20:28] ================== drm_rect (9 subtests) ===================
[11:20:28] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[11:20:28] [PASSED] drm_test_rect_clip_scaled_not_clipped
[11:20:28] [PASSED] drm_test_rect_clip_scaled_clipped
[11:20:28] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[11:20:28] ================= drm_test_rect_intersect =================
[11:20:28] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[11:20:28] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[11:20:28] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[11:20:28] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[11:20:28] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[11:20:28] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[11:20:28] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[11:20:28] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[11:20:28] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[11:20:28] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[11:20:28] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[11:20:28] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[11:20:28] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[11:20:28] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[11:20:28] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[11:20:28] ============= [PASSED] drm_test_rect_intersect =============
[11:20:28] ================ drm_test_rect_calc_hscale ================
[11:20:28] [PASSED] normal use
[11:20:28] [PASSED] out of max range
[11:20:28] [PASSED] out of min range
[11:20:28] [PASSED] zero dst
[11:20:28] [PASSED] negative src
[11:20:28] [PASSED] negative dst
[11:20:28] ============ [PASSED] drm_test_rect_calc_hscale ============
[11:20:28] ================ drm_test_rect_calc_vscale ================
[11:20:28] [PASSED] normal use
[11:20:28] [PASSED] out of max range
[11:20:28] [PASSED] out of min range
[11:20:28] [PASSED] zero dst
[11:20:28] [PASSED] negative src
[11:20:28] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[11:20:28] ============ [PASSED] drm_test_rect_calc_vscale ============
[11:20:28] ================== drm_test_rect_rotate ===================
[11:20:28] [PASSED] reflect-x
[11:20:28] [PASSED] reflect-y
[11:20:28] [PASSED] rotate-0
[11:20:28] [PASSED] rotate-90
[11:20:28] [PASSED] rotate-180
[11:20:28] [PASSED] rotate-270
[11:20:28] ============== [PASSED] drm_test_rect_rotate ===============
[11:20:28] ================ drm_test_rect_rotate_inv =================
[11:20:28] [PASSED] reflect-x
[11:20:28] [PASSED] reflect-y
[11:20:28] [PASSED] rotate-0
[11:20:28] [PASSED] rotate-90
[11:20:28] [PASSED] rotate-180
[11:20:28] [PASSED] rotate-270
[11:20:28] ============ [PASSED] drm_test_rect_rotate_inv =============
[11:20:28] ==================== [PASSED] drm_rect =====================
[11:20:28] ============ drm_sysfb_modeset_test (1 subtest) ============
[11:20:28] ============ drm_test_sysfb_build_fourcc_list =============
[11:20:28] [PASSED] no native formats
[11:20:28] [PASSED] XRGB8888 as native format
[11:20:28] [PASSED] remove duplicates
[11:20:28] [PASSED] convert alpha formats
[11:20:28] [PASSED] random formats
[11:20:28] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[11:20:28] ============= [PASSED] drm_sysfb_modeset_test ==============
[11:20:28] ================== drm_fixp (2 subtests) ===================
[11:20:28] [PASSED] drm_test_int2fixp
[11:20:28] [PASSED] drm_test_sm2fixp
[11:20:28] ==================== [PASSED] drm_fixp =====================
[11:20:28] ============================================================
[11:20:28] Testing complete. Ran 621 tests: passed: 621
[11:20:28] Elapsed time: 30.867s total, 1.673s configuring, 28.977s building, 0.167s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[11:20:28] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:20:30] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[11:20:39] Starting KUnit Kernel (1/1)...
[11:20:39] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:20:39] ================= ttm_device (5 subtests) ==================
[11:20:39] [PASSED] ttm_device_init_basic
[11:20:39] [PASSED] ttm_device_init_multiple
[11:20:39] [PASSED] ttm_device_fini_basic
[11:20:39] [PASSED] ttm_device_init_no_vma_man
[11:20:39] ================== ttm_device_init_pools ==================
[11:20:39] [PASSED] No DMA allocations, no DMA32 required
[11:20:39] [PASSED] DMA allocations, DMA32 required
[11:20:39] [PASSED] No DMA allocations, DMA32 required
[11:20:39] [PASSED] DMA allocations, no DMA32 required
[11:20:39] ============== [PASSED] ttm_device_init_pools ==============
[11:20:39] =================== [PASSED] ttm_device ====================
[11:20:39] ================== ttm_pool (8 subtests) ===================
[11:20:39] ================== ttm_pool_alloc_basic ===================
[11:20:39] [PASSED] One page
[11:20:39] [PASSED] More than one page
[11:20:39] [PASSED] Above the allocation limit
[11:20:39] [PASSED] One page, with coherent DMA mappings enabled
[11:20:39] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:20:39] ============== [PASSED] ttm_pool_alloc_basic ===============
[11:20:39] ============== ttm_pool_alloc_basic_dma_addr ==============
[11:20:39] [PASSED] One page
[11:20:39] [PASSED] More than one page
[11:20:39] [PASSED] Above the allocation limit
[11:20:39] [PASSED] One page, with coherent DMA mappings enabled
[11:20:39] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:20:39] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[11:20:39] [PASSED] ttm_pool_alloc_order_caching_match
[11:20:39] [PASSED] ttm_pool_alloc_caching_mismatch
[11:20:39] [PASSED] ttm_pool_alloc_order_mismatch
[11:20:39] [PASSED] ttm_pool_free_dma_alloc
[11:20:39] [PASSED] ttm_pool_free_no_dma_alloc
[11:20:39] [PASSED] ttm_pool_fini_basic
[11:20:39] ==================== [PASSED] ttm_pool =====================
[11:20:39] ================ ttm_resource (8 subtests) =================
[11:20:39] ================= ttm_resource_init_basic =================
[11:20:39] [PASSED] Init resource in TTM_PL_SYSTEM
[11:20:39] [PASSED] Init resource in TTM_PL_VRAM
[11:20:39] [PASSED] Init resource in a private placement
[11:20:39] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[11:20:39] ============= [PASSED] ttm_resource_init_basic =============
[11:20:39] [PASSED] ttm_resource_init_pinned
[11:20:39] [PASSED] ttm_resource_fini_basic
[11:20:39] [PASSED] ttm_resource_manager_init_basic
[11:20:39] [PASSED] ttm_resource_manager_usage_basic
[11:20:39] [PASSED] ttm_resource_manager_set_used_basic
[11:20:39] [PASSED] ttm_sys_man_alloc_basic
[11:20:39] [PASSED] ttm_sys_man_free_basic
[11:20:39] ================== [PASSED] ttm_resource ===================
[11:20:39] =================== ttm_tt (15 subtests) ===================
[11:20:39] ==================== ttm_tt_init_basic ====================
[11:20:39] [PASSED] Page-aligned size
[11:20:39] [PASSED] Extra pages requested
[11:20:39] ================ [PASSED] ttm_tt_init_basic ================
[11:20:39] [PASSED] ttm_tt_init_misaligned
[11:20:39] [PASSED] ttm_tt_fini_basic
[11:20:39] [PASSED] ttm_tt_fini_sg
[11:20:39] [PASSED] ttm_tt_fini_shmem
[11:20:39] [PASSED] ttm_tt_create_basic
[11:20:39] [PASSED] ttm_tt_create_invalid_bo_type
[11:20:39] [PASSED] ttm_tt_create_ttm_exists
[11:20:39] [PASSED] ttm_tt_create_failed
[11:20:39] [PASSED] ttm_tt_destroy_basic
[11:20:39] [PASSED] ttm_tt_populate_null_ttm
[11:20:39] [PASSED] ttm_tt_populate_populated_ttm
[11:20:39] [PASSED] ttm_tt_unpopulate_basic
[11:20:39] [PASSED] ttm_tt_unpopulate_empty_ttm
[11:20:39] [PASSED] ttm_tt_swapin_basic
[11:20:39] ===================== [PASSED] ttm_tt ======================
[11:20:39] =================== ttm_bo (14 subtests) ===================
[11:20:39] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[11:20:39] [PASSED] Cannot be interrupted and sleeps
[11:20:39] [PASSED] Cannot be interrupted, locks straight away
[11:20:39] [PASSED] Can be interrupted, sleeps
[11:20:39] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[11:20:39] [PASSED] ttm_bo_reserve_locked_no_sleep
[11:20:39] [PASSED] ttm_bo_reserve_no_wait_ticket
[11:20:39] [PASSED] ttm_bo_reserve_double_resv
[11:20:39] [PASSED] ttm_bo_reserve_interrupted
[11:20:39] [PASSED] ttm_bo_reserve_deadlock
[11:20:39] [PASSED] ttm_bo_unreserve_basic
[11:20:39] [PASSED] ttm_bo_unreserve_pinned
[11:20:39] [PASSED] ttm_bo_unreserve_bulk
[11:20:39] [PASSED] ttm_bo_fini_basic
[11:20:39] [PASSED] ttm_bo_fini_shared_resv
[11:20:39] [PASSED] ttm_bo_pin_basic
[11:20:39] [PASSED] ttm_bo_pin_unpin_resource
[11:20:39] [PASSED] ttm_bo_multiple_pin_one_unpin
[11:20:39] ===================== [PASSED] ttm_bo ======================
[11:20:39] ============== ttm_bo_validate (22 subtests) ===============
[11:20:39] ============== ttm_bo_init_reserved_sys_man ===============
[11:20:39] [PASSED] Buffer object for userspace
[11:20:39] [PASSED] Kernel buffer object
[11:20:39] [PASSED] Shared buffer object
[11:20:39] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[11:20:39] ============== ttm_bo_init_reserved_mock_man ==============
[11:20:39] [PASSED] Buffer object for userspace
[11:20:39] [PASSED] Kernel buffer object
[11:20:39] [PASSED] Shared buffer object
[11:20:39] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[11:20:39] [PASSED] ttm_bo_init_reserved_resv
[11:20:39] ================== ttm_bo_validate_basic ==================
[11:20:39] [PASSED] Buffer object for userspace
[11:20:39] [PASSED] Kernel buffer object
[11:20:39] [PASSED] Shared buffer object
[11:20:39] ============== [PASSED] ttm_bo_validate_basic ==============
[11:20:39] [PASSED] ttm_bo_validate_invalid_placement
[11:20:39] ============= ttm_bo_validate_same_placement ==============
[11:20:39] [PASSED] System manager
[11:20:39] [PASSED] VRAM manager
[11:20:39] ========= [PASSED] ttm_bo_validate_same_placement ==========
[11:20:39] [PASSED] ttm_bo_validate_failed_alloc
[11:20:39] [PASSED] ttm_bo_validate_pinned
[11:20:39] [PASSED] ttm_bo_validate_busy_placement
[11:20:39] ================ ttm_bo_validate_multihop =================
[11:20:39] [PASSED] Buffer object for userspace
[11:20:39] [PASSED] Kernel buffer object
[11:20:39] [PASSED] Shared buffer object
[11:20:39] ============ [PASSED] ttm_bo_validate_multihop =============
[11:20:39] ========== ttm_bo_validate_no_placement_signaled ==========
[11:20:39] [PASSED] Buffer object in system domain, no page vector
[11:20:39] [PASSED] Buffer object in system domain with an existing page vector
[11:20:39] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[11:20:39] ======== ttm_bo_validate_no_placement_not_signaled ========
[11:20:39] [PASSED] Buffer object for userspace
[11:20:39] [PASSED] Kernel buffer object
[11:20:39] [PASSED] Shared buffer object
[11:20:39] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[11:20:39] [PASSED] ttm_bo_validate_move_fence_signaled
[11:20:39] ========= ttm_bo_validate_move_fence_not_signaled =========
[11:20:39] [PASSED] Waits for GPU
[11:20:39] [PASSED] Tries to lock straight away
[11:20:39] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[11:20:39] [PASSED] ttm_bo_validate_swapout
[11:20:39] [PASSED] ttm_bo_validate_happy_evict
[11:20:39] [PASSED] ttm_bo_validate_all_pinned_evict
[11:20:39] [PASSED] ttm_bo_validate_allowed_only_evict
[11:20:39] [PASSED] ttm_bo_validate_deleted_evict
[11:20:39] [PASSED] ttm_bo_validate_busy_domain_evict
[11:20:39] [PASSED] ttm_bo_validate_evict_gutting
[11:20:39] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[11:20:39] ================= [PASSED] ttm_bo_validate =================
[11:20:39] ============================================================
[11:20:39] Testing complete. Ran 102 tests: passed: 102
[11:20:39] Elapsed time: 11.421s total, 1.688s configuring, 9.466s building, 0.232s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 60+ messages in thread